blob: dc860a4113435e3fb6388948ddec8cb037588298 [file] [log] [blame]
Huang Shijie85bf6d42013-05-28 14:20:07 +08001/*
2 * EIM driver for Freescale's i.MX chips
3 *
4 * Copyright (C) 2013 Freescale Semiconductor, Inc.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10#include <linux/module.h>
11#include <linux/clk.h>
12#include <linux/io.h>
13#include <linux/of_device.h>
14
Huang Shijie85bf6d42013-05-28 14:20:07 +080015static const struct of_device_id weim_id_table[] = {
16 { .compatible = "fsl,imx6q-weim", },
17 {}
18};
19MODULE_DEVICE_TABLE(of, weim_id_table);
20
21#define CS_TIMING_LEN 6
22#define CS_REG_RANGE 0x18
23
24/* Parse and set the timing for this device. */
Alexander Shiyan29e54972013-06-29 08:27:52 +040025static int __init weim_timing_setup(struct device_node *np, void __iomem *base)
Huang Shijie85bf6d42013-05-28 14:20:07 +080026{
Huang Shijie85bf6d42013-05-28 14:20:07 +080027 u32 value[CS_TIMING_LEN];
28 u32 cs_idx;
29 int ret;
30 int i;
31
32 /* get the CS index from this child node's "reg" property. */
33 ret = of_property_read_u32(np, "reg", &cs_idx);
34 if (ret)
35 return ret;
36
37 /* The weim has four chip selects. */
38 if (cs_idx > 3)
39 return -EINVAL;
40
41 ret = of_property_read_u32_array(np, "fsl,weim-cs-timing",
42 value, CS_TIMING_LEN);
43 if (ret)
44 return ret;
45
46 /* set the timing for WEIM */
47 for (i = 0; i < CS_TIMING_LEN; i++)
Alexander Shiyan70ac98d2013-06-29 08:27:50 +040048 writel(value[i], base + cs_idx * CS_REG_RANGE + i * 4);
Huang Shijie85bf6d42013-05-28 14:20:07 +080049 return 0;
50}
51
Alexander Shiyan29e54972013-06-29 08:27:52 +040052static int __init weim_parse_dt(struct platform_device *pdev,
53 void __iomem *base)
Huang Shijie85bf6d42013-05-28 14:20:07 +080054{
55 struct device_node *child;
56 int ret;
57
58 for_each_child_of_node(pdev->dev.of_node, child) {
59 if (!child->name)
60 continue;
61
Alexander Shiyan70ac98d2013-06-29 08:27:50 +040062 ret = weim_timing_setup(child, base);
Huang Shijie85bf6d42013-05-28 14:20:07 +080063 if (ret) {
64 dev_err(&pdev->dev, "%s set timing failed.\n",
65 child->full_name);
66 return ret;
67 }
68 }
69
70 ret = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
71 if (ret)
72 dev_err(&pdev->dev, "%s fail to create devices.\n",
73 pdev->dev.of_node->full_name);
74 return ret;
75}
76
Alexander Shiyan29e54972013-06-29 08:27:52 +040077static int __init weim_probe(struct platform_device *pdev)
Huang Shijie85bf6d42013-05-28 14:20:07 +080078{
Huang Shijie85bf6d42013-05-28 14:20:07 +080079 struct resource *res;
Alexander Shiyan70ac98d2013-06-29 08:27:50 +040080 struct clk *clk;
81 void __iomem *base;
Alexander Shiyanb2d1fb72013-06-29 08:27:51 +040082 int ret;
Huang Shijie85bf6d42013-05-28 14:20:07 +080083
Huang Shijie85bf6d42013-05-28 14:20:07 +080084 /* get the resource */
85 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Alexander Shiyan70ac98d2013-06-29 08:27:50 +040086 base = devm_ioremap_resource(&pdev->dev, res);
Alexander Shiyanb2d1fb72013-06-29 08:27:51 +040087 if (IS_ERR(base))
88 return PTR_ERR(base);
Huang Shijie85bf6d42013-05-28 14:20:07 +080089
90 /* get the clock */
Alexander Shiyan70ac98d2013-06-29 08:27:50 +040091 clk = devm_clk_get(&pdev->dev, NULL);
92 if (IS_ERR(clk))
Alexander Shiyanb2d1fb72013-06-29 08:27:51 +040093 return PTR_ERR(clk);
Huang Shijie85bf6d42013-05-28 14:20:07 +080094
Alexander Shiyan70ac98d2013-06-29 08:27:50 +040095 ret = clk_prepare_enable(clk);
Huang Shijie85bf6d42013-05-28 14:20:07 +080096 if (ret)
Alexander Shiyanb2d1fb72013-06-29 08:27:51 +040097 return ret;
Huang Shijie85bf6d42013-05-28 14:20:07 +080098
99 /* parse the device node */
Alexander Shiyan70ac98d2013-06-29 08:27:50 +0400100 ret = weim_parse_dt(pdev, base);
Alexander Shiyanb2d1fb72013-06-29 08:27:51 +0400101 if (ret)
Alexander Shiyan70ac98d2013-06-29 08:27:50 +0400102 clk_disable_unprepare(clk);
Alexander Shiyanb2d1fb72013-06-29 08:27:51 +0400103 else
104 dev_info(&pdev->dev, "Driver registered.\n");
Huang Shijie85bf6d42013-05-28 14:20:07 +0800105
Huang Shijie85bf6d42013-05-28 14:20:07 +0800106 return ret;
107}
108
109static struct platform_driver weim_driver = {
110 .driver = {
Alexander Shiyanfc608c72013-06-29 08:27:53 +0400111 .name = "imx-weim",
112 .owner = THIS_MODULE,
113 .of_match_table = weim_id_table,
Huang Shijie85bf6d42013-05-28 14:20:07 +0800114 },
Huang Shijie85bf6d42013-05-28 14:20:07 +0800115};
Alexander Shiyan29e54972013-06-29 08:27:52 +0400116module_platform_driver_probe(weim_driver, weim_probe);
Huang Shijie85bf6d42013-05-28 14:20:07 +0800117
Huang Shijie85bf6d42013-05-28 14:20:07 +0800118MODULE_AUTHOR("Freescale Semiconductor Inc.");
119MODULE_DESCRIPTION("i.MX EIM Controller Driver");
120MODULE_LICENSE("GPL");