blob: d75c46ff31f65041859bfe98ade9d766057071e1 [file] [log] [blame]
Auke Kok9a799d72007-09-15 14:07:45 -07001/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
Shannon Nelson8c47eaa2010-01-13 01:49:34 +00004 Copyright(c) 1999 - 2010 Intel Corporation.
Auke Kok9a799d72007-09-15 14:07:45 -07005
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
Auke Kok9a799d72007-09-15 14:07:45 -070023 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28#include <linux/types.h>
29#include <linux/module.h>
30#include <linux/pci.h>
31#include <linux/netdevice.h>
32#include <linux/vmalloc.h>
33#include <linux/string.h>
34#include <linux/in.h>
35#include <linux/ip.h>
36#include <linux/tcp.h>
Lucy Liu60127862009-07-22 14:07:33 +000037#include <linux/pkt_sched.h>
Auke Kok9a799d72007-09-15 14:07:45 -070038#include <linux/ipv6.h>
39#include <net/checksum.h>
40#include <net/ip6_checksum.h>
41#include <linux/ethtool.h>
42#include <linux/if_vlan.h>
Yi Zoueacd73f2009-05-13 13:11:06 +000043#include <scsi/fc/fc_fcoe.h>
Auke Kok9a799d72007-09-15 14:07:45 -070044
45#include "ixgbe.h"
46#include "ixgbe_common.h"
Don Skidmoreee5f7842009-11-06 12:56:20 +000047#include "ixgbe_dcb_82599.h"
Greg Rose1cdd1ec2010-01-09 02:26:46 +000048#include "ixgbe_sriov.h"
Auke Kok9a799d72007-09-15 14:07:45 -070049
50char ixgbe_driver_name[] = "ixgbe";
Stephen Hemminger9c8eb722007-10-29 10:46:24 -070051static const char ixgbe_driver_string[] =
Peter P Waskiewiczb4617242008-09-11 20:04:46 -070052 "Intel(R) 10 Gigabit PCI Express Network Driver";
Auke Kok9a799d72007-09-15 14:07:45 -070053
Peter Waskiewicz92eb8792010-02-10 16:08:13 +000054#define DRV_VERSION "2.0.62-k2"
Stephen Hemminger9c8eb722007-10-29 10:46:24 -070055const char ixgbe_driver_version[] = DRV_VERSION;
Shannon Nelson8c47eaa2010-01-13 01:49:34 +000056static char ixgbe_copyright[] = "Copyright (c) 1999-2010 Intel Corporation.";
Auke Kok9a799d72007-09-15 14:07:45 -070057
58static const struct ixgbe_info *ixgbe_info_tbl[] = {
Peter P Waskiewiczb4617242008-09-11 20:04:46 -070059 [board_82598] = &ixgbe_82598_info,
PJ Waskiewicze8e26352009-02-27 15:45:05 +000060 [board_82599] = &ixgbe_82599_info,
Auke Kok9a799d72007-09-15 14:07:45 -070061};
62
63/* ixgbe_pci_tbl - PCI Device ID Table
64 *
65 * Wildcard entries (PCI_ANY_ID) should come last
66 * Last entry must be all 0s
67 *
68 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
69 * Class, Class Mask, private data (not used) }
70 */
Alexey Dobriyana3aa1882010-01-07 11:58:11 +000071static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl) = {
Don Skidmore1e336d02009-01-26 20:57:51 -080072 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598),
73 board_82598 },
Auke Kok9a799d72007-09-15 14:07:45 -070074 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
Auke Kok3957d632007-10-31 15:22:10 -070075 board_82598 },
Auke Kok9a799d72007-09-15 14:07:45 -070076 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
Auke Kok3957d632007-10-31 15:22:10 -070077 board_82598 },
Jesse Brandeburg0befdb32008-10-31 00:46:40 -070078 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT),
79 board_82598 },
Peter P Waskiewicz Jr3845bec2009-07-16 15:50:52 +000080 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2),
81 board_82598 },
Auke Kok9a799d72007-09-15 14:07:45 -070082 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
Auke Kok3957d632007-10-31 15:22:10 -070083 board_82598 },
Jesse Brandeburg8d792cd2008-08-08 16:24:19 -070084 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
85 board_82598 },
Donald Skidmorec4900be2008-11-20 21:11:42 -080086 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT),
87 board_82598 },
88 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM),
89 board_82598 },
Jesse Brandeburgb95f5fc2008-09-11 19:58:59 -070090 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR),
91 board_82598 },
Donald Skidmorec4900be2008-11-20 21:11:42 -080092 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM),
93 board_82598 },
Don Skidmore2f21bdd2009-02-01 01:18:23 -080094 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX),
95 board_82598 },
PJ Waskiewicze8e26352009-02-27 15:45:05 +000096 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4),
97 board_82599 },
Peter P Waskiewicz Jr1fcf03e2009-05-17 20:58:04 +000098 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM),
99 board_82599 },
Don Skidmore74757d42009-12-08 07:22:23 +0000100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR),
101 board_82599 },
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP),
103 board_82599 },
Don Skidmore38ad1c82009-10-08 15:35:58 +0000104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM),
105 board_82599 },
Don Skidmoredbfec662009-10-02 08:58:25 +0000106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ),
107 board_82599 },
Peter P Waskiewicz Jr8911184f2009-09-14 07:47:49 +0000108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4),
109 board_82599 },
Don Skidmore312eb932009-10-02 08:58:04 +0000110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE),
111 board_82599 },
Auke Kok9a799d72007-09-15 14:07:45 -0700112
113 /* required last entry */
114 {0, }
115};
116MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
117
Jeff Garzik5dd2d332008-10-16 05:09:31 -0400118#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800119static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700120 void *p);
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800121static struct notifier_block dca_notifier = {
122 .notifier_call = ixgbe_notify_dca,
123 .next = NULL,
124 .priority = 0
125};
126#endif
127
Greg Rose1cdd1ec2010-01-09 02:26:46 +0000128#ifdef CONFIG_PCI_IOV
129static unsigned int max_vfs;
130module_param(max_vfs, uint, 0);
131MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate "
132 "per physical function");
133#endif /* CONFIG_PCI_IOV */
134
Auke Kok9a799d72007-09-15 14:07:45 -0700135MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
136MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
137MODULE_LICENSE("GPL");
138MODULE_VERSION(DRV_VERSION);
139
140#define DEFAULT_DEBUG_LEVEL_SHIFT 3
141
Greg Rose1cdd1ec2010-01-09 02:26:46 +0000142static inline void ixgbe_disable_sriov(struct ixgbe_adapter *adapter)
143{
144 struct ixgbe_hw *hw = &adapter->hw;
145 u32 gcr;
146 u32 gpie;
147 u32 vmdctl;
148
149#ifdef CONFIG_PCI_IOV
150 /* disable iov and allow time for transactions to clear */
151 pci_disable_sriov(adapter->pdev);
152#endif
153
154 /* turn off device IOV mode */
155 gcr = IXGBE_READ_REG(hw, IXGBE_GCR_EXT);
156 gcr &= ~(IXGBE_GCR_EXT_SRIOV);
157 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr);
158 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
159 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
160 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
161
162 /* set default pool back to 0 */
163 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
164 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
165 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
166
167 /* take a breather then clean up driver data */
168 msleep(100);
169 if (adapter->vfinfo)
170 kfree(adapter->vfinfo);
171 adapter->vfinfo = NULL;
172
173 adapter->num_vfs = 0;
174 adapter->flags &= ~IXGBE_FLAG_SRIOV_ENABLED;
175}
176
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -0800177static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
178{
179 u32 ctrl_ext;
180
181 /* Let firmware take over control of h/w */
182 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
183 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700184 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -0800185}
186
187static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
188{
189 u32 ctrl_ext;
190
191 /* Let firmware know the driver has taken over */
192 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
193 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700194 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -0800195}
Auke Kok9a799d72007-09-15 14:07:45 -0700196
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000197/*
198 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
199 * @adapter: pointer to adapter struct
200 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
201 * @queue: queue to map the corresponding interrupt to
202 * @msix_vector: the vector to map to the corresponding queue
203 *
204 */
205static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
206 u8 queue, u8 msix_vector)
Auke Kok9a799d72007-09-15 14:07:45 -0700207{
208 u32 ivar, index;
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000209 struct ixgbe_hw *hw = &adapter->hw;
210 switch (hw->mac.type) {
211 case ixgbe_mac_82598EB:
212 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
213 if (direction == -1)
214 direction = 0;
215 index = (((direction * 64) + queue) >> 2) & 0x1F;
216 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
217 ivar &= ~(0xFF << (8 * (queue & 0x3)));
218 ivar |= (msix_vector << (8 * (queue & 0x3)));
219 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
220 break;
221 case ixgbe_mac_82599EB:
222 if (direction == -1) {
223 /* other causes */
224 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
225 index = ((queue & 1) * 8);
226 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
227 ivar &= ~(0xFF << index);
228 ivar |= (msix_vector << index);
229 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
230 break;
231 } else {
232 /* tx or rx causes */
233 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
234 index = ((16 * (queue & 1)) + (8 * direction));
235 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
236 ivar &= ~(0xFF << index);
237 ivar |= (msix_vector << index);
238 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
239 break;
240 }
241 default:
242 break;
243 }
Auke Kok9a799d72007-09-15 14:07:45 -0700244}
245
Alexander Duyckfe49f042009-06-04 16:00:09 +0000246static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
247 u64 qmask)
248{
249 u32 mask;
250
251 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
252 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
253 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
254 } else {
255 mask = (qmask & 0xFFFFFFFF);
256 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
257 mask = (qmask >> 32);
258 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
259 }
260}
261
Auke Kok9a799d72007-09-15 14:07:45 -0700262static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700263 struct ixgbe_tx_buffer
264 *tx_buffer_info)
Auke Kok9a799d72007-09-15 14:07:45 -0700265{
Alexander Duycke5a43542009-12-02 16:46:56 +0000266 if (tx_buffer_info->dma) {
267 if (tx_buffer_info->mapped_as_page)
268 pci_unmap_page(adapter->pdev,
269 tx_buffer_info->dma,
270 tx_buffer_info->length,
271 PCI_DMA_TODEVICE);
272 else
273 pci_unmap_single(adapter->pdev,
274 tx_buffer_info->dma,
275 tx_buffer_info->length,
276 PCI_DMA_TODEVICE);
277 tx_buffer_info->dma = 0;
278 }
Auke Kok9a799d72007-09-15 14:07:45 -0700279 if (tx_buffer_info->skb) {
280 dev_kfree_skb_any(tx_buffer_info->skb);
281 tx_buffer_info->skb = NULL;
282 }
Alexander Duyck44df32c2009-03-31 21:34:23 +0000283 tx_buffer_info->time_stamp = 0;
Auke Kok9a799d72007-09-15 14:07:45 -0700284 /* tx_buffer_info must be completely set up in the transmit path */
285}
286
Yi Zou26f23d82009-11-06 12:56:00 +0000287/**
288 * ixgbe_tx_is_paused - check if the tx ring is paused
289 * @adapter: the ixgbe adapter
290 * @tx_ring: the corresponding tx_ring
291 *
292 * If not in DCB mode, checks TFCS.TXOFF, otherwise, find out the
293 * corresponding TC of this tx_ring when checking TFCS.
294 *
295 * Returns : true if paused
296 */
297static inline bool ixgbe_tx_is_paused(struct ixgbe_adapter *adapter,
298 struct ixgbe_ring *tx_ring)
299{
Yi Zou26f23d82009-11-06 12:56:00 +0000300 u32 txoff = IXGBE_TFCS_TXOFF;
301
302#ifdef CONFIG_IXGBE_DCB
303 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
Jaswinder Singh Rajput30b768322009-11-20 04:02:27 +0000304 int tc;
Yi Zou26f23d82009-11-06 12:56:00 +0000305 int reg_idx = tx_ring->reg_idx;
306 int dcb_i = adapter->ring_feature[RING_F_DCB].indices;
307
PJ Waskiewicz6837e892010-01-06 17:50:29 +0000308 switch (adapter->hw.mac.type) {
309 case ixgbe_mac_82598EB:
Yi Zou26f23d82009-11-06 12:56:00 +0000310 tc = reg_idx >> 2;
311 txoff = IXGBE_TFCS_TXOFF0;
PJ Waskiewicz6837e892010-01-06 17:50:29 +0000312 break;
313 case ixgbe_mac_82599EB:
Yi Zou26f23d82009-11-06 12:56:00 +0000314 tc = 0;
315 txoff = IXGBE_TFCS_TXOFF;
316 if (dcb_i == 8) {
317 /* TC0, TC1 */
318 tc = reg_idx >> 5;
319 if (tc == 2) /* TC2, TC3 */
320 tc += (reg_idx - 64) >> 4;
321 else if (tc == 3) /* TC4, TC5, TC6, TC7 */
322 tc += 1 + ((reg_idx - 96) >> 3);
323 } else if (dcb_i == 4) {
324 /* TC0, TC1 */
325 tc = reg_idx >> 6;
326 if (tc == 1) {
327 tc += (reg_idx - 64) >> 5;
328 if (tc == 2) /* TC2, TC3 */
329 tc += (reg_idx - 96) >> 4;
330 }
331 }
PJ Waskiewicz6837e892010-01-06 17:50:29 +0000332 break;
333 default:
334 tc = 0;
Yi Zou26f23d82009-11-06 12:56:00 +0000335 }
336 txoff <<= tc;
337 }
338#endif
339 return IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & txoff;
340}
341
Auke Kok9a799d72007-09-15 14:07:45 -0700342static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700343 struct ixgbe_ring *tx_ring,
344 unsigned int eop)
Auke Kok9a799d72007-09-15 14:07:45 -0700345{
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700346 struct ixgbe_hw *hw = &adapter->hw;
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700347
Auke Kok9a799d72007-09-15 14:07:45 -0700348 /* Detect a transmit hang in hardware, this serializes the
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700349 * check with the clearing of time_stamp and movement of eop */
Auke Kok9a799d72007-09-15 14:07:45 -0700350 adapter->detect_tx_hung = false;
Alexander Duyck44df32c2009-03-31 21:34:23 +0000351 if (tx_ring->tx_buffer_info[eop].time_stamp &&
Auke Kok9a799d72007-09-15 14:07:45 -0700352 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
Yi Zou26f23d82009-11-06 12:56:00 +0000353 !ixgbe_tx_is_paused(adapter, tx_ring)) {
Auke Kok9a799d72007-09-15 14:07:45 -0700354 /* detected Tx unit hang */
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700355 union ixgbe_adv_tx_desc *tx_desc;
356 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
Auke Kok9a799d72007-09-15 14:07:45 -0700357 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700358 " Tx Queue <%d>\n"
359 " TDH, TDT <%x>, <%x>\n"
Auke Kok9a799d72007-09-15 14:07:45 -0700360 " next_to_use <%x>\n"
361 " next_to_clean <%x>\n"
362 "tx_buffer_info[next_to_clean]\n"
363 " time_stamp <%lx>\n"
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700364 " jiffies <%lx>\n",
365 tx_ring->queue_index,
Alexander Duyck44df32c2009-03-31 21:34:23 +0000366 IXGBE_READ_REG(hw, tx_ring->head),
367 IXGBE_READ_REG(hw, tx_ring->tail),
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700368 tx_ring->next_to_use, eop,
369 tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
Auke Kok9a799d72007-09-15 14:07:45 -0700370 return true;
371 }
372
373 return false;
374}
375
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700376#define IXGBE_MAX_TXD_PWR 14
377#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800378
379/* Tx Descriptors needed, worst case */
380#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
381 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
382#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700383 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800384
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700385static void ixgbe_tx_timeout(struct net_device *netdev);
386
Auke Kok9a799d72007-09-15 14:07:45 -0700387/**
388 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
Alexander Duyckfe49f042009-06-04 16:00:09 +0000389 * @q_vector: structure containing interrupt and ring information
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700390 * @tx_ring: tx ring to clean
Auke Kok9a799d72007-09-15 14:07:45 -0700391 **/
Alexander Duyckfe49f042009-06-04 16:00:09 +0000392static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700393 struct ixgbe_ring *tx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -0700394{
Alexander Duyckfe49f042009-06-04 16:00:09 +0000395 struct ixgbe_adapter *adapter = q_vector->adapter;
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700396 struct net_device *netdev = adapter->netdev;
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800397 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
398 struct ixgbe_tx_buffer *tx_buffer_info;
399 unsigned int i, eop, count = 0;
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700400 unsigned int total_bytes = 0, total_packets = 0;
Auke Kok9a799d72007-09-15 14:07:45 -0700401
402 i = tx_ring->next_to_clean;
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800403 eop = tx_ring->tx_buffer_info[i].next_to_watch;
404 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
405
406 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
Jesse Brandeburg9a1a69ad2009-03-13 22:14:10 +0000407 (count < tx_ring->work_limit)) {
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800408 bool cleaned = false;
409 for ( ; !cleaned; count++) {
410 struct sk_buff *skb;
Auke Kok9a799d72007-09-15 14:07:45 -0700411 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
412 tx_buffer_info = &tx_ring->tx_buffer_info[i];
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800413 cleaned = (i == eop);
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700414 skb = tx_buffer_info->skb;
Auke Kok9a799d72007-09-15 14:07:45 -0700415
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800416 if (cleaned && skb) {
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800417 unsigned int segs, bytecount;
Yi Zou3d8fd382009-06-08 14:38:44 +0000418 unsigned int hlen = skb_headlen(skb);
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700419
420 /* gso_segs is currently only valid for tcp */
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800421 segs = skb_shinfo(skb)->gso_segs ?: 1;
Yi Zou3d8fd382009-06-08 14:38:44 +0000422#ifdef IXGBE_FCOE
423 /* adjust for FCoE Sequence Offload */
424 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
425 && (skb->protocol == htons(ETH_P_FCOE)) &&
426 skb_is_gso(skb)) {
427 hlen = skb_transport_offset(skb) +
428 sizeof(struct fc_frame_header) +
429 sizeof(struct fcoe_crc_eof);
430 segs = DIV_ROUND_UP(skb->len - hlen,
431 skb_shinfo(skb)->gso_size);
432 }
433#endif /* IXGBE_FCOE */
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800434 /* multiply data chunks by size of headers */
Yi Zou3d8fd382009-06-08 14:38:44 +0000435 bytecount = ((segs - 1) * hlen) + skb->len;
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700436 total_packets += segs;
437 total_bytes += bytecount;
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800438 }
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700439
Auke Kok9a799d72007-09-15 14:07:45 -0700440 ixgbe_unmap_and_free_tx_resource(adapter,
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700441 tx_buffer_info);
Auke Kok9a799d72007-09-15 14:07:45 -0700442
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800443 tx_desc->wb.status = 0;
444
Auke Kok9a799d72007-09-15 14:07:45 -0700445 i++;
446 if (i == tx_ring->count)
447 i = 0;
448 }
449
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800450 eop = tx_ring->tx_buffer_info[i].next_to_watch;
451 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
452 }
453
Auke Kok9a799d72007-09-15 14:07:45 -0700454 tx_ring->next_to_clean = i;
455
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800456#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700457 if (unlikely(count && netif_carrier_ok(netdev) &&
458 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800459 /* Make sure that anybody stopping the queue after this
460 * sees the new next_to_clean.
461 */
462 smp_mb();
Ayyappan Veeraiyan30eba972008-03-03 15:03:52 -0800463 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
464 !test_bit(__IXGBE_DOWN, &adapter->state)) {
465 netif_wake_subqueue(netdev, tx_ring->queue_index);
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +0000466 ++tx_ring->restart_queue;
Ayyappan Veeraiyan30eba972008-03-03 15:03:52 -0800467 }
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800468 }
Auke Kok9a799d72007-09-15 14:07:45 -0700469
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700470 if (adapter->detect_tx_hung) {
471 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
472 /* schedule immediate reset if we believe we hung */
473 DPRINTK(PROBE, INFO,
474 "tx hang %d detected, resetting adapter\n",
475 adapter->tx_timeout_count + 1);
476 ixgbe_tx_timeout(adapter->netdev);
477 }
478 }
Auke Kok9a799d72007-09-15 14:07:45 -0700479
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700480 /* re-arm the interrupt */
Alexander Duyckfe49f042009-06-04 16:00:09 +0000481 if (count >= tx_ring->work_limit)
482 ixgbe_irq_rearm_queues(adapter, ((u64)1 << q_vector->v_idx));
Auke Kok9a799d72007-09-15 14:07:45 -0700483
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700484 tx_ring->total_bytes += total_bytes;
485 tx_ring->total_packets += total_packets;
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700486 tx_ring->stats.packets += total_packets;
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800487 tx_ring->stats.bytes += total_bytes;
Jesse Brandeburg9a1a69ad2009-03-13 22:14:10 +0000488 return (count < tx_ring->work_limit);
Auke Kok9a799d72007-09-15 14:07:45 -0700489}
490
Jeff Garzik5dd2d332008-10-16 05:09:31 -0400491#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800492static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700493 struct ixgbe_ring *rx_ring)
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800494{
495 u32 rxctrl;
496 int cpu = get_cpu();
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +0000497 int q = rx_ring->reg_idx;
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800498
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700499 if (rx_ring->cpu != cpu) {
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800500 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000501 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
502 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
503 rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
504 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
505 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK_82599;
506 rxctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) <<
507 IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599);
508 }
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800509 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
510 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
Don Skidmore15005a32009-01-19 16:54:13 -0800511 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN);
512 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN |
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000513 IXGBE_DCA_RXCTRL_DESC_HSRO_EN);
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800514 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700515 rx_ring->cpu = cpu;
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800516 }
517 put_cpu();
518}
519
520static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700521 struct ixgbe_ring *tx_ring)
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800522{
523 u32 txctrl;
524 int cpu = get_cpu();
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +0000525 int q = tx_ring->reg_idx;
Don Skidmoreee5f7842009-11-06 12:56:20 +0000526 struct ixgbe_hw *hw = &adapter->hw;
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800527
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700528 if (tx_ring->cpu != cpu) {
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000529 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
Don Skidmoreee5f7842009-11-06 12:56:20 +0000530 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(q));
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000531 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
532 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
Don Skidmoreee5f7842009-11-06 12:56:20 +0000533 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
534 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(q), txctrl);
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000535 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
Don Skidmoreee5f7842009-11-06 12:56:20 +0000536 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(q));
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000537 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599;
538 txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) <<
Don Skidmoreee5f7842009-11-06 12:56:20 +0000539 IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599);
540 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
541 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(q), txctrl);
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000542 }
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700543 tx_ring->cpu = cpu;
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800544 }
545 put_cpu();
546}
547
548static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
549{
550 int i;
551
552 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
553 return;
554
Alexander Duycke35ec122009-05-21 13:07:12 +0000555 /* always use CB2 mode, difference is masked in the CB driver */
556 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
557
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800558 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +0000559 adapter->tx_ring[i]->cpu = -1;
560 ixgbe_update_tx_dca(adapter, adapter->tx_ring[i]);
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800561 }
562 for (i = 0; i < adapter->num_rx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +0000563 adapter->rx_ring[i]->cpu = -1;
564 ixgbe_update_rx_dca(adapter, adapter->rx_ring[i]);
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800565 }
566}
567
568static int __ixgbe_notify_dca(struct device *dev, void *data)
569{
570 struct net_device *netdev = dev_get_drvdata(dev);
571 struct ixgbe_adapter *adapter = netdev_priv(netdev);
572 unsigned long event = *(unsigned long *)data;
573
574 switch (event) {
575 case DCA_PROVIDER_ADD:
Jesse Brandeburg96b0e0f2008-08-26 04:27:21 -0700576 /* if we're already enabled, don't do it again */
577 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
578 break;
Denis V. Lunev652f0932008-03-27 14:39:17 +0300579 if (dca_add_requester(dev) == 0) {
Jesse Brandeburg96b0e0f2008-08-26 04:27:21 -0700580 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800581 ixgbe_setup_dca(adapter);
582 break;
583 }
584 /* Fall Through since DCA is disabled. */
585 case DCA_PROVIDER_REMOVE:
586 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
587 dca_remove_requester(dev);
588 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
589 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
590 }
591 break;
592 }
593
Denis V. Lunev652f0932008-03-27 14:39:17 +0300594 return 0;
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800595}
596
Jeff Garzik5dd2d332008-10-16 05:09:31 -0400597#endif /* CONFIG_IXGBE_DCA */
Auke Kok9a799d72007-09-15 14:07:45 -0700598/**
599 * ixgbe_receive_skb - Send a completed packet up the stack
600 * @adapter: board private structure
601 * @skb: packet to send up
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -0700602 * @status: hardware indication of status of receive
603 * @rx_ring: rx descriptor ring (for a specific queue) to setup
604 * @rx_desc: rx descriptor
Auke Kok9a799d72007-09-15 14:07:45 -0700605 **/
Herbert Xu78b6f4c2009-01-18 21:49:45 -0800606static void ixgbe_receive_skb(struct ixgbe_q_vector *q_vector,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700607 struct sk_buff *skb, u8 status,
Alexander Duyckfdaff1c2009-05-06 10:43:47 +0000608 struct ixgbe_ring *ring,
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -0700609 union ixgbe_adv_rx_desc *rx_desc)
Auke Kok9a799d72007-09-15 14:07:45 -0700610{
Herbert Xu78b6f4c2009-01-18 21:49:45 -0800611 struct ixgbe_adapter *adapter = q_vector->adapter;
612 struct napi_struct *napi = &q_vector->napi;
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -0700613 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
614 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
Auke Kok9a799d72007-09-15 14:07:45 -0700615
Alexander Duyckfdaff1c2009-05-06 10:43:47 +0000616 skb_record_rx_queue(skb, ring->queue_index);
Alexander Duyck182ff8d2009-04-27 22:35:33 +0000617 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
Lucy Liu8a62bab2009-08-13 14:09:38 +0000618 if (adapter->vlgrp && is_vlan && (tag & VLAN_VID_MASK))
Herbert Xu78b6f4c2009-01-18 21:49:45 -0800619 vlan_gro_receive(napi, adapter->vlgrp, tag, skb);
Auke Kok9a799d72007-09-15 14:07:45 -0700620 else
Herbert Xu78b6f4c2009-01-18 21:49:45 -0800621 napi_gro_receive(napi, skb);
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -0700622 } else {
Lucy Liu8a62bab2009-08-13 14:09:38 +0000623 if (adapter->vlgrp && is_vlan && (tag & VLAN_VID_MASK))
Alexander Duyck182ff8d2009-04-27 22:35:33 +0000624 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
625 else
626 netif_rx(skb);
Auke Kok9a799d72007-09-15 14:07:45 -0700627 }
628}
629
Ayyappan Veeraiyane59bd252008-02-01 15:59:09 -0800630/**
631 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
632 * @adapter: address of board private structure
633 * @status_err: hardware indication of status of receive
634 * @skb: skb currently being received and modified
635 **/
Auke Kok9a799d72007-09-15 14:07:45 -0700636static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
Don Skidmore8bae1b22009-07-23 18:00:39 +0000637 union ixgbe_adv_rx_desc *rx_desc,
638 struct sk_buff *skb)
Auke Kok9a799d72007-09-15 14:07:45 -0700639{
Don Skidmore8bae1b22009-07-23 18:00:39 +0000640 u32 status_err = le32_to_cpu(rx_desc->wb.upper.status_error);
641
Auke Kok9a799d72007-09-15 14:07:45 -0700642 skb->ip_summed = CHECKSUM_NONE;
643
Jesse Brandeburg712744b2008-08-26 04:26:56 -0700644 /* Rx csum disabled */
645 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
Auke Kok9a799d72007-09-15 14:07:45 -0700646 return;
Ayyappan Veeraiyane59bd252008-02-01 15:59:09 -0800647
648 /* if IP and error */
649 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
650 (status_err & IXGBE_RXDADV_ERR_IPE)) {
Auke Kok9a799d72007-09-15 14:07:45 -0700651 adapter->hw_csum_rx_error++;
652 return;
653 }
Ayyappan Veeraiyane59bd252008-02-01 15:59:09 -0800654
655 if (!(status_err & IXGBE_RXD_STAT_L4CS))
656 return;
657
658 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
Don Skidmore8bae1b22009-07-23 18:00:39 +0000659 u16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
660
661 /*
662 * 82599 errata, UDP frames with a 0 checksum can be marked as
663 * checksum errors.
664 */
665 if ((pkt_info & IXGBE_RXDADV_PKTTYPE_UDP) &&
666 (adapter->hw.mac.type == ixgbe_mac_82599EB))
667 return;
668
Ayyappan Veeraiyane59bd252008-02-01 15:59:09 -0800669 adapter->hw_csum_rx_error++;
670 return;
671 }
672
Auke Kok9a799d72007-09-15 14:07:45 -0700673 /* It must be a TCP or UDP packet with a valid checksum */
Ayyappan Veeraiyane59bd252008-02-01 15:59:09 -0800674 skb->ip_summed = CHECKSUM_UNNECESSARY;
Auke Kok9a799d72007-09-15 14:07:45 -0700675}
676
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000677static inline void ixgbe_release_rx_desc(struct ixgbe_hw *hw,
678 struct ixgbe_ring *rx_ring, u32 val)
679{
680 /*
681 * Force memory writes to complete before letting h/w
682 * know there are new descriptors to fetch. (Only
683 * applicable for weak-ordered memory model archs,
684 * such as IA-64).
685 */
686 wmb();
687 IXGBE_WRITE_REG(hw, IXGBE_RDT(rx_ring->reg_idx), val);
688}
689
Auke Kok9a799d72007-09-15 14:07:45 -0700690/**
691 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
692 * @adapter: address of board private structure
693 **/
694static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -0700695 struct ixgbe_ring *rx_ring,
696 int cleaned_count)
Auke Kok9a799d72007-09-15 14:07:45 -0700697{
Auke Kok9a799d72007-09-15 14:07:45 -0700698 struct pci_dev *pdev = adapter->pdev;
699 union ixgbe_adv_rx_desc *rx_desc;
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700700 struct ixgbe_rx_buffer *bi;
Auke Kok9a799d72007-09-15 14:07:45 -0700701 unsigned int i;
Auke Kok9a799d72007-09-15 14:07:45 -0700702
703 i = rx_ring->next_to_use;
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700704 bi = &rx_ring->rx_buffer_info[i];
Auke Kok9a799d72007-09-15 14:07:45 -0700705
706 while (cleaned_count--) {
707 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
708
Jesse Brandeburg762f4c52008-09-11 19:58:43 -0700709 if (!bi->page_dma &&
Yi Zou6e455b892009-08-06 13:05:44 +0000710 (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED)) {
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700711 if (!bi->page) {
Jesse Brandeburg762f4c52008-09-11 19:58:43 -0700712 bi->page = alloc_page(GFP_ATOMIC);
713 if (!bi->page) {
714 adapter->alloc_rx_page_failed++;
715 goto no_buffers;
716 }
717 bi->page_offset = 0;
718 } else {
719 /* use a half page if we're re-using */
720 bi->page_offset ^= (PAGE_SIZE / 2);
Auke Kok9a799d72007-09-15 14:07:45 -0700721 }
Jesse Brandeburg762f4c52008-09-11 19:58:43 -0700722
723 bi->page_dma = pci_map_page(pdev, bi->page,
724 bi->page_offset,
725 (PAGE_SIZE / 2),
726 PCI_DMA_FROMDEVICE);
Auke Kok9a799d72007-09-15 14:07:45 -0700727 }
728
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700729 if (!bi->skb) {
Jesse Brandeburg5ecc3612008-12-15 01:00:57 -0800730 struct sk_buff *skb;
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +0000731 /* netdev_alloc_skb reserves 32 bytes up front!! */
732 uint bufsz = rx_ring->rx_buf_len + SMP_CACHE_BYTES;
733 skb = netdev_alloc_skb(adapter->netdev, bufsz);
Auke Kok9a799d72007-09-15 14:07:45 -0700734
735 if (!skb) {
736 adapter->alloc_rx_buff_failed++;
737 goto no_buffers;
738 }
739
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +0000740 /* advance the data pointer to the next cache line */
741 skb_reserve(skb, (PTR_ALIGN(skb->data, SMP_CACHE_BYTES)
742 - skb->data));
743
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700744 bi->skb = skb;
Jesse Brandeburg4f57ca62009-06-30 11:44:56 +0000745 bi->dma = pci_map_single(pdev, skb->data,
746 rx_ring->rx_buf_len,
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700747 PCI_DMA_FROMDEVICE);
Auke Kok9a799d72007-09-15 14:07:45 -0700748 }
749 /* Refresh the desc even if buffer_addrs didn't change because
750 * each write-back erases this info. */
Yi Zou6e455b892009-08-06 13:05:44 +0000751 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700752 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
753 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
Auke Kok9a799d72007-09-15 14:07:45 -0700754 } else {
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700755 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
Auke Kok9a799d72007-09-15 14:07:45 -0700756 }
757
758 i++;
759 if (i == rx_ring->count)
760 i = 0;
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700761 bi = &rx_ring->rx_buffer_info[i];
Auke Kok9a799d72007-09-15 14:07:45 -0700762 }
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -0700763
Auke Kok9a799d72007-09-15 14:07:45 -0700764no_buffers:
765 if (rx_ring->next_to_use != i) {
766 rx_ring->next_to_use = i;
767 if (i-- == 0)
768 i = (rx_ring->count - 1);
769
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000770 ixgbe_release_rx_desc(&adapter->hw, rx_ring, i);
Auke Kok9a799d72007-09-15 14:07:45 -0700771 }
772}
773
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -0700774static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
775{
776 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
777}
778
779static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
780{
781 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
782}
783
Alexander Duyckf8212f92009-04-27 22:42:37 +0000784static inline u32 ixgbe_get_rsc_count(union ixgbe_adv_rx_desc *rx_desc)
785{
786 return (le32_to_cpu(rx_desc->wb.lower.lo_dword.data) &
787 IXGBE_RXDADV_RSCCNT_MASK) >>
788 IXGBE_RXDADV_RSCCNT_SHIFT;
789}
790
791/**
792 * ixgbe_transform_rsc_queue - change rsc queue into a full packet
793 * @skb: pointer to the last skb in the rsc queue
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +0000794 * @count: pointer to number of packets coalesced in this context
Alexander Duyckf8212f92009-04-27 22:42:37 +0000795 *
796 * This function changes a queue full of hw rsc buffers into a completed
797 * packet. It uses the ->prev pointers to find the first packet and then
798 * turns it into the frag list owner.
799 **/
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +0000800static inline struct sk_buff *ixgbe_transform_rsc_queue(struct sk_buff *skb,
801 u64 *count)
Alexander Duyckf8212f92009-04-27 22:42:37 +0000802{
803 unsigned int frag_list_size = 0;
804
805 while (skb->prev) {
806 struct sk_buff *prev = skb->prev;
807 frag_list_size += skb->len;
808 skb->prev = NULL;
809 skb = prev;
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +0000810 *count += 1;
Alexander Duyckf8212f92009-04-27 22:42:37 +0000811 }
812
813 skb_shinfo(skb)->frag_list = skb->next;
814 skb->next = NULL;
815 skb->len += frag_list_size;
816 skb->data_len += frag_list_size;
817 skb->truesize += frag_list_size;
818 return skb;
819}
820
Mallikarjuna R Chilakala43634e82010-02-25 23:14:37 +0000821struct ixgbe_rsc_cb {
822 dma_addr_t dma;
823};
824
825#define IXGBE_RSC_CB(skb) ((struct ixgbe_rsc_cb *)(skb)->cb)
826
Herbert Xu78b6f4c2009-01-18 21:49:45 -0800827static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700828 struct ixgbe_ring *rx_ring,
829 int *work_done, int work_to_do)
Auke Kok9a799d72007-09-15 14:07:45 -0700830{
Herbert Xu78b6f4c2009-01-18 21:49:45 -0800831 struct ixgbe_adapter *adapter = q_vector->adapter;
Ajit Khaparde2d86f132009-10-07 02:43:49 +0000832 struct net_device *netdev = adapter->netdev;
Auke Kok9a799d72007-09-15 14:07:45 -0700833 struct pci_dev *pdev = adapter->pdev;
834 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
835 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
836 struct sk_buff *skb;
Alexander Duyckf8212f92009-04-27 22:42:37 +0000837 unsigned int i, rsc_count = 0;
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -0700838 u32 len, staterr;
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -0700839 u16 hdr_info;
840 bool cleaned = false;
Auke Kok9a799d72007-09-15 14:07:45 -0700841 int cleaned_count = 0;
Ayyappan Veeraiyand2f4fbe2008-02-01 15:59:19 -0800842 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
Yi Zou3d8fd382009-06-08 14:38:44 +0000843#ifdef IXGBE_FCOE
844 int ddp_bytes = 0;
845#endif /* IXGBE_FCOE */
Auke Kok9a799d72007-09-15 14:07:45 -0700846
847 i = rx_ring->next_to_clean;
Auke Kok9a799d72007-09-15 14:07:45 -0700848 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
849 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
850 rx_buffer_info = &rx_ring->rx_buffer_info[i];
Auke Kok9a799d72007-09-15 14:07:45 -0700851
852 while (staterr & IXGBE_RXD_STAT_DD) {
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -0700853 u32 upper_len = 0;
Auke Kok9a799d72007-09-15 14:07:45 -0700854 if (*work_done >= work_to_do)
855 break;
856 (*work_done)++;
857
Milton Miller3c945e52010-02-19 17:44:42 +0000858 rmb(); /* read descriptor and rx_buffer_info after status DD */
Yi Zou6e455b892009-08-06 13:05:44 +0000859 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -0700860 hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
861 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
Jesse Brandeburg762f4c52008-09-11 19:58:43 -0700862 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
Auke Kok9a799d72007-09-15 14:07:45 -0700863 if (len > IXGBE_RX_HDR_SIZE)
864 len = IXGBE_RX_HDR_SIZE;
865 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -0700866 } else {
Auke Kok9a799d72007-09-15 14:07:45 -0700867 len = le16_to_cpu(rx_desc->wb.upper.length);
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -0700868 }
Auke Kok9a799d72007-09-15 14:07:45 -0700869
870 cleaned = true;
871 skb = rx_buffer_info->skb;
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +0000872 prefetch(skb->data);
Auke Kok9a799d72007-09-15 14:07:45 -0700873 rx_buffer_info->skb = NULL;
874
Alexander Duyck21fa4e62009-06-04 15:59:49 +0000875 if (rx_buffer_info->dma) {
Mallikarjuna R Chilakala43634e82010-02-25 23:14:37 +0000876 if ((adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) &&
877 (!(staterr & IXGBE_RXD_STAT_EOP)) &&
878 (!(skb->prev)))
879 /*
880 * When HWRSC is enabled, delay unmapping
881 * of the first packet. It carries the
882 * header information, HW may still
883 * access the header after the writeback.
884 * Only unmap it when EOP is reached
885 */
886 IXGBE_RSC_CB(skb)->dma = rx_buffer_info->dma;
887 else
888 pci_unmap_single(pdev, rx_buffer_info->dma,
889 rx_ring->rx_buf_len,
890 PCI_DMA_FROMDEVICE);
Jesse Brandeburg4f57ca62009-06-30 11:44:56 +0000891 rx_buffer_info->dma = 0;
Auke Kok9a799d72007-09-15 14:07:45 -0700892 skb_put(skb, len);
893 }
894
895 if (upper_len) {
896 pci_unmap_page(pdev, rx_buffer_info->page_dma,
Jesse Brandeburg762f4c52008-09-11 19:58:43 -0700897 PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
Auke Kok9a799d72007-09-15 14:07:45 -0700898 rx_buffer_info->page_dma = 0;
899 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
Jesse Brandeburg762f4c52008-09-11 19:58:43 -0700900 rx_buffer_info->page,
901 rx_buffer_info->page_offset,
902 upper_len);
903
904 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
905 (page_count(rx_buffer_info->page) != 1))
906 rx_buffer_info->page = NULL;
907 else
908 get_page(rx_buffer_info->page);
Auke Kok9a799d72007-09-15 14:07:45 -0700909
910 skb->len += upper_len;
911 skb->data_len += upper_len;
912 skb->truesize += upper_len;
913 }
914
915 i++;
916 if (i == rx_ring->count)
917 i = 0;
Auke Kok9a799d72007-09-15 14:07:45 -0700918
919 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
920 prefetch(next_rxd);
Auke Kok9a799d72007-09-15 14:07:45 -0700921 cleaned_count++;
Alexander Duyckf8212f92009-04-27 22:42:37 +0000922
Peter P Waskiewicz Jr0c19d6a2009-07-30 12:25:28 +0000923 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
Alexander Duyckf8212f92009-04-27 22:42:37 +0000924 rsc_count = ixgbe_get_rsc_count(rx_desc);
925
926 if (rsc_count) {
927 u32 nextp = (staterr & IXGBE_RXDADV_NEXTP_MASK) >>
928 IXGBE_RXDADV_NEXTP_SHIFT;
929 next_buffer = &rx_ring->rx_buffer_info[nextp];
Alexander Duyckf8212f92009-04-27 22:42:37 +0000930 } else {
931 next_buffer = &rx_ring->rx_buffer_info[i];
932 }
933
Auke Kok9a799d72007-09-15 14:07:45 -0700934 if (staterr & IXGBE_RXD_STAT_EOP) {
Alexander Duyckf8212f92009-04-27 22:42:37 +0000935 if (skb->prev)
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +0000936 skb = ixgbe_transform_rsc_queue(skb, &(rx_ring->rsc_count));
937 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
Mallikarjuna R Chilakalafd3686a2010-03-19 04:41:33 +0000938 if (IXGBE_RSC_CB(skb)->dma) {
Mallikarjuna R Chilakala43634e82010-02-25 23:14:37 +0000939 pci_unmap_single(pdev, IXGBE_RSC_CB(skb)->dma,
940 rx_ring->rx_buf_len,
941 PCI_DMA_FROMDEVICE);
Mallikarjuna R Chilakalafd3686a2010-03-19 04:41:33 +0000942 IXGBE_RSC_CB(skb)->dma = 0;
943 }
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +0000944 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED)
945 rx_ring->rsc_count += skb_shinfo(skb)->nr_frags;
946 else
947 rx_ring->rsc_count++;
948 rx_ring->rsc_flush++;
949 }
Auke Kok9a799d72007-09-15 14:07:45 -0700950 rx_ring->stats.packets++;
951 rx_ring->stats.bytes += skb->len;
952 } else {
Yi Zou6e455b892009-08-06 13:05:44 +0000953 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
Alexander Duyckf8212f92009-04-27 22:42:37 +0000954 rx_buffer_info->skb = next_buffer->skb;
955 rx_buffer_info->dma = next_buffer->dma;
956 next_buffer->skb = skb;
957 next_buffer->dma = 0;
958 } else {
959 skb->next = next_buffer->skb;
960 skb->next->prev = skb;
961 }
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +0000962 rx_ring->non_eop_descs++;
Auke Kok9a799d72007-09-15 14:07:45 -0700963 goto next_desc;
964 }
965
966 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
967 dev_kfree_skb_irq(skb);
968 goto next_desc;
969 }
970
Don Skidmore8bae1b22009-07-23 18:00:39 +0000971 ixgbe_rx_checksum(adapter, rx_desc, skb);
Ayyappan Veeraiyand2f4fbe2008-02-01 15:59:19 -0800972
973 /* probably a little skewed due to removing CRC */
974 total_rx_bytes += skb->len;
975 total_rx_packets++;
976
Jesse Brandeburg74ce8dd2008-09-11 20:03:23 -0700977 skb->protocol = eth_type_trans(skb, adapter->netdev);
Yi Zou332d4a72009-05-13 13:11:53 +0000978#ifdef IXGBE_FCOE
979 /* if ddp, not passing to ULD unless for FCP_RSP or error */
Yi Zou3d8fd382009-06-08 14:38:44 +0000980 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
981 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
982 if (!ddp_bytes)
Yi Zou332d4a72009-05-13 13:11:53 +0000983 goto next_desc;
Yi Zou3d8fd382009-06-08 14:38:44 +0000984 }
Yi Zou332d4a72009-05-13 13:11:53 +0000985#endif /* IXGBE_FCOE */
Alexander Duyckfdaff1c2009-05-06 10:43:47 +0000986 ixgbe_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc);
Auke Kok9a799d72007-09-15 14:07:45 -0700987
988next_desc:
989 rx_desc->wb.upper.status_error = 0;
990
991 /* return some buffers to hardware, one at a time is too slow */
992 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
993 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
994 cleaned_count = 0;
995 }
996
997 /* use prefetched values */
998 rx_desc = next_rxd;
Alexander Duyckf8212f92009-04-27 22:42:37 +0000999 rx_buffer_info = &rx_ring->rx_buffer_info[i];
Auke Kok9a799d72007-09-15 14:07:45 -07001000
1001 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07001002 }
1003
Auke Kok9a799d72007-09-15 14:07:45 -07001004 rx_ring->next_to_clean = i;
1005 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
1006
1007 if (cleaned_count)
1008 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
1009
Yi Zou3d8fd382009-06-08 14:38:44 +00001010#ifdef IXGBE_FCOE
1011 /* include DDPed FCoE data */
1012 if (ddp_bytes > 0) {
1013 unsigned int mss;
1014
1015 mss = adapter->netdev->mtu - sizeof(struct fcoe_hdr) -
1016 sizeof(struct fc_frame_header) -
1017 sizeof(struct fcoe_crc_eof);
1018 if (mss > 512)
1019 mss &= ~511;
1020 total_rx_bytes += ddp_bytes;
1021 total_rx_packets += DIV_ROUND_UP(ddp_bytes, mss);
1022 }
1023#endif /* IXGBE_FCOE */
1024
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001025 rx_ring->total_packets += total_rx_packets;
1026 rx_ring->total_bytes += total_rx_bytes;
Ajit Khaparde2d86f132009-10-07 02:43:49 +00001027 netdev->stats.rx_bytes += total_rx_bytes;
1028 netdev->stats.rx_packets += total_rx_packets;
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001029
Auke Kok9a799d72007-09-15 14:07:45 -07001030 return cleaned;
1031}
1032
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001033static int ixgbe_clean_rxonly(struct napi_struct *, int);
Auke Kok9a799d72007-09-15 14:07:45 -07001034/**
1035 * ixgbe_configure_msix - Configure MSI-X hardware
1036 * @adapter: board private structure
1037 *
1038 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
1039 * interrupts.
1040 **/
1041static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
1042{
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001043 struct ixgbe_q_vector *q_vector;
1044 int i, j, q_vectors, v_idx, r_idx;
1045 u32 mask;
Auke Kok9a799d72007-09-15 14:07:45 -07001046
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001047 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1048
Jesse Brandeburg4df10462009-03-13 22:15:31 +00001049 /*
1050 * Populate the IVAR table and set the ITR values to the
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001051 * corresponding register.
1052 */
1053 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
Alexander Duyck7a921c92009-05-06 10:43:28 +00001054 q_vector = adapter->q_vector[v_idx];
Akinobu Mita984b3f52010-03-05 13:41:37 -08001055 /* XXX for_each_set_bit(...) */
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001056 r_idx = find_first_bit(q_vector->rxr_idx,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001057 adapter->num_rx_queues);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001058
1059 for (i = 0; i < q_vector->rxr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001060 j = adapter->rx_ring[r_idx]->reg_idx;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001061 ixgbe_set_ivar(adapter, 0, j, v_idx);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001062 r_idx = find_next_bit(q_vector->rxr_idx,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001063 adapter->num_rx_queues,
1064 r_idx + 1);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001065 }
1066 r_idx = find_first_bit(q_vector->txr_idx,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001067 adapter->num_tx_queues);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001068
1069 for (i = 0; i < q_vector->txr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001070 j = adapter->tx_ring[r_idx]->reg_idx;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001071 ixgbe_set_ivar(adapter, 1, j, v_idx);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001072 r_idx = find_next_bit(q_vector->txr_idx,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001073 adapter->num_tx_queues,
1074 r_idx + 1);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001075 }
1076
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001077 if (q_vector->txr_count && !q_vector->rxr_count)
Nelson, Shannonf7554a22009-09-18 09:46:06 +00001078 /* tx only */
1079 q_vector->eitr = adapter->tx_eitr_param;
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001080 else if (q_vector->rxr_count)
Nelson, Shannonf7554a22009-09-18 09:46:06 +00001081 /* rx or mixed */
1082 q_vector->eitr = adapter->rx_eitr_param;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001083
Alexander Duyckfe49f042009-06-04 16:00:09 +00001084 ixgbe_write_eitr(q_vector);
Auke Kok9a799d72007-09-15 14:07:45 -07001085 }
1086
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001087 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
1088 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
1089 v_idx);
1090 else if (adapter->hw.mac.type == ixgbe_mac_82599EB)
1091 ixgbe_set_ivar(adapter, -1, 1, v_idx);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001092 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
Auke Kok9a799d72007-09-15 14:07:45 -07001093
Jesse Brandeburg41fb9242008-09-11 19:55:58 -07001094 /* set up to autoclear timer, and the vectors */
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001095 mask = IXGBE_EIMS_ENABLE_MASK;
Greg Rose1cdd1ec2010-01-09 02:26:46 +00001096 if (adapter->num_vfs)
1097 mask &= ~(IXGBE_EIMS_OTHER |
1098 IXGBE_EIMS_MAILBOX |
1099 IXGBE_EIMS_LSC);
1100 else
1101 mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001102 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
Auke Kok9a799d72007-09-15 14:07:45 -07001103}
1104
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001105enum latency_range {
1106 lowest_latency = 0,
1107 low_latency = 1,
1108 bulk_latency = 2,
1109 latency_invalid = 255
1110};
1111
1112/**
1113 * ixgbe_update_itr - update the dynamic ITR value based on statistics
1114 * @adapter: pointer to adapter
1115 * @eitr: eitr setting (ints per sec) to give last timeslice
1116 * @itr_setting: current throttle rate in ints/second
1117 * @packets: the number of packets during this measurement interval
1118 * @bytes: the number of bytes during this measurement interval
1119 *
1120 * Stores a new ITR value based on packets and byte
1121 * counts during the last interrupt. The advantage of per interrupt
1122 * computation is faster updates and more accurate ITR for the current
1123 * traffic pattern. Constants in this function were computed
1124 * based on theoretical maximum wire speed and thresholds were set based
1125 * on testing data as well as attempting to minimize response time
1126 * while increasing bulk throughput.
1127 * this functionality is controlled by the InterruptThrottleRate module
1128 * parameter (see ixgbe_param.c)
1129 **/
1130static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001131 u32 eitr, u8 itr_setting,
1132 int packets, int bytes)
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001133{
1134 unsigned int retval = itr_setting;
1135 u32 timepassed_us;
1136 u64 bytes_perint;
1137
1138 if (packets == 0)
1139 goto update_itr_done;
1140
1141
1142 /* simple throttlerate management
1143 * 0-20MB/s lowest (100000 ints/s)
1144 * 20-100MB/s low (20000 ints/s)
1145 * 100-1249MB/s bulk (8000 ints/s)
1146 */
1147 /* what was last interrupt timeslice? */
1148 timepassed_us = 1000000/eitr;
1149 bytes_perint = bytes / timepassed_us; /* bytes/usec */
1150
1151 switch (itr_setting) {
1152 case lowest_latency:
1153 if (bytes_perint > adapter->eitr_low)
1154 retval = low_latency;
1155 break;
1156 case low_latency:
1157 if (bytes_perint > adapter->eitr_high)
1158 retval = bulk_latency;
1159 else if (bytes_perint <= adapter->eitr_low)
1160 retval = lowest_latency;
1161 break;
1162 case bulk_latency:
1163 if (bytes_perint <= adapter->eitr_high)
1164 retval = low_latency;
1165 break;
1166 }
1167
1168update_itr_done:
1169 return retval;
1170}
1171
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001172/**
1173 * ixgbe_write_eitr - write EITR register in hardware specific way
Alexander Duyckfe49f042009-06-04 16:00:09 +00001174 * @q_vector: structure containing interrupt and ring information
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001175 *
1176 * This function is made to be called by ethtool and by the driver
1177 * when it needs to update EITR registers at runtime. Hardware
1178 * specific quirks/differences are taken care of here.
1179 */
Alexander Duyckfe49f042009-06-04 16:00:09 +00001180void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001181{
Alexander Duyckfe49f042009-06-04 16:00:09 +00001182 struct ixgbe_adapter *adapter = q_vector->adapter;
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001183 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyckfe49f042009-06-04 16:00:09 +00001184 int v_idx = q_vector->v_idx;
1185 u32 itr_reg = EITR_INTS_PER_SEC_TO_REG(q_vector->eitr);
1186
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001187 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1188 /* must write high and low 16 bits to reset counter */
1189 itr_reg |= (itr_reg << 16);
1190 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1191 /*
1192 * set the WDIS bit to not clear the timer bits and cause an
1193 * immediate assertion of the interrupt
1194 */
1195 itr_reg |= IXGBE_EITR_CNT_WDIS;
1196 }
1197 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
1198}
1199
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001200static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
1201{
1202 struct ixgbe_adapter *adapter = q_vector->adapter;
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001203 u32 new_itr;
1204 u8 current_itr, ret_itr;
Alexander Duyckfe49f042009-06-04 16:00:09 +00001205 int i, r_idx;
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001206 struct ixgbe_ring *rx_ring, *tx_ring;
1207
1208 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1209 for (i = 0; i < q_vector->txr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001210 tx_ring = adapter->tx_ring[r_idx];
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001211 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001212 q_vector->tx_itr,
1213 tx_ring->total_packets,
1214 tx_ring->total_bytes);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001215 /* if the result for this queue would decrease interrupt
1216 * rate for this vector then use that result */
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001217 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001218 q_vector->tx_itr - 1 : ret_itr);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001219 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001220 r_idx + 1);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001221 }
1222
1223 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1224 for (i = 0; i < q_vector->rxr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001225 rx_ring = adapter->rx_ring[r_idx];
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001226 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001227 q_vector->rx_itr,
1228 rx_ring->total_packets,
1229 rx_ring->total_bytes);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001230 /* if the result for this queue would decrease interrupt
1231 * rate for this vector then use that result */
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001232 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001233 q_vector->rx_itr - 1 : ret_itr);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001234 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001235 r_idx + 1);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001236 }
1237
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001238 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001239
1240 switch (current_itr) {
1241 /* counts and packets in update_itr are dependent on these numbers */
1242 case lowest_latency:
1243 new_itr = 100000;
1244 break;
1245 case low_latency:
1246 new_itr = 20000; /* aka hwitr = ~200 */
1247 break;
1248 case bulk_latency:
1249 default:
1250 new_itr = 8000;
1251 break;
1252 }
1253
1254 if (new_itr != q_vector->eitr) {
Alexander Duyckfe49f042009-06-04 16:00:09 +00001255 /* do an exponential smoothing */
1256 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001257
1258 /* save the algorithm value here, not the smoothed one */
1259 q_vector->eitr = new_itr;
Alexander Duyckfe49f042009-06-04 16:00:09 +00001260
1261 ixgbe_write_eitr(q_vector);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001262 }
1263
1264 return;
1265}
1266
Jesse Brandeburg0befdb32008-10-31 00:46:40 -07001267static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
1268{
1269 struct ixgbe_hw *hw = &adapter->hw;
1270
1271 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
1272 (eicr & IXGBE_EICR_GPI_SDP1)) {
1273 DPRINTK(PROBE, CRIT, "Fan has stopped, replace the adapter\n");
1274 /* write to clear the interrupt */
1275 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
1276 }
1277}
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07001278
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001279static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
1280{
1281 struct ixgbe_hw *hw = &adapter->hw;
1282
1283 if (eicr & IXGBE_EICR_GPI_SDP1) {
1284 /* Clear the interrupt */
1285 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
1286 schedule_work(&adapter->multispeed_fiber_task);
1287 } else if (eicr & IXGBE_EICR_GPI_SDP2) {
1288 /* Clear the interrupt */
1289 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
1290 schedule_work(&adapter->sfp_config_module_task);
1291 } else {
1292 /* Interrupt isn't for us... */
1293 return;
1294 }
1295}
1296
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07001297static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
1298{
1299 struct ixgbe_hw *hw = &adapter->hw;
1300
1301 adapter->lsc_int++;
1302 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1303 adapter->link_check_timeout = jiffies;
1304 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1305 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
Nelson, Shannon8a0717f2009-11-12 18:47:11 +00001306 IXGBE_WRITE_FLUSH(hw);
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07001307 schedule_work(&adapter->watchdog_task);
1308 }
1309}
1310
Auke Kok9a799d72007-09-15 14:07:45 -07001311static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
1312{
1313 struct net_device *netdev = data;
1314 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1315 struct ixgbe_hw *hw = &adapter->hw;
Don Skidmore54037502009-02-21 15:42:56 -08001316 u32 eicr;
1317
1318 /*
1319 * Workaround for Silicon errata. Use clear-by-write instead
1320 * of clear-by-read. Reading with EICS will return the
1321 * interrupt causes without clearing, which later be done
1322 * with the write to EICR.
1323 */
1324 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
1325 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
Auke Kok9a799d72007-09-15 14:07:45 -07001326
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07001327 if (eicr & IXGBE_EICR_LSC)
1328 ixgbe_check_lsc(adapter);
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08001329
Greg Rose1cdd1ec2010-01-09 02:26:46 +00001330 if (eicr & IXGBE_EICR_MAILBOX)
1331 ixgbe_msg_task(adapter);
1332
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001333 if (hw->mac.type == ixgbe_mac_82598EB)
1334 ixgbe_check_fan_failure(adapter, eicr);
Jesse Brandeburg0befdb32008-10-31 00:46:40 -07001335
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00001336 if (hw->mac.type == ixgbe_mac_82599EB) {
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001337 ixgbe_check_sfp_event(adapter, eicr);
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00001338
1339 /* Handle Flow Director Full threshold interrupt */
1340 if (eicr & IXGBE_EICR_FLOW_DIR) {
1341 int i;
1342 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_FLOW_DIR);
1343 /* Disable transmits before FDIR Re-initialization */
1344 netif_tx_stop_all_queues(netdev);
1345 for (i = 0; i < adapter->num_tx_queues; i++) {
1346 struct ixgbe_ring *tx_ring =
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001347 adapter->tx_ring[i];
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00001348 if (test_and_clear_bit(__IXGBE_FDIR_INIT_DONE,
1349 &tx_ring->reinit_state))
1350 schedule_work(&adapter->fdir_reinit_task);
1351 }
1352 }
1353 }
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08001354 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1355 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
Auke Kok9a799d72007-09-15 14:07:45 -07001356
1357 return IRQ_HANDLED;
1358}
1359
Alexander Duyckfe49f042009-06-04 16:00:09 +00001360static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
1361 u64 qmask)
1362{
1363 u32 mask;
1364
1365 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1366 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
1367 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1368 } else {
1369 mask = (qmask & 0xFFFFFFFF);
1370 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(0), mask);
1371 mask = (qmask >> 32);
1372 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(1), mask);
1373 }
1374 /* skip the flush */
1375}
1376
1377static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
1378 u64 qmask)
1379{
1380 u32 mask;
1381
1382 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1383 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
1384 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, mask);
1385 } else {
1386 mask = (qmask & 0xFFFFFFFF);
1387 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), mask);
1388 mask = (qmask >> 32);
1389 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), mask);
1390 }
1391 /* skip the flush */
1392}
1393
Auke Kok9a799d72007-09-15 14:07:45 -07001394static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
1395{
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001396 struct ixgbe_q_vector *q_vector = data;
1397 struct ixgbe_adapter *adapter = q_vector->adapter;
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001398 struct ixgbe_ring *tx_ring;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001399 int i, r_idx;
Auke Kok9a799d72007-09-15 14:07:45 -07001400
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001401 if (!q_vector->txr_count)
1402 return IRQ_HANDLED;
1403
1404 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1405 for (i = 0; i < q_vector->txr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001406 tx_ring = adapter->tx_ring[r_idx];
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001407 tx_ring->total_bytes = 0;
1408 tx_ring->total_packets = 0;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001409 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001410 r_idx + 1);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001411 }
1412
Jesse Brandeburg9b471442009-12-03 11:33:54 +00001413 /* EIAM disabled interrupts (on this vector) for us */
Alexander Duyck91281fd2009-06-04 16:00:27 +00001414 napi_schedule(&q_vector->napi);
1415
Auke Kok9a799d72007-09-15 14:07:45 -07001416 return IRQ_HANDLED;
1417}
1418
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001419/**
1420 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1421 * @irq: unused
1422 * @data: pointer to our q_vector struct for this interrupt vector
1423 **/
Auke Kok9a799d72007-09-15 14:07:45 -07001424static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
1425{
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001426 struct ixgbe_q_vector *q_vector = data;
1427 struct ixgbe_adapter *adapter = q_vector->adapter;
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001428 struct ixgbe_ring *rx_ring;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001429 int r_idx;
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001430 int i;
Auke Kok9a799d72007-09-15 14:07:45 -07001431
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001432 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001433 for (i = 0; i < q_vector->rxr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001434 rx_ring = adapter->rx_ring[r_idx];
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001435 rx_ring->total_bytes = 0;
1436 rx_ring->total_packets = 0;
1437 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1438 r_idx + 1);
1439 }
1440
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001441 if (!q_vector->rxr_count)
1442 return IRQ_HANDLED;
1443
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001444 /* disable interrupts on this vector only */
Jesse Brandeburg9b471442009-12-03 11:33:54 +00001445 /* EIAM disabled interrupts (on this vector) for us */
Ben Hutchings288379f2009-01-19 16:43:59 -08001446 napi_schedule(&q_vector->napi);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001447
Auke Kok9a799d72007-09-15 14:07:45 -07001448 return IRQ_HANDLED;
1449}
1450
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001451static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
1452{
Alexander Duyck91281fd2009-06-04 16:00:27 +00001453 struct ixgbe_q_vector *q_vector = data;
1454 struct ixgbe_adapter *adapter = q_vector->adapter;
1455 struct ixgbe_ring *ring;
1456 int r_idx;
1457 int i;
1458
1459 if (!q_vector->txr_count && !q_vector->rxr_count)
1460 return IRQ_HANDLED;
1461
1462 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1463 for (i = 0; i < q_vector->txr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001464 ring = adapter->tx_ring[r_idx];
Alexander Duyck91281fd2009-06-04 16:00:27 +00001465 ring->total_bytes = 0;
1466 ring->total_packets = 0;
1467 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
1468 r_idx + 1);
1469 }
1470
1471 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1472 for (i = 0; i < q_vector->rxr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001473 ring = adapter->rx_ring[r_idx];
Alexander Duyck91281fd2009-06-04 16:00:27 +00001474 ring->total_bytes = 0;
1475 ring->total_packets = 0;
1476 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1477 r_idx + 1);
1478 }
1479
Jesse Brandeburg9b471442009-12-03 11:33:54 +00001480 /* EIAM disabled interrupts (on this vector) for us */
Alexander Duyck91281fd2009-06-04 16:00:27 +00001481 napi_schedule(&q_vector->napi);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001482
1483 return IRQ_HANDLED;
1484}
1485
1486/**
1487 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1488 * @napi: napi struct with our devices info in it
1489 * @budget: amount of work driver is allowed to do this pass, in packets
1490 *
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001491 * This function is optimized for cleaning one queue only on a single
1492 * q_vector!!!
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001493 **/
Auke Kok9a799d72007-09-15 14:07:45 -07001494static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
1495{
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001496 struct ixgbe_q_vector *q_vector =
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001497 container_of(napi, struct ixgbe_q_vector, napi);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001498 struct ixgbe_adapter *adapter = q_vector->adapter;
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001499 struct ixgbe_ring *rx_ring = NULL;
Auke Kok9a799d72007-09-15 14:07:45 -07001500 int work_done = 0;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001501 long r_idx;
Auke Kok9a799d72007-09-15 14:07:45 -07001502
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001503 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001504 rx_ring = adapter->rx_ring[r_idx];
Jeff Garzik5dd2d332008-10-16 05:09:31 -04001505#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -08001506 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001507 ixgbe_update_rx_dca(adapter, rx_ring);
Jeb Cramerbd0362d2008-03-03 15:04:02 -08001508#endif
Auke Kok9a799d72007-09-15 14:07:45 -07001509
Herbert Xu78b6f4c2009-01-18 21:49:45 -08001510 ixgbe_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
Auke Kok9a799d72007-09-15 14:07:45 -07001511
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001512 /* If all Rx work done, exit the polling mode */
1513 if (work_done < budget) {
Ben Hutchings288379f2009-01-19 16:43:59 -08001514 napi_complete(napi);
Nelson, Shannonf7554a22009-09-18 09:46:06 +00001515 if (adapter->rx_itr_setting & 1)
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001516 ixgbe_set_itr_msix(q_vector);
Auke Kok9a799d72007-09-15 14:07:45 -07001517 if (!test_bit(__IXGBE_DOWN, &adapter->state))
Alexander Duyckfe49f042009-06-04 16:00:09 +00001518 ixgbe_irq_enable_queues(adapter,
1519 ((u64)1 << q_vector->v_idx));
Auke Kok9a799d72007-09-15 14:07:45 -07001520 }
1521
1522 return work_done;
1523}
1524
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001525/**
Alexander Duyck91281fd2009-06-04 16:00:27 +00001526 * ixgbe_clean_rxtx_many - msix (aka one shot) rx clean routine
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001527 * @napi: napi struct with our devices info in it
1528 * @budget: amount of work driver is allowed to do this pass, in packets
1529 *
1530 * This function will clean more than one rx queue associated with a
1531 * q_vector.
1532 **/
Alexander Duyck91281fd2009-06-04 16:00:27 +00001533static int ixgbe_clean_rxtx_many(struct napi_struct *napi, int budget)
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001534{
1535 struct ixgbe_q_vector *q_vector =
1536 container_of(napi, struct ixgbe_q_vector, napi);
1537 struct ixgbe_adapter *adapter = q_vector->adapter;
Alexander Duyck91281fd2009-06-04 16:00:27 +00001538 struct ixgbe_ring *ring = NULL;
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001539 int work_done = 0, i;
1540 long r_idx;
Alexander Duyck91281fd2009-06-04 16:00:27 +00001541 bool tx_clean_complete = true;
1542
1543 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1544 for (i = 0; i < q_vector->txr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001545 ring = adapter->tx_ring[r_idx];
Alexander Duyck91281fd2009-06-04 16:00:27 +00001546#ifdef CONFIG_IXGBE_DCA
1547 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1548 ixgbe_update_tx_dca(adapter, ring);
1549#endif
1550 tx_clean_complete &= ixgbe_clean_tx_irq(q_vector, ring);
1551 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
1552 r_idx + 1);
1553 }
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001554
1555 /* attempt to distribute budget to each queue fairly, but don't allow
1556 * the budget to go below 1 because we'll exit polling */
1557 budget /= (q_vector->rxr_count ?: 1);
1558 budget = max(budget, 1);
1559 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1560 for (i = 0; i < q_vector->rxr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001561 ring = adapter->rx_ring[r_idx];
Jeff Garzik5dd2d332008-10-16 05:09:31 -04001562#ifdef CONFIG_IXGBE_DCA
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001563 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
Alexander Duyck91281fd2009-06-04 16:00:27 +00001564 ixgbe_update_rx_dca(adapter, ring);
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001565#endif
Alexander Duyck91281fd2009-06-04 16:00:27 +00001566 ixgbe_clean_rx_irq(q_vector, ring, &work_done, budget);
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001567 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1568 r_idx + 1);
1569 }
1570
1571 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001572 ring = adapter->rx_ring[r_idx];
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001573 /* If all Rx work done, exit the polling mode */
Jesse Brandeburg7f821872008-09-11 20:00:16 -07001574 if (work_done < budget) {
Ben Hutchings288379f2009-01-19 16:43:59 -08001575 napi_complete(napi);
Nelson, Shannonf7554a22009-09-18 09:46:06 +00001576 if (adapter->rx_itr_setting & 1)
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001577 ixgbe_set_itr_msix(q_vector);
1578 if (!test_bit(__IXGBE_DOWN, &adapter->state))
Alexander Duyckfe49f042009-06-04 16:00:09 +00001579 ixgbe_irq_enable_queues(adapter,
1580 ((u64)1 << q_vector->v_idx));
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001581 return 0;
1582 }
1583
1584 return work_done;
1585}
Alexander Duyck91281fd2009-06-04 16:00:27 +00001586
1587/**
1588 * ixgbe_clean_txonly - msix (aka one shot) tx clean routine
1589 * @napi: napi struct with our devices info in it
1590 * @budget: amount of work driver is allowed to do this pass, in packets
1591 *
1592 * This function is optimized for cleaning one queue only on a single
1593 * q_vector!!!
1594 **/
1595static int ixgbe_clean_txonly(struct napi_struct *napi, int budget)
1596{
1597 struct ixgbe_q_vector *q_vector =
1598 container_of(napi, struct ixgbe_q_vector, napi);
1599 struct ixgbe_adapter *adapter = q_vector->adapter;
1600 struct ixgbe_ring *tx_ring = NULL;
1601 int work_done = 0;
1602 long r_idx;
1603
1604 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001605 tx_ring = adapter->tx_ring[r_idx];
Alexander Duyck91281fd2009-06-04 16:00:27 +00001606#ifdef CONFIG_IXGBE_DCA
1607 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1608 ixgbe_update_tx_dca(adapter, tx_ring);
1609#endif
1610
1611 if (!ixgbe_clean_tx_irq(q_vector, tx_ring))
1612 work_done = budget;
1613
Nelson, Shannonf7554a22009-09-18 09:46:06 +00001614 /* If all Tx work done, exit the polling mode */
Alexander Duyck91281fd2009-06-04 16:00:27 +00001615 if (work_done < budget) {
1616 napi_complete(napi);
Nelson, Shannonf7554a22009-09-18 09:46:06 +00001617 if (adapter->tx_itr_setting & 1)
Alexander Duyck91281fd2009-06-04 16:00:27 +00001618 ixgbe_set_itr_msix(q_vector);
1619 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1620 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
1621 }
1622
1623 return work_done;
1624}
1625
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001626static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001627 int r_idx)
Auke Kok9a799d72007-09-15 14:07:45 -07001628{
Alexander Duyck7a921c92009-05-06 10:43:28 +00001629 struct ixgbe_q_vector *q_vector = a->q_vector[v_idx];
1630
1631 set_bit(r_idx, q_vector->rxr_idx);
1632 q_vector->rxr_count++;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001633}
Auke Kok9a799d72007-09-15 14:07:45 -07001634
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001635static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
Alexander Duyck7a921c92009-05-06 10:43:28 +00001636 int t_idx)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001637{
Alexander Duyck7a921c92009-05-06 10:43:28 +00001638 struct ixgbe_q_vector *q_vector = a->q_vector[v_idx];
1639
1640 set_bit(t_idx, q_vector->txr_idx);
1641 q_vector->txr_count++;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001642}
Auke Kok9a799d72007-09-15 14:07:45 -07001643
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001644/**
1645 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1646 * @adapter: board private structure to initialize
1647 * @vectors: allotted vector count for descriptor rings
1648 *
1649 * This function maps descriptor rings to the queue-specific vectors
1650 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1651 * one vector per ring/queue, but on a constrained vector budget, we
1652 * group the rings as "efficiently" as possible. You would add new
1653 * mapping configurations in here.
1654 **/
1655static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001656 int vectors)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001657{
1658 int v_start = 0;
1659 int rxr_idx = 0, txr_idx = 0;
1660 int rxr_remaining = adapter->num_rx_queues;
1661 int txr_remaining = adapter->num_tx_queues;
1662 int i, j;
1663 int rqpv, tqpv;
1664 int err = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07001665
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001666 /* No mapping required if MSI-X is disabled. */
1667 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
Auke Kok9a799d72007-09-15 14:07:45 -07001668 goto out;
1669
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001670 /*
1671 * The ideal configuration...
1672 * We have enough vectors to map one per queue.
1673 */
1674 if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1675 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1676 map_vector_to_rxq(adapter, v_start, rxr_idx);
1677
1678 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1679 map_vector_to_txq(adapter, v_start, txr_idx);
1680
1681 goto out;
1682 }
1683
1684 /*
1685 * If we don't have enough vectors for a 1-to-1
1686 * mapping, we'll have to group them so there are
1687 * multiple queues per vector.
1688 */
1689 /* Re-adjusting *qpv takes care of the remainder. */
1690 for (i = v_start; i < vectors; i++) {
1691 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1692 for (j = 0; j < rqpv; j++) {
1693 map_vector_to_rxq(adapter, i, rxr_idx);
1694 rxr_idx++;
1695 rxr_remaining--;
Auke Kok9a799d72007-09-15 14:07:45 -07001696 }
Auke Kok9a799d72007-09-15 14:07:45 -07001697 }
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001698 for (i = v_start; i < vectors; i++) {
1699 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1700 for (j = 0; j < tqpv; j++) {
1701 map_vector_to_txq(adapter, i, txr_idx);
1702 txr_idx++;
1703 txr_remaining--;
Auke Kok9a799d72007-09-15 14:07:45 -07001704 }
Auke Kok9a799d72007-09-15 14:07:45 -07001705 }
1706
Auke Kok9a799d72007-09-15 14:07:45 -07001707out:
Auke Kok9a799d72007-09-15 14:07:45 -07001708 return err;
1709}
1710
1711/**
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001712 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1713 * @adapter: board private structure
1714 *
1715 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1716 * interrupts from the kernel.
1717 **/
1718static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1719{
1720 struct net_device *netdev = adapter->netdev;
1721 irqreturn_t (*handler)(int, void *);
1722 int i, vector, q_vectors, err;
Robert Olssoncb13fc22008-11-25 16:43:52 -08001723 int ri=0, ti=0;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001724
1725 /* Decrement for Other and TCP Timer vectors */
1726 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1727
1728 /* Map the Tx/Rx rings to the vectors we were allotted. */
1729 err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1730 if (err)
1731 goto out;
1732
1733#define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001734 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1735 &ixgbe_msix_clean_many)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001736 for (vector = 0; vector < q_vectors; vector++) {
Alexander Duyck7a921c92009-05-06 10:43:28 +00001737 handler = SET_HANDLER(adapter->q_vector[vector]);
Robert Olssoncb13fc22008-11-25 16:43:52 -08001738
1739 if(handler == &ixgbe_msix_clean_rx) {
1740 sprintf(adapter->name[vector], "%s-%s-%d",
1741 netdev->name, "rx", ri++);
1742 }
1743 else if(handler == &ixgbe_msix_clean_tx) {
1744 sprintf(adapter->name[vector], "%s-%s-%d",
1745 netdev->name, "tx", ti++);
1746 }
1747 else
1748 sprintf(adapter->name[vector], "%s-%s-%d",
1749 netdev->name, "TxRx", vector);
1750
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001751 err = request_irq(adapter->msix_entries[vector].vector,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001752 handler, 0, adapter->name[vector],
Alexander Duyck7a921c92009-05-06 10:43:28 +00001753 adapter->q_vector[vector]);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001754 if (err) {
1755 DPRINTK(PROBE, ERR,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001756 "request_irq failed for MSIX interrupt "
1757 "Error: %d\n", err);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001758 goto free_queue_irqs;
1759 }
1760 }
1761
1762 sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1763 err = request_irq(adapter->msix_entries[vector].vector,
Joe Perchesa0607fd2009-11-18 23:29:17 -08001764 ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001765 if (err) {
1766 DPRINTK(PROBE, ERR,
1767 "request_irq for msix_lsc failed: %d\n", err);
1768 goto free_queue_irqs;
1769 }
1770
1771 return 0;
1772
1773free_queue_irqs:
1774 for (i = vector - 1; i >= 0; i--)
1775 free_irq(adapter->msix_entries[--vector].vector,
Alexander Duyck7a921c92009-05-06 10:43:28 +00001776 adapter->q_vector[i]);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001777 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1778 pci_disable_msix(adapter->pdev);
1779 kfree(adapter->msix_entries);
1780 adapter->msix_entries = NULL;
1781out:
1782 return err;
1783}
1784
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001785static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1786{
Alexander Duyck7a921c92009-05-06 10:43:28 +00001787 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001788 u8 current_itr;
1789 u32 new_itr = q_vector->eitr;
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001790 struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
1791 struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001792
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001793 q_vector->tx_itr = ixgbe_update_itr(adapter, new_itr,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001794 q_vector->tx_itr,
1795 tx_ring->total_packets,
1796 tx_ring->total_bytes);
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001797 q_vector->rx_itr = ixgbe_update_itr(adapter, new_itr,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001798 q_vector->rx_itr,
1799 rx_ring->total_packets,
1800 rx_ring->total_bytes);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001801
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001802 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001803
1804 switch (current_itr) {
1805 /* counts and packets in update_itr are dependent on these numbers */
1806 case lowest_latency:
1807 new_itr = 100000;
1808 break;
1809 case low_latency:
1810 new_itr = 20000; /* aka hwitr = ~200 */
1811 break;
1812 case bulk_latency:
1813 new_itr = 8000;
1814 break;
1815 default:
1816 break;
1817 }
1818
1819 if (new_itr != q_vector->eitr) {
Alexander Duyckfe49f042009-06-04 16:00:09 +00001820 /* do an exponential smoothing */
1821 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001822
1823 /* save the algorithm value here, not the smoothed one */
1824 q_vector->eitr = new_itr;
Alexander Duyckfe49f042009-06-04 16:00:09 +00001825
1826 ixgbe_write_eitr(q_vector);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001827 }
1828
1829 return;
1830}
1831
Alexey Dobriyan79aefa42008-11-19 14:17:02 -08001832/**
Alexey Dobriyan79aefa42008-11-19 14:17:02 -08001833 * ixgbe_irq_enable - Enable default interrupt generation settings
1834 * @adapter: board private structure
1835 **/
1836static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1837{
1838 u32 mask;
Nelson, Shannon835462f2009-04-27 22:42:54 +00001839
1840 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
David S. Miller6ab33d52008-11-20 16:44:00 -08001841 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
1842 mask |= IXGBE_EIMS_GPI_SDP1;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001843 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
Jesse Brandeburg2a41ff82009-03-13 22:14:30 +00001844 mask |= IXGBE_EIMS_ECC;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001845 mask |= IXGBE_EIMS_GPI_SDP1;
1846 mask |= IXGBE_EIMS_GPI_SDP2;
Greg Rose1cdd1ec2010-01-09 02:26:46 +00001847 if (adapter->num_vfs)
1848 mask |= IXGBE_EIMS_MAILBOX;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001849 }
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00001850 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
1851 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
1852 mask |= IXGBE_EIMS_FLOW_DIR;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001853
Alexey Dobriyan79aefa42008-11-19 14:17:02 -08001854 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
Nelson, Shannon835462f2009-04-27 22:42:54 +00001855 ixgbe_irq_enable_queues(adapter, ~0);
Alexey Dobriyan79aefa42008-11-19 14:17:02 -08001856 IXGBE_WRITE_FLUSH(&adapter->hw);
Greg Rose1cdd1ec2010-01-09 02:26:46 +00001857
1858 if (adapter->num_vfs > 32) {
1859 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
1860 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
1861 }
Alexey Dobriyan79aefa42008-11-19 14:17:02 -08001862}
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001863
1864/**
1865 * ixgbe_intr - legacy mode Interrupt Handler
Auke Kok9a799d72007-09-15 14:07:45 -07001866 * @irq: interrupt number
1867 * @data: pointer to a network interface device structure
Auke Kok9a799d72007-09-15 14:07:45 -07001868 **/
1869static irqreturn_t ixgbe_intr(int irq, void *data)
1870{
1871 struct net_device *netdev = data;
1872 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1873 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck7a921c92009-05-06 10:43:28 +00001874 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
Auke Kok9a799d72007-09-15 14:07:45 -07001875 u32 eicr;
1876
Don Skidmore54037502009-02-21 15:42:56 -08001877 /*
1878 * Workaround for silicon errata. Mask the interrupts
1879 * before the read of EICR.
1880 */
1881 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
1882
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001883 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1884 * therefore no explict interrupt disable is necessary */
1885 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
Jesse Brandeburgf47cf662008-09-11 19:56:14 -07001886 if (!eicr) {
1887 /* shared interrupt alert!
1888 * make sure interrupts are enabled because the read will
1889 * have disabled interrupts due to EIAM */
1890 ixgbe_irq_enable(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07001891 return IRQ_NONE; /* Not our interrupt */
Jesse Brandeburgf47cf662008-09-11 19:56:14 -07001892 }
Auke Kok9a799d72007-09-15 14:07:45 -07001893
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07001894 if (eicr & IXGBE_EICR_LSC)
1895 ixgbe_check_lsc(adapter);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001896
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001897 if (hw->mac.type == ixgbe_mac_82599EB)
1898 ixgbe_check_sfp_event(adapter, eicr);
1899
Jesse Brandeburg0befdb32008-10-31 00:46:40 -07001900 ixgbe_check_fan_failure(adapter, eicr);
1901
Alexander Duyck7a921c92009-05-06 10:43:28 +00001902 if (napi_schedule_prep(&(q_vector->napi))) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001903 adapter->tx_ring[0]->total_packets = 0;
1904 adapter->tx_ring[0]->total_bytes = 0;
1905 adapter->rx_ring[0]->total_packets = 0;
1906 adapter->rx_ring[0]->total_bytes = 0;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001907 /* would disable interrupts here but EIAM disabled it */
Alexander Duyck7a921c92009-05-06 10:43:28 +00001908 __napi_schedule(&(q_vector->napi));
Auke Kok9a799d72007-09-15 14:07:45 -07001909 }
1910
1911 return IRQ_HANDLED;
1912}
1913
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001914static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1915{
1916 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1917
1918 for (i = 0; i < q_vectors; i++) {
Alexander Duyck7a921c92009-05-06 10:43:28 +00001919 struct ixgbe_q_vector *q_vector = adapter->q_vector[i];
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001920 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1921 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1922 q_vector->rxr_count = 0;
1923 q_vector->txr_count = 0;
1924 }
1925}
1926
Auke Kok9a799d72007-09-15 14:07:45 -07001927/**
1928 * ixgbe_request_irq - initialize interrupts
1929 * @adapter: board private structure
1930 *
1931 * Attempts to configure interrupts using the best available
1932 * capabilities of the hardware and kernel.
1933 **/
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001934static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
Auke Kok9a799d72007-09-15 14:07:45 -07001935{
1936 struct net_device *netdev = adapter->netdev;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001937 int err;
Auke Kok9a799d72007-09-15 14:07:45 -07001938
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001939 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1940 err = ixgbe_request_msix_irqs(adapter);
1941 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
Joe Perchesa0607fd2009-11-18 23:29:17 -08001942 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001943 netdev->name, netdev);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001944 } else {
Joe Perchesa0607fd2009-11-18 23:29:17 -08001945 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07001946 netdev->name, netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07001947 }
1948
Auke Kok9a799d72007-09-15 14:07:45 -07001949 if (err)
1950 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1951
Auke Kok9a799d72007-09-15 14:07:45 -07001952 return err;
1953}
1954
1955static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1956{
1957 struct net_device *netdev = adapter->netdev;
1958
1959 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001960 int i, q_vectors;
Auke Kok9a799d72007-09-15 14:07:45 -07001961
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001962 q_vectors = adapter->num_msix_vectors;
1963
1964 i = q_vectors - 1;
Auke Kok9a799d72007-09-15 14:07:45 -07001965 free_irq(adapter->msix_entries[i].vector, netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07001966
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001967 i--;
1968 for (; i >= 0; i--) {
1969 free_irq(adapter->msix_entries[i].vector,
Alexander Duyck7a921c92009-05-06 10:43:28 +00001970 adapter->q_vector[i]);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001971 }
1972
1973 ixgbe_reset_q_vectors(adapter);
1974 } else {
1975 free_irq(adapter->pdev->irq, netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07001976 }
1977}
1978
1979/**
Jesse Brandeburg22d5a712009-03-19 01:24:04 +00001980 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1981 * @adapter: board private structure
1982 **/
1983static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1984{
Nelson, Shannon835462f2009-04-27 22:42:54 +00001985 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1986 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1987 } else {
1988 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
1989 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
Jesse Brandeburg22d5a712009-03-19 01:24:04 +00001990 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
Greg Rose1cdd1ec2010-01-09 02:26:46 +00001991 if (adapter->num_vfs > 32)
1992 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
Jesse Brandeburg22d5a712009-03-19 01:24:04 +00001993 }
1994 IXGBE_WRITE_FLUSH(&adapter->hw);
1995 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1996 int i;
1997 for (i = 0; i < adapter->num_msix_vectors; i++)
1998 synchronize_irq(adapter->msix_entries[i].vector);
1999 } else {
2000 synchronize_irq(adapter->pdev->irq);
2001 }
2002}
2003
Jesse Brandeburg22d5a712009-03-19 01:24:04 +00002004/**
Auke Kok9a799d72007-09-15 14:07:45 -07002005 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2006 *
2007 **/
2008static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
2009{
Auke Kok9a799d72007-09-15 14:07:45 -07002010 struct ixgbe_hw *hw = &adapter->hw;
2011
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002012 IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
Nelson, Shannonf7554a22009-09-18 09:46:06 +00002013 EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr_param));
Auke Kok9a799d72007-09-15 14:07:45 -07002014
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002015 ixgbe_set_ivar(adapter, 0, 0, 0);
2016 ixgbe_set_ivar(adapter, 1, 0, 0);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002017
2018 map_vector_to_rxq(adapter, 0, 0);
2019 map_vector_to_txq(adapter, 0, 0);
2020
2021 DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
Auke Kok9a799d72007-09-15 14:07:45 -07002022}
2023
2024/**
Jesse Brandeburg3a581072008-08-26 04:27:08 -07002025 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
Auke Kok9a799d72007-09-15 14:07:45 -07002026 * @adapter: board private structure
2027 *
2028 * Configure the Tx unit of the MAC after a reset.
2029 **/
2030static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
2031{
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -08002032 u64 tdba;
Auke Kok9a799d72007-09-15 14:07:45 -07002033 struct ixgbe_hw *hw = &adapter->hw;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002034 u32 i, j, tdlen, txctrl;
Auke Kok9a799d72007-09-15 14:07:45 -07002035
2036 /* Setup the HW Tx Head and Tail descriptor pointers */
2037 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002038 struct ixgbe_ring *ring = adapter->tx_ring[i];
Jesse Brandeburge01c31a2008-08-26 04:27:13 -07002039 j = ring->reg_idx;
2040 tdba = ring->dma;
2041 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002042 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
Yang Hongyang284901a2009-04-06 19:01:15 -07002043 (tdba & DMA_BIT_MASK(32)));
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002044 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
2045 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
2046 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
2047 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002048 adapter->tx_ring[i]->head = IXGBE_TDH(j);
2049 adapter->tx_ring[i]->tail = IXGBE_TDT(j);
Peter P Waskiewicz Jr84f62d42009-09-30 12:07:16 +00002050 /*
2051 * Disable Tx Head Writeback RO bit, since this hoses
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002052 * bookkeeping if things aren't delivered in order.
2053 */
Peter P Waskiewicz Jr84f62d42009-09-30 12:07:16 +00002054 switch (hw->mac.type) {
2055 case ixgbe_mac_82598EB:
2056 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
2057 break;
2058 case ixgbe_mac_82599EB:
2059 default:
2060 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j));
2061 break;
2062 }
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002063 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
Peter P Waskiewicz Jr84f62d42009-09-30 12:07:16 +00002064 switch (hw->mac.type) {
2065 case ixgbe_mac_82598EB:
2066 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
2067 break;
2068 case ixgbe_mac_82599EB:
2069 default:
2070 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), txctrl);
2071 break;
2072 }
Auke Kok9a799d72007-09-15 14:07:45 -07002073 }
Don Skidmoreee5f7842009-11-06 12:56:20 +00002074
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002075 if (hw->mac.type == ixgbe_mac_82599EB) {
Don Skidmoreee5f7842009-11-06 12:56:20 +00002076 u32 rttdcs;
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002077 u32 mask;
Don Skidmoreee5f7842009-11-06 12:56:20 +00002078
2079 /* disable the arbiter while setting MTQC */
2080 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
2081 rttdcs |= IXGBE_RTTDCS_ARBDIS;
2082 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2083
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002084 /* set transmit pool layout */
2085 mask = (IXGBE_FLAG_SRIOV_ENABLED | IXGBE_FLAG_DCB_ENABLED);
2086 switch (adapter->flags & mask) {
2087
2088 case (IXGBE_FLAG_SRIOV_ENABLED):
2089 IXGBE_WRITE_REG(hw, IXGBE_MTQC,
2090 (IXGBE_MTQC_VT_ENA | IXGBE_MTQC_64VF));
2091 break;
2092
2093 case (IXGBE_FLAG_DCB_ENABLED):
2094 /* We enable 8 traffic classes, DCB only */
2095 IXGBE_WRITE_REG(hw, IXGBE_MTQC,
2096 (IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ));
2097 break;
2098
2099 default:
Don Skidmoreee5f7842009-11-06 12:56:20 +00002100 IXGBE_WRITE_REG(hw, IXGBE_MTQC, IXGBE_MTQC_64Q_1PB);
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002101 break;
2102 }
Don Skidmoreee5f7842009-11-06 12:56:20 +00002103
2104 /* re-eable the arbiter */
2105 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
2106 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002107 }
Auke Kok9a799d72007-09-15 14:07:45 -07002108}
2109
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002110#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
Auke Kok9a799d72007-09-15 14:07:45 -07002111
Yi Zoua6616b42009-08-06 13:05:23 +00002112static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
2113 struct ixgbe_ring *rx_ring)
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002114{
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002115 u32 srrctl;
Yi Zoua6616b42009-08-06 13:05:23 +00002116 int index;
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002117 struct ixgbe_ring_feature *feature = adapter->ring_feature;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002118
Yi Zoua6616b42009-08-06 13:05:23 +00002119 index = rx_ring->reg_idx;
2120 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
2121 unsigned long mask;
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002122 mask = (unsigned long) feature[RING_F_RSS].mask;
Alexander Duyck3be1adf2008-08-30 00:29:10 -07002123 index = index & mask;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002124 }
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002125 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
2126
2127 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
2128 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
2129
Alexander Duyckafafd5b2009-05-07 10:38:56 +00002130 srrctl |= (IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
2131 IXGBE_SRRCTL_BSIZEHDR_MASK;
2132
Yi Zou6e455b892009-08-06 13:05:44 +00002133 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
Alexander Duyckafafd5b2009-05-07 10:38:56 +00002134#if (PAGE_SIZE / 2) > IXGBE_MAX_RXBUFFER
2135 srrctl |= IXGBE_MAX_RXBUFFER >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
2136#else
2137 srrctl |= (PAGE_SIZE / 2) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
2138#endif
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002139 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002140 } else {
Alexander Duyckafafd5b2009-05-07 10:38:56 +00002141 srrctl |= ALIGN(rx_ring->rx_buf_len, 1024) >>
2142 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002143 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002144 }
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002145
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002146 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
2147}
2148
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002149static u32 ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
2150{
2151 u32 mrqc = 0;
2152 int mask;
2153
2154 if (!(adapter->hw.mac.type == ixgbe_mac_82599EB))
2155 return mrqc;
2156
2157 mask = adapter->flags & (IXGBE_FLAG_RSS_ENABLED
2158#ifdef CONFIG_IXGBE_DCB
2159 | IXGBE_FLAG_DCB_ENABLED
2160#endif
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002161 | IXGBE_FLAG_SRIOV_ENABLED
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002162 );
2163
2164 switch (mask) {
2165 case (IXGBE_FLAG_RSS_ENABLED):
2166 mrqc = IXGBE_MRQC_RSSEN;
2167 break;
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002168 case (IXGBE_FLAG_SRIOV_ENABLED):
2169 mrqc = IXGBE_MRQC_VMDQEN;
2170 break;
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002171#ifdef CONFIG_IXGBE_DCB
2172 case (IXGBE_FLAG_DCB_ENABLED):
2173 mrqc = IXGBE_MRQC_RT8TCEN;
2174 break;
2175#endif /* CONFIG_IXGBE_DCB */
2176 default:
2177 break;
2178 }
2179
2180 return mrqc;
2181}
2182
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07002183/**
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002184 * ixgbe_configure_rscctl - enable RSC for the indicated ring
2185 * @adapter: address of board private structure
2186 * @index: index of ring to set
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002187 **/
Mallikarjuna R Chilakalaedd2ea552009-11-23 10:45:11 -08002188static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter, int index)
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002189{
2190 struct ixgbe_ring *rx_ring;
2191 struct ixgbe_hw *hw = &adapter->hw;
2192 int j;
2193 u32 rscctrl;
Mallikarjuna R Chilakalaedd2ea552009-11-23 10:45:11 -08002194 int rx_buf_len;
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002195
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002196 rx_ring = adapter->rx_ring[index];
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002197 j = rx_ring->reg_idx;
Mallikarjuna R Chilakalaedd2ea552009-11-23 10:45:11 -08002198 rx_buf_len = rx_ring->rx_buf_len;
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002199 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(j));
2200 rscctrl |= IXGBE_RSCCTL_RSCEN;
2201 /*
2202 * we must limit the number of descriptors so that the
2203 * total size of max desc * buf_len is not greater
2204 * than 65535
2205 */
2206 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
2207#if (MAX_SKB_FRAGS > 16)
2208 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
2209#elif (MAX_SKB_FRAGS > 8)
2210 rscctrl |= IXGBE_RSCCTL_MAXDESC_8;
2211#elif (MAX_SKB_FRAGS > 4)
2212 rscctrl |= IXGBE_RSCCTL_MAXDESC_4;
2213#else
2214 rscctrl |= IXGBE_RSCCTL_MAXDESC_1;
2215#endif
2216 } else {
2217 if (rx_buf_len < IXGBE_RXBUFFER_4096)
2218 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
2219 else if (rx_buf_len < IXGBE_RXBUFFER_8192)
2220 rscctrl |= IXGBE_RSCCTL_MAXDESC_8;
2221 else
2222 rscctrl |= IXGBE_RSCCTL_MAXDESC_4;
2223 }
2224 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(j), rscctrl);
2225}
2226
2227/**
Jesse Brandeburg3a581072008-08-26 04:27:08 -07002228 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
Auke Kok9a799d72007-09-15 14:07:45 -07002229 * @adapter: board private structure
2230 *
2231 * Configure the Rx unit of the MAC after a reset.
2232 **/
2233static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
2234{
2235 u64 rdba;
2236 struct ixgbe_hw *hw = &adapter->hw;
Yi Zoua6616b42009-08-06 13:05:23 +00002237 struct ixgbe_ring *rx_ring;
Auke Kok9a799d72007-09-15 14:07:45 -07002238 struct net_device *netdev = adapter->netdev;
2239 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002240 int i, j;
Auke Kok9a799d72007-09-15 14:07:45 -07002241 u32 rdlen, rxctrl, rxcsum;
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07002242 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
2243 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
2244 0x6A3E67EA, 0x14364D17, 0x3BED200D};
Auke Kok9a799d72007-09-15 14:07:45 -07002245 u32 fctrl, hlreg0;
Jesse Brandeburg509ee932009-03-13 22:13:28 +00002246 u32 reta = 0, mrqc = 0;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002247 u32 rdrxctl;
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07002248 int rx_buf_len;
Auke Kok9a799d72007-09-15 14:07:45 -07002249
2250 /* Decide whether to use packet split mode or not */
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002251 /* Do not use packet split if we're in SR-IOV Mode */
2252 if (!adapter->num_vfs)
2253 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
Auke Kok9a799d72007-09-15 14:07:45 -07002254
2255 /* Set the RX buffer length according to the mode */
2256 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07002257 rx_buf_len = IXGBE_RX_HDR_SIZE;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002258 if (hw->mac.type == ixgbe_mac_82599EB) {
2259 /* PSRTYPE must be initialized in 82599 */
2260 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
2261 IXGBE_PSRTYPE_UDPHDR |
2262 IXGBE_PSRTYPE_IPV4HDR |
Yi Zoudfa12f02009-05-07 10:39:35 +00002263 IXGBE_PSRTYPE_IPV6HDR |
2264 IXGBE_PSRTYPE_L2HDR;
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002265 IXGBE_WRITE_REG(hw,
2266 IXGBE_PSRTYPE(adapter->num_vfs),
2267 psrtype);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002268 }
Auke Kok9a799d72007-09-15 14:07:45 -07002269 } else {
Peter P Waskiewicz Jr0c19d6a2009-07-30 12:25:28 +00002270 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) &&
Alexander Duyckf8212f92009-04-27 22:42:37 +00002271 (netdev->mtu <= ETH_DATA_LEN))
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07002272 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
Auke Kok9a799d72007-09-15 14:07:45 -07002273 else
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07002274 rx_buf_len = ALIGN(max_frame, 1024);
Auke Kok9a799d72007-09-15 14:07:45 -07002275 }
2276
2277 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2278 fctrl |= IXGBE_FCTRL_BAM;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002279 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002280 fctrl |= IXGBE_FCTRL_PMCF;
Auke Kok9a799d72007-09-15 14:07:45 -07002281 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
2282
2283 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
2284 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2285 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
2286 else
2287 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
Yi Zou63f39bd2009-05-17 12:34:35 +00002288#ifdef IXGBE_FCOE
Yi Zouf34c5c82009-08-14 12:42:17 +00002289 if (netdev->features & NETIF_F_FCOE_MTU)
Yi Zou63f39bd2009-05-17 12:34:35 +00002290 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
2291#endif
Auke Kok9a799d72007-09-15 14:07:45 -07002292 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
2293
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002294 rdlen = adapter->rx_ring[0]->count * sizeof(union ixgbe_adv_rx_desc);
Auke Kok9a799d72007-09-15 14:07:45 -07002295 /* disable receives while setting up the descriptors */
2296 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2297 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
2298
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002299 /*
2300 * Setup the HW Rx Head and Tail Descriptor Pointers and
2301 * the Base and Length of the Rx Descriptor Ring
2302 */
Auke Kok9a799d72007-09-15 14:07:45 -07002303 for (i = 0; i < adapter->num_rx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002304 rx_ring = adapter->rx_ring[i];
Yi Zoua6616b42009-08-06 13:05:23 +00002305 rdba = rx_ring->dma;
2306 j = rx_ring->reg_idx;
Yang Hongyang284901a2009-04-06 19:01:15 -07002307 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_BIT_MASK(32)));
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07002308 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
2309 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
2310 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
2311 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
Yi Zoua6616b42009-08-06 13:05:23 +00002312 rx_ring->head = IXGBE_RDH(j);
2313 rx_ring->tail = IXGBE_RDT(j);
2314 rx_ring->rx_buf_len = rx_buf_len;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002315
Yi Zou6e455b892009-08-06 13:05:44 +00002316 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)
2317 rx_ring->flags |= IXGBE_RING_RX_PS_ENABLED;
Peter P Waskiewicz Jr1b3ff022009-09-14 07:47:27 +00002318 else
2319 rx_ring->flags &= ~IXGBE_RING_RX_PS_ENABLED;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002320
Yi Zou63f39bd2009-05-17 12:34:35 +00002321#ifdef IXGBE_FCOE
Yi Zouf34c5c82009-08-14 12:42:17 +00002322 if (netdev->features & NETIF_F_FCOE_MTU) {
Yi Zou63f39bd2009-05-17 12:34:35 +00002323 struct ixgbe_ring_feature *f;
2324 f = &adapter->ring_feature[RING_F_FCOE];
Yi Zou6e455b892009-08-06 13:05:44 +00002325 if ((i >= f->mask) && (i < f->mask + f->indices)) {
2326 rx_ring->flags &= ~IXGBE_RING_RX_PS_ENABLED;
2327 if (rx_buf_len < IXGBE_FCOE_JUMBO_FRAME_SIZE)
2328 rx_ring->rx_buf_len =
2329 IXGBE_FCOE_JUMBO_FRAME_SIZE;
2330 }
Yi Zou63f39bd2009-05-17 12:34:35 +00002331 }
2332
2333#endif /* IXGBE_FCOE */
Yi Zoua6616b42009-08-06 13:05:23 +00002334 ixgbe_configure_srrctl(adapter, rx_ring);
Auke Kok9a799d72007-09-15 14:07:45 -07002335 }
2336
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002337 if (hw->mac.type == ixgbe_mac_82598EB) {
2338 /*
2339 * For VMDq support of different descriptor types or
2340 * buffer sizes through the use of multiple SRRCTL
2341 * registers, RDRXCTL.MVMEN must be set to 1
2342 *
2343 * also, the manual doesn't mention it clearly but DCA hints
2344 * will only use queue 0's tags unless this bit is set. Side
2345 * effects of setting this bit are only that SRRCTL must be
2346 * fully programmed [0..15]
2347 */
Jesse Brandeburg2a41ff82009-03-13 22:14:30 +00002348 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
2349 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
2350 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
Alexander Duyck2f90b862008-11-20 20:52:10 -08002351 }
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07002352
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002353 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2354 u32 vt_reg_bits;
2355 u32 reg_offset, vf_shift;
2356 u32 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
2357 vt_reg_bits = IXGBE_VMD_CTL_VMDQ_EN
2358 | IXGBE_VT_CTL_REPLEN;
2359 vt_reg_bits |= (adapter->num_vfs <<
2360 IXGBE_VT_CTL_POOL_SHIFT);
2361 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl | vt_reg_bits);
2362 IXGBE_WRITE_REG(hw, IXGBE_MRQC, 0);
2363
2364 vf_shift = adapter->num_vfs % 32;
2365 reg_offset = adapter->num_vfs / 32;
2366 IXGBE_WRITE_REG(hw, IXGBE_VFRE(0), 0);
2367 IXGBE_WRITE_REG(hw, IXGBE_VFRE(1), 0);
2368 IXGBE_WRITE_REG(hw, IXGBE_VFTE(0), 0);
2369 IXGBE_WRITE_REG(hw, IXGBE_VFTE(1), 0);
2370 /* Enable only the PF's pool for Tx/Rx */
2371 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (1 << vf_shift));
2372 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (1 << vf_shift));
2373 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
2374 ixgbe_set_vmolr(hw, adapter->num_vfs);
2375 }
2376
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002377 /* Program MRQC for the distribution of queues */
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002378 mrqc = ixgbe_setup_mrqc(adapter);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002379
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002380 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
Auke Kok9a799d72007-09-15 14:07:45 -07002381 /* Fill out redirection table */
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002382 for (i = 0, j = 0; i < 128; i++, j++) {
2383 if (j == adapter->ring_feature[RING_F_RSS].indices)
2384 j = 0;
2385 /* reta = 4-byte sliding window of
2386 * 0x00..(indices-1)(indices-1)00..etc. */
2387 reta = (reta << 8) | (j * 0x11);
2388 if ((i & 3) == 3)
2389 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
Auke Kok9a799d72007-09-15 14:07:45 -07002390 }
2391
2392 /* Fill out hash function seeds */
2393 for (i = 0; i < 10; i++)
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07002394 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
Auke Kok9a799d72007-09-15 14:07:45 -07002395
Jesse Brandeburg2a41ff82009-03-13 22:14:30 +00002396 if (hw->mac.type == ixgbe_mac_82598EB)
2397 mrqc |= IXGBE_MRQC_RSSEN;
Auke Kok9a799d72007-09-15 14:07:45 -07002398 /* Perform hash on these packet types */
Jesse Brandeburg2a41ff82009-03-13 22:14:30 +00002399 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4
2400 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2401 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
2402 | IXGBE_MRQC_RSS_FIELD_IPV6
2403 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
2404 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
Auke Kok9a799d72007-09-15 14:07:45 -07002405 }
Jesse Brandeburg2a41ff82009-03-13 22:14:30 +00002406 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002407
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002408 if (adapter->num_vfs) {
2409 u32 reg;
2410
2411 /* Map PF MAC address in RAR Entry 0 to first pool
2412 * following VFs */
2413 hw->mac.ops.set_vmdq(hw, 0, adapter->num_vfs);
2414
2415 /* Set up VF register offsets for selected VT Mode, i.e.
2416 * 64 VFs for SR-IOV */
2417 reg = IXGBE_READ_REG(hw, IXGBE_GCR_EXT);
2418 reg |= IXGBE_GCR_EXT_SRIOV;
2419 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, reg);
2420 }
2421
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002422 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
2423
2424 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
2425 adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
2426 /* Disable indicating checksum in descriptor, enables
2427 * RSS hash */
2428 rxcsum |= IXGBE_RXCSUM_PCSD;
2429 }
2430 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
2431 /* Enable IPv4 payload checksum for UDP fragments
2432 * if PCSD is not set */
2433 rxcsum |= IXGBE_RXCSUM_IPPCSE;
2434 }
2435
2436 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002437
2438 if (hw->mac.type == ixgbe_mac_82599EB) {
2439 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
2440 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
Alexander Duyckf8212f92009-04-27 22:42:37 +00002441 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002442 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
2443 }
Alexander Duyckf8212f92009-04-27 22:42:37 +00002444
Peter P Waskiewicz Jr0c19d6a2009-07-30 12:25:28 +00002445 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
Alexander Duyckf8212f92009-04-27 22:42:37 +00002446 /* Enable 82599 HW-RSC */
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002447 for (i = 0; i < adapter->num_rx_queues; i++)
Mallikarjuna R Chilakalaedd2ea552009-11-23 10:45:11 -08002448 ixgbe_configure_rscctl(adapter, i);
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002449
Alexander Duyckf8212f92009-04-27 22:42:37 +00002450 /* Disable RSC for ACK packets */
2451 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
2452 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
2453 }
Auke Kok9a799d72007-09-15 14:07:45 -07002454}
2455
Auke Kok9a799d72007-09-15 14:07:45 -07002456static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2457{
2458 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07002459 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose1ada1b12010-01-22 22:45:43 +00002460 int pool_ndx = adapter->num_vfs;
Auke Kok9a799d72007-09-15 14:07:45 -07002461
2462 /* add VID to filter table */
Greg Rose1ada1b12010-01-22 22:45:43 +00002463 hw->mac.ops.set_vfta(&adapter->hw, vid, pool_ndx, true);
Auke Kok9a799d72007-09-15 14:07:45 -07002464}
2465
2466static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2467{
2468 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07002469 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose1ada1b12010-01-22 22:45:43 +00002470 int pool_ndx = adapter->num_vfs;
Auke Kok9a799d72007-09-15 14:07:45 -07002471
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08002472 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2473 ixgbe_irq_disable(adapter);
2474
Auke Kok9a799d72007-09-15 14:07:45 -07002475 vlan_group_set_device(adapter->vlgrp, vid, NULL);
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08002476
2477 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2478 ixgbe_irq_enable(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07002479
2480 /* remove VID from filter table */
Greg Rose1ada1b12010-01-22 22:45:43 +00002481 hw->mac.ops.set_vfta(&adapter->hw, vid, pool_ndx, false);
Auke Kok9a799d72007-09-15 14:07:45 -07002482}
2483
Don Skidmore068c89b2009-01-19 16:54:36 -08002484static void ixgbe_vlan_rx_register(struct net_device *netdev,
2485 struct vlan_group *grp)
2486{
2487 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2488 u32 ctrl;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002489 int i, j;
Don Skidmore068c89b2009-01-19 16:54:36 -08002490
2491 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2492 ixgbe_irq_disable(adapter);
2493 adapter->vlgrp = grp;
2494
2495 /*
2496 * For a DCB driver, always enable VLAN tag stripping so we can
2497 * still receive traffic from a DCB-enabled host even if we're
2498 * not in DCB mode.
2499 */
2500 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
Alexander Duyckdc63d372009-11-23 06:32:57 +00002501
2502 /* Disable CFI check */
2503 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
2504
2505 /* enable VLAN tag stripping */
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002506 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
Alexander Duyckdc63d372009-11-23 06:32:57 +00002507 ctrl |= IXGBE_VLNCTRL_VME;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002508 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002509 for (i = 0; i < adapter->num_rx_queues; i++) {
Alexander Duyckdc63d372009-11-23 06:32:57 +00002510 u32 ctrl;
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002511 j = adapter->rx_ring[i]->reg_idx;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002512 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXDCTL(j));
2513 ctrl |= IXGBE_RXDCTL_VME;
2514 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXDCTL(j), ctrl);
2515 }
Don Skidmore068c89b2009-01-19 16:54:36 -08002516 }
Alexander Duyckdc63d372009-11-23 06:32:57 +00002517
2518 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
2519
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002520 ixgbe_vlan_rx_add_vid(netdev, 0);
Don Skidmore068c89b2009-01-19 16:54:36 -08002521
2522 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2523 ixgbe_irq_enable(adapter);
2524}
2525
Auke Kok9a799d72007-09-15 14:07:45 -07002526static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
2527{
2528 ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2529
2530 if (adapter->vlgrp) {
2531 u16 vid;
2532 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2533 if (!vlan_group_get_device(adapter->vlgrp, vid))
2534 continue;
2535 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
2536 }
2537 }
2538}
2539
Christopher Leech2c5645c2008-08-26 04:27:02 -07002540static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
2541{
2542 struct dev_mc_list *mc_ptr;
2543 u8 *addr = *mc_addr_ptr;
2544 *vmdq = 0;
2545
2546 mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
2547 if (mc_ptr->next)
2548 *mc_addr_ptr = mc_ptr->next->dmi_addr;
2549 else
2550 *mc_addr_ptr = NULL;
2551
2552 return addr;
2553}
2554
Auke Kok9a799d72007-09-15 14:07:45 -07002555/**
Christopher Leech2c5645c2008-08-26 04:27:02 -07002556 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
Auke Kok9a799d72007-09-15 14:07:45 -07002557 * @netdev: network interface device structure
2558 *
Christopher Leech2c5645c2008-08-26 04:27:02 -07002559 * The set_rx_method entry point is called whenever the unicast/multicast
2560 * address list or the network interface flags are updated. This routine is
2561 * responsible for configuring the hardware for proper unicast, multicast and
2562 * promiscuous mode.
Auke Kok9a799d72007-09-15 14:07:45 -07002563 **/
Greg Rose7f870472010-01-09 02:25:29 +00002564void ixgbe_set_rx_mode(struct net_device *netdev)
Auke Kok9a799d72007-09-15 14:07:45 -07002565{
2566 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2567 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck3d016252008-08-26 18:30:04 -07002568 u32 fctrl, vlnctrl;
Christopher Leech2c5645c2008-08-26 04:27:02 -07002569 u8 *addr_list = NULL;
2570 int addr_count = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07002571
2572 /* Check for Promiscuous and All Multicast modes */
2573
2574 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
Alexander Duyck3d016252008-08-26 18:30:04 -07002575 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
Auke Kok9a799d72007-09-15 14:07:45 -07002576
2577 if (netdev->flags & IFF_PROMISC) {
Christopher Leech2c5645c2008-08-26 04:27:02 -07002578 hw->addr_ctrl.user_set_promisc = 1;
Auke Kok9a799d72007-09-15 14:07:45 -07002579 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
Alexander Duyck3d016252008-08-26 18:30:04 -07002580 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
Auke Kok9a799d72007-09-15 14:07:45 -07002581 } else {
Patrick McHardy746b9f02008-07-16 20:15:45 -07002582 if (netdev->flags & IFF_ALLMULTI) {
2583 fctrl |= IXGBE_FCTRL_MPE;
2584 fctrl &= ~IXGBE_FCTRL_UPE;
2585 } else {
2586 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
2587 }
Alexander Duyck3d016252008-08-26 18:30:04 -07002588 vlnctrl |= IXGBE_VLNCTRL_VFE;
Christopher Leech2c5645c2008-08-26 04:27:02 -07002589 hw->addr_ctrl.user_set_promisc = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07002590 }
2591
2592 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
Alexander Duyck3d016252008-08-26 18:30:04 -07002593 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
Auke Kok9a799d72007-09-15 14:07:45 -07002594
Christopher Leech2c5645c2008-08-26 04:27:02 -07002595 /* reprogram secondary unicast list */
Jiri Pirko32e7bfc2010-01-25 13:36:10 -08002596 hw->mac.ops.update_uc_addr_list(hw, netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07002597
Christopher Leech2c5645c2008-08-26 04:27:02 -07002598 /* reprogram multicast list */
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00002599 addr_count = netdev_mc_count(netdev);
Christopher Leech2c5645c2008-08-26 04:27:02 -07002600 if (addr_count)
2601 addr_list = netdev->mc_list->dmi_addr;
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07002602 hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
2603 ixgbe_addr_list_itr);
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002604 if (adapter->num_vfs)
2605 ixgbe_restore_vf_multicasts(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07002606}
2607
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002608static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
2609{
2610 int q_idx;
2611 struct ixgbe_q_vector *q_vector;
2612 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2613
2614 /* legacy and MSI only use one vector */
2615 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
2616 q_vectors = 1;
2617
2618 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
Jesse Brandeburgf0848272008-09-11 19:59:42 -07002619 struct napi_struct *napi;
Alexander Duyck7a921c92009-05-06 10:43:28 +00002620 q_vector = adapter->q_vector[q_idx];
Jesse Brandeburgf0848272008-09-11 19:59:42 -07002621 napi = &q_vector->napi;
Alexander Duyck91281fd2009-06-04 16:00:27 +00002622 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2623 if (!q_vector->rxr_count || !q_vector->txr_count) {
2624 if (q_vector->txr_count == 1)
2625 napi->poll = &ixgbe_clean_txonly;
2626 else if (q_vector->rxr_count == 1)
2627 napi->poll = &ixgbe_clean_rxonly;
2628 }
2629 }
Jesse Brandeburgf0848272008-09-11 19:59:42 -07002630
2631 napi_enable(napi);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002632 }
2633}
2634
2635static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
2636{
2637 int q_idx;
2638 struct ixgbe_q_vector *q_vector;
2639 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2640
2641 /* legacy and MSI only use one vector */
2642 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
2643 q_vectors = 1;
2644
2645 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
Alexander Duyck7a921c92009-05-06 10:43:28 +00002646 q_vector = adapter->q_vector[q_idx];
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002647 napi_disable(&q_vector->napi);
2648 }
2649}
2650
Jeff Kirsher7a6b6f52008-11-25 01:02:08 -08002651#ifdef CONFIG_IXGBE_DCB
Alexander Duyck2f90b862008-11-20 20:52:10 -08002652/*
2653 * ixgbe_configure_dcb - Configure DCB hardware
2654 * @adapter: ixgbe adapter struct
2655 *
2656 * This is called by the driver on open to configure the DCB hardware.
2657 * This is also called by the gennetlink interface when reconfiguring
2658 * the DCB state.
2659 */
2660static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
2661{
2662 struct ixgbe_hw *hw = &adapter->hw;
2663 u32 txdctl, vlnctrl;
2664 int i, j;
2665
2666 ixgbe_dcb_check_config(&adapter->dcb_cfg);
2667 ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_TX_CONFIG);
2668 ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_RX_CONFIG);
2669
2670 /* reconfigure the hardware */
2671 ixgbe_dcb_hw_config(&adapter->hw, &adapter->dcb_cfg);
2672
2673 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002674 j = adapter->tx_ring[i]->reg_idx;
Alexander Duyck2f90b862008-11-20 20:52:10 -08002675 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2676 /* PThresh workaround for Tx hang with DFP enabled. */
2677 txdctl |= 32;
2678 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
2679 }
2680 /* Enable VLAN tag insert/strip */
2681 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002682 if (hw->mac.type == ixgbe_mac_82598EB) {
2683 vlnctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
2684 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
2685 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
2686 } else if (hw->mac.type == ixgbe_mac_82599EB) {
2687 vlnctrl |= IXGBE_VLNCTRL_VFE;
2688 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
2689 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
2690 for (i = 0; i < adapter->num_rx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002691 j = adapter->rx_ring[i]->reg_idx;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002692 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
2693 vlnctrl |= IXGBE_RXDCTL_VME;
2694 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
2695 }
2696 }
Alexander Duyck2f90b862008-11-20 20:52:10 -08002697 hw->mac.ops.set_vfta(&adapter->hw, 0, 0, true);
2698}
2699
2700#endif
Auke Kok9a799d72007-09-15 14:07:45 -07002701static void ixgbe_configure(struct ixgbe_adapter *adapter)
2702{
2703 struct net_device *netdev = adapter->netdev;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00002704 struct ixgbe_hw *hw = &adapter->hw;
Auke Kok9a799d72007-09-15 14:07:45 -07002705 int i;
2706
Christopher Leech2c5645c2008-08-26 04:27:02 -07002707 ixgbe_set_rx_mode(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07002708
2709 ixgbe_restore_vlan(adapter);
Jeff Kirsher7a6b6f52008-11-25 01:02:08 -08002710#ifdef CONFIG_IXGBE_DCB
Alexander Duyck2f90b862008-11-20 20:52:10 -08002711 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
Yi Zoub352e402009-11-06 12:55:38 +00002712 if (hw->mac.type == ixgbe_mac_82598EB)
2713 netif_set_gso_max_size(netdev, 32768);
2714 else
2715 netif_set_gso_max_size(netdev, 65536);
Alexander Duyck2f90b862008-11-20 20:52:10 -08002716 ixgbe_configure_dcb(adapter);
2717 } else {
2718 netif_set_gso_max_size(netdev, 65536);
2719 }
2720#else
2721 netif_set_gso_max_size(netdev, 65536);
2722#endif
Auke Kok9a799d72007-09-15 14:07:45 -07002723
Yi Zoueacd73f2009-05-13 13:11:06 +00002724#ifdef IXGBE_FCOE
2725 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
2726 ixgbe_configure_fcoe(adapter);
2727
2728#endif /* IXGBE_FCOE */
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00002729 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2730 for (i = 0; i < adapter->num_tx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002731 adapter->tx_ring[i]->atr_sample_rate =
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00002732 adapter->atr_sample_rate;
2733 ixgbe_init_fdir_signature_82599(hw, adapter->fdir_pballoc);
2734 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
2735 ixgbe_init_fdir_perfect_82599(hw, adapter->fdir_pballoc);
2736 }
2737
Auke Kok9a799d72007-09-15 14:07:45 -07002738 ixgbe_configure_tx(adapter);
2739 ixgbe_configure_rx(adapter);
2740 for (i = 0; i < adapter->num_rx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002741 ixgbe_alloc_rx_buffers(adapter, adapter->rx_ring[i],
2742 (adapter->rx_ring[i]->count - 1));
Auke Kok9a799d72007-09-15 14:07:45 -07002743}
2744
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002745static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2746{
2747 switch (hw->phy.type) {
2748 case ixgbe_phy_sfp_avago:
2749 case ixgbe_phy_sfp_ftl:
2750 case ixgbe_phy_sfp_intel:
2751 case ixgbe_phy_sfp_unknown:
2752 case ixgbe_phy_tw_tyco:
2753 case ixgbe_phy_tw_unknown:
2754 return true;
2755 default:
2756 return false;
2757 }
2758}
2759
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08002760/**
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002761 * ixgbe_sfp_link_config - set up SFP+ link
2762 * @adapter: pointer to private adapter struct
2763 **/
2764static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
2765{
2766 struct ixgbe_hw *hw = &adapter->hw;
2767
2768 if (hw->phy.multispeed_fiber) {
2769 /*
2770 * In multispeed fiber setups, the device may not have
2771 * had a physical connection when the driver loaded.
2772 * If that's the case, the initial link configuration
2773 * couldn't get the MAC into 10G or 1G mode, so we'll
2774 * never have a link status change interrupt fire.
2775 * We need to try and force an autonegotiation
2776 * session, then bring up link.
2777 */
2778 hw->mac.ops.setup_sfp(hw);
2779 if (!(adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK))
2780 schedule_work(&adapter->multispeed_fiber_task);
2781 } else {
2782 /*
2783 * Direct Attach Cu and non-multispeed fiber modules
2784 * still need to be configured properly prior to
2785 * attempting link.
2786 */
2787 if (!(adapter->flags & IXGBE_FLAG_IN_SFP_MOD_TASK))
2788 schedule_work(&adapter->sfp_config_module_task);
2789 }
2790}
2791
2792/**
2793 * ixgbe_non_sfp_link_config - set up non-SFP+ link
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08002794 * @hw: pointer to private hardware struct
2795 *
2796 * Returns 0 on success, negative on failure
2797 **/
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002798static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08002799{
2800 u32 autoneg;
Mallikarjuna R Chilakala8620a102009-09-01 13:49:35 +00002801 bool negotiation, link_up = false;
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08002802 u32 ret = IXGBE_ERR_LINK_SETUP;
2803
2804 if (hw->mac.ops.check_link)
2805 ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
2806
2807 if (ret)
2808 goto link_cfg_out;
2809
2810 if (hw->mac.ops.get_link_capabilities)
Mallikarjuna R Chilakala8620a102009-09-01 13:49:35 +00002811 ret = hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiation);
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08002812 if (ret)
2813 goto link_cfg_out;
2814
Mallikarjuna R Chilakala8620a102009-09-01 13:49:35 +00002815 if (hw->mac.ops.setup_link)
2816 ret = hw->mac.ops.setup_link(hw, autoneg, negotiation, link_up);
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08002817link_cfg_out:
2818 return ret;
2819}
2820
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002821#define IXGBE_MAX_RX_DESC_POLL 10
2822static inline void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
2823 int rxr)
2824{
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002825 int j = adapter->rx_ring[rxr]->reg_idx;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002826 int k;
2827
2828 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
2829 if (IXGBE_READ_REG(&adapter->hw,
2830 IXGBE_RXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
2831 break;
2832 else
2833 msleep(1);
2834 }
2835 if (k >= IXGBE_MAX_RX_DESC_POLL) {
2836 DPRINTK(DRV, ERR, "RXDCTL.ENABLE on Rx queue %d "
2837 "not set within the polling period\n", rxr);
2838 }
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002839 ixgbe_release_rx_desc(&adapter->hw, adapter->rx_ring[rxr],
2840 (adapter->rx_ring[rxr]->count - 1));
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002841}
2842
Auke Kok9a799d72007-09-15 14:07:45 -07002843static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
2844{
2845 struct net_device *netdev = adapter->netdev;
Auke Kok9a799d72007-09-15 14:07:45 -07002846 struct ixgbe_hw *hw = &adapter->hw;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002847 int i, j = 0;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002848 int num_rx_rings = adapter->num_rx_queues;
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08002849 int err;
Auke Kok9a799d72007-09-15 14:07:45 -07002850 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002851 u32 txdctl, rxdctl, mhadd;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002852 u32 dmatxctl;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002853 u32 gpie;
Greg Rosec9205692010-01-22 22:46:22 +00002854 u32 ctrl_ext;
Auke Kok9a799d72007-09-15 14:07:45 -07002855
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -08002856 ixgbe_get_hw_control(adapter);
2857
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002858 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
2859 (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
Auke Kok9a799d72007-09-15 14:07:45 -07002860 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2861 gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07002862 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
Auke Kok9a799d72007-09-15 14:07:45 -07002863 } else {
2864 /* MSI only */
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002865 gpie = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07002866 }
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002867 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2868 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
2869 gpie |= IXGBE_GPIE_VTMODE_64;
2870 }
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002871 /* XXX: to interrupt immediately for EICS writes, enable this */
2872 /* gpie |= IXGBE_GPIE_EIMEN; */
2873 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2874 }
2875
Jesse Brandeburg9b471442009-12-03 11:33:54 +00002876 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2877 /*
2878 * use EIAM to auto-mask when MSI-X interrupt is asserted
2879 * this saves a register write for every interrupt
2880 */
2881 switch (hw->mac.type) {
2882 case ixgbe_mac_82598EB:
2883 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
2884 break;
2885 default:
2886 case ixgbe_mac_82599EB:
2887 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
2888 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
2889 break;
2890 }
2891 } else {
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002892 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
2893 * specifically only auto mask tx and rx interrupts */
2894 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
Auke Kok9a799d72007-09-15 14:07:45 -07002895 }
2896
Jesse Brandeburg0befdb32008-10-31 00:46:40 -07002897 /* Enable fan failure interrupt if media type is copper */
2898 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
2899 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
2900 gpie |= IXGBE_SDP1_GPIEN;
2901 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2902 }
2903
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002904 if (hw->mac.type == ixgbe_mac_82599EB) {
2905 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
2906 gpie |= IXGBE_SDP1_GPIEN;
2907 gpie |= IXGBE_SDP2_GPIEN;
2908 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2909 }
2910
Yi Zou63f39bd2009-05-17 12:34:35 +00002911#ifdef IXGBE_FCOE
2912 /* adjust max frame to be able to do baby jumbo for FCoE */
Yi Zouf34c5c82009-08-14 12:42:17 +00002913 if ((netdev->features & NETIF_F_FCOE_MTU) &&
Yi Zou63f39bd2009-05-17 12:34:35 +00002914 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
2915 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
2916
2917#endif /* IXGBE_FCOE */
Auke Kok9a799d72007-09-15 14:07:45 -07002918 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
Auke Kok9a799d72007-09-15 14:07:45 -07002919 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
2920 mhadd &= ~IXGBE_MHADD_MFS_MASK;
2921 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
2922
2923 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
2924 }
2925
2926 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002927 j = adapter->tx_ring[i]->reg_idx;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002928 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
Jesse Brandeburge01c31a2008-08-26 04:27:13 -07002929 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
2930 txdctl |= (8 << 16);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002931 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
2932 }
2933
2934 if (hw->mac.type == ixgbe_mac_82599EB) {
2935 /* DMATXCTL.EN must be set after all Tx queue config is done */
2936 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
2937 dmatxctl |= IXGBE_DMATXCTL_TE;
2938 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
2939 }
2940 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002941 j = adapter->tx_ring[i]->reg_idx;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002942 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
Auke Kok9a799d72007-09-15 14:07:45 -07002943 txdctl |= IXGBE_TXDCTL_ENABLE;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002944 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002945 if (hw->mac.type == ixgbe_mac_82599EB) {
2946 int wait_loop = 10;
2947 /* poll for Tx Enable ready */
2948 do {
2949 msleep(1);
2950 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2951 } while (--wait_loop &&
2952 !(txdctl & IXGBE_TXDCTL_ENABLE));
2953 if (!wait_loop)
2954 DPRINTK(DRV, ERR, "Could not enable "
2955 "Tx Queue %d\n", j);
2956 }
Auke Kok9a799d72007-09-15 14:07:45 -07002957 }
2958
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002959 for (i = 0; i < num_rx_rings; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002960 j = adapter->rx_ring[i]->reg_idx;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002961 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
2962 /* enable PTHRESH=32 descriptors (half the internal cache)
2963 * and HTHRESH=0 descriptors (to minimize latency on fetch),
2964 * this also removes a pesky rx_no_buffer_count increment */
2965 rxdctl |= 0x0020;
Auke Kok9a799d72007-09-15 14:07:45 -07002966 rxdctl |= IXGBE_RXDCTL_ENABLE;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002967 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002968 if (hw->mac.type == ixgbe_mac_82599EB)
2969 ixgbe_rx_desc_queue_enable(adapter, i);
Auke Kok9a799d72007-09-15 14:07:45 -07002970 }
2971 /* enable all receives */
2972 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002973 if (hw->mac.type == ixgbe_mac_82598EB)
2974 rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
2975 else
2976 rxdctl |= IXGBE_RXCTRL_RXEN;
2977 hw->mac.ops.enable_rx_dma(hw, rxdctl);
Auke Kok9a799d72007-09-15 14:07:45 -07002978
2979 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2980 ixgbe_configure_msix(adapter);
2981 else
2982 ixgbe_configure_msi_and_legacy(adapter);
2983
2984 clear_bit(__IXGBE_DOWN, &adapter->state);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002985 ixgbe_napi_enable_all(adapter);
2986
2987 /* clear any pending interrupts, may auto mask */
2988 IXGBE_READ_REG(hw, IXGBE_EICR);
2989
Auke Kok9a799d72007-09-15 14:07:45 -07002990 ixgbe_irq_enable(adapter);
2991
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002992 /*
Don Skidmorebf069c92009-05-07 10:39:54 +00002993 * If this adapter has a fan, check to see if we had a failure
2994 * before we enabled the interrupt.
2995 */
2996 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
2997 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
2998 if (esdp & IXGBE_ESDP_SDP1)
2999 DPRINTK(DRV, CRIT,
3000 "Fan has stopped, replace the adapter\n");
3001 }
3002
3003 /*
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003004 * For hot-pluggable SFP+ devices, a new SFP+ module may have
Don Skidmore19343de2009-07-02 12:50:31 +00003005 * arrived before interrupts were enabled but after probe. Such
3006 * devices wouldn't have their type identified yet. We need to
3007 * kick off the SFP+ module setup first, then try to bring up link.
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003008 * If we're not hot-pluggable SFP+, we just need to configure link
3009 * and bring it up.
3010 */
Don Skidmore19343de2009-07-02 12:50:31 +00003011 if (hw->phy.type == ixgbe_phy_unknown) {
3012 err = hw->phy.ops.identify(hw);
3013 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
Don Skidmore5da43c12009-07-02 12:50:52 +00003014 /*
3015 * Take the device down and schedule the sfp tasklet
3016 * which will unregister_netdev and log it.
3017 */
Don Skidmore19343de2009-07-02 12:50:31 +00003018 ixgbe_down(adapter);
Don Skidmore5da43c12009-07-02 12:50:52 +00003019 schedule_work(&adapter->sfp_config_module_task);
Don Skidmore19343de2009-07-02 12:50:31 +00003020 return err;
3021 }
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003022 }
3023
3024 if (ixgbe_is_sfp(hw)) {
3025 ixgbe_sfp_link_config(adapter);
3026 } else {
3027 err = ixgbe_non_sfp_link_config(hw);
3028 if (err)
3029 DPRINTK(PROBE, ERR, "link_config FAILED %d\n", err);
3030 }
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08003031
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003032 for (i = 0; i < adapter->num_tx_queues; i++)
3033 set_bit(__IXGBE_FDIR_INIT_DONE,
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003034 &(adapter->tx_ring[i]->reinit_state));
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003035
Peter P Waskiewicz Jr1da100b2009-01-19 16:55:03 -08003036 /* enable transmits */
3037 netif_tx_start_all_queues(netdev);
3038
Auke Kok9a799d72007-09-15 14:07:45 -07003039 /* bring the link up in the watchdog, this could race with our first
3040 * link up interrupt but shouldn't be a problem */
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07003041 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
3042 adapter->link_check_timeout = jiffies;
Auke Kok9a799d72007-09-15 14:07:45 -07003043 mod_timer(&adapter->watchdog_timer, jiffies);
Greg Rosec9205692010-01-22 22:46:22 +00003044
3045 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
3046 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
3047 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
3048 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
3049
Auke Kok9a799d72007-09-15 14:07:45 -07003050 return 0;
3051}
3052
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08003053void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
3054{
3055 WARN_ON(in_interrupt());
3056 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
3057 msleep(1);
3058 ixgbe_down(adapter);
3059 ixgbe_up(adapter);
3060 clear_bit(__IXGBE_RESETTING, &adapter->state);
3061}
3062
Auke Kok9a799d72007-09-15 14:07:45 -07003063int ixgbe_up(struct ixgbe_adapter *adapter)
3064{
3065 /* hardware has been reset, we need to reload some things */
3066 ixgbe_configure(adapter);
3067
3068 return ixgbe_up_complete(adapter);
3069}
3070
3071void ixgbe_reset(struct ixgbe_adapter *adapter)
3072{
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07003073 struct ixgbe_hw *hw = &adapter->hw;
Don Skidmore8ca783a2009-05-26 20:40:47 -07003074 int err;
3075
3076 err = hw->mac.ops.init_hw(hw);
Peter P Waskiewicz Jrda4dd0f2009-06-04 11:10:35 +00003077 switch (err) {
3078 case 0:
3079 case IXGBE_ERR_SFP_NOT_PRESENT:
3080 break;
3081 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
3082 dev_err(&adapter->pdev->dev, "master disable timed out\n");
3083 break;
Peter P Waskiewicz Jr794caeb2009-06-04 16:02:24 +00003084 case IXGBE_ERR_EEPROM_VERSION:
3085 /* We are running on a pre-production device, log a warning */
3086 dev_warn(&adapter->pdev->dev, "This device is a pre-production "
3087 "adapter/LOM. Please be aware there may be issues "
3088 "associated with your hardware. If you are "
3089 "experiencing problems please contact your Intel or "
3090 "hardware representative who provided you with this "
3091 "hardware.\n");
3092 break;
Peter P Waskiewicz Jrda4dd0f2009-06-04 11:10:35 +00003093 default:
3094 dev_err(&adapter->pdev->dev, "Hardware Error: %d\n", err);
3095 }
Auke Kok9a799d72007-09-15 14:07:45 -07003096
3097 /* reprogram the RAR[0] in case user changed it. */
Greg Rose1cdd1ec2010-01-09 02:26:46 +00003098 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, adapter->num_vfs,
3099 IXGBE_RAH_AV);
Auke Kok9a799d72007-09-15 14:07:45 -07003100}
3101
Auke Kok9a799d72007-09-15 14:07:45 -07003102/**
3103 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
3104 * @adapter: board private structure
3105 * @rx_ring: ring to free buffers from
3106 **/
3107static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07003108 struct ixgbe_ring *rx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -07003109{
3110 struct pci_dev *pdev = adapter->pdev;
3111 unsigned long size;
3112 unsigned int i;
3113
3114 /* Free all the Rx ring sk_buffs */
3115
3116 for (i = 0; i < rx_ring->count; i++) {
3117 struct ixgbe_rx_buffer *rx_buffer_info;
3118
3119 rx_buffer_info = &rx_ring->rx_buffer_info[i];
3120 if (rx_buffer_info->dma) {
3121 pci_unmap_single(pdev, rx_buffer_info->dma,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07003122 rx_ring->rx_buf_len,
3123 PCI_DMA_FROMDEVICE);
Auke Kok9a799d72007-09-15 14:07:45 -07003124 rx_buffer_info->dma = 0;
3125 }
3126 if (rx_buffer_info->skb) {
Alexander Duyckf8212f92009-04-27 22:42:37 +00003127 struct sk_buff *skb = rx_buffer_info->skb;
Auke Kok9a799d72007-09-15 14:07:45 -07003128 rx_buffer_info->skb = NULL;
Alexander Duyckf8212f92009-04-27 22:42:37 +00003129 do {
3130 struct sk_buff *this = skb;
Mallikarjuna R Chilakalafd3686a2010-03-19 04:41:33 +00003131 if (IXGBE_RSC_CB(this)->dma) {
Mallikarjuna R Chilakala43634e82010-02-25 23:14:37 +00003132 pci_unmap_single(pdev, IXGBE_RSC_CB(this)->dma,
3133 rx_ring->rx_buf_len,
3134 PCI_DMA_FROMDEVICE);
Mallikarjuna R Chilakalafd3686a2010-03-19 04:41:33 +00003135 IXGBE_RSC_CB(this)->dma = 0;
3136 }
Alexander Duyckf8212f92009-04-27 22:42:37 +00003137 skb = skb->prev;
3138 dev_kfree_skb(this);
3139 } while (skb);
Auke Kok9a799d72007-09-15 14:07:45 -07003140 }
3141 if (!rx_buffer_info->page)
3142 continue;
Jesse Brandeburg4f57ca62009-06-30 11:44:56 +00003143 if (rx_buffer_info->page_dma) {
3144 pci_unmap_page(pdev, rx_buffer_info->page_dma,
3145 PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
3146 rx_buffer_info->page_dma = 0;
3147 }
Auke Kok9a799d72007-09-15 14:07:45 -07003148 put_page(rx_buffer_info->page);
3149 rx_buffer_info->page = NULL;
Jesse Brandeburg762f4c52008-09-11 19:58:43 -07003150 rx_buffer_info->page_offset = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07003151 }
3152
3153 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
3154 memset(rx_ring->rx_buffer_info, 0, size);
3155
3156 /* Zero out the descriptor ring */
3157 memset(rx_ring->desc, 0, rx_ring->size);
3158
3159 rx_ring->next_to_clean = 0;
3160 rx_ring->next_to_use = 0;
3161
Jesse Brandeburg9891ca72009-03-13 22:14:50 +00003162 if (rx_ring->head)
3163 writel(0, adapter->hw.hw_addr + rx_ring->head);
3164 if (rx_ring->tail)
3165 writel(0, adapter->hw.hw_addr + rx_ring->tail);
Auke Kok9a799d72007-09-15 14:07:45 -07003166}
3167
3168/**
3169 * ixgbe_clean_tx_ring - Free Tx Buffers
3170 * @adapter: board private structure
3171 * @tx_ring: ring to be cleaned
3172 **/
3173static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07003174 struct ixgbe_ring *tx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -07003175{
3176 struct ixgbe_tx_buffer *tx_buffer_info;
3177 unsigned long size;
3178 unsigned int i;
3179
3180 /* Free all the Tx ring sk_buffs */
3181
3182 for (i = 0; i < tx_ring->count; i++) {
3183 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3184 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
3185 }
3186
3187 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
3188 memset(tx_ring->tx_buffer_info, 0, size);
3189
3190 /* Zero out the descriptor ring */
3191 memset(tx_ring->desc, 0, tx_ring->size);
3192
3193 tx_ring->next_to_use = 0;
3194 tx_ring->next_to_clean = 0;
3195
Jesse Brandeburg9891ca72009-03-13 22:14:50 +00003196 if (tx_ring->head)
3197 writel(0, adapter->hw.hw_addr + tx_ring->head);
3198 if (tx_ring->tail)
3199 writel(0, adapter->hw.hw_addr + tx_ring->tail);
Auke Kok9a799d72007-09-15 14:07:45 -07003200}
3201
3202/**
Auke Kok9a799d72007-09-15 14:07:45 -07003203 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
3204 * @adapter: board private structure
3205 **/
3206static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
3207{
3208 int i;
3209
3210 for (i = 0; i < adapter->num_rx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003211 ixgbe_clean_rx_ring(adapter, adapter->rx_ring[i]);
Auke Kok9a799d72007-09-15 14:07:45 -07003212}
3213
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003214/**
3215 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
3216 * @adapter: board private structure
3217 **/
3218static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
3219{
3220 int i;
3221
3222 for (i = 0; i < adapter->num_tx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003223 ixgbe_clean_tx_ring(adapter, adapter->tx_ring[i]);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003224}
3225
Auke Kok9a799d72007-09-15 14:07:45 -07003226void ixgbe_down(struct ixgbe_adapter *adapter)
3227{
3228 struct net_device *netdev = adapter->netdev;
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003229 struct ixgbe_hw *hw = &adapter->hw;
Auke Kok9a799d72007-09-15 14:07:45 -07003230 u32 rxctrl;
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003231 u32 txdctl;
3232 int i, j;
Auke Kok9a799d72007-09-15 14:07:45 -07003233
3234 /* signal that we are down to the interrupt handler */
3235 set_bit(__IXGBE_DOWN, &adapter->state);
3236
Greg Rose767081a2010-01-22 22:46:40 +00003237 /* disable receive for all VFs and wait one second */
3238 if (adapter->num_vfs) {
3239 for (i = 0 ; i < adapter->num_vfs; i++)
3240 adapter->vfinfo[i].clear_to_send = 0;
3241
3242 /* ping all the active vfs to let them know we are going down */
3243 ixgbe_ping_all_vfs(adapter);
3244 /* Disable all VFTE/VFRE TX/RX */
3245 ixgbe_disable_tx_rx(adapter);
3246 }
3247
Auke Kok9a799d72007-09-15 14:07:45 -07003248 /* disable receives */
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003249 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3250 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
Auke Kok9a799d72007-09-15 14:07:45 -07003251
3252 netif_tx_disable(netdev);
3253
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003254 IXGBE_WRITE_FLUSH(hw);
Auke Kok9a799d72007-09-15 14:07:45 -07003255 msleep(10);
3256
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003257 netif_tx_stop_all_queues(netdev);
3258
Auke Kok9a799d72007-09-15 14:07:45 -07003259 ixgbe_irq_disable(adapter);
3260
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003261 ixgbe_napi_disable_all(adapter);
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003262
Don Skidmore0a1f87c2009-09-18 09:45:43 +00003263 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
3264 del_timer_sync(&adapter->sfp_timer);
Auke Kok9a799d72007-09-15 14:07:45 -07003265 del_timer_sync(&adapter->watchdog_timer);
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07003266 cancel_work_sync(&adapter->watchdog_task);
Auke Kok9a799d72007-09-15 14:07:45 -07003267
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003268 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
3269 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
3270 cancel_work_sync(&adapter->fdir_reinit_task);
3271
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003272 /* disable transmits in the hardware now that interrupts are off */
3273 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003274 j = adapter->tx_ring[i]->reg_idx;
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003275 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
3276 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j),
3277 (txdctl & ~IXGBE_TXDCTL_ENABLE));
3278 }
PJ Waskiewicz88512532009-03-13 22:15:10 +00003279 /* Disable the Tx DMA engine on 82599 */
3280 if (hw->mac.type == ixgbe_mac_82599EB)
3281 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
3282 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
3283 ~IXGBE_DMATXCTL_TE));
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003284
Auke Kok9a799d72007-09-15 14:07:45 -07003285 netif_carrier_off(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07003286
Peter Waskiewicz9a713e72010-02-10 16:07:54 +00003287 /* clear n-tuple filters that are cached */
3288 ethtool_ntuple_flush(netdev);
3289
Paul Larson6f4a0e42008-06-24 17:00:56 -07003290 if (!pci_channel_offline(adapter->pdev))
3291 ixgbe_reset(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07003292 ixgbe_clean_all_tx_rings(adapter);
3293 ixgbe_clean_all_rx_rings(adapter);
3294
Jeff Garzik5dd2d332008-10-16 05:09:31 -04003295#ifdef CONFIG_IXGBE_DCA
Jesse Brandeburg96b0e0f2008-08-26 04:27:21 -07003296 /* since we reset the hardware DCA settings were cleared */
Alexander Duycke35ec122009-05-21 13:07:12 +00003297 ixgbe_setup_dca(adapter);
Jesse Brandeburg96b0e0f2008-08-26 04:27:21 -07003298#endif
Auke Kok9a799d72007-09-15 14:07:45 -07003299}
3300
Auke Kok9a799d72007-09-15 14:07:45 -07003301/**
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003302 * ixgbe_poll - NAPI Rx polling callback
3303 * @napi: structure for representing this polling device
3304 * @budget: how many packets driver is allowed to clean
3305 *
3306 * This function is used for legacy and MSI, NAPI mode
Auke Kok9a799d72007-09-15 14:07:45 -07003307 **/
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003308static int ixgbe_poll(struct napi_struct *napi, int budget)
Auke Kok9a799d72007-09-15 14:07:45 -07003309{
Jesse Brandeburg9a1a69ad2009-03-13 22:14:10 +00003310 struct ixgbe_q_vector *q_vector =
3311 container_of(napi, struct ixgbe_q_vector, napi);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003312 struct ixgbe_adapter *adapter = q_vector->adapter;
Jesse Brandeburg9a1a69ad2009-03-13 22:14:10 +00003313 int tx_clean_complete, work_done = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07003314
Jeff Garzik5dd2d332008-10-16 05:09:31 -04003315#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -08003316 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003317 ixgbe_update_tx_dca(adapter, adapter->tx_ring[0]);
3318 ixgbe_update_rx_dca(adapter, adapter->rx_ring[0]);
Jeb Cramerbd0362d2008-03-03 15:04:02 -08003319 }
3320#endif
3321
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003322 tx_clean_complete = ixgbe_clean_tx_irq(q_vector, adapter->tx_ring[0]);
3323 ixgbe_clean_rx_irq(q_vector, adapter->rx_ring[0], &work_done, budget);
Auke Kok9a799d72007-09-15 14:07:45 -07003324
Jesse Brandeburg9a1a69ad2009-03-13 22:14:10 +00003325 if (!tx_clean_complete)
David S. Millerd2c7ddd2008-01-15 22:43:24 -08003326 work_done = budget;
3327
David S. Miller53e52c72008-01-07 21:06:12 -08003328 /* If budget not fully consumed, exit the polling mode */
3329 if (work_done < budget) {
Ben Hutchings288379f2009-01-19 16:43:59 -08003330 napi_complete(napi);
Nelson, Shannonf7554a22009-09-18 09:46:06 +00003331 if (adapter->rx_itr_setting & 1)
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08003332 ixgbe_set_itr(adapter);
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08003333 if (!test_bit(__IXGBE_DOWN, &adapter->state))
Nelson, Shannon835462f2009-04-27 22:42:54 +00003334 ixgbe_irq_enable_queues(adapter, IXGBE_EIMS_RTX_QUEUE);
Auke Kok9a799d72007-09-15 14:07:45 -07003335 }
Auke Kok9a799d72007-09-15 14:07:45 -07003336 return work_done;
3337}
3338
3339/**
3340 * ixgbe_tx_timeout - Respond to a Tx Hang
3341 * @netdev: network interface device structure
3342 **/
3343static void ixgbe_tx_timeout(struct net_device *netdev)
3344{
3345 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3346
3347 /* Do the reset outside of interrupt context */
3348 schedule_work(&adapter->reset_task);
3349}
3350
3351static void ixgbe_reset_task(struct work_struct *work)
3352{
3353 struct ixgbe_adapter *adapter;
3354 adapter = container_of(work, struct ixgbe_adapter, reset_task);
3355
Alexander Duyck2f90b862008-11-20 20:52:10 -08003356 /* If we're already down or resetting, just bail */
3357 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
3358 test_bit(__IXGBE_RESETTING, &adapter->state))
3359 return;
3360
Auke Kok9a799d72007-09-15 14:07:45 -07003361 adapter->tx_timeout_count++;
3362
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08003363 ixgbe_reinit_locked(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07003364}
3365
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003366#ifdef CONFIG_IXGBE_DCB
3367static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter)
Jesse Brandeburgb9804972008-09-11 20:00:29 -07003368{
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003369 bool ret = false;
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00003370 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_DCB];
Jesse Brandeburgb9804972008-09-11 20:00:29 -07003371
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00003372 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
3373 return ret;
3374
3375 f->mask = 0x7 << 3;
3376 adapter->num_rx_queues = f->indices;
3377 adapter->num_tx_queues = f->indices;
3378 ret = true;
Jesse Brandeburgb9804972008-09-11 20:00:29 -07003379
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003380 return ret;
3381}
3382#endif
3383
Jesse Brandeburg4df10462009-03-13 22:15:31 +00003384/**
3385 * ixgbe_set_rss_queues: Allocate queues for RSS
3386 * @adapter: board private structure to initialize
3387 *
3388 * This is our "base" multiqueue mode. RSS (Receive Side Scaling) will try
3389 * to allocate one Rx queue per CPU, and if available, one Tx queue per CPU.
3390 *
3391 **/
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003392static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter)
3393{
3394 bool ret = false;
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00003395 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_RSS];
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003396
3397 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00003398 f->mask = 0xF;
3399 adapter->num_rx_queues = f->indices;
3400 adapter->num_tx_queues = f->indices;
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003401 ret = true;
3402 } else {
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003403 ret = false;
3404 }
3405
3406 return ret;
3407}
3408
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003409/**
3410 * ixgbe_set_fdir_queues: Allocate queues for Flow Director
3411 * @adapter: board private structure to initialize
3412 *
3413 * Flow Director is an advanced Rx filter, attempting to get Rx flows back
3414 * to the original CPU that initiated the Tx session. This runs in addition
3415 * to RSS, so if a packet doesn't match an FDIR filter, we can still spread the
3416 * Rx load across CPUs using RSS.
3417 *
3418 **/
3419static bool inline ixgbe_set_fdir_queues(struct ixgbe_adapter *adapter)
3420{
3421 bool ret = false;
3422 struct ixgbe_ring_feature *f_fdir = &adapter->ring_feature[RING_F_FDIR];
3423
3424 f_fdir->indices = min((int)num_online_cpus(), f_fdir->indices);
3425 f_fdir->mask = 0;
3426
3427 /* Flow Director must have RSS enabled */
3428 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED &&
3429 ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
3430 (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)))) {
3431 adapter->num_tx_queues = f_fdir->indices;
3432 adapter->num_rx_queues = f_fdir->indices;
3433 ret = true;
3434 } else {
3435 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
3436 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
3437 }
3438 return ret;
3439}
3440
Yi Zou0331a832009-05-17 12:33:52 +00003441#ifdef IXGBE_FCOE
3442/**
3443 * ixgbe_set_fcoe_queues: Allocate queues for Fiber Channel over Ethernet (FCoE)
3444 * @adapter: board private structure to initialize
3445 *
3446 * FCoE RX FCRETA can use up to 8 rx queues for up to 8 different exchanges.
3447 * The ring feature mask is not used as a mask for FCoE, as it can take any 8
3448 * rx queues out of the max number of rx queues, instead, it is used as the
3449 * index of the first rx queue used by FCoE.
3450 *
3451 **/
3452static inline bool ixgbe_set_fcoe_queues(struct ixgbe_adapter *adapter)
3453{
3454 bool ret = false;
3455 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];
3456
3457 f->indices = min((int)num_online_cpus(), f->indices);
3458 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
Yi Zou8de8b2e2009-09-03 14:55:50 +00003459 adapter->num_rx_queues = 1;
3460 adapter->num_tx_queues = 1;
Yi Zou0331a832009-05-17 12:33:52 +00003461#ifdef CONFIG_IXGBE_DCB
3462 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
Yi Zou8de8b2e2009-09-03 14:55:50 +00003463 DPRINTK(PROBE, INFO, "FCoE enabled with DCB \n");
Yi Zou0331a832009-05-17 12:33:52 +00003464 ixgbe_set_dcb_queues(adapter);
3465 }
3466#endif
3467 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
Yi Zou8de8b2e2009-09-03 14:55:50 +00003468 DPRINTK(PROBE, INFO, "FCoE enabled with RSS \n");
Yi Zou8faa2a72009-07-09 02:29:50 +00003469 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) ||
3470 (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
3471 ixgbe_set_fdir_queues(adapter);
3472 else
3473 ixgbe_set_rss_queues(adapter);
Yi Zou0331a832009-05-17 12:33:52 +00003474 }
3475 /* adding FCoE rx rings to the end */
3476 f->mask = adapter->num_rx_queues;
3477 adapter->num_rx_queues += f->indices;
Yi Zou8de8b2e2009-09-03 14:55:50 +00003478 adapter->num_tx_queues += f->indices;
Yi Zou0331a832009-05-17 12:33:52 +00003479
3480 ret = true;
3481 }
3482
3483 return ret;
3484}
3485
3486#endif /* IXGBE_FCOE */
Greg Rose1cdd1ec2010-01-09 02:26:46 +00003487/**
3488 * ixgbe_set_sriov_queues: Allocate queues for IOV use
3489 * @adapter: board private structure to initialize
3490 *
3491 * IOV doesn't actually use anything, so just NAK the
3492 * request for now and let the other queue routines
3493 * figure out what to do.
3494 */
3495static inline bool ixgbe_set_sriov_queues(struct ixgbe_adapter *adapter)
3496{
3497 return false;
3498}
3499
Jesse Brandeburg4df10462009-03-13 22:15:31 +00003500/*
3501 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
3502 * @adapter: board private structure to initialize
3503 *
3504 * This is the top level queue allocation routine. The order here is very
3505 * important, starting with the "most" number of features turned on at once,
3506 * and ending with the smallest set of features. This way large combinations
3507 * can be allocated if they're turned on, and smaller combinations are the
3508 * fallthrough conditions.
3509 *
3510 **/
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003511static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
3512{
Greg Rose1cdd1ec2010-01-09 02:26:46 +00003513 /* Start with base case */
3514 adapter->num_rx_queues = 1;
3515 adapter->num_tx_queues = 1;
3516 adapter->num_rx_pools = adapter->num_rx_queues;
3517 adapter->num_rx_queues_per_pool = 1;
3518
3519 if (ixgbe_set_sriov_queues(adapter))
3520 return;
3521
Yi Zou0331a832009-05-17 12:33:52 +00003522#ifdef IXGBE_FCOE
3523 if (ixgbe_set_fcoe_queues(adapter))
3524 goto done;
3525
3526#endif /* IXGBE_FCOE */
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003527#ifdef CONFIG_IXGBE_DCB
3528 if (ixgbe_set_dcb_queues(adapter))
Wu Fengguangaf22ab12009-04-14 21:54:07 -07003529 goto done;
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003530
3531#endif
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003532 if (ixgbe_set_fdir_queues(adapter))
3533 goto done;
3534
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003535 if (ixgbe_set_rss_queues(adapter))
Wu Fengguangaf22ab12009-04-14 21:54:07 -07003536 goto done;
3537
3538 /* fallback to base case */
3539 adapter->num_rx_queues = 1;
3540 adapter->num_tx_queues = 1;
3541
3542done:
3543 /* Notify the stack of the (possibly) reduced Tx Queue count. */
3544 adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
Jesse Brandeburgb9804972008-09-11 20:00:29 -07003545}
3546
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003547static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07003548 int vectors)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003549{
3550 int err, vector_threshold;
3551
3552 /* We'll want at least 3 (vector_threshold):
3553 * 1) TxQ[0] Cleanup
3554 * 2) RxQ[0] Cleanup
3555 * 3) Other (Link Status Change, etc.)
3556 * 4) TCP Timer (optional)
3557 */
3558 vector_threshold = MIN_MSIX_COUNT;
3559
3560 /* The more we get, the more we will assign to Tx/Rx Cleanup
3561 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
3562 * Right now, we simply care about how many we'll get; we'll
3563 * set them up later while requesting irq's.
3564 */
3565 while (vectors >= vector_threshold) {
3566 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07003567 vectors);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003568 if (!err) /* Success in acquiring all requested vectors. */
3569 break;
3570 else if (err < 0)
3571 vectors = 0; /* Nasty failure, quit now */
3572 else /* err == number of vectors we should try again with */
3573 vectors = err;
3574 }
3575
3576 if (vectors < vector_threshold) {
3577 /* Can't allocate enough MSI-X interrupts? Oh well.
3578 * This just means we'll go with either a single MSI
3579 * vector or fall back to legacy interrupts.
3580 */
3581 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
3582 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3583 kfree(adapter->msix_entries);
3584 adapter->msix_entries = NULL;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003585 } else {
3586 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
Peter P Waskiewicz Jreb7f1392009-02-01 01:18:58 -08003587 /*
3588 * Adjust for only the vectors we'll use, which is minimum
3589 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
3590 * vectors we were allocated.
3591 */
3592 adapter->num_msix_vectors = min(vectors,
3593 adapter->max_msix_q_vectors + NON_Q_VECTORS);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003594 }
3595}
3596
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003597/**
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003598 * ixgbe_cache_ring_rss - Descriptor ring to register mapping for RSS
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003599 * @adapter: board private structure to initialize
3600 *
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003601 * Cache the descriptor ring offsets for RSS to the assigned rings.
3602 *
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003603 **/
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003604static inline bool ixgbe_cache_ring_rss(struct ixgbe_adapter *adapter)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003605{
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003606 int i;
3607 bool ret = false;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003608
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003609 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
3610 for (i = 0; i < adapter->num_rx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003611 adapter->rx_ring[i]->reg_idx = i;
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003612 for (i = 0; i < adapter->num_tx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003613 adapter->tx_ring[i]->reg_idx = i;
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003614 ret = true;
3615 } else {
3616 ret = false;
3617 }
3618
3619 return ret;
3620}
3621
3622#ifdef CONFIG_IXGBE_DCB
3623/**
3624 * ixgbe_cache_ring_dcb - Descriptor ring to register mapping for DCB
3625 * @adapter: board private structure to initialize
3626 *
3627 * Cache the descriptor ring offsets for DCB to the assigned rings.
3628 *
3629 **/
3630static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter *adapter)
3631{
3632 int i;
3633 bool ret = false;
3634 int dcb_i = adapter->ring_feature[RING_F_DCB].indices;
3635
3636 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
3637 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
Alexander Duyck2f90b862008-11-20 20:52:10 -08003638 /* the number of queues is assumed to be symmetric */
3639 for (i = 0; i < dcb_i; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003640 adapter->rx_ring[i]->reg_idx = i << 3;
3641 adapter->tx_ring[i]->reg_idx = i << 2;
Alexander Duyck2f90b862008-11-20 20:52:10 -08003642 }
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003643 ret = true;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003644 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00003645 if (dcb_i == 8) {
3646 /*
3647 * Tx TC0 starts at: descriptor queue 0
3648 * Tx TC1 starts at: descriptor queue 32
3649 * Tx TC2 starts at: descriptor queue 64
3650 * Tx TC3 starts at: descriptor queue 80
3651 * Tx TC4 starts at: descriptor queue 96
3652 * Tx TC5 starts at: descriptor queue 104
3653 * Tx TC6 starts at: descriptor queue 112
3654 * Tx TC7 starts at: descriptor queue 120
3655 *
3656 * Rx TC0-TC7 are offset by 16 queues each
3657 */
3658 for (i = 0; i < 3; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003659 adapter->tx_ring[i]->reg_idx = i << 5;
3660 adapter->rx_ring[i]->reg_idx = i << 4;
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00003661 }
3662 for ( ; i < 5; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003663 adapter->tx_ring[i]->reg_idx =
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00003664 ((i + 2) << 4);
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003665 adapter->rx_ring[i]->reg_idx = i << 4;
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00003666 }
3667 for ( ; i < dcb_i; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003668 adapter->tx_ring[i]->reg_idx =
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00003669 ((i + 8) << 3);
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003670 adapter->rx_ring[i]->reg_idx = i << 4;
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00003671 }
3672
3673 ret = true;
3674 } else if (dcb_i == 4) {
3675 /*
3676 * Tx TC0 starts at: descriptor queue 0
3677 * Tx TC1 starts at: descriptor queue 64
3678 * Tx TC2 starts at: descriptor queue 96
3679 * Tx TC3 starts at: descriptor queue 112
3680 *
3681 * Rx TC0-TC3 are offset by 32 queues each
3682 */
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003683 adapter->tx_ring[0]->reg_idx = 0;
3684 adapter->tx_ring[1]->reg_idx = 64;
3685 adapter->tx_ring[2]->reg_idx = 96;
3686 adapter->tx_ring[3]->reg_idx = 112;
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00003687 for (i = 0 ; i < dcb_i; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003688 adapter->rx_ring[i]->reg_idx = i << 5;
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00003689
3690 ret = true;
3691 } else {
3692 ret = false;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003693 }
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003694 } else {
3695 ret = false;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003696 }
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003697 } else {
3698 ret = false;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003699 }
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003700
3701 return ret;
3702}
3703#endif
3704
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003705/**
3706 * ixgbe_cache_ring_fdir - Descriptor ring to register mapping for Flow Director
3707 * @adapter: board private structure to initialize
3708 *
3709 * Cache the descriptor ring offsets for Flow Director to the assigned rings.
3710 *
3711 **/
3712static bool inline ixgbe_cache_ring_fdir(struct ixgbe_adapter *adapter)
3713{
3714 int i;
3715 bool ret = false;
3716
3717 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED &&
3718 ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) ||
3719 (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))) {
3720 for (i = 0; i < adapter->num_rx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003721 adapter->rx_ring[i]->reg_idx = i;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003722 for (i = 0; i < adapter->num_tx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003723 adapter->tx_ring[i]->reg_idx = i;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003724 ret = true;
3725 }
3726
3727 return ret;
3728}
3729
Yi Zou0331a832009-05-17 12:33:52 +00003730#ifdef IXGBE_FCOE
3731/**
3732 * ixgbe_cache_ring_fcoe - Descriptor ring to register mapping for the FCoE
3733 * @adapter: board private structure to initialize
3734 *
3735 * Cache the descriptor ring offsets for FCoE mode to the assigned rings.
3736 *
3737 */
3738static inline bool ixgbe_cache_ring_fcoe(struct ixgbe_adapter *adapter)
3739{
Yi Zou8de8b2e2009-09-03 14:55:50 +00003740 int i, fcoe_rx_i = 0, fcoe_tx_i = 0;
Yi Zou0331a832009-05-17 12:33:52 +00003741 bool ret = false;
3742 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];
3743
3744 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
3745#ifdef CONFIG_IXGBE_DCB
3746 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
Yi Zou8de8b2e2009-09-03 14:55:50 +00003747 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
3748
Yi Zou0331a832009-05-17 12:33:52 +00003749 ixgbe_cache_ring_dcb(adapter);
Yi Zou8de8b2e2009-09-03 14:55:50 +00003750 /* find out queues in TC for FCoE */
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003751 fcoe_rx_i = adapter->rx_ring[fcoe->tc]->reg_idx + 1;
3752 fcoe_tx_i = adapter->tx_ring[fcoe->tc]->reg_idx + 1;
Yi Zou8de8b2e2009-09-03 14:55:50 +00003753 /*
3754 * In 82599, the number of Tx queues for each traffic
3755 * class for both 8-TC and 4-TC modes are:
3756 * TCs : TC0 TC1 TC2 TC3 TC4 TC5 TC6 TC7
3757 * 8 TCs: 32 32 16 16 8 8 8 8
3758 * 4 TCs: 64 64 32 32
3759 * We have max 8 queues for FCoE, where 8 the is
3760 * FCoE redirection table size. If TC for FCoE is
3761 * less than or equal to TC3, we have enough queues
3762 * to add max of 8 queues for FCoE, so we start FCoE
3763 * tx descriptor from the next one, i.e., reg_idx + 1.
3764 * If TC for FCoE is above TC3, implying 8 TC mode,
3765 * and we need 8 for FCoE, we have to take all queues
3766 * in that traffic class for FCoE.
3767 */
3768 if ((f->indices == IXGBE_FCRETA_SIZE) && (fcoe->tc > 3))
3769 fcoe_tx_i--;
Yi Zou0331a832009-05-17 12:33:52 +00003770 }
3771#endif /* CONFIG_IXGBE_DCB */
3772 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
Yi Zou8faa2a72009-07-09 02:29:50 +00003773 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) ||
3774 (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
3775 ixgbe_cache_ring_fdir(adapter);
3776 else
3777 ixgbe_cache_ring_rss(adapter);
3778
Yi Zou8de8b2e2009-09-03 14:55:50 +00003779 fcoe_rx_i = f->mask;
3780 fcoe_tx_i = f->mask;
Yi Zou0331a832009-05-17 12:33:52 +00003781 }
Yi Zou8de8b2e2009-09-03 14:55:50 +00003782 for (i = 0; i < f->indices; i++, fcoe_rx_i++, fcoe_tx_i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003783 adapter->rx_ring[f->mask + i]->reg_idx = fcoe_rx_i;
3784 adapter->tx_ring[f->mask + i]->reg_idx = fcoe_tx_i;
Yi Zou8de8b2e2009-09-03 14:55:50 +00003785 }
Yi Zou0331a832009-05-17 12:33:52 +00003786 ret = true;
3787 }
3788 return ret;
3789}
3790
3791#endif /* IXGBE_FCOE */
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003792/**
Greg Rose1cdd1ec2010-01-09 02:26:46 +00003793 * ixgbe_cache_ring_sriov - Descriptor ring to register mapping for sriov
3794 * @adapter: board private structure to initialize
3795 *
3796 * SR-IOV doesn't use any descriptor rings but changes the default if
3797 * no other mapping is used.
3798 *
3799 */
3800static inline bool ixgbe_cache_ring_sriov(struct ixgbe_adapter *adapter)
3801{
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003802 adapter->rx_ring[0]->reg_idx = adapter->num_vfs * 2;
3803 adapter->tx_ring[0]->reg_idx = adapter->num_vfs * 2;
Greg Rose1cdd1ec2010-01-09 02:26:46 +00003804 if (adapter->num_vfs)
3805 return true;
3806 else
3807 return false;
3808}
3809
3810/**
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003811 * ixgbe_cache_ring_register - Descriptor ring to register mapping
3812 * @adapter: board private structure to initialize
3813 *
3814 * Once we know the feature-set enabled for the device, we'll cache
3815 * the register offset the descriptor ring is assigned to.
3816 *
3817 * Note, the order the various feature calls is important. It must start with
3818 * the "most" features enabled at the same time, then trickle down to the
3819 * least amount of features turned on at once.
3820 **/
3821static void ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
3822{
3823 /* start with default case */
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003824 adapter->rx_ring[0]->reg_idx = 0;
3825 adapter->tx_ring[0]->reg_idx = 0;
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003826
Greg Rose1cdd1ec2010-01-09 02:26:46 +00003827 if (ixgbe_cache_ring_sriov(adapter))
3828 return;
3829
Yi Zou0331a832009-05-17 12:33:52 +00003830#ifdef IXGBE_FCOE
3831 if (ixgbe_cache_ring_fcoe(adapter))
3832 return;
3833
3834#endif /* IXGBE_FCOE */
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003835#ifdef CONFIG_IXGBE_DCB
3836 if (ixgbe_cache_ring_dcb(adapter))
3837 return;
3838
3839#endif
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003840 if (ixgbe_cache_ring_fdir(adapter))
3841 return;
3842
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003843 if (ixgbe_cache_ring_rss(adapter))
3844 return;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003845}
3846
Auke Kok9a799d72007-09-15 14:07:45 -07003847/**
3848 * ixgbe_alloc_queues - Allocate memory for all rings
3849 * @adapter: board private structure to initialize
3850 *
3851 * We allocate one ring per queue at run-time since we don't know the
Jesse Brandeburg4df10462009-03-13 22:15:31 +00003852 * number of queues at compile-time. The polling_netdev array is
3853 * intended for Multiqueue, but should work fine with a single queue.
Auke Kok9a799d72007-09-15 14:07:45 -07003854 **/
Alexander Duyck2f90b862008-11-20 20:52:10 -08003855static int ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
Auke Kok9a799d72007-09-15 14:07:45 -07003856{
3857 int i;
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003858 int orig_node = adapter->node;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003859
3860 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003861 struct ixgbe_ring *ring = adapter->tx_ring[i];
3862 if (orig_node == -1) {
3863 int cur_node = next_online_node(adapter->node);
3864 if (cur_node == MAX_NUMNODES)
3865 cur_node = first_online_node;
3866 adapter->node = cur_node;
3867 }
3868 ring = kzalloc_node(sizeof(struct ixgbe_ring), GFP_KERNEL,
3869 adapter->node);
3870 if (!ring)
3871 ring = kzalloc(sizeof(struct ixgbe_ring), GFP_KERNEL);
3872 if (!ring)
3873 goto err_tx_ring_allocation;
3874 ring->count = adapter->tx_ring_count;
3875 ring->queue_index = i;
3876 ring->numa_node = adapter->node;
3877
3878 adapter->tx_ring[i] = ring;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003879 }
Jesse Brandeburgb9804972008-09-11 20:00:29 -07003880
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003881 /* Restore the adapter's original node */
3882 adapter->node = orig_node;
3883
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003884 for (i = 0; i < adapter->num_rx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003885 struct ixgbe_ring *ring = adapter->rx_ring[i];
3886 if (orig_node == -1) {
3887 int cur_node = next_online_node(adapter->node);
3888 if (cur_node == MAX_NUMNODES)
3889 cur_node = first_online_node;
3890 adapter->node = cur_node;
3891 }
3892 ring = kzalloc_node(sizeof(struct ixgbe_ring), GFP_KERNEL,
3893 adapter->node);
3894 if (!ring)
3895 ring = kzalloc(sizeof(struct ixgbe_ring), GFP_KERNEL);
3896 if (!ring)
3897 goto err_rx_ring_allocation;
3898 ring->count = adapter->rx_ring_count;
3899 ring->queue_index = i;
3900 ring->numa_node = adapter->node;
3901
3902 adapter->rx_ring[i] = ring;
Auke Kok9a799d72007-09-15 14:07:45 -07003903 }
3904
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003905 /* Restore the adapter's original node */
3906 adapter->node = orig_node;
3907
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003908 ixgbe_cache_ring_register(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07003909
3910 return 0;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003911
3912err_rx_ring_allocation:
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003913 for (i = 0; i < adapter->num_tx_queues; i++)
3914 kfree(adapter->tx_ring[i]);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003915err_tx_ring_allocation:
3916 return -ENOMEM;
3917}
3918
3919/**
3920 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
3921 * @adapter: board private structure to initialize
3922 *
3923 * Attempt to configure the interrupts using the best available
3924 * capabilities of the hardware and the kernel.
3925 **/
Al Virofeea6a52008-11-27 15:34:07 -08003926static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003927{
PJ Waskiewicz8be0e462009-03-31 21:34:05 +00003928 struct ixgbe_hw *hw = &adapter->hw;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003929 int err = 0;
3930 int vector, v_budget;
3931
3932 /*
3933 * It's easy to be greedy for MSI-X vectors, but it really
3934 * doesn't do us much good if we have a lot more vectors
3935 * than CPU's. So let's be conservative and only ask for
PJ Waskiewicz342bde12009-11-12 23:50:43 +00003936 * (roughly) the same number of vectors as there are CPU's.
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003937 */
3938 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
PJ Waskiewicz342bde12009-11-12 23:50:43 +00003939 (int)num_online_cpus()) + NON_Q_VECTORS;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003940
3941 /*
3942 * At the same time, hardware can only support a maximum of
PJ Waskiewicz8be0e462009-03-31 21:34:05 +00003943 * hw.mac->max_msix_vectors vectors. With features
3944 * such as RSS and VMDq, we can easily surpass the number of Rx and Tx
3945 * descriptor queues supported by our device. Thus, we cap it off in
3946 * those rare cases where the cpu count also exceeds our vector limit.
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003947 */
PJ Waskiewicz8be0e462009-03-31 21:34:05 +00003948 v_budget = min(v_budget, (int)hw->mac.max_msix_vectors);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003949
3950 /* A failure in MSI-X entry allocation isn't fatal, but it does
3951 * mean we disable MSI-X capabilities of the adapter. */
3952 adapter->msix_entries = kcalloc(v_budget,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07003953 sizeof(struct msix_entry), GFP_KERNEL);
Alexander Duyck7a921c92009-05-06 10:43:28 +00003954 if (adapter->msix_entries) {
3955 for (vector = 0; vector < v_budget; vector++)
3956 adapter->msix_entries[vector].entry = vector;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003957
Alexander Duyck7a921c92009-05-06 10:43:28 +00003958 ixgbe_acquire_msix_vectors(adapter, v_budget);
3959
3960 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3961 goto out;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003962 }
3963
Alexander Duyck7a921c92009-05-06 10:43:28 +00003964 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
3965 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003966 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
3967 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
3968 adapter->atr_sample_rate = 0;
Greg Rose1cdd1ec2010-01-09 02:26:46 +00003969 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3970 ixgbe_disable_sriov(adapter);
3971
Alexander Duyck7a921c92009-05-06 10:43:28 +00003972 ixgbe_set_num_queues(adapter);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003973
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003974 err = pci_enable_msi(adapter->pdev);
3975 if (!err) {
3976 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
3977 } else {
3978 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07003979 "falling back to legacy. Error: %d\n", err);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003980 /* reset err */
3981 err = 0;
3982 }
3983
3984out:
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003985 return err;
3986}
3987
Alexander Duyck7a921c92009-05-06 10:43:28 +00003988/**
3989 * ixgbe_alloc_q_vectors - Allocate memory for interrupt vectors
3990 * @adapter: board private structure to initialize
3991 *
3992 * We allocate one q_vector per queue interrupt. If allocation fails we
3993 * return -ENOMEM.
3994 **/
3995static int ixgbe_alloc_q_vectors(struct ixgbe_adapter *adapter)
3996{
3997 int q_idx, num_q_vectors;
3998 struct ixgbe_q_vector *q_vector;
3999 int napi_vectors;
4000 int (*poll)(struct napi_struct *, int);
4001
4002 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4003 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
4004 napi_vectors = adapter->num_rx_queues;
Alexander Duyck91281fd2009-06-04 16:00:27 +00004005 poll = &ixgbe_clean_rxtx_many;
Alexander Duyck7a921c92009-05-06 10:43:28 +00004006 } else {
4007 num_q_vectors = 1;
4008 napi_vectors = 1;
4009 poll = &ixgbe_poll;
4010 }
4011
4012 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
Jesse Brandeburg1a6c14a2010-02-03 14:18:50 +00004013 q_vector = kzalloc_node(sizeof(struct ixgbe_q_vector),
4014 GFP_KERNEL, adapter->node);
4015 if (!q_vector)
4016 q_vector = kzalloc(sizeof(struct ixgbe_q_vector),
4017 GFP_KERNEL);
Alexander Duyck7a921c92009-05-06 10:43:28 +00004018 if (!q_vector)
4019 goto err_out;
4020 q_vector->adapter = adapter;
Nelson, Shannonf7554a22009-09-18 09:46:06 +00004021 if (q_vector->txr_count && !q_vector->rxr_count)
4022 q_vector->eitr = adapter->tx_eitr_param;
4023 else
4024 q_vector->eitr = adapter->rx_eitr_param;
Alexander Duyckfe49f042009-06-04 16:00:09 +00004025 q_vector->v_idx = q_idx;
Alexander Duyck91281fd2009-06-04 16:00:27 +00004026 netif_napi_add(adapter->netdev, &q_vector->napi, (*poll), 64);
Alexander Duyck7a921c92009-05-06 10:43:28 +00004027 adapter->q_vector[q_idx] = q_vector;
4028 }
4029
4030 return 0;
4031
4032err_out:
4033 while (q_idx) {
4034 q_idx--;
4035 q_vector = adapter->q_vector[q_idx];
4036 netif_napi_del(&q_vector->napi);
4037 kfree(q_vector);
4038 adapter->q_vector[q_idx] = NULL;
4039 }
4040 return -ENOMEM;
4041}
4042
4043/**
4044 * ixgbe_free_q_vectors - Free memory allocated for interrupt vectors
4045 * @adapter: board private structure to initialize
4046 *
4047 * This function frees the memory allocated to the q_vectors. In addition if
4048 * NAPI is enabled it will delete any references to the NAPI struct prior
4049 * to freeing the q_vector.
4050 **/
4051static void ixgbe_free_q_vectors(struct ixgbe_adapter *adapter)
4052{
4053 int q_idx, num_q_vectors;
Alexander Duyck7a921c92009-05-06 10:43:28 +00004054
Alexander Duyck91281fd2009-06-04 16:00:27 +00004055 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
Alexander Duyck7a921c92009-05-06 10:43:28 +00004056 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
Alexander Duyck91281fd2009-06-04 16:00:27 +00004057 else
Alexander Duyck7a921c92009-05-06 10:43:28 +00004058 num_q_vectors = 1;
Alexander Duyck7a921c92009-05-06 10:43:28 +00004059
4060 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
4061 struct ixgbe_q_vector *q_vector = adapter->q_vector[q_idx];
Alexander Duyck7a921c92009-05-06 10:43:28 +00004062 adapter->q_vector[q_idx] = NULL;
Alexander Duyck91281fd2009-06-04 16:00:27 +00004063 netif_napi_del(&q_vector->napi);
Alexander Duyck7a921c92009-05-06 10:43:28 +00004064 kfree(q_vector);
4065 }
4066}
4067
Don Skidmore7b25cdb2009-08-25 04:47:32 +00004068static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004069{
4070 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4071 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
4072 pci_disable_msix(adapter->pdev);
4073 kfree(adapter->msix_entries);
4074 adapter->msix_entries = NULL;
4075 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
4076 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
4077 pci_disable_msi(adapter->pdev);
4078 }
4079 return;
4080}
4081
4082/**
4083 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
4084 * @adapter: board private structure to initialize
4085 *
4086 * We determine which interrupt scheme to use based on...
4087 * - Kernel support (MSI, MSI-X)
4088 * - which can be user-defined (via MODULE_PARAM)
4089 * - Hardware queue count (num_*_queues)
4090 * - defined by miscellaneous hardware support/features (RSS, etc.)
4091 **/
Alexander Duyck2f90b862008-11-20 20:52:10 -08004092int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004093{
4094 int err;
4095
4096 /* Number of supported queues */
4097 ixgbe_set_num_queues(adapter);
4098
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004099 err = ixgbe_set_interrupt_capability(adapter);
4100 if (err) {
4101 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
4102 goto err_set_interrupt;
4103 }
4104
Alexander Duyck7a921c92009-05-06 10:43:28 +00004105 err = ixgbe_alloc_q_vectors(adapter);
4106 if (err) {
4107 DPRINTK(PROBE, ERR, "Unable to allocate memory for queue "
4108 "vectors\n");
4109 goto err_alloc_q_vectors;
4110 }
4111
4112 err = ixgbe_alloc_queues(adapter);
4113 if (err) {
4114 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
4115 goto err_alloc_queues;
4116 }
4117
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004118 DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07004119 "Tx Queue count = %u\n",
4120 (adapter->num_rx_queues > 1) ? "Enabled" :
4121 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004122
4123 set_bit(__IXGBE_DOWN, &adapter->state);
4124
4125 return 0;
4126
Alexander Duyck7a921c92009-05-06 10:43:28 +00004127err_alloc_queues:
4128 ixgbe_free_q_vectors(adapter);
4129err_alloc_q_vectors:
4130 ixgbe_reset_interrupt_capability(adapter);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004131err_set_interrupt:
Alexander Duyck7a921c92009-05-06 10:43:28 +00004132 return err;
4133}
4134
4135/**
4136 * ixgbe_clear_interrupt_scheme - Clear the current interrupt scheme settings
4137 * @adapter: board private structure to clear interrupt scheme on
4138 *
4139 * We go through and clear interrupt specific resources and reset the structure
4140 * to pre-load conditions
4141 **/
4142void ixgbe_clear_interrupt_scheme(struct ixgbe_adapter *adapter)
4143{
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004144 int i;
4145
4146 for (i = 0; i < adapter->num_tx_queues; i++) {
4147 kfree(adapter->tx_ring[i]);
4148 adapter->tx_ring[i] = NULL;
4149 }
4150 for (i = 0; i < adapter->num_rx_queues; i++) {
4151 kfree(adapter->rx_ring[i]);
4152 adapter->rx_ring[i] = NULL;
4153 }
Alexander Duyck7a921c92009-05-06 10:43:28 +00004154
4155 ixgbe_free_q_vectors(adapter);
4156 ixgbe_reset_interrupt_capability(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07004157}
4158
4159/**
Donald Skidmorec4900be2008-11-20 21:11:42 -08004160 * ixgbe_sfp_timer - worker thread to find a missing module
4161 * @data: pointer to our adapter struct
4162 **/
4163static void ixgbe_sfp_timer(unsigned long data)
4164{
4165 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
4166
Jesse Brandeburg4df10462009-03-13 22:15:31 +00004167 /*
4168 * Do the sfp_timer outside of interrupt context due to the
Donald Skidmorec4900be2008-11-20 21:11:42 -08004169 * delays that sfp+ detection requires
4170 */
4171 schedule_work(&adapter->sfp_task);
4172}
4173
4174/**
4175 * ixgbe_sfp_task - worker thread to find a missing module
4176 * @work: pointer to work_struct containing our data
4177 **/
4178static void ixgbe_sfp_task(struct work_struct *work)
4179{
4180 struct ixgbe_adapter *adapter = container_of(work,
4181 struct ixgbe_adapter,
4182 sfp_task);
4183 struct ixgbe_hw *hw = &adapter->hw;
4184
4185 if ((hw->phy.type == ixgbe_phy_nl) &&
4186 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
4187 s32 ret = hw->phy.ops.identify_sfp(hw);
Don Skidmore63d6e1d2009-07-02 12:50:12 +00004188 if (ret == IXGBE_ERR_SFP_NOT_PRESENT)
Donald Skidmorec4900be2008-11-20 21:11:42 -08004189 goto reschedule;
4190 ret = hw->phy.ops.reset(hw);
4191 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
Don Skidmore88d2b812009-06-30 11:43:55 +00004192 dev_err(&adapter->pdev->dev, "failed to initialize "
4193 "because an unsupported SFP+ module type "
4194 "was detected.\n"
4195 "Reload the driver after installing a "
4196 "supported module.\n");
Donald Skidmorec4900be2008-11-20 21:11:42 -08004197 unregister_netdev(adapter->netdev);
4198 } else {
4199 DPRINTK(PROBE, INFO, "detected SFP+: %d\n",
4200 hw->phy.sfp_type);
4201 }
4202 /* don't need this routine any more */
4203 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4204 }
4205 return;
4206reschedule:
4207 if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state))
4208 mod_timer(&adapter->sfp_timer,
4209 round_jiffies(jiffies + (2 * HZ)));
4210}
4211
4212/**
Auke Kok9a799d72007-09-15 14:07:45 -07004213 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4214 * @adapter: board private structure to initialize
4215 *
4216 * ixgbe_sw_init initializes the Adapter private data structure.
4217 * Fields are initialized based on PCI device information and
4218 * OS network device settings (MTU size).
4219 **/
4220static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
4221{
4222 struct ixgbe_hw *hw = &adapter->hw;
4223 struct pci_dev *pdev = adapter->pdev;
Peter Waskiewicz9a713e72010-02-10 16:07:54 +00004224 struct net_device *dev = adapter->netdev;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004225 unsigned int rss;
Jeff Kirsher7a6b6f52008-11-25 01:02:08 -08004226#ifdef CONFIG_IXGBE_DCB
Alexander Duyck2f90b862008-11-20 20:52:10 -08004227 int j;
4228 struct tc_configuration *tc;
4229#endif
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004230
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07004231 /* PCI config space info */
4232
4233 hw->vendor_id = pdev->vendor;
4234 hw->device_id = pdev->device;
4235 hw->revision_id = pdev->revision;
4236 hw->subsystem_vendor_id = pdev->subsystem_vendor;
4237 hw->subsystem_device_id = pdev->subsystem_device;
4238
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004239 /* Set capability flags */
4240 rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
4241 adapter->ring_feature[RING_F_RSS].indices = rss;
4242 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
Alexander Duyck2f90b862008-11-20 20:52:10 -08004243 adapter->ring_feature[RING_F_DCB].indices = IXGBE_MAX_DCB_INDICES;
Don Skidmorebf069c92009-05-07 10:39:54 +00004244 if (hw->mac.type == ixgbe_mac_82598EB) {
4245 if (hw->device_id == IXGBE_DEV_ID_82598AT)
4246 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004247 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598;
Don Skidmorebf069c92009-05-07 10:39:54 +00004248 } else if (hw->mac.type == ixgbe_mac_82599EB) {
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004249 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82599;
Peter P Waskiewicz Jr0c19d6a2009-07-30 12:25:28 +00004250 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
4251 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
Peter Waskiewicz9a713e72010-02-10 16:07:54 +00004252 if (dev->features & NETIF_F_NTUPLE) {
4253 /* Flow Director perfect filter enabled */
4254 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
4255 adapter->atr_sample_rate = 0;
4256 spin_lock_init(&adapter->fdir_perfect_lock);
4257 } else {
4258 /* Flow Director hash filters enabled */
4259 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
4260 adapter->atr_sample_rate = 20;
4261 }
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004262 adapter->ring_feature[RING_F_FDIR].indices =
4263 IXGBE_MAX_FDIR_INDICES;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004264 adapter->fdir_pballoc = 0;
Yi Zoueacd73f2009-05-13 13:11:06 +00004265#ifdef IXGBE_FCOE
Yi Zou0d551582009-07-22 14:07:12 +00004266 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
4267 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
4268 adapter->ring_feature[RING_F_FCOE].indices = 0;
Yi Zou61a0f422009-12-03 11:32:22 +00004269#ifdef CONFIG_IXGBE_DCB
Yi Zou6ee16522009-08-31 12:34:28 +00004270 /* Default traffic class to use for FCoE */
4271 adapter->fcoe.tc = IXGBE_FCOE_DEFTC;
Yi Zou61a0f422009-12-03 11:32:22 +00004272#endif
Yi Zoueacd73f2009-05-13 13:11:06 +00004273#endif /* IXGBE_FCOE */
Alexander Duyckf8212f92009-04-27 22:42:37 +00004274 }
Alexander Duyck2f90b862008-11-20 20:52:10 -08004275
Jeff Kirsher7a6b6f52008-11-25 01:02:08 -08004276#ifdef CONFIG_IXGBE_DCB
Alexander Duyck2f90b862008-11-20 20:52:10 -08004277 /* Configure DCB traffic classes */
4278 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
4279 tc = &adapter->dcb_cfg.tc_config[j];
4280 tc->path[DCB_TX_CONFIG].bwg_id = 0;
4281 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
4282 tc->path[DCB_RX_CONFIG].bwg_id = 0;
4283 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
4284 tc->dcb_pfc = pfc_disabled;
4285 }
4286 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
4287 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
4288 adapter->dcb_cfg.rx_pba_cfg = pba_equal;
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00004289 adapter->dcb_cfg.pfc_mode_enable = false;
Alexander Duyck2f90b862008-11-20 20:52:10 -08004290 adapter->dcb_cfg.round_robin_enable = false;
4291 adapter->dcb_set_bitmap = 0x00;
4292 ixgbe_copy_dcb_cfg(&adapter->dcb_cfg, &adapter->temp_dcb_cfg,
4293 adapter->ring_feature[RING_F_DCB].indices);
4294
4295#endif
Auke Kok9a799d72007-09-15 14:07:45 -07004296
4297 /* default flow control settings */
Don Skidmorecd7664f2009-03-31 21:33:44 +00004298 hw->fc.requested_mode = ixgbe_fc_full;
Don Skidmore71fd5702009-03-31 21:35:05 +00004299 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00004300#ifdef CONFIG_DCB
4301 adapter->last_lfc_mode = hw->fc.current_mode;
4302#endif
Jesse Brandeburg2b9ade92008-08-26 04:27:10 -07004303 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
4304 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
4305 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
4306 hw->fc.send_xon = true;
Don Skidmore71fd5702009-03-31 21:35:05 +00004307 hw->fc.disable_fc_autoneg = false;
Auke Kok9a799d72007-09-15 14:07:45 -07004308
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07004309 /* enable itr by default in dynamic mode */
Nelson, Shannonf7554a22009-09-18 09:46:06 +00004310 adapter->rx_itr_setting = 1;
4311 adapter->rx_eitr_param = 20000;
4312 adapter->tx_itr_setting = 1;
4313 adapter->tx_eitr_param = 10000;
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07004314
4315 /* set defaults for eitr in MegaBytes */
4316 adapter->eitr_low = 10;
4317 adapter->eitr_high = 20;
4318
4319 /* set default ring sizes */
4320 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
4321 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
4322
Auke Kok9a799d72007-09-15 14:07:45 -07004323 /* initialize eeprom parameters */
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07004324 if (ixgbe_init_eeprom_params_generic(hw)) {
Auke Kok9a799d72007-09-15 14:07:45 -07004325 dev_err(&pdev->dev, "EEPROM initialization failed\n");
4326 return -EIO;
4327 }
4328
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004329 /* enable rx csum by default */
Auke Kok9a799d72007-09-15 14:07:45 -07004330 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
4331
Jesse Brandeburg1a6c14a2010-02-03 14:18:50 +00004332 /* get assigned NUMA node */
4333 adapter->node = dev_to_node(&pdev->dev);
4334
Auke Kok9a799d72007-09-15 14:07:45 -07004335 set_bit(__IXGBE_DOWN, &adapter->state);
4336
4337 return 0;
4338}
4339
4340/**
4341 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
4342 * @adapter: board private structure
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004343 * @tx_ring: tx descriptor ring (for a specific queue) to setup
Auke Kok9a799d72007-09-15 14:07:45 -07004344 *
4345 * Return 0 on success, negative on failure
4346 **/
4347int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
Jesse Brandeburge01c31a2008-08-26 04:27:13 -07004348 struct ixgbe_ring *tx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -07004349{
4350 struct pci_dev *pdev = adapter->pdev;
4351 int size;
4352
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004353 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004354 tx_ring->tx_buffer_info = vmalloc_node(size, tx_ring->numa_node);
Jesse Brandeburg1a6c14a2010-02-03 14:18:50 +00004355 if (!tx_ring->tx_buffer_info)
4356 tx_ring->tx_buffer_info = vmalloc(size);
Jesse Brandeburge01c31a2008-08-26 04:27:13 -07004357 if (!tx_ring->tx_buffer_info)
4358 goto err;
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004359 memset(tx_ring->tx_buffer_info, 0, size);
Auke Kok9a799d72007-09-15 14:07:45 -07004360
4361 /* round up to nearest 4K */
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -08004362 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004363 tx_ring->size = ALIGN(tx_ring->size, 4096);
Auke Kok9a799d72007-09-15 14:07:45 -07004364
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004365 tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
4366 &tx_ring->dma);
Jesse Brandeburge01c31a2008-08-26 04:27:13 -07004367 if (!tx_ring->desc)
4368 goto err;
Auke Kok9a799d72007-09-15 14:07:45 -07004369
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004370 tx_ring->next_to_use = 0;
4371 tx_ring->next_to_clean = 0;
4372 tx_ring->work_limit = tx_ring->count;
Auke Kok9a799d72007-09-15 14:07:45 -07004373 return 0;
Jesse Brandeburge01c31a2008-08-26 04:27:13 -07004374
4375err:
4376 vfree(tx_ring->tx_buffer_info);
4377 tx_ring->tx_buffer_info = NULL;
4378 DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit "
4379 "descriptor ring\n");
4380 return -ENOMEM;
Auke Kok9a799d72007-09-15 14:07:45 -07004381}
4382
4383/**
Alexander Duyck69888672008-09-11 20:05:39 -07004384 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
4385 * @adapter: board private structure
4386 *
4387 * If this function returns with an error, then it's possible one or
4388 * more of the rings is populated (while the rest are not). It is the
4389 * callers duty to clean those orphaned rings.
4390 *
4391 * Return 0 on success, negative on failure
4392 **/
4393static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
4394{
4395 int i, err = 0;
4396
4397 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004398 err = ixgbe_setup_tx_resources(adapter, adapter->tx_ring[i]);
Alexander Duyck69888672008-09-11 20:05:39 -07004399 if (!err)
4400 continue;
4401 DPRINTK(PROBE, ERR, "Allocation for Tx Queue %u failed\n", i);
4402 break;
4403 }
4404
4405 return err;
4406}
4407
4408/**
Auke Kok9a799d72007-09-15 14:07:45 -07004409 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
4410 * @adapter: board private structure
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004411 * @rx_ring: rx descriptor ring (for a specific queue) to setup
Auke Kok9a799d72007-09-15 14:07:45 -07004412 *
4413 * Returns 0 on success, negative on failure
4414 **/
4415int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07004416 struct ixgbe_ring *rx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -07004417{
4418 struct pci_dev *pdev = adapter->pdev;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004419 int size;
Auke Kok9a799d72007-09-15 14:07:45 -07004420
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004421 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
Jesse Brandeburg1a6c14a2010-02-03 14:18:50 +00004422 rx_ring->rx_buffer_info = vmalloc_node(size, adapter->node);
4423 if (!rx_ring->rx_buffer_info)
4424 rx_ring->rx_buffer_info = vmalloc(size);
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004425 if (!rx_ring->rx_buffer_info) {
Auke Kok9a799d72007-09-15 14:07:45 -07004426 DPRINTK(PROBE, ERR,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07004427 "vmalloc allocation failed for the rx desc ring\n");
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07004428 goto alloc_failed;
Auke Kok9a799d72007-09-15 14:07:45 -07004429 }
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004430 memset(rx_ring->rx_buffer_info, 0, size);
Auke Kok9a799d72007-09-15 14:07:45 -07004431
Auke Kok9a799d72007-09-15 14:07:45 -07004432 /* Round up to nearest 4K */
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004433 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
4434 rx_ring->size = ALIGN(rx_ring->size, 4096);
Auke Kok9a799d72007-09-15 14:07:45 -07004435
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004436 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, &rx_ring->dma);
Auke Kok9a799d72007-09-15 14:07:45 -07004437
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004438 if (!rx_ring->desc) {
Auke Kok9a799d72007-09-15 14:07:45 -07004439 DPRINTK(PROBE, ERR,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07004440 "Memory allocation failed for the rx desc ring\n");
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004441 vfree(rx_ring->rx_buffer_info);
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07004442 goto alloc_failed;
Auke Kok9a799d72007-09-15 14:07:45 -07004443 }
4444
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004445 rx_ring->next_to_clean = 0;
4446 rx_ring->next_to_use = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07004447
4448 return 0;
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07004449
4450alloc_failed:
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07004451 return -ENOMEM;
Auke Kok9a799d72007-09-15 14:07:45 -07004452}
4453
4454/**
Alexander Duyck69888672008-09-11 20:05:39 -07004455 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
4456 * @adapter: board private structure
4457 *
4458 * If this function returns with an error, then it's possible one or
4459 * more of the rings is populated (while the rest are not). It is the
4460 * callers duty to clean those orphaned rings.
4461 *
4462 * Return 0 on success, negative on failure
4463 **/
4464
4465static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
4466{
4467 int i, err = 0;
4468
4469 for (i = 0; i < adapter->num_rx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004470 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
Alexander Duyck69888672008-09-11 20:05:39 -07004471 if (!err)
4472 continue;
4473 DPRINTK(PROBE, ERR, "Allocation for Rx Queue %u failed\n", i);
4474 break;
4475 }
4476
4477 return err;
4478}
4479
4480/**
Auke Kok9a799d72007-09-15 14:07:45 -07004481 * ixgbe_free_tx_resources - Free Tx Resources per Queue
4482 * @adapter: board private structure
4483 * @tx_ring: Tx descriptor ring for a specific queue
4484 *
4485 * Free all transmit software resources
4486 **/
Jesse Brandeburgc431f972008-09-11 19:59:16 -07004487void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
4488 struct ixgbe_ring *tx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -07004489{
4490 struct pci_dev *pdev = adapter->pdev;
4491
4492 ixgbe_clean_tx_ring(adapter, tx_ring);
4493
4494 vfree(tx_ring->tx_buffer_info);
4495 tx_ring->tx_buffer_info = NULL;
4496
4497 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
4498
4499 tx_ring->desc = NULL;
4500}
4501
4502/**
4503 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
4504 * @adapter: board private structure
4505 *
4506 * Free all transmit software resources
4507 **/
4508static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
4509{
4510 int i;
4511
4512 for (i = 0; i < adapter->num_tx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004513 if (adapter->tx_ring[i]->desc)
4514 ixgbe_free_tx_resources(adapter, adapter->tx_ring[i]);
Auke Kok9a799d72007-09-15 14:07:45 -07004515}
4516
4517/**
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07004518 * ixgbe_free_rx_resources - Free Rx Resources
Auke Kok9a799d72007-09-15 14:07:45 -07004519 * @adapter: board private structure
4520 * @rx_ring: ring to clean the resources from
4521 *
4522 * Free all receive software resources
4523 **/
Jesse Brandeburgc431f972008-09-11 19:59:16 -07004524void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
4525 struct ixgbe_ring *rx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -07004526{
4527 struct pci_dev *pdev = adapter->pdev;
4528
4529 ixgbe_clean_rx_ring(adapter, rx_ring);
4530
4531 vfree(rx_ring->rx_buffer_info);
4532 rx_ring->rx_buffer_info = NULL;
4533
4534 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
4535
4536 rx_ring->desc = NULL;
4537}
4538
4539/**
4540 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
4541 * @adapter: board private structure
4542 *
4543 * Free all receive software resources
4544 **/
4545static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
4546{
4547 int i;
4548
4549 for (i = 0; i < adapter->num_rx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004550 if (adapter->rx_ring[i]->desc)
4551 ixgbe_free_rx_resources(adapter, adapter->rx_ring[i]);
Auke Kok9a799d72007-09-15 14:07:45 -07004552}
4553
4554/**
Auke Kok9a799d72007-09-15 14:07:45 -07004555 * ixgbe_change_mtu - Change the Maximum Transfer Unit
4556 * @netdev: network interface device structure
4557 * @new_mtu: new value for maximum frame size
4558 *
4559 * Returns 0 on success, negative on failure
4560 **/
4561static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
4562{
4563 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4564 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4565
Jesse Brandeburg42c783c2008-09-11 19:56:28 -07004566 /* MTU < 68 is an error and causes problems on some kernels */
4567 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
Auke Kok9a799d72007-09-15 14:07:45 -07004568 return -EINVAL;
4569
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004570 DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07004571 netdev->mtu, new_mtu);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004572 /* must set new MTU before calling down or up */
Auke Kok9a799d72007-09-15 14:07:45 -07004573 netdev->mtu = new_mtu;
4574
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08004575 if (netif_running(netdev))
4576 ixgbe_reinit_locked(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07004577
4578 return 0;
4579}
4580
4581/**
4582 * ixgbe_open - Called when a network interface is made active
4583 * @netdev: network interface device structure
4584 *
4585 * Returns 0 on success, negative value on failure
4586 *
4587 * The open entry point is called when a network interface is made
4588 * active by the system (IFF_UP). At this point all resources needed
4589 * for transmit and receive operations are allocated, the interrupt
4590 * handler is registered with the OS, the watchdog timer is started,
4591 * and the stack is notified that the interface is ready.
4592 **/
4593static int ixgbe_open(struct net_device *netdev)
4594{
4595 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4596 int err;
Auke Kok9a799d72007-09-15 14:07:45 -07004597
Auke Kok4bebfaa2008-02-11 09:26:01 -08004598 /* disallow open during test */
4599 if (test_bit(__IXGBE_TESTING, &adapter->state))
4600 return -EBUSY;
4601
Jesse Brandeburg54386462009-04-17 20:44:27 +00004602 netif_carrier_off(netdev);
4603
Auke Kok9a799d72007-09-15 14:07:45 -07004604 /* allocate transmit descriptors */
4605 err = ixgbe_setup_all_tx_resources(adapter);
4606 if (err)
4607 goto err_setup_tx;
4608
Auke Kok9a799d72007-09-15 14:07:45 -07004609 /* allocate receive descriptors */
4610 err = ixgbe_setup_all_rx_resources(adapter);
4611 if (err)
4612 goto err_setup_rx;
4613
4614 ixgbe_configure(adapter);
4615
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004616 err = ixgbe_request_irq(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07004617 if (err)
4618 goto err_req_irq;
4619
Auke Kok9a799d72007-09-15 14:07:45 -07004620 err = ixgbe_up_complete(adapter);
4621 if (err)
4622 goto err_up;
4623
Jeff Kirsherd55b53f2008-07-18 04:33:03 -07004624 netif_tx_start_all_queues(netdev);
4625
Auke Kok9a799d72007-09-15 14:07:45 -07004626 return 0;
4627
4628err_up:
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -08004629 ixgbe_release_hw_control(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07004630 ixgbe_free_irq(adapter);
4631err_req_irq:
Auke Kok9a799d72007-09-15 14:07:45 -07004632err_setup_rx:
Mallikarjuna R Chilakalaa20a1192009-03-31 21:34:44 +00004633 ixgbe_free_all_rx_resources(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07004634err_setup_tx:
Mallikarjuna R Chilakalaa20a1192009-03-31 21:34:44 +00004635 ixgbe_free_all_tx_resources(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07004636 ixgbe_reset(adapter);
4637
4638 return err;
4639}
4640
4641/**
4642 * ixgbe_close - Disables a network interface
4643 * @netdev: network interface device structure
4644 *
4645 * Returns 0, this is not allowed to fail
4646 *
4647 * The close entry point is called when an interface is de-activated
4648 * by the OS. The hardware is still under the drivers control, but
4649 * needs to be disabled. A global MAC reset is issued to stop the
4650 * hardware, and all transmit and receive resources are freed.
4651 **/
4652static int ixgbe_close(struct net_device *netdev)
4653{
4654 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07004655
4656 ixgbe_down(adapter);
4657 ixgbe_free_irq(adapter);
4658
4659 ixgbe_free_all_tx_resources(adapter);
4660 ixgbe_free_all_rx_resources(adapter);
4661
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -08004662 ixgbe_release_hw_control(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07004663
4664 return 0;
4665}
4666
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07004667#ifdef CONFIG_PM
4668static int ixgbe_resume(struct pci_dev *pdev)
4669{
4670 struct net_device *netdev = pci_get_drvdata(pdev);
4671 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4672 u32 err;
4673
4674 pci_set_power_state(pdev, PCI_D0);
4675 pci_restore_state(pdev);
Don Skidmore656ab812009-12-23 21:19:19 -08004676 /*
4677 * pci_restore_state clears dev->state_saved so call
4678 * pci_save_state to restore it.
4679 */
4680 pci_save_state(pdev);
gouji-new9ce77662009-05-06 10:44:45 +00004681
4682 err = pci_enable_device_mem(pdev);
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07004683 if (err) {
Alexander Duyck69888672008-09-11 20:05:39 -07004684 printk(KERN_ERR "ixgbe: Cannot enable PCI device from "
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07004685 "suspend\n");
4686 return err;
4687 }
4688 pci_set_master(pdev);
4689
Don Skidmoredd4d8ca2009-04-29 00:22:31 -07004690 pci_wake_from_d3(pdev, false);
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07004691
4692 err = ixgbe_init_interrupt_scheme(adapter);
4693 if (err) {
4694 printk(KERN_ERR "ixgbe: Cannot initialize interrupts for "
4695 "device\n");
4696 return err;
4697 }
4698
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07004699 ixgbe_reset(adapter);
4700
Waskiewicz Jr, Peter P495dce12009-04-23 11:15:18 +00004701 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
4702
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07004703 if (netif_running(netdev)) {
4704 err = ixgbe_open(adapter->netdev);
4705 if (err)
4706 return err;
4707 }
4708
4709 netif_device_attach(netdev);
4710
4711 return 0;
4712}
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07004713#endif /* CONFIG_PM */
Rafael J. Wysocki9d8d05a2009-04-15 17:44:01 +00004714
4715static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07004716{
4717 struct net_device *netdev = pci_get_drvdata(pdev);
4718 struct ixgbe_adapter *adapter = netdev_priv(netdev);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004719 struct ixgbe_hw *hw = &adapter->hw;
4720 u32 ctrl, fctrl;
4721 u32 wufc = adapter->wol;
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07004722#ifdef CONFIG_PM
4723 int retval = 0;
4724#endif
4725
4726 netif_device_detach(netdev);
4727
4728 if (netif_running(netdev)) {
4729 ixgbe_down(adapter);
4730 ixgbe_free_irq(adapter);
4731 ixgbe_free_all_tx_resources(adapter);
4732 ixgbe_free_all_rx_resources(adapter);
4733 }
Alexander Duyck7a921c92009-05-06 10:43:28 +00004734 ixgbe_clear_interrupt_scheme(adapter);
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07004735
4736#ifdef CONFIG_PM
4737 retval = pci_save_state(pdev);
4738 if (retval)
4739 return retval;
Jesse Brandeburg4df10462009-03-13 22:15:31 +00004740
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07004741#endif
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004742 if (wufc) {
4743 ixgbe_set_rx_mode(netdev);
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07004744
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004745 /* turn on all-multi mode if wake on multicast is enabled */
4746 if (wufc & IXGBE_WUFC_MC) {
4747 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4748 fctrl |= IXGBE_FCTRL_MPE;
4749 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4750 }
4751
4752 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
4753 ctrl |= IXGBE_CTRL_GIO_DIS;
4754 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
4755
4756 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
4757 } else {
4758 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
4759 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
4760 }
4761
Don Skidmoredd4d8ca2009-04-29 00:22:31 -07004762 if (wufc && hw->mac.type == ixgbe_mac_82599EB)
4763 pci_wake_from_d3(pdev, true);
4764 else
4765 pci_wake_from_d3(pdev, false);
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07004766
Rafael J. Wysocki9d8d05a2009-04-15 17:44:01 +00004767 *enable_wake = !!wufc;
4768
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07004769 ixgbe_release_hw_control(adapter);
4770
4771 pci_disable_device(pdev);
4772
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07004773 return 0;
4774}
4775
Rafael J. Wysocki9d8d05a2009-04-15 17:44:01 +00004776#ifdef CONFIG_PM
4777static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
4778{
4779 int retval;
4780 bool wake;
4781
4782 retval = __ixgbe_shutdown(pdev, &wake);
4783 if (retval)
4784 return retval;
4785
4786 if (wake) {
4787 pci_prepare_to_sleep(pdev);
4788 } else {
4789 pci_wake_from_d3(pdev, false);
4790 pci_set_power_state(pdev, PCI_D3hot);
4791 }
4792
4793 return 0;
4794}
4795#endif /* CONFIG_PM */
4796
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07004797static void ixgbe_shutdown(struct pci_dev *pdev)
4798{
Rafael J. Wysocki9d8d05a2009-04-15 17:44:01 +00004799 bool wake;
4800
4801 __ixgbe_shutdown(pdev, &wake);
4802
4803 if (system_state == SYSTEM_POWER_OFF) {
4804 pci_wake_from_d3(pdev, wake);
4805 pci_set_power_state(pdev, PCI_D3hot);
4806 }
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07004807}
4808
4809/**
Auke Kok9a799d72007-09-15 14:07:45 -07004810 * ixgbe_update_stats - Update the board statistics counters.
4811 * @adapter: board private structure
4812 **/
4813void ixgbe_update_stats(struct ixgbe_adapter *adapter)
4814{
Ajit Khaparde2d86f132009-10-07 02:43:49 +00004815 struct net_device *netdev = adapter->netdev;
Auke Kok9a799d72007-09-15 14:07:45 -07004816 struct ixgbe_hw *hw = &adapter->hw;
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08004817 u64 total_mpc = 0;
4818 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
Mallikarjuna R Chilakalaeb985f02009-12-15 11:56:59 +00004819 u64 non_eop_descs = 0, restart_queue = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07004820
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00004821 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
Alexander Duyckf8212f92009-04-27 22:42:37 +00004822 u64 rsc_count = 0;
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00004823 u64 rsc_flush = 0;
PJ Waskiewiczd51019a2009-03-13 22:12:48 +00004824 for (i = 0; i < 16; i++)
4825 adapter->hw_rx_no_dma_resources +=
4826 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00004827 for (i = 0; i < adapter->num_rx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004828 rsc_count += adapter->rx_ring[i]->rsc_count;
4829 rsc_flush += adapter->rx_ring[i]->rsc_flush;
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00004830 }
4831 adapter->rsc_total_count = rsc_count;
4832 adapter->rsc_total_flush = rsc_flush;
PJ Waskiewiczd51019a2009-03-13 22:12:48 +00004833 }
4834
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +00004835 /* gather some stats to the adapter struct that are per queue */
4836 for (i = 0; i < adapter->num_tx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004837 restart_queue += adapter->tx_ring[i]->restart_queue;
Mallikarjuna R Chilakalaeb985f02009-12-15 11:56:59 +00004838 adapter->restart_queue = restart_queue;
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +00004839
4840 for (i = 0; i < adapter->num_rx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004841 non_eop_descs += adapter->rx_ring[i]->non_eop_descs;
Mallikarjuna R Chilakalaeb985f02009-12-15 11:56:59 +00004842 adapter->non_eop_descs = non_eop_descs;
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +00004843
Auke Kok9a799d72007-09-15 14:07:45 -07004844 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08004845 for (i = 0; i < 8; i++) {
4846 /* for packet buffers not used, the register should read 0 */
4847 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
4848 missed_rx += mpc;
4849 adapter->stats.mpc[i] += mpc;
4850 total_mpc += adapter->stats.mpc[i];
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004851 if (hw->mac.type == ixgbe_mac_82598EB)
4852 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
Alexander Duyck2f90b862008-11-20 20:52:10 -08004853 adapter->stats.qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
4854 adapter->stats.qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
4855 adapter->stats.qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
4856 adapter->stats.qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004857 if (hw->mac.type == ixgbe_mac_82599EB) {
4858 adapter->stats.pxonrxc[i] += IXGBE_READ_REG(hw,
4859 IXGBE_PXONRXCNT(i));
4860 adapter->stats.pxoffrxc[i] += IXGBE_READ_REG(hw,
4861 IXGBE_PXOFFRXCNT(i));
4862 adapter->stats.qprdc[i] += IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004863 } else {
4864 adapter->stats.pxonrxc[i] += IXGBE_READ_REG(hw,
4865 IXGBE_PXONRXC(i));
4866 adapter->stats.pxoffrxc[i] += IXGBE_READ_REG(hw,
4867 IXGBE_PXOFFRXC(i));
4868 }
Alexander Duyck2f90b862008-11-20 20:52:10 -08004869 adapter->stats.pxontxc[i] += IXGBE_READ_REG(hw,
4870 IXGBE_PXONTXC(i));
Alexander Duyck2f90b862008-11-20 20:52:10 -08004871 adapter->stats.pxofftxc[i] += IXGBE_READ_REG(hw,
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004872 IXGBE_PXOFFTXC(i));
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08004873 }
4874 adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
4875 /* work around hardware counting issue */
4876 adapter->stats.gprc -= missed_rx;
Auke Kok9a799d72007-09-15 14:07:45 -07004877
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08004878 /* 82598 hardware only has a 32 bit counter in the high register */
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004879 if (hw->mac.type == ixgbe_mac_82599EB) {
Ben Greearaad71912009-09-30 12:08:16 +00004880 u64 tmp;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004881 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
Ben Greearaad71912009-09-30 12:08:16 +00004882 tmp = IXGBE_READ_REG(hw, IXGBE_GORCH) & 0xF; /* 4 high bits of GORC */
4883 adapter->stats.gorc += (tmp << 32);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004884 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
Ben Greearaad71912009-09-30 12:08:16 +00004885 tmp = IXGBE_READ_REG(hw, IXGBE_GOTCH) & 0xF; /* 4 high bits of GOTC */
4886 adapter->stats.gotc += (tmp << 32);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004887 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORL);
4888 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
4889 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
4890 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004891 adapter->stats.fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
4892 adapter->stats.fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
Yi Zou6d455222009-05-13 13:12:16 +00004893#ifdef IXGBE_FCOE
4894 adapter->stats.fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
4895 adapter->stats.fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
4896 adapter->stats.fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
4897 adapter->stats.fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
4898 adapter->stats.fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
4899 adapter->stats.fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
4900#endif /* IXGBE_FCOE */
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004901 } else {
4902 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
4903 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
4904 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
4905 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
4906 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
4907 }
Auke Kok9a799d72007-09-15 14:07:45 -07004908 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
4909 adapter->stats.bprc += bprc;
4910 adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004911 if (hw->mac.type == ixgbe_mac_82598EB)
4912 adapter->stats.mprc -= bprc;
Auke Kok9a799d72007-09-15 14:07:45 -07004913 adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
4914 adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
4915 adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
4916 adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
4917 adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
4918 adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
4919 adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
Auke Kok9a799d72007-09-15 14:07:45 -07004920 adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08004921 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
4922 adapter->stats.lxontxc += lxon;
4923 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
4924 adapter->stats.lxofftxc += lxoff;
Auke Kok9a799d72007-09-15 14:07:45 -07004925 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
4926 adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08004927 adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
4928 /*
4929 * 82598 errata - tx of flow control packets is included in tx counters
4930 */
4931 xon_off_tot = lxon + lxoff;
4932 adapter->stats.gptc -= xon_off_tot;
4933 adapter->stats.mptc -= xon_off_tot;
4934 adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
Auke Kok9a799d72007-09-15 14:07:45 -07004935 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
4936 adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
4937 adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
Auke Kok9a799d72007-09-15 14:07:45 -07004938 adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
4939 adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08004940 adapter->stats.ptc64 -= xon_off_tot;
Auke Kok9a799d72007-09-15 14:07:45 -07004941 adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
4942 adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
4943 adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
4944 adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
4945 adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
Auke Kok9a799d72007-09-15 14:07:45 -07004946 adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
4947
4948 /* Fill out the OS statistics structure */
Ajit Khaparde2d86f132009-10-07 02:43:49 +00004949 netdev->stats.multicast = adapter->stats.mprc;
Auke Kok9a799d72007-09-15 14:07:45 -07004950
4951 /* Rx Errors */
Ajit Khaparde2d86f132009-10-07 02:43:49 +00004952 netdev->stats.rx_errors = adapter->stats.crcerrs +
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07004953 adapter->stats.rlec;
Ajit Khaparde2d86f132009-10-07 02:43:49 +00004954 netdev->stats.rx_dropped = 0;
4955 netdev->stats.rx_length_errors = adapter->stats.rlec;
4956 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4957 netdev->stats.rx_missed_errors = total_mpc;
Auke Kok9a799d72007-09-15 14:07:45 -07004958}
4959
4960/**
4961 * ixgbe_watchdog - Timer Call-back
4962 * @data: pointer to adapter cast into an unsigned long
4963 **/
4964static void ixgbe_watchdog(unsigned long data)
4965{
4966 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07004967 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyckfe49f042009-06-04 16:00:09 +00004968 u64 eics = 0;
4969 int i;
Auke Kok9a799d72007-09-15 14:07:45 -07004970
Alexander Duyckfe49f042009-06-04 16:00:09 +00004971 /*
4972 * Do the watchdog outside of interrupt context due to the lovely
4973 * delays that some of the newer hardware requires
4974 */
Jesse Brandeburg22d5a712009-03-19 01:24:04 +00004975
Alexander Duyckfe49f042009-06-04 16:00:09 +00004976 if (test_bit(__IXGBE_DOWN, &adapter->state))
4977 goto watchdog_short_circuit;
Jesse Brandeburg22d5a712009-03-19 01:24:04 +00004978
Alexander Duyckfe49f042009-06-04 16:00:09 +00004979 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
4980 /*
4981 * for legacy and MSI interrupts don't set any bits
4982 * that are enabled for EIAM, because this operation
4983 * would set *both* EIMS and EICS for any bit in EIAM
4984 */
4985 IXGBE_WRITE_REG(hw, IXGBE_EICS,
4986 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
4987 goto watchdog_reschedule;
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07004988 }
4989
Alexander Duyckfe49f042009-06-04 16:00:09 +00004990 /* get one bit for every active tx/rx interrupt vector */
4991 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
4992 struct ixgbe_q_vector *qv = adapter->q_vector[i];
4993 if (qv->rxr_count || qv->txr_count)
4994 eics |= ((u64)1 << i);
4995 }
4996
4997 /* Cause software interrupt to ensure rx rings are cleaned */
4998 ixgbe_irq_rearm_queues(adapter, eics);
4999
5000watchdog_reschedule:
5001 /* Reset the timer */
5002 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
5003
5004watchdog_short_circuit:
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005005 schedule_work(&adapter->watchdog_task);
5006}
5007
5008/**
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005009 * ixgbe_multispeed_fiber_task - worker thread to configure multispeed fiber
5010 * @work: pointer to work_struct containing our data
5011 **/
5012static void ixgbe_multispeed_fiber_task(struct work_struct *work)
5013{
5014 struct ixgbe_adapter *adapter = container_of(work,
5015 struct ixgbe_adapter,
5016 multispeed_fiber_task);
5017 struct ixgbe_hw *hw = &adapter->hw;
5018 u32 autoneg;
Mallikarjuna R Chilakala8620a102009-09-01 13:49:35 +00005019 bool negotiation;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005020
5021 adapter->flags |= IXGBE_FLAG_IN_SFP_LINK_TASK;
Mallikarjuna R Chilakalaa1f25322009-06-30 11:44:36 +00005022 autoneg = hw->phy.autoneg_advertised;
5023 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
Mallikarjuna R Chilakala8620a102009-09-01 13:49:35 +00005024 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiation);
Mallikarjuna R Chilakala1097cd12010-03-18 14:34:52 +00005025 hw->mac.autotry_restart = false;
Mallikarjuna R Chilakala8620a102009-09-01 13:49:35 +00005026 if (hw->mac.ops.setup_link)
5027 hw->mac.ops.setup_link(hw, autoneg, negotiation, true);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005028 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5029 adapter->flags &= ~IXGBE_FLAG_IN_SFP_LINK_TASK;
5030}
5031
5032/**
5033 * ixgbe_sfp_config_module_task - worker thread to configure a new SFP+ module
5034 * @work: pointer to work_struct containing our data
5035 **/
5036static void ixgbe_sfp_config_module_task(struct work_struct *work)
5037{
5038 struct ixgbe_adapter *adapter = container_of(work,
5039 struct ixgbe_adapter,
5040 sfp_config_module_task);
5041 struct ixgbe_hw *hw = &adapter->hw;
5042 u32 err;
5043
5044 adapter->flags |= IXGBE_FLAG_IN_SFP_MOD_TASK;
Don Skidmore63d6e1d2009-07-02 12:50:12 +00005045
5046 /* Time for electrical oscillations to settle down */
5047 msleep(100);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005048 err = hw->phy.ops.identify_sfp(hw);
Don Skidmore63d6e1d2009-07-02 12:50:12 +00005049
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005050 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
Don Skidmore88d2b812009-06-30 11:43:55 +00005051 dev_err(&adapter->pdev->dev, "failed to initialize because "
5052 "an unsupported SFP+ module type was detected.\n"
5053 "Reload the driver after installing a supported "
5054 "module.\n");
Don Skidmore63d6e1d2009-07-02 12:50:12 +00005055 unregister_netdev(adapter->netdev);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005056 return;
5057 }
5058 hw->mac.ops.setup_sfp(hw);
5059
Tony Breeds8d1c3c02009-04-09 22:29:10 +00005060 if (!(adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK))
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005061 /* This will also work for DA Twinax connections */
5062 schedule_work(&adapter->multispeed_fiber_task);
5063 adapter->flags &= ~IXGBE_FLAG_IN_SFP_MOD_TASK;
5064}
5065
5066/**
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00005067 * ixgbe_fdir_reinit_task - worker thread to reinit FDIR filter table
5068 * @work: pointer to work_struct containing our data
5069 **/
5070static void ixgbe_fdir_reinit_task(struct work_struct *work)
5071{
5072 struct ixgbe_adapter *adapter = container_of(work,
5073 struct ixgbe_adapter,
5074 fdir_reinit_task);
5075 struct ixgbe_hw *hw = &adapter->hw;
5076 int i;
5077
5078 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
5079 for (i = 0; i < adapter->num_tx_queues; i++)
5080 set_bit(__IXGBE_FDIR_INIT_DONE,
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00005081 &(adapter->tx_ring[i]->reinit_state));
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00005082 } else {
5083 DPRINTK(PROBE, ERR, "failed to finish FDIR re-initialization, "
5084 "ignored adding FDIR ATR filters \n");
5085 }
5086 /* Done FDIR Re-initialization, enable transmits */
5087 netif_tx_start_all_queues(adapter->netdev);
5088}
5089
John Fastabend10eec952010-02-03 14:23:32 +00005090static DEFINE_MUTEX(ixgbe_watchdog_lock);
5091
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00005092/**
Alexander Duyck69888672008-09-11 20:05:39 -07005093 * ixgbe_watchdog_task - worker thread to bring link up
5094 * @work: pointer to work_struct containing our data
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005095 **/
5096static void ixgbe_watchdog_task(struct work_struct *work)
5097{
5098 struct ixgbe_adapter *adapter = container_of(work,
5099 struct ixgbe_adapter,
5100 watchdog_task);
5101 struct net_device *netdev = adapter->netdev;
5102 struct ixgbe_hw *hw = &adapter->hw;
John Fastabend10eec952010-02-03 14:23:32 +00005103 u32 link_speed;
5104 bool link_up;
Nelson, Shannonbc59fcd2009-04-27 22:43:12 +00005105 int i;
5106 struct ixgbe_ring *tx_ring;
5107 int some_tx_pending = 0;
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005108
John Fastabend10eec952010-02-03 14:23:32 +00005109 mutex_lock(&ixgbe_watchdog_lock);
5110
5111 link_up = adapter->link_up;
5112 link_speed = adapter->link_speed;
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005113
5114 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
5115 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00005116 if (link_up) {
5117#ifdef CONFIG_DCB
5118 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
5119 for (i = 0; i < MAX_TRAFFIC_CLASS; i++)
Mallikarjuna R Chilakala620fa032009-06-04 11:11:13 +00005120 hw->mac.ops.fc_enable(hw, i);
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00005121 } else {
Mallikarjuna R Chilakala620fa032009-06-04 11:11:13 +00005122 hw->mac.ops.fc_enable(hw, 0);
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00005123 }
5124#else
Mallikarjuna R Chilakala620fa032009-06-04 11:11:13 +00005125 hw->mac.ops.fc_enable(hw, 0);
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00005126#endif
5127 }
5128
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005129 if (link_up ||
5130 time_after(jiffies, (adapter->link_check_timeout +
5131 IXGBE_TRY_LINK_TIMEOUT))) {
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005132 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00005133 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005134 }
5135 adapter->link_up = link_up;
5136 adapter->link_speed = link_speed;
5137 }
Auke Kok9a799d72007-09-15 14:07:45 -07005138
5139 if (link_up) {
5140 if (!netif_carrier_ok(netdev)) {
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005141 bool flow_rx, flow_tx;
5142
5143 if (hw->mac.type == ixgbe_mac_82599EB) {
5144 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
5145 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
Peter P Waskiewicz Jr078788b2009-07-16 15:50:32 +00005146 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
5147 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005148 } else {
5149 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5150 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
Peter P Waskiewicz Jr078788b2009-07-16 15:50:32 +00005151 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
5152 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005153 }
5154
Jeff Kirshera46e5342008-11-27 00:22:21 -08005155 printk(KERN_INFO "ixgbe: %s NIC Link is Up %s, "
5156 "Flow Control: %s\n",
5157 netdev->name,
5158 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
5159 "10 Gbps" :
5160 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
5161 "1 Gbps" : "unknown speed")),
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005162 ((flow_rx && flow_tx) ? "RX/TX" :
5163 (flow_rx ? "RX" :
5164 (flow_tx ? "TX" : "None"))));
Auke Kok9a799d72007-09-15 14:07:45 -07005165
5166 netif_carrier_on(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07005167 } else {
5168 /* Force detection of hung controller */
5169 adapter->detect_tx_hung = true;
5170 }
5171 } else {
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005172 adapter->link_up = false;
5173 adapter->link_speed = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07005174 if (netif_carrier_ok(netdev)) {
Jeff Kirshera46e5342008-11-27 00:22:21 -08005175 printk(KERN_INFO "ixgbe: %s NIC Link is Down\n",
5176 netdev->name);
Auke Kok9a799d72007-09-15 14:07:45 -07005177 netif_carrier_off(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07005178 }
5179 }
5180
Nelson, Shannonbc59fcd2009-04-27 22:43:12 +00005181 if (!netif_carrier_ok(netdev)) {
5182 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00005183 tx_ring = adapter->tx_ring[i];
Nelson, Shannonbc59fcd2009-04-27 22:43:12 +00005184 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
5185 some_tx_pending = 1;
5186 break;
5187 }
5188 }
5189
5190 if (some_tx_pending) {
5191 /* We've lost link, so the controller stops DMA,
5192 * but we've got queued Tx work that's never going
5193 * to get done, so reset controller to flush Tx.
5194 * (Do the reset outside of interrupt context).
5195 */
5196 schedule_work(&adapter->reset_task);
5197 }
5198 }
5199
Auke Kok9a799d72007-09-15 14:07:45 -07005200 ixgbe_update_stats(adapter);
John Fastabend10eec952010-02-03 14:23:32 +00005201 mutex_unlock(&ixgbe_watchdog_lock);
Auke Kok9a799d72007-09-15 14:07:45 -07005202}
5203
Auke Kok9a799d72007-09-15 14:07:45 -07005204static int ixgbe_tso(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005205 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
5206 u32 tx_flags, u8 *hdr_len)
Auke Kok9a799d72007-09-15 14:07:45 -07005207{
5208 struct ixgbe_adv_tx_context_desc *context_desc;
5209 unsigned int i;
5210 int err;
5211 struct ixgbe_tx_buffer *tx_buffer_info;
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07005212 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
5213 u32 mss_l4len_idx, l4len;
Auke Kok9a799d72007-09-15 14:07:45 -07005214
5215 if (skb_is_gso(skb)) {
5216 if (skb_header_cloned(skb)) {
5217 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5218 if (err)
5219 return err;
5220 }
5221 l4len = tcp_hdrlen(skb);
5222 *hdr_len += l4len;
5223
Al Viro8327d002007-12-10 18:54:12 +00005224 if (skb->protocol == htons(ETH_P_IP)) {
Auke Kok9a799d72007-09-15 14:07:45 -07005225 struct iphdr *iph = ip_hdr(skb);
5226 iph->tot_len = 0;
5227 iph->check = 0;
5228 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005229 iph->daddr, 0,
5230 IPPROTO_TCP,
5231 0);
Sridhar Samudrala8e1e8a42010-01-23 02:02:21 -08005232 } else if (skb_is_gso_v6(skb)) {
Auke Kok9a799d72007-09-15 14:07:45 -07005233 ipv6_hdr(skb)->payload_len = 0;
5234 tcp_hdr(skb)->check =
5235 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005236 &ipv6_hdr(skb)->daddr,
5237 0, IPPROTO_TCP, 0);
Auke Kok9a799d72007-09-15 14:07:45 -07005238 }
5239
5240 i = tx_ring->next_to_use;
5241
5242 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5243 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
5244
5245 /* VLAN MACLEN IPLEN */
5246 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
5247 vlan_macip_lens |=
5248 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
5249 vlan_macip_lens |= ((skb_network_offset(skb)) <<
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005250 IXGBE_ADVTXD_MACLEN_SHIFT);
Auke Kok9a799d72007-09-15 14:07:45 -07005251 *hdr_len += skb_network_offset(skb);
5252 vlan_macip_lens |=
5253 (skb_transport_header(skb) - skb_network_header(skb));
5254 *hdr_len +=
5255 (skb_transport_header(skb) - skb_network_header(skb));
5256 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
5257 context_desc->seqnum_seed = 0;
5258
5259 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07005260 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005261 IXGBE_ADVTXD_DTYP_CTXT);
Auke Kok9a799d72007-09-15 14:07:45 -07005262
Al Viro8327d002007-12-10 18:54:12 +00005263 if (skb->protocol == htons(ETH_P_IP))
Auke Kok9a799d72007-09-15 14:07:45 -07005264 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
5265 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
5266 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
5267
5268 /* MSS L4LEN IDX */
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07005269 mss_l4len_idx =
Auke Kok9a799d72007-09-15 14:07:45 -07005270 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
5271 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
PJ Waskiewicz4eeae6f2008-08-26 04:27:30 -07005272 /* use index 1 for TSO */
5273 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
Auke Kok9a799d72007-09-15 14:07:45 -07005274 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
5275
5276 tx_buffer_info->time_stamp = jiffies;
5277 tx_buffer_info->next_to_watch = i;
5278
5279 i++;
5280 if (i == tx_ring->count)
5281 i = 0;
5282 tx_ring->next_to_use = i;
5283
5284 return true;
5285 }
5286 return false;
5287}
5288
5289static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005290 struct ixgbe_ring *tx_ring,
5291 struct sk_buff *skb, u32 tx_flags)
Auke Kok9a799d72007-09-15 14:07:45 -07005292{
5293 struct ixgbe_adv_tx_context_desc *context_desc;
5294 unsigned int i;
5295 struct ixgbe_tx_buffer *tx_buffer_info;
5296 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
5297
5298 if (skb->ip_summed == CHECKSUM_PARTIAL ||
5299 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
5300 i = tx_ring->next_to_use;
5301 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5302 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
5303
5304 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
5305 vlan_macip_lens |=
5306 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
5307 vlan_macip_lens |= (skb_network_offset(skb) <<
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005308 IXGBE_ADVTXD_MACLEN_SHIFT);
Auke Kok9a799d72007-09-15 14:07:45 -07005309 if (skb->ip_summed == CHECKSUM_PARTIAL)
5310 vlan_macip_lens |= (skb_transport_header(skb) -
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005311 skb_network_header(skb));
Auke Kok9a799d72007-09-15 14:07:45 -07005312
5313 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
5314 context_desc->seqnum_seed = 0;
5315
5316 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005317 IXGBE_ADVTXD_DTYP_CTXT);
Auke Kok9a799d72007-09-15 14:07:45 -07005318
5319 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Gurucharan Shettyca553982009-12-15 13:00:31 +00005320 __be16 protocol;
5321
5322 if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) {
5323 const struct vlan_ethhdr *vhdr =
5324 (const struct vlan_ethhdr *)skb->data;
5325
5326 protocol = vhdr->h_vlan_encapsulated_proto;
5327 } else {
5328 protocol = skb->protocol;
5329 }
5330
5331 switch (protocol) {
Harvey Harrison09640e62009-02-01 00:45:17 -08005332 case cpu_to_be16(ETH_P_IP):
Auke Kok9a799d72007-09-15 14:07:45 -07005333 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
Auke Kok41825d72008-02-12 15:20:33 -08005334 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5335 type_tucmd_mlhl |=
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005336 IXGBE_ADVTXD_TUCMD_L4T_TCP;
Jesse Brandeburg45a5ead2009-04-27 22:36:35 +00005337 else if (ip_hdr(skb)->protocol == IPPROTO_SCTP)
5338 type_tucmd_mlhl |=
5339 IXGBE_ADVTXD_TUCMD_L4T_SCTP;
Auke Kok41825d72008-02-12 15:20:33 -08005340 break;
Harvey Harrison09640e62009-02-01 00:45:17 -08005341 case cpu_to_be16(ETH_P_IPV6):
Auke Kok41825d72008-02-12 15:20:33 -08005342 /* XXX what about other V6 headers?? */
5343 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5344 type_tucmd_mlhl |=
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005345 IXGBE_ADVTXD_TUCMD_L4T_TCP;
Jesse Brandeburg45a5ead2009-04-27 22:36:35 +00005346 else if (ipv6_hdr(skb)->nexthdr == IPPROTO_SCTP)
5347 type_tucmd_mlhl |=
5348 IXGBE_ADVTXD_TUCMD_L4T_SCTP;
Auke Kok41825d72008-02-12 15:20:33 -08005349 break;
Auke Kok41825d72008-02-12 15:20:33 -08005350 default:
5351 if (unlikely(net_ratelimit())) {
5352 DPRINTK(PROBE, WARNING,
5353 "partial checksum but proto=%x!\n",
5354 skb->protocol);
5355 }
5356 break;
5357 }
Auke Kok9a799d72007-09-15 14:07:45 -07005358 }
5359
5360 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
PJ Waskiewicz4eeae6f2008-08-26 04:27:30 -07005361 /* use index zero for tx checksum offload */
Auke Kok9a799d72007-09-15 14:07:45 -07005362 context_desc->mss_l4len_idx = 0;
5363
5364 tx_buffer_info->time_stamp = jiffies;
5365 tx_buffer_info->next_to_watch = i;
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07005366
Auke Kok9a799d72007-09-15 14:07:45 -07005367 i++;
5368 if (i == tx_ring->count)
5369 i = 0;
5370 tx_ring->next_to_use = i;
5371
5372 return true;
5373 }
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07005374
Auke Kok9a799d72007-09-15 14:07:45 -07005375 return false;
5376}
5377
5378static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005379 struct ixgbe_ring *tx_ring,
Yi Zoueacd73f2009-05-13 13:11:06 +00005380 struct sk_buff *skb, u32 tx_flags,
5381 unsigned int first)
Auke Kok9a799d72007-09-15 14:07:45 -07005382{
Alexander Duycke5a43542009-12-02 16:46:56 +00005383 struct pci_dev *pdev = adapter->pdev;
Auke Kok9a799d72007-09-15 14:07:45 -07005384 struct ixgbe_tx_buffer *tx_buffer_info;
Yi Zoueacd73f2009-05-13 13:11:06 +00005385 unsigned int len;
5386 unsigned int total = skb->len;
Auke Kok9a799d72007-09-15 14:07:45 -07005387 unsigned int offset = 0, size, count = 0, i;
5388 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
5389 unsigned int f;
Auke Kok9a799d72007-09-15 14:07:45 -07005390
5391 i = tx_ring->next_to_use;
5392
Yi Zoueacd73f2009-05-13 13:11:06 +00005393 if (tx_flags & IXGBE_TX_FLAGS_FCOE)
5394 /* excluding fcoe_crc_eof for FCoE */
5395 total -= sizeof(struct fcoe_crc_eof);
5396
5397 len = min(skb_headlen(skb), total);
Auke Kok9a799d72007-09-15 14:07:45 -07005398 while (len) {
5399 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5400 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
5401
5402 tx_buffer_info->length = size;
Alexander Duycke5a43542009-12-02 16:46:56 +00005403 tx_buffer_info->mapped_as_page = false;
5404 tx_buffer_info->dma = pci_map_single(pdev,
5405 skb->data + offset,
5406 size, PCI_DMA_TODEVICE);
5407 if (pci_dma_mapping_error(pdev, tx_buffer_info->dma))
5408 goto dma_error;
Auke Kok9a799d72007-09-15 14:07:45 -07005409 tx_buffer_info->time_stamp = jiffies;
5410 tx_buffer_info->next_to_watch = i;
5411
5412 len -= size;
Yi Zoueacd73f2009-05-13 13:11:06 +00005413 total -= size;
Auke Kok9a799d72007-09-15 14:07:45 -07005414 offset += size;
5415 count++;
Alexander Duyck44df32c2009-03-31 21:34:23 +00005416
5417 if (len) {
5418 i++;
5419 if (i == tx_ring->count)
5420 i = 0;
5421 }
Auke Kok9a799d72007-09-15 14:07:45 -07005422 }
5423
5424 for (f = 0; f < nr_frags; f++) {
5425 struct skb_frag_struct *frag;
5426
5427 frag = &skb_shinfo(skb)->frags[f];
Yi Zoueacd73f2009-05-13 13:11:06 +00005428 len = min((unsigned int)frag->size, total);
Alexander Duycke5a43542009-12-02 16:46:56 +00005429 offset = frag->page_offset;
Auke Kok9a799d72007-09-15 14:07:45 -07005430
5431 while (len) {
Alexander Duyck44df32c2009-03-31 21:34:23 +00005432 i++;
5433 if (i == tx_ring->count)
5434 i = 0;
5435
Auke Kok9a799d72007-09-15 14:07:45 -07005436 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5437 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
5438
5439 tx_buffer_info->length = size;
Alexander Duycke5a43542009-12-02 16:46:56 +00005440 tx_buffer_info->dma = pci_map_page(adapter->pdev,
5441 frag->page,
5442 offset, size,
5443 PCI_DMA_TODEVICE);
5444 tx_buffer_info->mapped_as_page = true;
5445 if (pci_dma_mapping_error(pdev, tx_buffer_info->dma))
5446 goto dma_error;
Auke Kok9a799d72007-09-15 14:07:45 -07005447 tx_buffer_info->time_stamp = jiffies;
5448 tx_buffer_info->next_to_watch = i;
5449
5450 len -= size;
Yi Zoueacd73f2009-05-13 13:11:06 +00005451 total -= size;
Auke Kok9a799d72007-09-15 14:07:45 -07005452 offset += size;
5453 count++;
Auke Kok9a799d72007-09-15 14:07:45 -07005454 }
Yi Zoueacd73f2009-05-13 13:11:06 +00005455 if (total == 0)
5456 break;
Auke Kok9a799d72007-09-15 14:07:45 -07005457 }
Alexander Duyck44df32c2009-03-31 21:34:23 +00005458
Auke Kok9a799d72007-09-15 14:07:45 -07005459 tx_ring->tx_buffer_info[i].skb = skb;
5460 tx_ring->tx_buffer_info[first].next_to_watch = i;
5461
5462 return count;
Alexander Duycke5a43542009-12-02 16:46:56 +00005463
5464dma_error:
5465 dev_err(&pdev->dev, "TX DMA map failed\n");
5466
5467 /* clear timestamp and dma mappings for failed tx_buffer_info map */
5468 tx_buffer_info->dma = 0;
5469 tx_buffer_info->time_stamp = 0;
5470 tx_buffer_info->next_to_watch = 0;
Roel Kluinc1fa3472010-01-19 14:21:45 +00005471 if (count)
5472 count--;
Alexander Duycke5a43542009-12-02 16:46:56 +00005473
5474 /* clear timestamp and dma mappings for remaining portion of packet */
Roel Kluinc1fa3472010-01-19 14:21:45 +00005475 while (count--) {
5476 if (i==0)
Alexander Duycke5a43542009-12-02 16:46:56 +00005477 i += tx_ring->count;
Roel Kluinc1fa3472010-01-19 14:21:45 +00005478 i--;
Alexander Duycke5a43542009-12-02 16:46:56 +00005479 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5480 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
5481 }
5482
Anton Blancharde44d38e2010-02-03 13:12:51 +00005483 return 0;
Auke Kok9a799d72007-09-15 14:07:45 -07005484}
5485
5486static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005487 struct ixgbe_ring *tx_ring,
5488 int tx_flags, int count, u32 paylen, u8 hdr_len)
Auke Kok9a799d72007-09-15 14:07:45 -07005489{
5490 union ixgbe_adv_tx_desc *tx_desc = NULL;
5491 struct ixgbe_tx_buffer *tx_buffer_info;
5492 u32 olinfo_status = 0, cmd_type_len = 0;
5493 unsigned int i;
5494 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
5495
5496 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
5497
5498 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
5499
5500 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
5501 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
5502
5503 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
5504 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
5505
5506 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005507 IXGBE_ADVTXD_POPTS_SHIFT;
Auke Kok9a799d72007-09-15 14:07:45 -07005508
PJ Waskiewicz4eeae6f2008-08-26 04:27:30 -07005509 /* use index 1 context for tso */
5510 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
Auke Kok9a799d72007-09-15 14:07:45 -07005511 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
5512 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005513 IXGBE_ADVTXD_POPTS_SHIFT;
Auke Kok9a799d72007-09-15 14:07:45 -07005514
5515 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
5516 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005517 IXGBE_ADVTXD_POPTS_SHIFT;
Auke Kok9a799d72007-09-15 14:07:45 -07005518
Yi Zoueacd73f2009-05-13 13:11:06 +00005519 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
5520 olinfo_status |= IXGBE_ADVTXD_CC;
5521 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
5522 if (tx_flags & IXGBE_TX_FLAGS_FSO)
5523 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
5524 }
5525
Auke Kok9a799d72007-09-15 14:07:45 -07005526 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
5527
5528 i = tx_ring->next_to_use;
5529 while (count--) {
5530 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5531 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
5532 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
5533 tx_desc->read.cmd_type_len =
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005534 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
Auke Kok9a799d72007-09-15 14:07:45 -07005535 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
Auke Kok9a799d72007-09-15 14:07:45 -07005536 i++;
5537 if (i == tx_ring->count)
5538 i = 0;
5539 }
5540
5541 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
5542
5543 /*
5544 * Force memory writes to complete before letting h/w
5545 * know there are new descriptors to fetch. (Only
5546 * applicable for weak-ordered memory model archs,
5547 * such as IA-64).
5548 */
5549 wmb();
5550
5551 tx_ring->next_to_use = i;
5552 writel(i, adapter->hw.hw_addr + tx_ring->tail);
5553}
5554
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00005555static void ixgbe_atr(struct ixgbe_adapter *adapter, struct sk_buff *skb,
5556 int queue, u32 tx_flags)
5557{
5558 /* Right now, we support IPv4 only */
5559 struct ixgbe_atr_input atr_input;
5560 struct tcphdr *th;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00005561 struct iphdr *iph = ip_hdr(skb);
5562 struct ethhdr *eth = (struct ethhdr *)skb->data;
5563 u16 vlan_id, src_port, dst_port, flex_bytes;
5564 u32 src_ipv4_addr, dst_ipv4_addr;
5565 u8 l4type = 0;
5566
5567 /* check if we're UDP or TCP */
5568 if (iph->protocol == IPPROTO_TCP) {
5569 th = tcp_hdr(skb);
5570 src_port = th->source;
5571 dst_port = th->dest;
5572 l4type |= IXGBE_ATR_L4TYPE_TCP;
5573 /* l4type IPv4 type is 0, no need to assign */
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00005574 } else {
5575 /* Unsupported L4 header, just bail here */
5576 return;
5577 }
5578
5579 memset(&atr_input, 0, sizeof(struct ixgbe_atr_input));
5580
5581 vlan_id = (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK) >>
5582 IXGBE_TX_FLAGS_VLAN_SHIFT;
5583 src_ipv4_addr = iph->saddr;
5584 dst_ipv4_addr = iph->daddr;
5585 flex_bytes = eth->h_proto;
5586
5587 ixgbe_atr_set_vlan_id_82599(&atr_input, vlan_id);
5588 ixgbe_atr_set_src_port_82599(&atr_input, dst_port);
5589 ixgbe_atr_set_dst_port_82599(&atr_input, src_port);
5590 ixgbe_atr_set_flex_byte_82599(&atr_input, flex_bytes);
5591 ixgbe_atr_set_l4type_82599(&atr_input, l4type);
5592 /* src and dst are inverted, think how the receiver sees them */
5593 ixgbe_atr_set_src_ipv4_82599(&atr_input, dst_ipv4_addr);
5594 ixgbe_atr_set_dst_ipv4_82599(&atr_input, src_ipv4_addr);
5595
5596 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
5597 ixgbe_fdir_add_signature_filter_82599(&adapter->hw, &atr_input, queue);
5598}
5599
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -08005600static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005601 struct ixgbe_ring *tx_ring, int size)
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -08005602{
Ayyappan Veeraiyan30eba972008-03-03 15:03:52 -08005603 netif_stop_subqueue(netdev, tx_ring->queue_index);
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -08005604 /* Herbert's original patch had:
5605 * smp_mb__after_netif_stop_queue();
5606 * but since that doesn't exist yet, just open code it. */
5607 smp_mb();
5608
5609 /* We need to check again in a case another CPU has just
5610 * made room available. */
5611 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
5612 return -EBUSY;
5613
5614 /* A reprieve! - use start_queue because it doesn't call schedule */
Jesse Brandeburgaf721662008-09-11 19:54:23 -07005615 netif_start_subqueue(netdev, tx_ring->queue_index);
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +00005616 ++tx_ring->restart_queue;
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -08005617 return 0;
5618}
5619
5620static int ixgbe_maybe_stop_tx(struct net_device *netdev,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005621 struct ixgbe_ring *tx_ring, int size)
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -08005622{
5623 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
5624 return 0;
5625 return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
5626}
5627
Stephen Hemminger09a3b1f2009-03-21 13:40:01 -07005628static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb)
5629{
5630 struct ixgbe_adapter *adapter = netdev_priv(dev);
Yi Zou5f715822009-12-03 11:32:44 +00005631 int txq = smp_processor_id();
Stephen Hemminger09a3b1f2009-03-21 13:40:01 -07005632
Krishna Kumarfdd3d632010-02-03 13:13:10 +00005633 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5634 while (unlikely(txq >= dev->real_num_tx_queues))
5635 txq -= dev->real_num_tx_queues;
Yi Zou5f715822009-12-03 11:32:44 +00005636 return txq;
Krishna Kumarfdd3d632010-02-03 13:13:10 +00005637 }
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00005638
Yi Zou5f715822009-12-03 11:32:44 +00005639#ifdef IXGBE_FCOE
5640 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
5641 (skb->protocol == htons(ETH_P_FCOE))) {
5642 txq &= (adapter->ring_feature[RING_F_FCOE].indices - 1);
5643 txq += adapter->ring_feature[RING_F_FCOE].mask;
5644 return txq;
5645 }
5646#endif
John Fastabend2ea186a2010-02-27 03:28:24 -08005647 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
5648 if (skb->priority == TC_PRIO_CONTROL)
5649 txq = adapter->ring_feature[RING_F_DCB].indices-1;
5650 else
5651 txq = (skb->vlan_tci & IXGBE_TX_FLAGS_VLAN_PRIO_MASK)
5652 >> 13;
5653 return txq;
5654 }
Stephen Hemminger09a3b1f2009-03-21 13:40:01 -07005655
5656 return skb_tx_hash(dev, skb);
5657}
5658
Stephen Hemminger3b29a562009-08-31 19:50:55 +00005659static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
5660 struct net_device *netdev)
Auke Kok9a799d72007-09-15 14:07:45 -07005661{
5662 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5663 struct ixgbe_ring *tx_ring;
Eric Dumazet60d51132009-12-08 07:22:03 +00005664 struct netdev_queue *txq;
Auke Kok9a799d72007-09-15 14:07:45 -07005665 unsigned int first;
5666 unsigned int tx_flags = 0;
Ayyappan Veeraiyan30eba972008-03-03 15:03:52 -08005667 u8 hdr_len = 0;
Yi Zou5f715822009-12-03 11:32:44 +00005668 int tso;
Auke Kok9a799d72007-09-15 14:07:45 -07005669 int count = 0;
5670 unsigned int f;
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07005671
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07005672 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
5673 tx_flags |= vlan_tx_tag_get(skb);
Alexander Duyck2f90b862008-11-20 20:52:10 -08005674 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
5675 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
Yi Zou5f715822009-12-03 11:32:44 +00005676 tx_flags |= ((skb->queue_mapping & 0x7) << 13);
Alexander Duyck2f90b862008-11-20 20:52:10 -08005677 }
5678 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
5679 tx_flags |= IXGBE_TX_FLAGS_VLAN;
5680 } else if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
John Fastabend2ea186a2010-02-27 03:28:24 -08005681 tx_flags |= ((skb->queue_mapping & 0x7) << 13);
5682 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
5683 tx_flags |= IXGBE_TX_FLAGS_VLAN;
Auke Kok9a799d72007-09-15 14:07:45 -07005684 }
Yi Zoueacd73f2009-05-13 13:11:06 +00005685
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00005686 tx_ring = adapter->tx_ring[skb->queue_mapping];
Lucy Liu60127862009-07-22 14:07:33 +00005687
Yi Zoueacd73f2009-05-13 13:11:06 +00005688 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
Yi Zou09ad1cc2009-09-03 14:56:10 +00005689 (skb->protocol == htons(ETH_P_FCOE))) {
Yi Zoueacd73f2009-05-13 13:11:06 +00005690 tx_flags |= IXGBE_TX_FLAGS_FCOE;
Yi Zou09ad1cc2009-09-03 14:56:10 +00005691#ifdef IXGBE_FCOE
Yi Zou61a0f422009-12-03 11:32:22 +00005692#ifdef CONFIG_IXGBE_DCB
5693 tx_flags &= ~(IXGBE_TX_FLAGS_VLAN_PRIO_MASK
5694 << IXGBE_TX_FLAGS_VLAN_SHIFT);
5695 tx_flags |= ((adapter->fcoe.up << 13)
5696 << IXGBE_TX_FLAGS_VLAN_SHIFT);
5697#endif
Yi Zou09ad1cc2009-09-03 14:56:10 +00005698#endif
5699 }
Yi Zoueacd73f2009-05-13 13:11:06 +00005700 /* four things can cause us to need a context descriptor */
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07005701 if (skb_is_gso(skb) ||
5702 (skb->ip_summed == CHECKSUM_PARTIAL) ||
Yi Zoueacd73f2009-05-13 13:11:06 +00005703 (tx_flags & IXGBE_TX_FLAGS_VLAN) ||
5704 (tx_flags & IXGBE_TX_FLAGS_FCOE))
Auke Kok9a799d72007-09-15 14:07:45 -07005705 count++;
5706
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07005707 count += TXD_USE_COUNT(skb_headlen(skb));
5708 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
Auke Kok9a799d72007-09-15 14:07:45 -07005709 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5710
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -08005711 if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
Auke Kok9a799d72007-09-15 14:07:45 -07005712 adapter->tx_busy++;
Auke Kok9a799d72007-09-15 14:07:45 -07005713 return NETDEV_TX_BUSY;
5714 }
Auke Kok9a799d72007-09-15 14:07:45 -07005715
Auke Kok9a799d72007-09-15 14:07:45 -07005716 first = tx_ring->next_to_use;
Yi Zoueacd73f2009-05-13 13:11:06 +00005717 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
5718#ifdef IXGBE_FCOE
5719 /* setup tx offload for FCoE */
5720 tso = ixgbe_fso(adapter, tx_ring, skb, tx_flags, &hdr_len);
5721 if (tso < 0) {
5722 dev_kfree_skb_any(skb);
5723 return NETDEV_TX_OK;
5724 }
5725 if (tso)
5726 tx_flags |= IXGBE_TX_FLAGS_FSO;
5727#endif /* IXGBE_FCOE */
5728 } else {
5729 if (skb->protocol == htons(ETH_P_IP))
5730 tx_flags |= IXGBE_TX_FLAGS_IPV4;
5731 tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
5732 if (tso < 0) {
5733 dev_kfree_skb_any(skb);
5734 return NETDEV_TX_OK;
5735 }
5736
5737 if (tso)
5738 tx_flags |= IXGBE_TX_FLAGS_TSO;
5739 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
5740 (skb->ip_summed == CHECKSUM_PARTIAL))
5741 tx_flags |= IXGBE_TX_FLAGS_CSUM;
Auke Kok9a799d72007-09-15 14:07:45 -07005742 }
5743
Yi Zoueacd73f2009-05-13 13:11:06 +00005744 count = ixgbe_tx_map(adapter, tx_ring, skb, tx_flags, first);
Alexander Duyck44df32c2009-03-31 21:34:23 +00005745 if (count) {
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00005746 /* add the ATR filter if ATR is on */
5747 if (tx_ring->atr_sample_rate) {
5748 ++tx_ring->atr_count;
5749 if ((tx_ring->atr_count >= tx_ring->atr_sample_rate) &&
5750 test_bit(__IXGBE_FDIR_INIT_DONE,
5751 &tx_ring->reinit_state)) {
5752 ixgbe_atr(adapter, skb, tx_ring->queue_index,
5753 tx_flags);
5754 tx_ring->atr_count = 0;
5755 }
5756 }
Eric Dumazet60d51132009-12-08 07:22:03 +00005757 txq = netdev_get_tx_queue(netdev, tx_ring->queue_index);
5758 txq->tx_bytes += skb->len;
5759 txq->tx_packets++;
Alexander Duyck44df32c2009-03-31 21:34:23 +00005760 ixgbe_tx_queue(adapter, tx_ring, tx_flags, count, skb->len,
5761 hdr_len);
Alexander Duyck44df32c2009-03-31 21:34:23 +00005762 ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
Auke Kok9a799d72007-09-15 14:07:45 -07005763
Alexander Duyck44df32c2009-03-31 21:34:23 +00005764 } else {
5765 dev_kfree_skb_any(skb);
5766 tx_ring->tx_buffer_info[first].time_stamp = 0;
5767 tx_ring->next_to_use = first;
5768 }
Auke Kok9a799d72007-09-15 14:07:45 -07005769
5770 return NETDEV_TX_OK;
5771}
5772
5773/**
Auke Kok9a799d72007-09-15 14:07:45 -07005774 * ixgbe_set_mac - Change the Ethernet Address of the NIC
5775 * @netdev: network interface device structure
5776 * @p: pointer to an address structure
5777 *
5778 * Returns 0 on success, negative on failure
5779 **/
5780static int ixgbe_set_mac(struct net_device *netdev, void *p)
5781{
5782 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005783 struct ixgbe_hw *hw = &adapter->hw;
Auke Kok9a799d72007-09-15 14:07:45 -07005784 struct sockaddr *addr = p;
5785
5786 if (!is_valid_ether_addr(addr->sa_data))
5787 return -EADDRNOTAVAIL;
5788
5789 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005790 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
Auke Kok9a799d72007-09-15 14:07:45 -07005791
Greg Rose1cdd1ec2010-01-09 02:26:46 +00005792 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, adapter->num_vfs,
5793 IXGBE_RAH_AV);
Auke Kok9a799d72007-09-15 14:07:45 -07005794
5795 return 0;
5796}
5797
Ben Hutchings6b73e102009-04-29 08:08:58 +00005798static int
5799ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
5800{
5801 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5802 struct ixgbe_hw *hw = &adapter->hw;
5803 u16 value;
5804 int rc;
5805
5806 if (prtad != hw->phy.mdio.prtad)
5807 return -EINVAL;
5808 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
5809 if (!rc)
5810 rc = value;
5811 return rc;
5812}
5813
5814static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
5815 u16 addr, u16 value)
5816{
5817 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5818 struct ixgbe_hw *hw = &adapter->hw;
5819
5820 if (prtad != hw->phy.mdio.prtad)
5821 return -EINVAL;
5822 return hw->phy.ops.write_reg(hw, addr, devad, value);
5823}
5824
5825static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
5826{
5827 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5828
5829 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
5830}
5831
PJ Waskiewicz0365e6e2009-05-17 12:32:25 +00005832/**
5833 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
Jiri Pirko31278e72009-06-17 01:12:19 +00005834 * netdev->dev_addrs
PJ Waskiewicz0365e6e2009-05-17 12:32:25 +00005835 * @netdev: network interface device structure
5836 *
5837 * Returns non-zero on failure
5838 **/
5839static int ixgbe_add_sanmac_netdev(struct net_device *dev)
5840{
5841 int err = 0;
5842 struct ixgbe_adapter *adapter = netdev_priv(dev);
5843 struct ixgbe_mac_info *mac = &adapter->hw.mac;
5844
5845 if (is_valid_ether_addr(mac->san_addr)) {
5846 rtnl_lock();
5847 err = dev_addr_add(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
5848 rtnl_unlock();
5849 }
5850 return err;
5851}
5852
5853/**
5854 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
Jiri Pirko31278e72009-06-17 01:12:19 +00005855 * netdev->dev_addrs
PJ Waskiewicz0365e6e2009-05-17 12:32:25 +00005856 * @netdev: network interface device structure
5857 *
5858 * Returns non-zero on failure
5859 **/
5860static int ixgbe_del_sanmac_netdev(struct net_device *dev)
5861{
5862 int err = 0;
5863 struct ixgbe_adapter *adapter = netdev_priv(dev);
5864 struct ixgbe_mac_info *mac = &adapter->hw.mac;
5865
5866 if (is_valid_ether_addr(mac->san_addr)) {
5867 rtnl_lock();
5868 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
5869 rtnl_unlock();
5870 }
5871 return err;
5872}
5873
Auke Kok9a799d72007-09-15 14:07:45 -07005874#ifdef CONFIG_NET_POLL_CONTROLLER
5875/*
5876 * Polling 'interrupt' - used by things like netconsole to send skbs
5877 * without having to re-enable interrupts. It's not called while
5878 * the interrupt routine is executing.
5879 */
5880static void ixgbe_netpoll(struct net_device *netdev)
5881{
5882 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Peter P Waskiewicz Jr8f9a7162009-07-30 12:25:09 +00005883 int i;
Auke Kok9a799d72007-09-15 14:07:45 -07005884
Alexander Duyck1a647bd2010-01-13 01:49:13 +00005885 /* if interface is down do nothing */
5886 if (test_bit(__IXGBE_DOWN, &adapter->state))
5887 return;
5888
Auke Kok9a799d72007-09-15 14:07:45 -07005889 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
Peter P Waskiewicz Jr8f9a7162009-07-30 12:25:09 +00005890 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5891 int num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
5892 for (i = 0; i < num_q_vectors; i++) {
5893 struct ixgbe_q_vector *q_vector = adapter->q_vector[i];
5894 ixgbe_msix_clean_many(0, q_vector);
5895 }
5896 } else {
5897 ixgbe_intr(adapter->pdev->irq, netdev);
5898 }
Auke Kok9a799d72007-09-15 14:07:45 -07005899 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
Auke Kok9a799d72007-09-15 14:07:45 -07005900}
5901#endif
5902
Stephen Hemminger0edc3522008-11-19 22:24:29 -08005903static const struct net_device_ops ixgbe_netdev_ops = {
5904 .ndo_open = ixgbe_open,
5905 .ndo_stop = ixgbe_close,
Stephen Hemminger00829822008-11-20 20:14:53 -08005906 .ndo_start_xmit = ixgbe_xmit_frame,
Stephen Hemminger09a3b1f2009-03-21 13:40:01 -07005907 .ndo_select_queue = ixgbe_select_queue,
Chris Leeche90d4002009-03-10 16:00:24 +00005908 .ndo_set_rx_mode = ixgbe_set_rx_mode,
Stephen Hemminger0edc3522008-11-19 22:24:29 -08005909 .ndo_set_multicast_list = ixgbe_set_rx_mode,
5910 .ndo_validate_addr = eth_validate_addr,
5911 .ndo_set_mac_address = ixgbe_set_mac,
5912 .ndo_change_mtu = ixgbe_change_mtu,
5913 .ndo_tx_timeout = ixgbe_tx_timeout,
5914 .ndo_vlan_rx_register = ixgbe_vlan_rx_register,
5915 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
5916 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
Ben Hutchings6b73e102009-04-29 08:08:58 +00005917 .ndo_do_ioctl = ixgbe_ioctl,
Stephen Hemminger0edc3522008-11-19 22:24:29 -08005918#ifdef CONFIG_NET_POLL_CONTROLLER
5919 .ndo_poll_controller = ixgbe_netpoll,
5920#endif
Yi Zou332d4a72009-05-13 13:11:53 +00005921#ifdef IXGBE_FCOE
5922 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
5923 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
Yi Zou8450ff82009-08-31 12:32:14 +00005924 .ndo_fcoe_enable = ixgbe_fcoe_enable,
5925 .ndo_fcoe_disable = ixgbe_fcoe_disable,
Yi Zou61a1fa12009-10-28 18:24:56 +00005926 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
Yi Zou332d4a72009-05-13 13:11:53 +00005927#endif /* IXGBE_FCOE */
Stephen Hemminger0edc3522008-11-19 22:24:29 -08005928};
5929
Greg Rose1cdd1ec2010-01-09 02:26:46 +00005930static void __devinit ixgbe_probe_vf(struct ixgbe_adapter *adapter,
5931 const struct ixgbe_info *ii)
5932{
5933#ifdef CONFIG_PCI_IOV
5934 struct ixgbe_hw *hw = &adapter->hw;
5935 int err;
5936
5937 if (hw->mac.type != ixgbe_mac_82599EB || !max_vfs)
5938 return;
5939
5940 /* The 82599 supports up to 64 VFs per physical function
5941 * but this implementation limits allocation to 63 so that
5942 * basic networking resources are still available to the
5943 * physical function
5944 */
5945 adapter->num_vfs = (max_vfs > 63) ? 63 : max_vfs;
5946 adapter->flags |= IXGBE_FLAG_SRIOV_ENABLED;
5947 err = pci_enable_sriov(adapter->pdev, adapter->num_vfs);
5948 if (err) {
5949 DPRINTK(PROBE, ERR,
5950 "Failed to enable PCI sriov: %d\n", err);
5951 goto err_novfs;
5952 }
5953 /* If call to enable VFs succeeded then allocate memory
5954 * for per VF control structures.
5955 */
5956 adapter->vfinfo =
5957 kcalloc(adapter->num_vfs,
5958 sizeof(struct vf_data_storage), GFP_KERNEL);
5959 if (adapter->vfinfo) {
5960 /* Now that we're sure SR-IOV is enabled
5961 * and memory allocated set up the mailbox parameters
5962 */
5963 ixgbe_init_mbx_params_pf(hw);
5964 memcpy(&hw->mbx.ops, ii->mbx_ops,
5965 sizeof(hw->mbx.ops));
5966
5967 /* Disable RSC when in SR-IOV mode */
5968 adapter->flags2 &= ~(IXGBE_FLAG2_RSC_CAPABLE |
5969 IXGBE_FLAG2_RSC_ENABLED);
5970 return;
5971 }
5972
5973 /* Oh oh */
5974 DPRINTK(PROBE, ERR,
5975 "Unable to allocate memory for VF "
5976 "Data Storage - SRIOV disabled\n");
5977 pci_disable_sriov(adapter->pdev);
5978
5979err_novfs:
5980 adapter->flags &= ~IXGBE_FLAG_SRIOV_ENABLED;
5981 adapter->num_vfs = 0;
5982#endif /* CONFIG_PCI_IOV */
5983}
5984
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07005985/**
Auke Kok9a799d72007-09-15 14:07:45 -07005986 * ixgbe_probe - Device Initialization Routine
5987 * @pdev: PCI device information struct
5988 * @ent: entry in ixgbe_pci_tbl
5989 *
5990 * Returns 0 on success, negative on failure
5991 *
5992 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
5993 * The OS initialization, configuring of the adapter private structure,
5994 * and a hardware reset occur.
5995 **/
5996static int __devinit ixgbe_probe(struct pci_dev *pdev,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005997 const struct pci_device_id *ent)
Auke Kok9a799d72007-09-15 14:07:45 -07005998{
5999 struct net_device *netdev;
6000 struct ixgbe_adapter *adapter = NULL;
6001 struct ixgbe_hw *hw;
6002 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
Auke Kok9a799d72007-09-15 14:07:45 -07006003 static int cards_found;
6004 int i, err, pci_using_dac;
John Fastabendc85a2612010-02-25 23:15:21 +00006005 unsigned int indices = num_possible_cpus();
Yi Zoueacd73f2009-05-13 13:11:06 +00006006#ifdef IXGBE_FCOE
6007 u16 device_caps;
6008#endif
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006009 u32 part_num, eec;
Auke Kok9a799d72007-09-15 14:07:45 -07006010
gouji-new9ce77662009-05-06 10:44:45 +00006011 err = pci_enable_device_mem(pdev);
Auke Kok9a799d72007-09-15 14:07:45 -07006012 if (err)
6013 return err;
6014
Yang Hongyang6a355282009-04-06 19:01:13 -07006015 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
6016 !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
Auke Kok9a799d72007-09-15 14:07:45 -07006017 pci_using_dac = 1;
6018 } else {
Yang Hongyang284901a2009-04-06 19:01:15 -07006019 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
Auke Kok9a799d72007-09-15 14:07:45 -07006020 if (err) {
Yang Hongyang284901a2009-04-06 19:01:15 -07006021 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
Auke Kok9a799d72007-09-15 14:07:45 -07006022 if (err) {
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006023 dev_err(&pdev->dev, "No usable DMA "
6024 "configuration, aborting\n");
Auke Kok9a799d72007-09-15 14:07:45 -07006025 goto err_dma;
6026 }
6027 }
6028 pci_using_dac = 0;
6029 }
6030
gouji-new9ce77662009-05-06 10:44:45 +00006031 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
6032 IORESOURCE_MEM), ixgbe_driver_name);
Auke Kok9a799d72007-09-15 14:07:45 -07006033 if (err) {
gouji-new9ce77662009-05-06 10:44:45 +00006034 dev_err(&pdev->dev,
6035 "pci_request_selected_regions failed 0x%x\n", err);
Auke Kok9a799d72007-09-15 14:07:45 -07006036 goto err_pci_reg;
6037 }
6038
Frans Pop19d5afd2009-10-02 10:04:12 -07006039 pci_enable_pcie_error_reporting(pdev);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08006040
Auke Kok9a799d72007-09-15 14:07:45 -07006041 pci_set_master(pdev);
Wendy Xiongfb3b27b2008-04-23 11:09:24 -07006042 pci_save_state(pdev);
Auke Kok9a799d72007-09-15 14:07:45 -07006043
John Fastabendc85a2612010-02-25 23:15:21 +00006044 if (ii->mac == ixgbe_mac_82598EB)
6045 indices = min_t(unsigned int, indices, IXGBE_MAX_RSS_INDICES);
6046 else
6047 indices = min_t(unsigned int, indices, IXGBE_MAX_FDIR_INDICES);
6048
6049 indices = max_t(unsigned int, indices, IXGBE_MAX_DCB_INDICES);
6050#ifdef IXGBE_FCOE
6051 indices += min_t(unsigned int, num_possible_cpus(),
6052 IXGBE_MAX_FCOE_INDICES);
6053#endif
6054 indices = min_t(unsigned int, indices, MAX_TX_QUEUES);
6055 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
Auke Kok9a799d72007-09-15 14:07:45 -07006056 if (!netdev) {
6057 err = -ENOMEM;
6058 goto err_alloc_etherdev;
6059 }
6060
Auke Kok9a799d72007-09-15 14:07:45 -07006061 SET_NETDEV_DEV(netdev, &pdev->dev);
6062
6063 pci_set_drvdata(pdev, netdev);
6064 adapter = netdev_priv(netdev);
6065
6066 adapter->netdev = netdev;
6067 adapter->pdev = pdev;
6068 hw = &adapter->hw;
6069 hw->back = adapter;
6070 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
6071
Jeff Kirsher05857982008-09-11 19:57:00 -07006072 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
6073 pci_resource_len(pdev, 0));
Auke Kok9a799d72007-09-15 14:07:45 -07006074 if (!hw->hw_addr) {
6075 err = -EIO;
6076 goto err_ioremap;
6077 }
6078
6079 for (i = 1; i <= 5; i++) {
6080 if (pci_resource_len(pdev, i) == 0)
6081 continue;
6082 }
6083
Stephen Hemminger0edc3522008-11-19 22:24:29 -08006084 netdev->netdev_ops = &ixgbe_netdev_ops;
Auke Kok9a799d72007-09-15 14:07:45 -07006085 ixgbe_set_ethtool_ops(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07006086 netdev->watchdog_timeo = 5 * HZ;
Auke Kok9a799d72007-09-15 14:07:45 -07006087 strcpy(netdev->name, pci_name(pdev));
6088
Auke Kok9a799d72007-09-15 14:07:45 -07006089 adapter->bd_number = cards_found;
6090
Auke Kok9a799d72007-09-15 14:07:45 -07006091 /* Setup hw api */
6092 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08006093 hw->mac.type = ii->mac;
Auke Kok9a799d72007-09-15 14:07:45 -07006094
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006095 /* EEPROM */
6096 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
6097 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
6098 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
6099 if (!(eec & (1 << 8)))
6100 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
6101
6102 /* PHY */
6103 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
Donald Skidmorec4900be2008-11-20 21:11:42 -08006104 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
Ben Hutchings6b73e102009-04-29 08:08:58 +00006105 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
6106 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
6107 hw->phy.mdio.mmds = 0;
6108 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
6109 hw->phy.mdio.dev = netdev;
6110 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
6111 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
Donald Skidmorec4900be2008-11-20 21:11:42 -08006112
6113 /* set up this timer and work struct before calling get_invariants
6114 * which might start the timer
6115 */
6116 init_timer(&adapter->sfp_timer);
6117 adapter->sfp_timer.function = &ixgbe_sfp_timer;
6118 adapter->sfp_timer.data = (unsigned long) adapter;
6119
6120 INIT_WORK(&adapter->sfp_task, ixgbe_sfp_task);
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006121
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006122 /* multispeed fiber has its own tasklet, called from GPI SDP1 context */
6123 INIT_WORK(&adapter->multispeed_fiber_task, ixgbe_multispeed_fiber_task);
6124
6125 /* a new SFP+ module arrival, called from GPI SDP2 context */
6126 INIT_WORK(&adapter->sfp_config_module_task,
6127 ixgbe_sfp_config_module_task);
6128
Don Skidmore8ca783a2009-05-26 20:40:47 -07006129 ii->get_invariants(hw);
Auke Kok9a799d72007-09-15 14:07:45 -07006130
6131 /* setup the private structure */
6132 err = ixgbe_sw_init(adapter);
6133 if (err)
6134 goto err_sw_init;
6135
Don Skidmoree86bff02010-02-11 04:14:08 +00006136 /* Make it possible the adapter to be woken up via WOL */
6137 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
6138 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6139
Don Skidmorebf069c92009-05-07 10:39:54 +00006140 /*
6141 * If there is a fan on this device and it has failed log the
6142 * failure.
6143 */
6144 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
6145 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
6146 if (esdp & IXGBE_ESDP_SDP1)
6147 DPRINTK(PROBE, CRIT,
6148 "Fan has stopped, replace the adapter\n");
6149 }
6150
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006151 /* reset_hw fills in the perm_addr as well */
6152 err = hw->mac.ops.reset_hw(hw);
Don Skidmore8ca783a2009-05-26 20:40:47 -07006153 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
6154 hw->mac.type == ixgbe_mac_82598EB) {
6155 /*
6156 * Start a kernel thread to watch for a module to arrive.
6157 * Only do this for 82598, since 82599 will generate
6158 * interrupts on module arrival.
6159 */
6160 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
6161 mod_timer(&adapter->sfp_timer,
6162 round_jiffies(jiffies + (2 * HZ)));
6163 err = 0;
6164 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
Don Skidmore88d2b812009-06-30 11:43:55 +00006165 dev_err(&adapter->pdev->dev, "failed to initialize because "
6166 "an unsupported SFP+ module type was detected.\n"
6167 "Reload the driver after installing a supported "
6168 "module.\n");
PJ Waskiewicz04f165e2009-04-09 22:27:57 +00006169 goto err_sw_init;
6170 } else if (err) {
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006171 dev_err(&adapter->pdev->dev, "HW Init failed: %d\n", err);
6172 goto err_sw_init;
6173 }
6174
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006175 ixgbe_probe_vf(adapter, ii);
6176
Auke Kok9a799d72007-09-15 14:07:45 -07006177 netdev->features = NETIF_F_SG |
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006178 NETIF_F_IP_CSUM |
6179 NETIF_F_HW_VLAN_TX |
6180 NETIF_F_HW_VLAN_RX |
6181 NETIF_F_HW_VLAN_FILTER;
Auke Kok9a799d72007-09-15 14:07:45 -07006182
Jesse Brandeburge9990a92008-08-26 04:27:24 -07006183 netdev->features |= NETIF_F_IPV6_CSUM;
Auke Kok9a799d72007-09-15 14:07:45 -07006184 netdev->features |= NETIF_F_TSO;
Auke Kok9a799d72007-09-15 14:07:45 -07006185 netdev->features |= NETIF_F_TSO6;
Herbert Xu78b6f4c2009-01-18 21:49:45 -08006186 netdev->features |= NETIF_F_GRO;
Jeff Kirsherad31c402008-06-05 04:05:30 -07006187
Jesse Brandeburg45a5ead2009-04-27 22:36:35 +00006188 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
6189 netdev->features |= NETIF_F_SCTP_CSUM;
6190
Jeff Kirsherad31c402008-06-05 04:05:30 -07006191 netdev->vlan_features |= NETIF_F_TSO;
6192 netdev->vlan_features |= NETIF_F_TSO6;
Jesse Brandeburg22f32b7a52008-08-26 04:27:18 -07006193 netdev->vlan_features |= NETIF_F_IP_CSUM;
Alexander Duyckcd1da502009-08-25 04:47:50 +00006194 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
Jeff Kirsherad31c402008-06-05 04:05:30 -07006195 netdev->vlan_features |= NETIF_F_SG;
6196
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006197 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6198 adapter->flags &= ~(IXGBE_FLAG_RSS_ENABLED |
6199 IXGBE_FLAG_DCB_ENABLED);
Alexander Duyck2f90b862008-11-20 20:52:10 -08006200 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
6201 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
6202
Jeff Kirsher7a6b6f52008-11-25 01:02:08 -08006203#ifdef CONFIG_IXGBE_DCB
Alexander Duyck2f90b862008-11-20 20:52:10 -08006204 netdev->dcbnl_ops = &dcbnl_ops;
6205#endif
6206
Yi Zoueacd73f2009-05-13 13:11:06 +00006207#ifdef IXGBE_FCOE
Yi Zou0d551582009-07-22 14:07:12 +00006208 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
Yi Zoueacd73f2009-05-13 13:11:06 +00006209 if (hw->mac.ops.get_device_caps) {
6210 hw->mac.ops.get_device_caps(hw, &device_caps);
Yi Zou0d551582009-07-22 14:07:12 +00006211 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
6212 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
Yi Zoueacd73f2009-05-13 13:11:06 +00006213 }
6214 }
6215#endif /* IXGBE_FCOE */
Auke Kok9a799d72007-09-15 14:07:45 -07006216 if (pci_using_dac)
6217 netdev->features |= NETIF_F_HIGHDMA;
6218
Peter P Waskiewicz Jr0c19d6a2009-07-30 12:25:28 +00006219 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
Alexander Duyckf8212f92009-04-27 22:42:37 +00006220 netdev->features |= NETIF_F_LRO;
6221
Auke Kok9a799d72007-09-15 14:07:45 -07006222 /* make sure the EEPROM is good */
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006223 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
Auke Kok9a799d72007-09-15 14:07:45 -07006224 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
6225 err = -EIO;
6226 goto err_eeprom;
6227 }
6228
6229 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
6230 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
6231
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006232 if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
6233 dev_err(&pdev->dev, "invalid MAC address\n");
Auke Kok9a799d72007-09-15 14:07:45 -07006234 err = -EIO;
6235 goto err_eeprom;
6236 }
6237
6238 init_timer(&adapter->watchdog_timer);
6239 adapter->watchdog_timer.function = &ixgbe_watchdog;
6240 adapter->watchdog_timer.data = (unsigned long)adapter;
6241
6242 INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07006243 INIT_WORK(&adapter->watchdog_task, ixgbe_watchdog_task);
Auke Kok9a799d72007-09-15 14:07:45 -07006244
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08006245 err = ixgbe_init_interrupt_scheme(adapter);
6246 if (err)
6247 goto err_sw_init;
Auke Kok9a799d72007-09-15 14:07:45 -07006248
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006249 switch (pdev->device) {
6250 case IXGBE_DEV_ID_82599_KX4:
Waskiewicz Jr, Peter P495dce12009-04-23 11:15:18 +00006251 adapter->wol = (IXGBE_WUFC_MAG | IXGBE_WUFC_EX |
6252 IXGBE_WUFC_MC | IXGBE_WUFC_BC);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006253 break;
6254 default:
6255 adapter->wol = 0;
6256 break;
6257 }
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006258 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
6259
PJ Waskiewicz04f165e2009-04-09 22:27:57 +00006260 /* pick up the PCI bus settings for reporting later */
6261 hw->mac.ops.get_bus_info(hw);
6262
Auke Kok9a799d72007-09-15 14:07:45 -07006263 /* print bus type/speed/width info */
Johannes Berg7c510e42008-10-27 17:47:26 -07006264 dev_info(&pdev->dev, "(PCI Express:%s:%s) %pM\n",
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006265 ((hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0Gb/s":
6266 (hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5Gb/s":"Unknown"),
6267 ((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "Width x8" :
6268 (hw->bus.width == ixgbe_bus_width_pcie_x4) ? "Width x4" :
6269 (hw->bus.width == ixgbe_bus_width_pcie_x1) ? "Width x1" :
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006270 "Unknown"),
Johannes Berg7c510e42008-10-27 17:47:26 -07006271 netdev->dev_addr);
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006272 ixgbe_read_pba_num_generic(hw, &part_num);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006273 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
6274 dev_info(&pdev->dev, "MAC: %d, PHY: %d, SFP+: %d, PBA No: %06x-%03x\n",
6275 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
6276 (part_num >> 8), (part_num & 0xff));
6277 else
6278 dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
6279 hw->mac.type, hw->phy.type,
6280 (part_num >> 8), (part_num & 0xff));
Auke Kok9a799d72007-09-15 14:07:45 -07006281
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006282 if (hw->bus.width <= ixgbe_bus_width_pcie_x4) {
Auke Kok0c254d82008-02-11 09:25:56 -08006283 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006284 "this card is not sufficient for optimal "
6285 "performance.\n");
Auke Kok0c254d82008-02-11 09:25:56 -08006286 dev_warn(&pdev->dev, "For optimal performance a x8 "
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006287 "PCI-Express slot is required.\n");
Auke Kok0c254d82008-02-11 09:25:56 -08006288 }
6289
Peter P Waskiewicz Jr34b03682009-02-05 23:54:42 -08006290 /* save off EEPROM version number */
6291 hw->eeprom.ops.read(hw, 0x29, &adapter->eeprom_version);
6292
Auke Kok9a799d72007-09-15 14:07:45 -07006293 /* reset the hardware with the new settings */
Peter P Waskiewicz Jr794caeb2009-06-04 16:02:24 +00006294 err = hw->mac.ops.start_hw(hw);
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006295
Peter P Waskiewicz Jr794caeb2009-06-04 16:02:24 +00006296 if (err == IXGBE_ERR_EEPROM_VERSION) {
6297 /* We are running on a pre-production device, log a warning */
6298 dev_warn(&pdev->dev, "This device is a pre-production "
6299 "adapter/LOM. Please be aware there may be issues "
6300 "associated with your hardware. If you are "
6301 "experiencing problems please contact your Intel or "
6302 "hardware representative who provided you with this "
6303 "hardware.\n");
6304 }
Auke Kok9a799d72007-09-15 14:07:45 -07006305 strcpy(netdev->name, "eth%d");
6306 err = register_netdev(netdev);
6307 if (err)
6308 goto err_register;
6309
Jesse Brandeburg54386462009-04-17 20:44:27 +00006310 /* carrier off reporting is important to ethtool even BEFORE open */
6311 netif_carrier_off(netdev);
6312
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006313 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
6314 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
6315 INIT_WORK(&adapter->fdir_reinit_task, ixgbe_fdir_reinit_task);
6316
Jeff Garzik5dd2d332008-10-16 05:09:31 -04006317#ifdef CONFIG_IXGBE_DCA
Denis V. Lunev652f0932008-03-27 14:39:17 +03006318 if (dca_add_requester(&pdev->dev) == 0) {
Jeb Cramerbd0362d2008-03-03 15:04:02 -08006319 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
Jeb Cramerbd0362d2008-03-03 15:04:02 -08006320 ixgbe_setup_dca(adapter);
6321 }
6322#endif
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006323 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
6324 DPRINTK(PROBE, INFO, "IOV is enabled with %d VFs\n",
6325 adapter->num_vfs);
6326 for (i = 0; i < adapter->num_vfs; i++)
6327 ixgbe_vf_configuration(pdev, (i | 0x10000000));
6328 }
6329
PJ Waskiewicz0365e6e2009-05-17 12:32:25 +00006330 /* add san mac addr to netdev */
6331 ixgbe_add_sanmac_netdev(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07006332
6333 dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
6334 cards_found++;
6335 return 0;
6336
6337err_register:
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -08006338 ixgbe_release_hw_control(adapter);
Alexander Duyck7a921c92009-05-06 10:43:28 +00006339 ixgbe_clear_interrupt_scheme(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07006340err_sw_init:
6341err_eeprom:
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006342 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6343 ixgbe_disable_sriov(adapter);
Donald Skidmorec4900be2008-11-20 21:11:42 -08006344 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
6345 del_timer_sync(&adapter->sfp_timer);
6346 cancel_work_sync(&adapter->sfp_task);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006347 cancel_work_sync(&adapter->multispeed_fiber_task);
6348 cancel_work_sync(&adapter->sfp_config_module_task);
Auke Kok9a799d72007-09-15 14:07:45 -07006349 iounmap(hw->hw_addr);
6350err_ioremap:
6351 free_netdev(netdev);
6352err_alloc_etherdev:
gouji-new9ce77662009-05-06 10:44:45 +00006353 pci_release_selected_regions(pdev, pci_select_bars(pdev,
6354 IORESOURCE_MEM));
Auke Kok9a799d72007-09-15 14:07:45 -07006355err_pci_reg:
6356err_dma:
6357 pci_disable_device(pdev);
6358 return err;
6359}
6360
6361/**
6362 * ixgbe_remove - Device Removal Routine
6363 * @pdev: PCI device information struct
6364 *
6365 * ixgbe_remove is called by the PCI subsystem to alert the driver
6366 * that it should release a PCI device. The could be caused by a
6367 * Hot-Plug event, or because the driver is going to be removed from
6368 * memory.
6369 **/
6370static void __devexit ixgbe_remove(struct pci_dev *pdev)
6371{
6372 struct net_device *netdev = pci_get_drvdata(pdev);
6373 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6374
6375 set_bit(__IXGBE_DOWN, &adapter->state);
Donald Skidmorec4900be2008-11-20 21:11:42 -08006376 /* clear the module not found bit to make sure the worker won't
6377 * reschedule
6378 */
6379 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
Auke Kok9a799d72007-09-15 14:07:45 -07006380 del_timer_sync(&adapter->watchdog_timer);
6381
Donald Skidmorec4900be2008-11-20 21:11:42 -08006382 del_timer_sync(&adapter->sfp_timer);
6383 cancel_work_sync(&adapter->watchdog_task);
6384 cancel_work_sync(&adapter->sfp_task);
Mallikarjuna R Chilakala1097cd12010-03-18 14:34:52 +00006385 if (adapter->hw.phy.multispeed_fiber) {
6386 struct ixgbe_hw *hw = &adapter->hw;
6387 /*
6388 * Restart clause 37 autoneg, disable and re-enable
6389 * the tx laser, to clear & alert the link partner
6390 * that it needs to restart autotry
6391 */
6392 hw->mac.autotry_restart = true;
6393 hw->mac.ops.flap_tx_laser(hw);
6394 }
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006395 cancel_work_sync(&adapter->multispeed_fiber_task);
6396 cancel_work_sync(&adapter->sfp_config_module_task);
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006397 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
6398 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
6399 cancel_work_sync(&adapter->fdir_reinit_task);
Auke Kok9a799d72007-09-15 14:07:45 -07006400 flush_scheduled_work();
6401
Jeff Garzik5dd2d332008-10-16 05:09:31 -04006402#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -08006403 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
6404 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
6405 dca_remove_requester(&pdev->dev);
6406 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
6407 }
6408
6409#endif
Yi Zou332d4a72009-05-13 13:11:53 +00006410#ifdef IXGBE_FCOE
6411 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
6412 ixgbe_cleanup_fcoe(adapter);
6413
6414#endif /* IXGBE_FCOE */
PJ Waskiewicz0365e6e2009-05-17 12:32:25 +00006415
6416 /* remove the added san mac */
6417 ixgbe_del_sanmac_netdev(netdev);
6418
Donald Skidmorec4900be2008-11-20 21:11:42 -08006419 if (netdev->reg_state == NETREG_REGISTERED)
6420 unregister_netdev(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07006421
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006422 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6423 ixgbe_disable_sriov(adapter);
6424
Alexander Duyck7a921c92009-05-06 10:43:28 +00006425 ixgbe_clear_interrupt_scheme(adapter);
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -08006426
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08006427 ixgbe_release_hw_control(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07006428
6429 iounmap(adapter->hw.hw_addr);
gouji-new9ce77662009-05-06 10:44:45 +00006430 pci_release_selected_regions(pdev, pci_select_bars(pdev,
6431 IORESOURCE_MEM));
Auke Kok9a799d72007-09-15 14:07:45 -07006432
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08006433 DPRINTK(PROBE, INFO, "complete\n");
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08006434
Auke Kok9a799d72007-09-15 14:07:45 -07006435 free_netdev(netdev);
6436
Frans Pop19d5afd2009-10-02 10:04:12 -07006437 pci_disable_pcie_error_reporting(pdev);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08006438
Auke Kok9a799d72007-09-15 14:07:45 -07006439 pci_disable_device(pdev);
6440}
6441
6442/**
6443 * ixgbe_io_error_detected - called when PCI error is detected
6444 * @pdev: Pointer to PCI device
6445 * @state: The current pci connection state
6446 *
6447 * This function is called after a PCI bus error affecting
6448 * this device has been detected.
6449 */
6450static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006451 pci_channel_state_t state)
Auke Kok9a799d72007-09-15 14:07:45 -07006452{
6453 struct net_device *netdev = pci_get_drvdata(pdev);
Wang Chen454d7c92008-11-12 23:37:49 -08006454 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07006455
6456 netif_device_detach(netdev);
6457
Breno Leitao3044b8d2009-05-06 10:44:26 +00006458 if (state == pci_channel_io_perm_failure)
6459 return PCI_ERS_RESULT_DISCONNECT;
6460
Auke Kok9a799d72007-09-15 14:07:45 -07006461 if (netif_running(netdev))
6462 ixgbe_down(adapter);
6463 pci_disable_device(pdev);
6464
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006465 /* Request a slot reset. */
Auke Kok9a799d72007-09-15 14:07:45 -07006466 return PCI_ERS_RESULT_NEED_RESET;
6467}
6468
6469/**
6470 * ixgbe_io_slot_reset - called after the pci bus has been reset.
6471 * @pdev: Pointer to PCI device
6472 *
6473 * Restart the card from scratch, as if from a cold-boot.
6474 */
6475static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
6476{
6477 struct net_device *netdev = pci_get_drvdata(pdev);
Wang Chen454d7c92008-11-12 23:37:49 -08006478 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08006479 pci_ers_result_t result;
6480 int err;
Auke Kok9a799d72007-09-15 14:07:45 -07006481
gouji-new9ce77662009-05-06 10:44:45 +00006482 if (pci_enable_device_mem(pdev)) {
Auke Kok9a799d72007-09-15 14:07:45 -07006483 DPRINTK(PROBE, ERR,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006484 "Cannot re-enable PCI device after reset.\n");
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08006485 result = PCI_ERS_RESULT_DISCONNECT;
6486 } else {
6487 pci_set_master(pdev);
6488 pci_restore_state(pdev);
Breno Leitaoc0e1f682009-11-10 08:37:47 +00006489 pci_save_state(pdev);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08006490
Don Skidmoredd4d8ca2009-04-29 00:22:31 -07006491 pci_wake_from_d3(pdev, false);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08006492
6493 ixgbe_reset(adapter);
PJ Waskiewicz88512532009-03-13 22:15:10 +00006494 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08006495 result = PCI_ERS_RESULT_RECOVERED;
Auke Kok9a799d72007-09-15 14:07:45 -07006496 }
Auke Kok9a799d72007-09-15 14:07:45 -07006497
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08006498 err = pci_cleanup_aer_uncorrect_error_status(pdev);
6499 if (err) {
6500 dev_err(&pdev->dev,
6501 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", err);
6502 /* non-fatal, continue */
6503 }
Auke Kok9a799d72007-09-15 14:07:45 -07006504
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08006505 return result;
Auke Kok9a799d72007-09-15 14:07:45 -07006506}
6507
6508/**
6509 * ixgbe_io_resume - called when traffic can start flowing again.
6510 * @pdev: Pointer to PCI device
6511 *
6512 * This callback is called when the error recovery driver tells us that
6513 * its OK to resume normal operation.
6514 */
6515static void ixgbe_io_resume(struct pci_dev *pdev)
6516{
6517 struct net_device *netdev = pci_get_drvdata(pdev);
Wang Chen454d7c92008-11-12 23:37:49 -08006518 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07006519
6520 if (netif_running(netdev)) {
6521 if (ixgbe_up(adapter)) {
6522 DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
6523 return;
6524 }
6525 }
6526
6527 netif_device_attach(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07006528}
6529
6530static struct pci_error_handlers ixgbe_err_handler = {
6531 .error_detected = ixgbe_io_error_detected,
6532 .slot_reset = ixgbe_io_slot_reset,
6533 .resume = ixgbe_io_resume,
6534};
6535
6536static struct pci_driver ixgbe_driver = {
6537 .name = ixgbe_driver_name,
6538 .id_table = ixgbe_pci_tbl,
6539 .probe = ixgbe_probe,
6540 .remove = __devexit_p(ixgbe_remove),
6541#ifdef CONFIG_PM
6542 .suspend = ixgbe_suspend,
6543 .resume = ixgbe_resume,
6544#endif
6545 .shutdown = ixgbe_shutdown,
6546 .err_handler = &ixgbe_err_handler
6547};
6548
6549/**
6550 * ixgbe_init_module - Driver Registration Routine
6551 *
6552 * ixgbe_init_module is the first routine called when the driver is
6553 * loaded. All it does is register with the PCI subsystem.
6554 **/
6555static int __init ixgbe_init_module(void)
6556{
6557 int ret;
6558 printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
6559 ixgbe_driver_string, ixgbe_driver_version);
6560
6561 printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
6562
Jeff Garzik5dd2d332008-10-16 05:09:31 -04006563#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -08006564 dca_register_notify(&dca_notifier);
Jeb Cramerbd0362d2008-03-03 15:04:02 -08006565#endif
Jeff Garzik5dd2d332008-10-16 05:09:31 -04006566
Auke Kok9a799d72007-09-15 14:07:45 -07006567 ret = pci_register_driver(&ixgbe_driver);
6568 return ret;
6569}
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006570
Auke Kok9a799d72007-09-15 14:07:45 -07006571module_init(ixgbe_init_module);
6572
6573/**
6574 * ixgbe_exit_module - Driver Exit Cleanup Routine
6575 *
6576 * ixgbe_exit_module is called just before the driver is removed
6577 * from memory.
6578 **/
6579static void __exit ixgbe_exit_module(void)
6580{
Jeff Garzik5dd2d332008-10-16 05:09:31 -04006581#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -08006582 dca_unregister_notify(&dca_notifier);
6583#endif
Auke Kok9a799d72007-09-15 14:07:45 -07006584 pci_unregister_driver(&ixgbe_driver);
6585}
Jeb Cramerbd0362d2008-03-03 15:04:02 -08006586
Jeff Garzik5dd2d332008-10-16 05:09:31 -04006587#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -08006588static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006589 void *p)
Jeb Cramerbd0362d2008-03-03 15:04:02 -08006590{
6591 int ret_val;
6592
6593 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006594 __ixgbe_notify_dca);
Jeb Cramerbd0362d2008-03-03 15:04:02 -08006595
6596 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6597}
Jeb Cramerbd0362d2008-03-03 15:04:02 -08006598
Alexander Duyckb4533682009-03-31 21:32:42 +00006599#endif /* CONFIG_IXGBE_DCA */
6600#ifdef DEBUG
6601/**
6602 * ixgbe_get_hw_dev_name - return device name string
6603 * used by hardware layer to print debugging information
6604 **/
6605char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
6606{
6607 struct ixgbe_adapter *adapter = hw->back;
6608 return adapter->netdev->name;
6609}
6610
6611#endif
Auke Kok9a799d72007-09-15 14:07:45 -07006612module_exit(ixgbe_exit_module);
6613
6614/* ixgbe_main.c */