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gerrit-public.fairphone.software / kernel / msm-5.4 / ff8ce5f67ddca709fe59e6173f89260f0fdc2b22 / . / arch / m68k / platform / 520x / config.c
blob: 09df4b89e8be1ee04711df00fb715037edc473d7 [file] [log] [blame]
Greg Ungerer88a605b2005-11-07 14:09:50 +1000[diff] [blame]1/***************************************************************************/
2
3/*
4 * linux/arch/m68knommu/platform/520x/config.c
5 *
6 * Copyright (C) 2005, Freescale (www.freescale.com)
7 * Copyright (C) 2005, Intec Automation (mike@steroidmicros.com)
Greg Ungerer7dabb9a2008-02-01 17:34:10 +1000[diff] [blame]8 * Copyright (C) 1999-2007, Greg Ungerer (gerg@snapgear.com)
Greg Ungerer88a605b2005-11-07 14:09:50 +1000[diff] [blame]9 * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
10 */
11
12/***************************************************************************/
13
Greg Ungerer88a605b2005-11-07 14:09:50 +1000[diff] [blame]14#include <linux/kernel.h>
15#include <linux/param.h>
Greg Ungerer7dabb9a2008-02-01 17:34:10 +1000[diff] [blame]16#include <linux/init.h>
Greg Ungerer7dabb9a2008-02-01 17:34:10 +1000[diff] [blame]17#include <linux/io.h>
Greg Ungerer88a605b2005-11-07 14:09:50 +1000[diff] [blame]18#include <asm/machdep.h>
Greg Ungerer7dabb9a2008-02-01 17:34:10 +1000[diff] [blame]19#include <asm/coldfire.h>
20#include <asm/mcfsim.h>
21#include <asm/mcfuart.h>
Greg Ungerer88a605b2005-11-07 14:09:50 +1000[diff] [blame]22
23/***************************************************************************/
24
Steven King83ca6002012-05-06 12:22:53 -0700[diff] [blame]25#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
Steven King91d60412010-01-22 12:43:03 -0800[diff] [blame]26
27static void __init m520x_qspi_init(void)
28{
29 u16 par;
30 /* setup Port QS for QSPI with gpio CS control */
Greg Ungerer571f0602011-03-05 23:50:37 +1000[diff] [blame]31 writeb(0x3f, MCF_GPIO_PAR_QSPI);
Steven King91d60412010-01-22 12:43:03 -0800[diff] [blame]32 /* make U1CTS and U2RTS gpio for cs_control */
Greg Ungerer571f0602011-03-05 23:50:37 +1000[diff] [blame]33 par = readw(MCF_GPIO_PAR_UART);
Steven King91d60412010-01-22 12:43:03 -0800[diff] [blame]34 par &= 0x00ff;
Greg Ungerer571f0602011-03-05 23:50:37 +1000[diff] [blame]35 writew(par, MCF_GPIO_PAR_UART);
Steven King91d60412010-01-22 12:43:03 -0800[diff] [blame]36}
Steven King91d60412010-01-22 12:43:03 -0800[diff] [blame]37
Steven King83ca6002012-05-06 12:22:53 -0700[diff] [blame]38#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
Greg Ungerer7dabb9a2008-02-01 17:34:10 +1000[diff] [blame]39
40/***************************************************************************/
41
Greg Ungererb92225c2011-12-24 00:53:54 +1000[diff] [blame]42static void __init m520x_uarts_init(void)
Greg Ungerer7dabb9a2008-02-01 17:34:10 +1000[diff] [blame]43{
Greg Ungerer7dabb9a2008-02-01 17:34:10 +1000[diff] [blame]44 u16 par;
45 u8 par2;
46
Greg Ungererb92225c2011-12-24 00:53:54 +1000[diff] [blame]47 /* UART0 and UART1 GPIO pin setup */
48 par = readw(MCF_GPIO_PAR_UART);
49 par |= MCF_GPIO_PAR_UART_PAR_UTXD0 | MCF_GPIO_PAR_UART_PAR_URXD0;
50 par |= MCF_GPIO_PAR_UART_PAR_UTXD1 | MCF_GPIO_PAR_UART_PAR_URXD1;
51 writew(par, MCF_GPIO_PAR_UART);
Greg Ungerer7dabb9a2008-02-01 17:34:10 +1000[diff] [blame]52
Greg Ungererb92225c2011-12-24 00:53:54 +1000[diff] [blame]53 /* UART1 GPIO pin setup */
54 par2 = readb(MCF_GPIO_PAR_FECI2C);
55 par2 &= ~0x0F;
56 par2 |= MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 |
57 MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2;
58 writeb(par2, MCF_GPIO_PAR_FECI2C);
Greg Ungerer7dabb9a2008-02-01 17:34:10 +1000[diff] [blame]59}
60
61/***************************************************************************/
62
Greg Ungererffba3f42009-02-26 22:40:38 -0800[diff] [blame]63static void __init m520x_fec_init(void)
64{
Greg Ungererffba3f42009-02-26 22:40:38 -0800[diff] [blame]65 u8 v;
66
Greg Ungererffba3f42009-02-26 22:40:38 -0800[diff] [blame]67 /* Set multi-function pins to ethernet mode */
Greg Ungerer571f0602011-03-05 23:50:37 +1000[diff] [blame]68 v = readb(MCF_GPIO_PAR_FEC);
69 writeb(v | 0xf0, MCF_GPIO_PAR_FEC);
Greg Ungererffba3f42009-02-26 22:40:38 -0800[diff] [blame]70
Greg Ungerer571f0602011-03-05 23:50:37 +1000[diff] [blame]71 v = readb(MCF_GPIO_PAR_FECI2C);
72 writeb(v | 0x0f, MCF_GPIO_PAR_FECI2C);
Greg Ungererffba3f42009-02-26 22:40:38 -0800[diff] [blame]73}
74
75/***************************************************************************/
76
Greg Ungerer7dabb9a2008-02-01 17:34:10 +1000[diff] [blame]77void __init config_BSP(char *commandp, int size)
Greg Ungerer88a605b2005-11-07 14:09:50 +1000[diff] [blame]78{
Greg Ungerer35aefb22012-01-23 15:34:58 +1000[diff] [blame]79 mach_sched_init = hw_timer_init;
Greg Ungerer7dabb9a2008-02-01 17:34:10 +1000[diff] [blame]80 m520x_uarts_init();
Greg Ungererffba3f42009-02-26 22:40:38 -0800[diff] [blame]81 m520x_fec_init();
Steven King83ca6002012-05-06 12:22:53 -0700[diff] [blame]82#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
Steven King91d60412010-01-22 12:43:03 -0800[diff] [blame]83 m520x_qspi_init();
84#endif
Greg Ungerer88a605b2005-11-07 14:09:50 +1000[diff] [blame]85}
86
87/***************************************************************************/