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Quinn Jensen52c543f2007-07-09 22:06:53 +01001/*
Anson Huangdf595742014-01-17 11:39:05 +08002 * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
Quinn Jensen52c543f2007-07-09 22:06:53 +01003 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_MXC_COMMON_H__
12#define __ASM_ARCH_MXC_COMMON_H__
13
Robin Holt7b6d8642013-07-08 16:01:40 -070014#include <linux/reboot.h>
15
Shawn Guod48866f2013-10-16 19:52:00 +080016struct irq_data;
Sascha Hauer282b13d2008-09-09 10:19:40 +020017struct platform_device;
Shawn Guo009e63f2013-05-08 21:05:53 +080018struct pt_regs;
Sascha Hauer30c730f2009-02-16 14:36:49 +010019struct clk;
Gilles Chanteperdrix876292d2014-04-05 17:57:45 +020020struct device_node;
Shawn Guoa1f1c7e2011-09-06 15:08:40 +080021enum mxc_cpu_pwr_mode;
Sascha Hauer282b13d2008-09-09 10:19:40 +020022
Shawn Guo803648d2013-10-16 21:05:35 +080023void mx1_map_io(void);
24void mx21_map_io(void);
25void mx25_map_io(void);
26void mx27_map_io(void);
27void mx31_map_io(void);
28void mx35_map_io(void);
29void mx51_map_io(void);
30void mx53_map_io(void);
31void imx1_init_early(void);
32void imx21_init_early(void);
33void imx25_init_early(void);
34void imx27_init_early(void);
35void imx31_init_early(void);
36void imx35_init_early(void);
37void imx51_init_early(void);
38void imx53_init_early(void);
39void mxc_init_irq(void __iomem *);
Shawn Guofffa0512014-05-19 20:19:06 +080040void tzic_init_irq(void);
Shawn Guo803648d2013-10-16 21:05:35 +080041void mx1_init_irq(void);
42void mx21_init_irq(void);
43void mx25_init_irq(void);
44void mx27_init_irq(void);
45void mx31_init_irq(void);
46void mx35_init_irq(void);
Shawn Guo803648d2013-10-16 21:05:35 +080047void imx1_soc_init(void);
48void imx21_soc_init(void);
49void imx25_soc_init(void);
50void imx27_soc_init(void);
51void imx31_soc_init(void);
52void imx35_soc_init(void);
53void imx51_soc_init(void);
54void imx51_init_late(void);
55void imx53_init_late(void);
56void epit_timer_init(void __iomem *base, int irq);
57void mxc_timer_init(void __iomem *, int);
Gilles Chanteperdrix876292d2014-04-05 17:57:45 +020058void mxc_timer_init_dt(struct device_node *);
Shawn Guo803648d2013-10-16 21:05:35 +080059int mx1_clocks_init(unsigned long fref);
60int mx21_clocks_init(unsigned long lref, unsigned long fref);
61int mx25_clocks_init(void);
62int mx27_clocks_init(unsigned long fref);
63int mx31_clocks_init(unsigned long fref);
64int mx35_clocks_init(void);
Shawn Guo803648d2013-10-16 21:05:35 +080065int mx25_clocks_init_dt(void);
66int mx27_clocks_init_dt(void);
67int mx31_clocks_init_dt(void);
68struct platform_device *mxc_register_gpio(char *name, int id,
Shawn Guob78d8e52011-06-06 00:07:55 +080069 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
Shawn Guo803648d2013-10-16 21:05:35 +080070void mxc_set_cpu_type(unsigned int type);
71void mxc_restart(enum reboot_mode, const char *);
72void mxc_arch_reset_init(void __iomem *);
73void mxc_arch_reset_init_dt(void);
74int mx53_revision(void);
75void imx_set_aips(void __iomem *);
76int mxc_device_init(void);
Shawn Guobfefdff2013-08-13 13:54:02 +080077void imx_set_soc_revision(unsigned int rev);
78unsigned int imx_get_soc_revision(void);
Shawn Guof1c6f312013-08-13 14:59:43 +080079void imx_init_revision_from_anatop(void);
Shawn Guoa2887542013-08-13 16:59:28 +080080struct device *imx_soc_device_init(void);
Shawn Guo73d2b4c2011-10-17 08:42:16 +080081
Shawn Guo41e7daf2011-09-28 17:16:06 +080082enum mxc_cpu_pwr_mode {
83 WAIT_CLOCKED, /* wfi only */
84 WAIT_UNCLOCKED, /* WAIT */
85 WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
86 STOP_POWER_ON, /* just STOP */
87 STOP_POWER_OFF, /* STOP + SRPG */
88};
89
Fabio Estevam3ac804e2012-02-02 20:02:32 -020090enum mx3_cpu_pwr_mode {
91 MX3_RUN,
92 MX3_WAIT,
93 MX3_DOZE,
94 MX3_SLEEP,
95};
96
Shawn Guo803648d2013-10-16 21:05:35 +080097void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
98void imx_print_silicon_rev(const char *cpu, int srev);
Sascha Hauerb6de9432011-09-20 14:28:17 +020099
Shawn Guo803648d2013-10-16 21:05:35 +0800100void imx_enable_cpu(int cpu, bool enable);
101void imx_set_cpu_jump(int cpu, void *jump_addr);
102u32 imx_get_cpu_arg(int cpu);
103void imx_set_cpu_arg(int cpu, u32 arg);
Shawn Guo69c31b72011-09-06 14:59:40 +0800104#ifdef CONFIG_SMP
Shawn Guo803648d2013-10-16 21:05:35 +0800105void v7_secondary_startup(void);
106void imx_scu_map_io(void);
107void imx_smp_prepare(void);
108void imx_scu_standby_enable(void);
Shawn Guo13eed982011-09-06 15:05:25 +0800109#else
110static inline void imx_scu_map_io(void) {}
Shawn Guoa1f1c7e2011-09-06 15:08:40 +0800111static inline void imx_smp_prepare(void) {}
Shawn Guoe5f9dec2012-12-04 22:55:15 +0800112static inline void imx_scu_standby_enable(void) {}
Shawn Guo69c31b72011-09-06 14:59:40 +0800113#endif
Shawn Guo803648d2013-10-16 21:05:35 +0800114void imx_src_init(void);
Shawn Guo803648d2013-10-16 21:05:35 +0800115void imx_gpc_init(void);
116void imx_gpc_pre_suspend(void);
117void imx_gpc_post_resume(void);
118void imx_gpc_mask_all(void);
119void imx_gpc_restore_all(void);
Shawn Guod48866f2013-10-16 19:52:00 +0800120void imx_gpc_irq_mask(struct irq_data *d);
121void imx_gpc_irq_unmask(struct irq_data *d);
Shawn Guo803648d2013-10-16 21:05:35 +0800122void imx_anatop_init(void);
123void imx_anatop_pre_suspend(void);
124void imx_anatop_post_resume(void);
125int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
Fabio Estevamfa6be652014-01-07 08:00:40 -0200126void imx6q_set_int_mem_clk_lpm(void);
Anson Huang751f7e92014-01-09 16:03:16 +0800127void imx6sl_set_wait_clk(bool enter);
Eric Miao46ec1b22011-12-21 22:38:23 +0800128
Shawn Guo803648d2013-10-16 21:05:35 +0800129void imx_cpu_die(unsigned int cpu);
130int imx_cpu_kill(unsigned int cpu);
Marc Zyngiere4f2d972011-09-08 13:15:22 +0100131
Shawn Guoc356bdb2014-02-26 19:48:33 +0800132#ifdef CONFIG_SUSPEND
133void v7_cpu_resume(void);
Anson Huangdf595742014-01-17 11:39:05 +0800134void imx6_suspend(void __iomem *ocram_vbase);
Shawn Guoc356bdb2014-02-26 19:48:33 +0800135#else
136static inline void v7_cpu_resume(void) {}
137static inline void imx6_suspend(void __iomem *ocram_vbase) {}
138#endif
139
Shawn Guo803648d2013-10-16 21:05:35 +0800140void imx6q_pm_init(void);
Anson Huangdf595742014-01-17 11:39:05 +0800141void imx6dl_pm_init(void);
142void imx6sl_pm_init(void);
Shawn Guo9e8147b2013-09-25 23:09:36 +0800143void imx6q_pm_set_ccm_base(void __iomem *base);
Anson Huangdf595742014-01-17 11:39:05 +0800144
Shawn Guo28a9f3b2014-02-18 10:35:05 +0800145#ifdef CONFIG_PM
Shawn Guo803648d2013-10-16 21:05:35 +0800146void imx5_pm_init(void);
Eric Miao46ec1b22011-12-21 22:38:23 +0800147#else
Fabio Estevam547dd1e2013-07-26 00:17:36 -0300148static inline void imx5_pm_init(void) {}
Eric Miao46ec1b22011-12-21 22:38:23 +0800149#endif
150
Shawn Guo8321b752012-04-26 11:42:34 +0800151#ifdef CONFIG_NEON
Shawn Guo803648d2013-10-16 21:05:35 +0800152int mx51_neon_fixup(void);
Shawn Guo8321b752012-04-26 11:42:34 +0800153#else
154static inline int mx51_neon_fixup(void) { return 0; }
155#endif
156
Shawn Guoe6a07562013-07-08 21:45:20 +0800157#ifdef CONFIG_CACHE_L2X0
Shawn Guo803648d2013-10-16 21:05:35 +0800158void imx_init_l2cache(void);
Shawn Guoe6a07562013-07-08 21:45:20 +0800159#else
160static inline void imx_init_l2cache(void) {}
161#endif
162
Marc Zyngiere4f2d972011-09-08 13:15:22 +0100163extern struct smp_operations imx_smp_ops;
164
Quinn Jensen52c543f2007-07-09 22:06:53 +0100165#endif