| #include <dt-bindings/clock/qcom,rpmh.h> |
| #include <dt-bindings/iio/qcom,spmi-vadc.h> |
| #include <dt-bindings/input/qcom,qpnp-power-on.h> |
| #include <dt-bindings/input/input.h> |
| #include <dt-bindings/interrupt-controller/irq.h> |
| #include <dt-bindings/spmi/spmi.h> |
| |
| |
| &spmi_bus { |
| #address-cells = <2>; |
| #size-cells = <0>; |
| interrupt-controller; |
| #interrupt-cells = <4>; |
| |
| qcom,pm8540@0 { |
| compatible = "qcom,spmi-pmic"; |
| reg = <0 SPMI_USID>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| pm8540_1_tz: qcom,temp-alarm@2400 { |
| compatible = "qcom,spmi-temp-alarm"; |
| reg = <0x2400>; |
| interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; |
| io-channels = <&pm8540_1_vadc ADC5_DIE_TEMP>; |
| io-channel-names = "thermal"; |
| #thermal-sensor-cells = <0>; |
| }; |
| |
| pm8540_1_vadc: vadc@3100 { |
| compatible = "qcom,spmi-adc5"; |
| reg = <0x3100>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "eoc-int-en-set"; |
| #io-channel-cells = <1>; |
| io-channel-ranges; |
| |
| /* Channel node */ |
| ref_gnd { |
| reg = <ADC5_REF_GND>; |
| label = "ref_gnd"; |
| qcom,pre-scaling = <1 1>; |
| }; |
| |
| vref_1p25 { |
| reg = <ADC5_1P25VREF>; |
| label = "vref_1p25"; |
| qcom,pre-scaling = <1 1>; |
| }; |
| |
| die_temp { |
| reg = <ADC5_DIE_TEMP>; |
| label = "die_temp"; |
| qcom,pre-scaling = <1 1>; |
| }; |
| }; |
| |
| qcom,power-on@800 { |
| compatible = "qcom,qpnp-power-on"; |
| reg = <0x800>; |
| interrupts = <0x0 0x8 0x0 IRQ_TYPE_NONE>, |
| <0x0 0x8 0x1 IRQ_TYPE_NONE>; |
| interrupt-names = "kpdpwr", "resin"; |
| qcom,pon-dbc-delay = <15625>; |
| qcom,kpdpwr-sw-debounce; |
| qcom,system-reset; |
| qcom,store-hard-reset-reason; |
| |
| qcom,pon_1 { |
| qcom,pon-type = <PON_POWER_ON_TYPE_KPDPWR>; |
| qcom,pull-up; |
| linux,code = <KEY_POWER>; |
| }; |
| |
| qcom,pon_2 { |
| qcom,pon-type = <PON_POWER_ON_TYPE_RESIN>; |
| qcom,pull-up; |
| linux,code = <KEY_VOLUMEDOWN>; |
| }; |
| }; |
| |
| pm8540_1_clkdiv: clock-controller@5b00 { |
| compatible = "qcom,spmi-clkdiv"; |
| reg = <0x5b00>; |
| #clock-cells = <1>; |
| qcom,num-clkdivs = <2>; |
| clock-output-names = "pm8540_1_div_clk1", |
| "pm8540_1_div_clk2"; |
| clocks = <&rpmhcc RPMH_CXO_CLK>; |
| clock-names = "xo"; |
| }; |
| |
| pm8540_1_rtc: qcom,pm8540_1_rtc { |
| compatible = "qcom,pm8941-rtc"; |
| reg = <0x6000>, <0x6100>; |
| reg-names = "rtc", "alarm"; |
| interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; |
| }; |
| |
| pm8540_1_gpios: pinctrl@c000 { |
| compatible = "qcom,pm8150-gpio"; |
| reg = <0xc000>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| |
| pm8540_1_sdam_2: sdam@b100 { |
| compatible = "qcom,spmi-sdam"; |
| reg = <0xb100>; |
| }; |
| |
| }; |
| |
| qcom,pm8540@1 { |
| compatible ="qcom,spmi-pmic"; |
| reg = <1 SPMI_USID>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| /* below definitions are for the second instance of pm8540 */ |
| qcom,pm8540@4 { |
| compatible = "qcom,spmi-pmic"; |
| reg = <4 SPMI_USID>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| pm8540_2_tz: qcom,temp-alarm@2400 { |
| compatible = "qcom,spmi-temp-alarm"; |
| reg = <0x2400>; |
| interrupts = <0x4 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; |
| io-channels = <&pm8540_2_vadc ADC5_DIE_TEMP>; |
| io-channel-names = "thermal"; |
| #thermal-sensor-cells = <0>; |
| }; |
| |
| pm8540_2_vadc: vadc@3100 { |
| compatible = "qcom,spmi-adc5"; |
| reg = <0x3100>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| interrupts = <0x4 0x31 0x0 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "eoc-int-en-set"; |
| #io-channel-cells = <1>; |
| io-channel-ranges; |
| |
| /* Channel node */ |
| ref_gnd { |
| reg = <ADC5_REF_GND>; |
| label = "ref_gnd"; |
| qcom,pre-scaling = <1 1>; |
| }; |
| |
| vref_1p25 { |
| reg = <ADC5_1P25VREF>; |
| label = "vref_1p25"; |
| qcom,pre-scaling = <1 1>; |
| }; |
| |
| die_temp { |
| reg = <ADC5_DIE_TEMP>; |
| label = "die_temp"; |
| qcom,pre-scaling = <1 1>; |
| }; |
| }; |
| |
| qcom,power-on@800 { |
| compatible = "qcom,qpnp-power-on"; |
| reg = <0x800>; |
| }; |
| |
| pm8540_2_clkdiv: clock-controller@5b00 { |
| compatible = "qcom,spmi-clkdiv"; |
| reg = <0x5b00>; |
| #clock-cells = <1>; |
| qcom,num-clkdivs = <2>; |
| clock-output-names = "pm8540_2_div_clk1", |
| "pm8540_2_div_clk2"; |
| clocks = <&rpmhcc RPMH_CXO_CLK>; |
| clock-names = "xo"; |
| status = "disabled"; |
| }; |
| |
| pm8540_2_gpios: pinctrl@c000 { |
| compatible = "qcom,pm8150-gpio"; |
| reg = <0xc000>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| }; |
| |
| qcom,pm8540@5 { |
| compatible ="qcom,spmi-pmic"; |
| reg = <5 SPMI_USID>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| /* below definitions are for the third instance of pm8540 */ |
| qcom,pm8540@8 { |
| compatible = "qcom,spmi-pmic"; |
| reg = <8 SPMI_USID>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| pm8540_3_tz: qcom,temp-alarm@2400 { |
| compatible = "qcom,spmi-temp-alarm"; |
| reg = <0x2400>; |
| interrupts = <0x8 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; |
| io-channels = <&pm8540_3_vadc ADC5_DIE_TEMP>; |
| io-channel-names = "thermal"; |
| #thermal-sensor-cells = <0>; |
| }; |
| |
| pm8540_3_vadc: vadc@3100 { |
| compatible = "qcom,spmi-adc5"; |
| reg = <0x3100>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| interrupts = <0x8 0x31 0x0 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "eoc-int-en-set"; |
| #io-channel-cells = <1>; |
| io-channel-ranges; |
| |
| /* Channel node */ |
| ref_gnd { |
| reg = <ADC5_REF_GND>; |
| label = "ref_gnd"; |
| qcom,pre-scaling = <1 1>; |
| }; |
| |
| vref_1p25 { |
| reg = <ADC5_1P25VREF>; |
| label = "vref_1p25"; |
| qcom,pre-scaling = <1 1>; |
| }; |
| |
| die_temp { |
| reg = <ADC5_DIE_TEMP>; |
| label = "die_temp"; |
| qcom,pre-scaling = <1 1>; |
| }; |
| }; |
| |
| qcom,power-on@800 { |
| compatible = "qcom,qpnp-power-on"; |
| reg = <0x800>; |
| }; |
| |
| pm8540_3_clkdiv: clock-controller@5b00 { |
| compatible = "qcom,spmi-clkdiv"; |
| reg = <0x5b00>; |
| #clock-cells = <1>; |
| qcom,num-clkdivs = <2>; |
| clock-output-names = "pm8540_3_div_clk1", |
| "pm8540_3_div_clk2"; |
| clocks = <&rpmhcc RPMH_CXO_CLK>; |
| clock-names = "xo"; |
| status = "disabled"; |
| }; |
| |
| pm8540_3_gpios: pinctrl@c000 { |
| compatible = "qcom,pm8150-gpio"; |
| reg = <0xc000>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| }; |
| |
| qcom,pm8540@9 { |
| compatible ="qcom,spmi-pmic"; |
| reg = <9 SPMI_USID>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| /* below definitions are for the forth instance of pm8540 */ |
| qcom,pm8540@C { |
| compatible = "qcom,spmi-pmic"; |
| reg = <12 SPMI_USID>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| pm8540_4_tz: qcom,temp-alarm@2400 { |
| compatible = "qcom,spmi-temp-alarm"; |
| reg = <0x2400>; |
| interrupts = <0xC 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; |
| io-channels = <&pm8540_4_vadc ADC5_DIE_TEMP>; |
| io-channel-names = "thermal"; |
| #thermal-sensor-cells = <0>; |
| }; |
| |
| pm8540_4_vadc: vadc@3100 { |
| compatible = "qcom,spmi-adc5"; |
| reg = <0x3100>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| interrupts = <0xC 0x31 0x0 IRQ_TYPE_EDGE_RISING>; |
| interrupt-names = "eoc-int-en-set"; |
| #io-channel-cells = <1>; |
| io-channel-ranges; |
| |
| /* Channel node */ |
| ref_gnd { |
| reg = <ADC5_REF_GND>; |
| label = "ref_gnd"; |
| qcom,pre-scaling = <1 1>; |
| }; |
| |
| vref_1p25 { |
| reg = <ADC5_1P25VREF>; |
| label = "vref_1p25"; |
| qcom,pre-scaling = <1 1>; |
| }; |
| |
| die_temp { |
| reg = <ADC5_DIE_TEMP>; |
| label = "die_temp"; |
| qcom,pre-scaling = <1 1>; |
| }; |
| }; |
| |
| qcom,power-on@800 { |
| compatible = "qcom,qpnp-power-on"; |
| reg = <0x800>; |
| }; |
| |
| pm8540_4_clkdiv: clock-controller@5b00 { |
| compatible = "qcom,spmi-clkdiv"; |
| reg = <0x5b00>; |
| #clock-cells = <1>; |
| qcom,num-clkdivs = <2>; |
| clock-output-names = "pm8540_4_div_clk1", |
| "pm8540_4_div_clk2"; |
| clocks = <&rpmhcc RPMH_CXO_CLK>; |
| clock-names = "xo"; |
| status = "disabled"; |
| }; |
| |
| pm8540_4_gpios: pinctrl@c000 { |
| compatible = "qcom,pm8150-gpio"; |
| reg = <0xc000>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| }; |
| |
| qcom,pm8540@D { |
| compatible ="qcom,spmi-pmic"; |
| reg = <13 SPMI_USID>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| }; |