blob: ca21facef1679ac00f3c841c2dab1d36b152ffeb [file] [log] [blame]
/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/platform_device.h>
#include <linux/bootmem.h>
#include <asm/mach-types.h>
#include <mach/msm_bus_board.h>
#include <mach/board.h>
#include <mach/gpio.h>
#include <mach/gpiomux.h>
#include <mach/socinfo.h>
#include "devices.h"
#include "board-8930.h"
#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
#define MSM_FB_PRIM_BUF_SIZE (1376 * 768 * 4 * 3) /* 4 bpp x 3 pages */
#else
#define MSM_FB_PRIM_BUF_SIZE (1376 * 768 * 4 * 2) /* 4 bpp x 2 pages */
#endif
#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
#define MSM_FB_EXT_BUF_SIZE (1920 * 1088 * 2 * 1) /* 2 bpp x 1 page */
#elif defined(CONFIG_FB_MSM_TVOUT)
#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
#else
#define MSM_FB_EXT_BUF_SIZE 0
#endif
#ifdef CONFIG_FB_MSM_OVERLAY_WRITEBACK
/* width x height x 3 bpp x 2 frame buffer */
#define MSM_FB_WRITEBACK_SIZE (1376 * 768 * 3 * 2)
#define MSM_FB_WRITEBACK_OFFSET \
(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE)
#else
#define MSM_FB_WRITEBACK_SIZE 0
#define MSM_FB_WRITEBACK_OFFSET 0
#endif
#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
/* 4 bpp x 2 page HDMI case */
#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
#else
/* Note: must be multiple of 4096 */
#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
MSM_FB_WRITEBACK_SIZE, 4096)
#endif
#define MDP_VSYNC_GPIO 0
#define PANEL_NAME_MAX_LEN 30
#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
#define MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME "mipi_video_toshiba_wsvga"
#define MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME "mipi_video_chimei_wxga"
#define MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME "mipi_video_simulator_vga"
#define MIPI_CMD_RENESAS_FWVGA_PANEL_NAME "mipi_cmd_renesas_fwvga"
#define HDMI_PANEL_NAME "hdmi_msm"
#define TVOUT_PANEL_NAME "tvout_msm"
static int writeback_offset(void)
{
return MSM_FB_WRITEBACK_OFFSET;
}
static struct resource msm_fb_resources[] = {
{
.flags = IORESOURCE_DMA,
}
};
static int msm_fb_detect_panel(const char *name)
{
if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
strnlen(MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
PANEL_NAME_MAX_LEN)))
return 0;
#ifndef CONFIG_FB_MSM_MIPI_PANEL_DETECT
if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
PANEL_NAME_MAX_LEN)))
return 0;
if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
PANEL_NAME_MAX_LEN)))
return 0;
if (!strncmp(name, MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME,
strnlen(MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME,
PANEL_NAME_MAX_LEN)))
return 0;
if (!strncmp(name, MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
strnlen(MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
PANEL_NAME_MAX_LEN)))
return 0;
#endif
if (!strncmp(name, HDMI_PANEL_NAME,
strnlen(HDMI_PANEL_NAME,
PANEL_NAME_MAX_LEN)))
return 0;
if (!strncmp(name, TVOUT_PANEL_NAME,
strnlen(TVOUT_PANEL_NAME,
PANEL_NAME_MAX_LEN)))
return 0;
pr_warning("%s: not supported '%s'", __func__, name);
return -ENODEV;
}
static struct msm_fb_platform_data msm_fb_pdata = {
.detect_client = msm_fb_detect_panel,
};
static struct platform_device msm_fb_device = {
.name = "msm_fb",
.id = 0,
.num_resources = ARRAY_SIZE(msm_fb_resources),
.resource = msm_fb_resources,
.dev.platform_data = &msm_fb_pdata,
};
static bool dsi_power_on;
static int mipi_dsi_cdp_panel_power(int on)
{
static struct regulator *reg_l8, *reg_l23, *reg_l2;
static int gpio43;
int rc;
pr_info("%s: state : %d\n", __func__, on);
if (!dsi_power_on) {
reg_l8 = regulator_get(&msm_mipi_dsi1_device.dev,
"dsi_vdc");
if (IS_ERR(reg_l8)) {
pr_err("could not get 8921_l8, rc = %ld\n",
PTR_ERR(reg_l8));
return -ENODEV;
}
reg_l23 = regulator_get(&msm_mipi_dsi1_device.dev,
"dsi_vddio");
if (IS_ERR(reg_l23)) {
pr_err("could not get 8921_l23, rc = %ld\n",
PTR_ERR(reg_l23));
return -ENODEV;
}
reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev,
"dsi_vdda");
if (IS_ERR(reg_l2)) {
pr_err("could not get 8921_l2, rc = %ld\n",
PTR_ERR(reg_l2));
return -ENODEV;
}
rc = regulator_set_voltage(reg_l8, 2800000, 3000000);
if (rc) {
pr_err("set_voltage l8 failed, rc=%d\n", rc);
return -EINVAL;
}
rc = regulator_set_voltage(reg_l23, 1800000, 1800000);
if (rc) {
pr_err("set_voltage l23 failed, rc=%d\n", rc);
return -EINVAL;
}
rc = regulator_set_voltage(reg_l2, 1200000, 1200000);
if (rc) {
pr_err("set_voltage l2 failed, rc=%d\n", rc);
return -EINVAL;
}
gpio43 = PM8921_GPIO_PM_TO_SYS(43);
rc = gpio_request(gpio43, "disp_rst_n");
if (rc) {
pr_err("request gpio 43 failed, rc=%d\n", rc);
return -ENODEV;
}
dsi_power_on = true;
}
if (on) {
rc = regulator_set_optimum_mode(reg_l8, 100000);
if (rc < 0) {
pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
return -EINVAL;
}
rc = regulator_set_optimum_mode(reg_l23, 100000);
if (rc < 0) {
pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
return -EINVAL;
}
rc = regulator_set_optimum_mode(reg_l2, 100000);
if (rc < 0) {
pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
return -EINVAL;
}
rc = regulator_enable(reg_l8);
if (rc) {
pr_err("enable l8 failed, rc=%d\n", rc);
return -ENODEV;
}
rc = regulator_enable(reg_l23);
if (rc) {
pr_err("enable l8 failed, rc=%d\n", rc);
return -ENODEV;
}
rc = regulator_enable(reg_l2);
if (rc) {
pr_err("enable l2 failed, rc=%d\n", rc);
return -ENODEV;
}
gpio_set_value_cansleep(gpio43, 1);
} else {
rc = regulator_disable(reg_l2);
if (rc) {
pr_err("disable reg_l2 failed, rc=%d\n", rc);
return -ENODEV;
}
rc = regulator_disable(reg_l8);
if (rc) {
pr_err("disable reg_l8 failed, rc=%d\n", rc);
return -ENODEV;
}
rc = regulator_disable(reg_l23);
if (rc) {
pr_err("disable reg_l23 failed, rc=%d\n", rc);
return -ENODEV;
}
rc = regulator_set_optimum_mode(reg_l8, 100);
if (rc < 0) {
pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
return -EINVAL;
}
rc = regulator_set_optimum_mode(reg_l23, 100);
if (rc < 0) {
pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
return -EINVAL;
}
rc = regulator_set_optimum_mode(reg_l2, 100);
if (rc < 0) {
pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
return -EINVAL;
}
gpio_set_value_cansleep(gpio43, 0);
}
return 0;
}
static int mipi_dsi_panel_power(int on)
{
pr_info("%s: on=%d\n", __func__, on);
return mipi_dsi_cdp_panel_power(on);
}
static struct mipi_dsi_platform_data mipi_dsi_pdata = {
.vsync_gpio = MDP_VSYNC_GPIO,
.dsi_power_save = mipi_dsi_panel_power,
};
#ifdef CONFIG_MSM_BUS_SCALING
static struct msm_bus_vectors mdp_init_vectors[] = {
{
.src = MSM_BUS_MASTER_MDP_PORT0,
.dst = MSM_BUS_SLAVE_EBI_CH0,
.ab = 0,
.ib = 0,
},
};
#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
/* If HDMI is used as primary */
{
.src = MSM_BUS_MASTER_MDP_PORT0,
.dst = MSM_BUS_SLAVE_EBI_CH0,
.ab = 2000000000,
.ib = 2000000000,
},
};
static struct msm_bus_paths mdp_bus_scale_usecases[] = {
{
ARRAY_SIZE(mdp_init_vectors),
mdp_init_vectors,
},
{
ARRAY_SIZE(hdmi_as_primary_vectors),
hdmi_as_primary_vectors,
},
{
ARRAY_SIZE(hdmi_as_primary_vectors),
hdmi_as_primary_vectors,
},
{
ARRAY_SIZE(hdmi_as_primary_vectors),
hdmi_as_primary_vectors,
},
{
ARRAY_SIZE(hdmi_as_primary_vectors),
hdmi_as_primary_vectors,
},
{
ARRAY_SIZE(hdmi_as_primary_vectors),
hdmi_as_primary_vectors,
},
};
#else
static struct msm_bus_vectors mdp_ui_vectors[] = {
{
.src = MSM_BUS_MASTER_MDP_PORT0,
.dst = MSM_BUS_SLAVE_EBI_CH0,
.ab = 216000000 * 2,
.ib = 270000000 * 2,
},
};
static struct msm_bus_vectors mdp_vga_vectors[] = {
/* VGA and less video */
{
.src = MSM_BUS_MASTER_MDP_PORT0,
.dst = MSM_BUS_SLAVE_EBI_CH0,
.ab = 216000000 * 2,
.ib = 270000000 * 2,
},
};
static struct msm_bus_vectors mdp_720p_vectors[] = {
/* 720p and less video */
{
.src = MSM_BUS_MASTER_MDP_PORT0,
.dst = MSM_BUS_SLAVE_EBI_CH0,
.ab = 230400000 * 2,
.ib = 288000000 * 2,
},
};
static struct msm_bus_vectors mdp_1080p_vectors[] = {
/* 1080p and less video */
{
.src = MSM_BUS_MASTER_MDP_PORT0,
.dst = MSM_BUS_SLAVE_EBI_CH0,
.ab = 334080000 * 2,
.ib = 417600000 * 2,
},
};
static struct msm_bus_paths mdp_bus_scale_usecases[] = {
{
ARRAY_SIZE(mdp_init_vectors),
mdp_init_vectors,
},
{
ARRAY_SIZE(mdp_ui_vectors),
mdp_ui_vectors,
},
{
ARRAY_SIZE(mdp_ui_vectors),
mdp_ui_vectors,
},
{
ARRAY_SIZE(mdp_vga_vectors),
mdp_vga_vectors,
},
{
ARRAY_SIZE(mdp_720p_vectors),
mdp_720p_vectors,
},
{
ARRAY_SIZE(mdp_1080p_vectors),
mdp_1080p_vectors,
},
};
#endif
static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
mdp_bus_scale_usecases,
ARRAY_SIZE(mdp_bus_scale_usecases),
.name = "mdp",
};
#endif
#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
static int mdp_core_clk_rate_table[] = {
200000000,
200000000,
200000000,
200000000,
};
#else
static int mdp_core_clk_rate_table[] = {
85330000,
85330000,
160000000,
200000000,
};
#endif
static struct msm_panel_common_pdata mdp_pdata = {
.gpio = MDP_VSYNC_GPIO,
#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
.mdp_core_clk_rate = 200000000,
#else
.mdp_core_clk_rate = 85330000,
#endif
.mdp_core_clk_table = mdp_core_clk_rate_table,
.num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
#ifdef CONFIG_MSM_BUS_SCALING
.mdp_bus_scale_table = &mdp_bus_scale_pdata,
#endif
.mdp_rev = MDP_REV_42,
.writeback_offset = writeback_offset,
};
#define LPM_CHANNEL0 0
static int toshiba_gpio[] = {LPM_CHANNEL0};
static struct mipi_dsi_panel_platform_data toshiba_pdata = {
.gpio = toshiba_gpio,
};
static struct platform_device mipi_dsi_toshiba_panel_device = {
.name = "mipi_toshiba",
.id = 0,
.dev = {
.platform_data = &toshiba_pdata,
}
};
#define FPGA_3D_GPIO_CONFIG_ADDR 0xB5
static struct mipi_dsi_phy_ctrl dsi_novatek_cmd_mode_phy_db = {
/* DSI_BIT_CLK at 500MHz, 2 lane, RGB888 */
{0x0F, 0x0a, 0x04, 0x00, 0x20}, /* regulator */
/* timing */
{0xab, 0x8a, 0x18, 0x00, 0x92, 0x97, 0x1b, 0x8c,
0x0c, 0x03, 0x04, 0xa0},
{0x5f, 0x00, 0x00, 0x10}, /* phy ctrl */
{0xff, 0x00, 0x06, 0x00}, /* strength */
/* pll control */
{0x40, 0xf9, 0x30, 0xda, 0x00, 0x40, 0x03, 0x62,
0x40, 0x07, 0x03,
0x00, 0x1a, 0x00, 0x00, 0x02, 0x00, 0x20, 0x00, 0x01},
};
static struct mipi_dsi_panel_platform_data novatek_pdata = {
.fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
.fpga_ctrl_mode = FPGA_SPI_INTF,
.phy_ctrl_settings = &dsi_novatek_cmd_mode_phy_db,
};
static struct platform_device mipi_dsi_novatek_panel_device = {
.name = "mipi_novatek",
.id = 0,
.dev = {
.platform_data = &novatek_pdata,
}
};
#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
static struct resource hdmi_msm_resources[] = {
{
.name = "hdmi_msm_qfprom_addr",
.start = 0x00700000,
.end = 0x007060FF,
.flags = IORESOURCE_MEM,
},
{
.name = "hdmi_msm_hdmi_addr",
.start = 0x04A00000,
.end = 0x04A00FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "hdmi_msm_irq",
.start = HDMI_IRQ,
.end = HDMI_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static int hdmi_enable_5v(int on);
static int hdmi_core_power(int on, int show);
static int hdmi_cec_power(int on);
static struct msm_hdmi_platform_data hdmi_msm_data = {
.irq = HDMI_IRQ,
.enable_5v = hdmi_enable_5v,
.core_power = hdmi_core_power,
.cec_power = hdmi_cec_power,
};
static struct platform_device hdmi_msm_device = {
.name = "hdmi_msm",
.id = 0,
.num_resources = ARRAY_SIZE(hdmi_msm_resources),
.resource = hdmi_msm_resources,
.dev.platform_data = &hdmi_msm_data,
};
#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
static struct platform_device wfd_panel_device = {
.name = "wfd_panel",
.id = 0,
.dev.platform_data = NULL,
};
static struct platform_device wfd_device = {
.name = "msm_wfd",
.id = -1,
};
#endif
#ifdef CONFIG_MSM_BUS_SCALING
static struct msm_bus_vectors dtv_bus_init_vectors[] = {
{
.src = MSM_BUS_MASTER_MDP_PORT0,
.dst = MSM_BUS_SLAVE_EBI_CH0,
.ab = 0,
.ib = 0,
},
};
#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
static struct msm_bus_vectors dtv_bus_def_vectors[] = {
{
.src = MSM_BUS_MASTER_MDP_PORT0,
.dst = MSM_BUS_SLAVE_EBI_CH0,
.ab = 2000000000,
.ib = 2000000000,
},
};
#else
static struct msm_bus_vectors dtv_bus_def_vectors[] = {
{
.src = MSM_BUS_MASTER_MDP_PORT0,
.dst = MSM_BUS_SLAVE_EBI_CH0,
.ab = 566092800 * 2,
.ib = 707616000 * 2,
},
};
#endif
static struct msm_bus_paths dtv_bus_scale_usecases[] = {
{
ARRAY_SIZE(dtv_bus_init_vectors),
dtv_bus_init_vectors,
},
{
ARRAY_SIZE(dtv_bus_def_vectors),
dtv_bus_def_vectors,
},
};
static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
dtv_bus_scale_usecases,
ARRAY_SIZE(dtv_bus_scale_usecases),
.name = "dtv",
};
static struct lcdc_platform_data dtv_pdata = {
.bus_scale_table = &dtv_bus_scale_pdata,
};
#endif
#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
static int hdmi_enable_5v(int on)
{
/* TBD: PM8921 regulator instead of 8901 */
static struct regulator *reg_8921_hdmi_mvs; /* HDMI_5V */
static int prev_on;
int rc;
if (on == prev_on)
return 0;
if (!reg_8921_hdmi_mvs)
reg_8921_hdmi_mvs = regulator_get(&hdmi_msm_device.dev,
"hdmi_mvs");
if (on) {
rc = regulator_enable(reg_8921_hdmi_mvs);
if (rc) {
pr_err("'%s' regulator enable failed, rc=%d\n",
"8921_hdmi_mvs", rc);
return rc;
}
pr_debug("%s(on): success\n", __func__);
} else {
rc = regulator_disable(reg_8921_hdmi_mvs);
if (rc)
pr_warning("'%s' regulator disable failed, rc=%d\n",
"8921_hdmi_mvs", rc);
pr_debug("%s(off): success\n", __func__);
}
prev_on = on;
return 0;
}
static int hdmi_core_power(int on, int show)
{
static struct regulator *reg_8921_l23, *reg_8921_s4;
static int prev_on;
int rc;
if (on == prev_on)
return 0;
/* TBD: PM8921 regulator instead of 8901 */
if (!reg_8921_l23) {
reg_8921_l23 = regulator_get(&hdmi_msm_device.dev, "hdmi_avdd");
if (IS_ERR(reg_8921_l23)) {
pr_err("could not get reg_8921_l23, rc = %ld\n",
PTR_ERR(reg_8921_l23));
return -ENODEV;
}
rc = regulator_set_voltage(reg_8921_l23, 1800000, 1800000);
if (rc) {
pr_err("set_voltage failed for 8921_l23, rc=%d\n", rc);
return -EINVAL;
}
}
if (!reg_8921_s4) {
reg_8921_s4 = regulator_get(&hdmi_msm_device.dev, "hdmi_vcc");
if (IS_ERR(reg_8921_s4)) {
pr_err("could not get reg_8921_s4, rc = %ld\n",
PTR_ERR(reg_8921_s4));
return -ENODEV;
}
rc = regulator_set_voltage(reg_8921_s4, 1800000, 1800000);
if (rc) {
pr_err("set_voltage failed for 8921_s4, rc=%d\n", rc);
return -EINVAL;
}
}
if (on) {
rc = regulator_set_optimum_mode(reg_8921_l23, 100000);
if (rc < 0) {
pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
return -EINVAL;
}
rc = regulator_enable(reg_8921_l23);
if (rc) {
pr_err("'%s' regulator enable failed, rc=%d\n",
"hdmi_avdd", rc);
return rc;
}
rc = regulator_enable(reg_8921_s4);
if (rc) {
pr_err("'%s' regulator enable failed, rc=%d\n",
"hdmi_vcc", rc);
return rc;
}
rc = gpio_request(100, "HDMI_DDC_CLK");
if (rc) {
pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
"HDMI_DDC_CLK", 100, rc);
goto error1;
}
rc = gpio_request(101, "HDMI_DDC_DATA");
if (rc) {
pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
"HDMI_DDC_DATA", 101, rc);
goto error2;
}
rc = gpio_request(102, "HDMI_HPD");
if (rc) {
pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
"HDMI_HPD", 102, rc);
goto error3;
}
pr_debug("%s(on): success\n", __func__);
} else {
gpio_free(100);
gpio_free(101);
gpio_free(102);
rc = regulator_disable(reg_8921_l23);
if (rc) {
pr_err("disable reg_8921_l23 failed, rc=%d\n", rc);
return -ENODEV;
}
rc = regulator_disable(reg_8921_s4);
if (rc) {
pr_err("disable reg_8921_s4 failed, rc=%d\n", rc);
return -ENODEV;
}
rc = regulator_set_optimum_mode(reg_8921_l23, 100);
if (rc < 0) {
pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
return -EINVAL;
}
pr_debug("%s(off): success\n", __func__);
}
prev_on = on;
return 0;
error3:
gpio_free(101);
error2:
gpio_free(100);
error1:
regulator_disable(reg_8921_l23);
regulator_disable(reg_8921_s4);
return rc;
}
static int hdmi_cec_power(int on)
{
static int prev_on;
int rc;
if (on == prev_on)
return 0;
if (on) {
rc = gpio_request(99, "HDMI_CEC_VAR");
if (rc) {
pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
"HDMI_CEC_VAR", 99, rc);
goto error;
}
pr_debug("%s(on): success\n", __func__);
} else {
gpio_free(99);
pr_debug("%s(off): success\n", __func__);
}
prev_on = on;
return 0;
error:
return rc;
}
#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
void __init msm8930_init_fb(void)
{
platform_device_register(&msm_fb_device);
#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
platform_device_register(&wfd_panel_device);
platform_device_register(&wfd_device);
#endif
platform_device_register(&mipi_dsi_novatek_panel_device);
#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
if (!cpu_is_msm8627())
platform_device_register(&hdmi_msm_device);
#endif
platform_device_register(&mipi_dsi_toshiba_panel_device);
msm_fb_register_device("mdp", &mdp_pdata);
msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
#ifdef CONFIG_MSM_BUS_SCALING
msm_fb_register_device("dtv", &dtv_pdata);
#endif
}
void __init msm8930_allocate_fb_region(void)
{
void *addr;
unsigned long size;
size = MSM_FB_SIZE;
addr = alloc_bootmem_align(size, 0x1000);
msm_fb_resources[0].start = __pa(addr);
msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
size, addr, __pa(addr));
}