arch/arm/boot/dts/mpq8092.dtsi - kernel/msm - Gitiles

 /* Copyright (c) 2012, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
  * only version 2 as published by the Free Software Foundation.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */

 /include/ "skeleton.dtsi"
 /include/ "mpq8092-iommu.dtsi"
 /include/ "msm-gdsc.dtsi"
 /include/ "mpq8092-ion.dtsi"

 / {
 	model = "Qualcomm MPQ8092";
 	compatible = "qcom,mpq8092";
 	interrupt-parent = <&intc>;

 	intc: interrupt-controller@f9000000 {
 		compatible = "qcom,msm-qgic2";
 		interrupt-controller;
 		#interrupt-cells = <3>;
 		reg = <0xf9000000 0x1000>,
 		<0xf9002000 0x1000>;
 	};

 	msmgpio: gpio@fd510000 {
 		compatible = "qcom,msm-gpio";
 		gpio-controller;
 		#gpio-cells = <2>;
 		interrupt-controller;
 		#interrupt-cells = <2>;
 		reg = <0xfd510000 0x4000>;
 	};

 	timer {
 		compatible = "qcom,msm-qtimer", "arm,armv7-timer";
 		interrupts = <1 2 0>, <1 3 0>;
 		clock-frequency = <19200000>;
 	};

 	serial@f991f000 {
 		compatible = "qcom,msm-lsuart-v14";
 		reg = <0xf991f000 0x1000>;
 		interrupts = <0 109 0>;
 		status = "disabled";
 	};

 	serial@f995e000 {
 		compatible = "qcom,msm-lsuart-v14";
 		reg = <0xf995e000 0x1000>;
 		interrupts = <0 114 0>;
 		status = "disabled";
 	};

 	spmi_bus: qcom,spmi@fc4c0000 {
 		cell-index = <0>;
 		compatible = "qcom,spmi-pmic-arb";
 		reg = <0xfc4cf000 0x1000>,
 		      <0Xfc4cb000 0x1000>;
 		/* 190,ee0_krait_hlos_spmi_periph_irq */
 		/* 187,channel_0_krait_hlos_trans_done_irq */
 		interrupts = <0 190 0 0 187 0>;
 		qcom,pmic-arb-ee = <0>;
 		qcom,pmic-arb-channel = <0>;
 		qcom,pmic-arb-ppid-map = <0x00100000>, /* PM8644_0 */
 				 <0x10100001>, /* PM8644_1 */
 				 <0x00500002>, /* INTERRUPT */
 				 <0x00800003>, /* PON0 */
 				 <0x03000004>, /* ADC_1 */
 				 <0x03100005>, /* ADC_2 */
 				 <0x03200006>, /* ADC_3 */
 				 <0x03300007>, /* ADC_4 */
 				 <0x03400008>, /* ADC_5 */
 				 <0x03500009>, /* ADC_6 */
 				 <0x0360000a>, /* ADC_7 */
 				 <0x0370000b>, /* ADC_8 */
 				 <0x0500000c>, /* SHARED_XO */
 				 <0x0510000d>, /* BB_CLK1 */
 				 <0x0520000e>, /* BB_CLK2 */
 				 <0x05a0000f>, /* SLEEP_CLK */
 				 <0x06000010>, /* RTC_RW */
 				 <0x06100011>, /* RTC_ALARM */
 				 <0x07000012>, /* PBS_CORE */
 				 <0x07100013>, /* PBS_CLIENT_1 */
 				 <0x07200014>, /* PBS_CLIENT_2 */
 				 <0x07300015>, /* PBS_CLIENT_3 */
 				 <0x07400016>, /* PBS_CLIENT_4 */
 				 <0x07500017>, /* PBS_CLIENT_5 */
 				 <0x07600018>, /* PBS_CLIENT_6 */
 				 <0x07700019>, /* PBS_CLIENT_7 */
 				 <0x0780001a>, /* PBS_CLIENT_8 */
 				 <0x0790001b>, /* PBS_CLIENT_9 */
 				 <0x07a0001c>, /* PBS_CLIENT_10 */
 				 <0x07b0001d>, /* PBS_CLIENT_11 */
 				 <0x07c0001e>, /* PBS_CLIENT_12 */
 				 <0x07d0001f>, /* PBS_CLIENT_13 */
 				 <0x07e00020>, /* PBS_CLIENT_14 */
 				 <0x07f00021>, /* PBS_CLIENT_15 */
 				 <0x08000022>, /* PBS_CLIENT_16 */
 				 <0x0a000023>, /* MPP_1 */
 				 <0x0a100024>, /* MPP_2 */
 				 <0x0a200025>, /* MPP_3 */
 				 <0x0a300026>, /* MPP_4 */
 				 <0x0a400027>, /* MPP_5 */
 				 <0x0a500028>, /* MPP_6 */
 				 <0x0c000029>, /* PM8644_GPIO_1 */
 				 <0x0c10002a>, /* PM8644_GPIO_2 */
 				 <0x0c20002b>, /* PM8644_GPIO_3 */
 				 <0x0c30002c>, /* PM8644_GPIO_4 */
 				 <0x0c40002d>, /* PM8644_GPIO_5 */
 				 <0x0c50002e>, /* PM8644_GPIO_6 */
 				 <0x0c60002f>, /* PM8644_GPIO_7 */
 				 <0x0c700030>, /* PM8644_GPIO_8 */
 				 <0x0c800031>, /* PM8644_GPIO_9 */
 				 <0x0c900032>, /* PM8644_GPIO_10 */
 				 <0x0ca00033>, /* PM8644_GPIO_11 */
 				 <0x0cb00034>, /* PM8644_GPIO_12 */
 				 <0x0cc00035>, /* PM8644_GPIO_13 */
 				 <0x0cd00036>, /* PM8644_GPIO_14 */
 				 <0x0ce00037>, /* PM8644_GPIO_15 */
 				 <0x0cf00038>, /* PM8644_GPIO_16 */
 				 <0x0d000039>, /* PM8644_GPIO_17 */
 				 <0x0d10003a>, /* PM8644_GPIO_18 */
 				 <0x0d20003b>, /* PM8644_GPIO_19 */
 				 <0x0d30003c>, /* PM8644_GPIO_20 */
 				 <0x0d40003d>, /* PM8644_GPIO_21 */
 				 <0x0d50003e>, /* PM8644_GPIO_22 */
 				 <0x0d60003f>, /* PM8644_GPIO_23 */
 				 <0x0d700040>, /* PM8644_GPIO_24 */
 				 <0x0d800041>, /* PM8644_GPIO_25 */
 				 <0x0d900042>, /* PM8644_GPIO_26 */
 				 <0x0da00043>, /* PM8644_GPIO_27 */
 				 <0x0db00044>, /* PM8644_GPIO_28 */
 				 <0x0dc00045>, /* PM8644_GPIO_29 */
 				 <0x0dd00046>, /* PM8644_GPIO_30 */
 				 <0x0de00047>, /* PM8644_GPIO_31 */
 				 <0x0df00048>, /* PM8644_GPIO_32 */
 				 <0x0e000049>, /* PM8644_GPIO_33 */
 				 <0x0e10004a>, /* PM8644_GPIO_34 */
 				 <0x0e20004b>, /* PM8644_GPIO_35 */
 				 <0x0e30004c>, /* PM8644_GPIO_36 */
 				 <0x0e40004d>, /* PM8644_GPIO_37 */
 				 <0x0e50004e>, /* PM8644_GPIO_38 */
 				 <0x0e60004f>, /* PM8644_GPIO_39 */
 				 <0x0e700050>, /* PM8644_GPIO_40 */
 				 <0x0e800051>, /* PM8644_GPIO_41 */
 				 <0x0e900052>, /* PM8644_GPIO_42 */
 				 <0x0ea00053>, /* PM8644_GPIO_43 */
 				 <0x11000054>, /* BUCK_CMN_1 */
 				 <0x11100055>, /* BUCK_CMN_2 */
 				 <0x11200056>, /* BUCK_CMN_3 */
 				 <0x11400057>, /* PM8644_SMPS1 */
 				 <0x11500058>, /* SMPS_1_PS1 */
 				 <0x11600059>, /* BUCK_FREQ_1 */
 				 <0x1170005a>, /* PM8644_SMPS2 */
 				 <0x1180005b>, /* SMPS_2_PS1 */
 				 <0x1190005c>, /* BUCK_FREQ_2 */
 				 <0x11a0005d>, /* PM8644_SMPS3 */
 				 <0x11b0005e>, /* SMPS_3_PS1 */
 				 <0x11c0005f>, /* BUCK_FREQ_3 */
 				 <0x11d00060>, /* PM8644_SMPS4 */
 				 <0x11e00061>, /* SMPS_4_PS1 */
 				 <0x11f00062>, /* PM8644_BUCK_FREQ_4 */
 				 <0x12000063>, /* PM8644_SMPS5 */
 				 <0x12100064>, /* FTPS1_5 */
 				 <0x12200065>, /* PM8644_BUCK_FREQ_5 */
 				 <0x12300066>, /* PM8644_SMPS6 */
 				 <0x12400067>, /* FTPS1_6 */
 				 <0x12500068>, /* PM8644_BUCK_FREQ_6 */
 				 <0x12600069>, /* PM8644_SMPS7 */
 				 <0x1270006a>, /* FTPS1_7 */
 				 <0x1280006b>, /* PM8644_BUCK_FREQ_7 */
 				 <0x1290006c>, /* PM8644_SMPS8 */
 				 <0x12a0006d>, /* FTPS1_8 */
 				 <0x12b0006e>, /* PM8644_BUCK_FREQ_8 */
 				 <0x12c0006f>, /* PM8644_SMPS9 */
 				 <0x12d00070>, /* FTPS1_9 */
 				 <0x12e00071>, /* PM8644_BUCK_FREQ_9 */
 				 <0x12f00072>, /* PM8644_SMPS10 */
 				 <0x13000073>, /* FTPS1_10 */
 				 <0x13100074>, /* PM8644_BUCK_FREQ_10 */
 				 <0x13200075>, /* PM8644_SMPS11 */
 				 <0x13300076>, /* FTPS1_11 */
 				 <0x13400077>, /* BUCK_FREQ_11 */
 				 <0x14000078>, /* PM8644_LDO_1 */
 				 <0x14100079>, /* PM8644_LDO_2 */
 				 <0x1420007a>, /* PM8644_LDO_3 */
 				 <0x1430007b>, /* PM8644_LDO_4 */
 				 <0x1440007c>, /* PM8644_LDO_5 */
 				 <0x1450007d>, /* PM8644_LDO_6 */
 				 <0x1460007e>, /* PM8644_LDO_7 */
 				 <0x1470007f>, /* PM8644_LDO_8 */
 				 <0x14800080>, /* PM8644_LDO_9 */
 				 <0x14900081>, /* PM8644_LDO_10 */
 				 <0x14a00082>, /* PM8644_LDO_11 */
 				 <0x14b00083>, /* PM8644_LDO_12 */
 				 <0x14c00084>, /* PM8644_LDO_13 */
 				 <0x14d00085>, /* PM8644_LDO_14 */
 				 <0x14e00086>, /* PM8644_LDO_15 */
 				 <0x14f00087>, /* PM8644_LDO_16 */
 				 <0x15000088>, /* PM8644_LDO_17 */
 				 <0x15100089>, /* PM8644_LDO_18 */
 				 <0x1520008a>, /* PM8644_LDO_19 */
 				 <0x1530008b>, /* PM8644_LDO_20 */
 				 <0x1540008c>, /* PM8644_LDO_21 */
 				 <0x1550008d>, /* PM8644_LDO_22 */
 				 <0x1560008e>, /* PM8644_LDO_23 */
 				 <0x1570008f>, /* PM8644_LDO_24 */
 				 <0x15800090>, /* PM8644_LDO_25 */
 				 <0x18000091>, /* PM8644_LVS_1 */
 				 <0x18100092>, /* PM8644_LVS_2 */
 				 <0x18200093>, /* PM8644_OTG */
 				 <0x18300094>, /* PM8644_HDMI */
 				 <0x1a800095>, /* KEYPAD */
 				 <0x1b000096>, /* LPG_LUT */
 				 <0x1b100097>, /* LPG_CHAN_1 */
 				 <0x1b200098>, /* LPG_CHAN_2 */
 				 <0x1b300099>, /* LPG_CHAN_3 */
 				 <0x1b40009a>, /* LPG_CHAN_4 */
 				 <0x1b50009b>, /* LPG_CHAN_5 */
 				 <0x1b60009c>, /* LPG_CHAN_6 */
 				 <0x1b70009d>, /* LPG_CHAN_7 */
 				 <0x1b80009e>, /* LPG_CHAN_8 */
 				 <0x1bc0009f>; /* LPG_PWM */
 	};

 	sdcc1: qcom,sdcc@f9824000 {
 		cell-index = <1>; /* SDC1 eMMC slot */
 		compatible = "qcom,msm-sdcc";
 		reg = <0xf9824000 0x800>;
 		reg-names = "core_mem";
 		interrupts = <0 123 0>;
 		interrupt-names = "core_irq";

 		qcom,sdcc-pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
 		qcom,sdcc-pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
 		qcom,sdcc-pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
 		qcom,sdcc-pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */

 		qcom,sdcc-clk-rates = <400000 25000000 50000000 100000000 200000000>;
 		qcom,sdcc-sup-voltages = <2950 2950>;
 		qcom,sdcc-bus-width = <8>;
 		qcom,sdcc-nonremovable;
 		qcom,sdcc-bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
 	};

 	sdcc2: qcom,sdcc@f98a4000 {
 		cell-index = <2>; /* SDC2 SD card slot */
 		compatible = "qcom,msm-sdcc";
 		reg = <0xf98a4000 0x800>;
 		reg-names = "core_mem";
 		interrupts = <0 125 0>;
 		interrupt-names = "core_irq";

 		qcom,sdcc-pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
 		qcom,sdcc-pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
 		qcom,sdcc-pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
 		qcom,sdcc-pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */

 		qcom,sdcc-clk-rates = <400000 25000000 50000000 100000000 200000000>;
 		qcom,sdcc-sup-voltages = <2950 2950>;
 		qcom,sdcc-bus-width = <4>;
 		qcom,sdcc-xpc;
 		qcom,sdcc-bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
 		qcom,sdcc-current-limit = <800>;
 	};
 };

 /include/ "msm-pm8644.dtsi"
 /include/ "mpq8092-regulator.dtsi"
	/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
	*
	* This program is free software; you can redistribute it and/or modify
	* it under the terms of the GNU General Public License version 2 and
	* only version 2 as published by the Free Software Foundation.
	*
	* This program is distributed in the hope that it will be useful,
	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	* GNU General Public License for more details.
	*/

	/include/ "skeleton.dtsi"
	/include/ "mpq8092-iommu.dtsi"
	/include/ "msm-gdsc.dtsi"
	/include/ "mpq8092-ion.dtsi"

	/ {
	model = "Qualcomm MPQ8092";
	compatible = "qcom,mpq8092";
	interrupt-parent = <&intc>;

	intc: interrupt-controller@f9000000 {
	compatible = "qcom,msm-qgic2";
	interrupt-controller;
	#interrupt-cells = <3>;
	reg = <0xf9000000 0x1000>,
	<0xf9002000 0x1000>;
	};

	msmgpio: gpio@fd510000 {
	compatible = "qcom,msm-gpio";
	gpio-controller;
	#gpio-cells = <2>;
	interrupt-controller;
	#interrupt-cells = <2>;
	reg = <0xfd510000 0x4000>;
	};

	timer {
	compatible = "qcom,msm-qtimer", "arm,armv7-timer";
	interrupts = <1 2 0>, <1 3 0>;
	clock-frequency = <19200000>;
	};

	serial@f991f000 {
	compatible = "qcom,msm-lsuart-v14";
	reg = <0xf991f000 0x1000>;
	interrupts = <0 109 0>;
	status = "disabled";
	};

	serial@f995e000 {
	compatible = "qcom,msm-lsuart-v14";
	reg = <0xf995e000 0x1000>;
	interrupts = <0 114 0>;
	status = "disabled";
	};

	spmi_bus: qcom,spmi@fc4c0000 {
	cell-index = <0>;
	compatible = "qcom,spmi-pmic-arb";
	reg = <0xfc4cf000 0x1000>,
	<0Xfc4cb000 0x1000>;
	/* 190,ee0_krait_hlos_spmi_periph_irq */
	/* 187,channel_0_krait_hlos_trans_done_irq */
	interrupts = <0 190 0 0 187 0>;
	qcom,pmic-arb-ee = <0>;
	qcom,pmic-arb-channel = <0>;
	qcom,pmic-arb-ppid-map = <0x00100000>, /* PM8644_0 */
	<0x10100001>, /* PM8644_1 */
	<0x00500002>, /* INTERRUPT */
	<0x00800003>, /* PON0 */
	<0x03000004>, /* ADC_1 */
	<0x03100005>, /* ADC_2 */
	<0x03200006>, /* ADC_3 */
	<0x03300007>, /* ADC_4 */
	<0x03400008>, /* ADC_5 */
	<0x03500009>, /* ADC_6 */
	<0x0360000a>, /* ADC_7 */
	<0x0370000b>, /* ADC_8 */
	<0x0500000c>, /* SHARED_XO */
	<0x0510000d>, /* BB_CLK1 */
	<0x0520000e>, /* BB_CLK2 */
	<0x05a0000f>, /* SLEEP_CLK */
	<0x06000010>, /* RTC_RW */
	<0x06100011>, /* RTC_ALARM */
	<0x07000012>, /* PBS_CORE */
	<0x07100013>, /* PBS_CLIENT_1 */
	<0x07200014>, /* PBS_CLIENT_2 */
	<0x07300015>, /* PBS_CLIENT_3 */
	<0x07400016>, /* PBS_CLIENT_4 */
	<0x07500017>, /* PBS_CLIENT_5 */
	<0x07600018>, /* PBS_CLIENT_6 */
	<0x07700019>, /* PBS_CLIENT_7 */
	<0x0780001a>, /* PBS_CLIENT_8 */
	<0x0790001b>, /* PBS_CLIENT_9 */
	<0x07a0001c>, /* PBS_CLIENT_10 */
	<0x07b0001d>, /* PBS_CLIENT_11 */
	<0x07c0001e>, /* PBS_CLIENT_12 */
	<0x07d0001f>, /* PBS_CLIENT_13 */
	<0x07e00020>, /* PBS_CLIENT_14 */
	<0x07f00021>, /* PBS_CLIENT_15 */
	<0x08000022>, /* PBS_CLIENT_16 */
	<0x0a000023>, /* MPP_1 */
	<0x0a100024>, /* MPP_2 */
	<0x0a200025>, /* MPP_3 */
	<0x0a300026>, /* MPP_4 */
	<0x0a400027>, /* MPP_5 */
	<0x0a500028>, /* MPP_6 */
	<0x0c000029>, /* PM8644_GPIO_1 */
	<0x0c10002a>, /* PM8644_GPIO_2 */
	<0x0c20002b>, /* PM8644_GPIO_3 */
	<0x0c30002c>, /* PM8644_GPIO_4 */
	<0x0c40002d>, /* PM8644_GPIO_5 */
	<0x0c50002e>, /* PM8644_GPIO_6 */
	<0x0c60002f>, /* PM8644_GPIO_7 */
	<0x0c700030>, /* PM8644_GPIO_8 */
	<0x0c800031>, /* PM8644_GPIO_9 */
	<0x0c900032>, /* PM8644_GPIO_10 */
	<0x0ca00033>, /* PM8644_GPIO_11 */
	<0x0cb00034>, /* PM8644_GPIO_12 */
	<0x0cc00035>, /* PM8644_GPIO_13 */
	<0x0cd00036>, /* PM8644_GPIO_14 */
	<0x0ce00037>, /* PM8644_GPIO_15 */
	<0x0cf00038>, /* PM8644_GPIO_16 */
	<0x0d000039>, /* PM8644_GPIO_17 */
	<0x0d10003a>, /* PM8644_GPIO_18 */
	<0x0d20003b>, /* PM8644_GPIO_19 */
	<0x0d30003c>, /* PM8644_GPIO_20 */
	<0x0d40003d>, /* PM8644_GPIO_21 */
	<0x0d50003e>, /* PM8644_GPIO_22 */
	<0x0d60003f>, /* PM8644_GPIO_23 */
	<0x0d700040>, /* PM8644_GPIO_24 */
	<0x0d800041>, /* PM8644_GPIO_25 */
	<0x0d900042>, /* PM8644_GPIO_26 */
	<0x0da00043>, /* PM8644_GPIO_27 */
	<0x0db00044>, /* PM8644_GPIO_28 */
	<0x0dc00045>, /* PM8644_GPIO_29 */
	<0x0dd00046>, /* PM8644_GPIO_30 */
	<0x0de00047>, /* PM8644_GPIO_31 */
	<0x0df00048>, /* PM8644_GPIO_32 */
	<0x0e000049>, /* PM8644_GPIO_33 */
	<0x0e10004a>, /* PM8644_GPIO_34 */
	<0x0e20004b>, /* PM8644_GPIO_35 */
	<0x0e30004c>, /* PM8644_GPIO_36 */
	<0x0e40004d>, /* PM8644_GPIO_37 */
	<0x0e50004e>, /* PM8644_GPIO_38 */
	<0x0e60004f>, /* PM8644_GPIO_39 */
	<0x0e700050>, /* PM8644_GPIO_40 */
	<0x0e800051>, /* PM8644_GPIO_41 */
	<0x0e900052>, /* PM8644_GPIO_42 */
	<0x0ea00053>, /* PM8644_GPIO_43 */
	<0x11000054>, /* BUCK_CMN_1 */
	<0x11100055>, /* BUCK_CMN_2 */
	<0x11200056>, /* BUCK_CMN_3 */
	<0x11400057>, /* PM8644_SMPS1 */
	<0x11500058>, /* SMPS_1_PS1 */
	<0x11600059>, /* BUCK_FREQ_1 */
	<0x1170005a>, /* PM8644_SMPS2 */
	<0x1180005b>, /* SMPS_2_PS1 */
	<0x1190005c>, /* BUCK_FREQ_2 */
	<0x11a0005d>, /* PM8644_SMPS3 */
	<0x11b0005e>, /* SMPS_3_PS1 */
	<0x11c0005f>, /* BUCK_FREQ_3 */
	<0x11d00060>, /* PM8644_SMPS4 */
	<0x11e00061>, /* SMPS_4_PS1 */
	<0x11f00062>, /* PM8644_BUCK_FREQ_4 */
	<0x12000063>, /* PM8644_SMPS5 */
	<0x12100064>, /* FTPS1_5 */
	<0x12200065>, /* PM8644_BUCK_FREQ_5 */
	<0x12300066>, /* PM8644_SMPS6 */
	<0x12400067>, /* FTPS1_6 */
	<0x12500068>, /* PM8644_BUCK_FREQ_6 */
	<0x12600069>, /* PM8644_SMPS7 */
	<0x1270006a>, /* FTPS1_7 */
	<0x1280006b>, /* PM8644_BUCK_FREQ_7 */
	<0x1290006c>, /* PM8644_SMPS8 */
	<0x12a0006d>, /* FTPS1_8 */
	<0x12b0006e>, /* PM8644_BUCK_FREQ_8 */
	<0x12c0006f>, /* PM8644_SMPS9 */
	<0x12d00070>, /* FTPS1_9 */
	<0x12e00071>, /* PM8644_BUCK_FREQ_9 */
	<0x12f00072>, /* PM8644_SMPS10 */
	<0x13000073>, /* FTPS1_10 */
	<0x13100074>, /* PM8644_BUCK_FREQ_10 */
	<0x13200075>, /* PM8644_SMPS11 */
	<0x13300076>, /* FTPS1_11 */
	<0x13400077>, /* BUCK_FREQ_11 */
	<0x14000078>, /* PM8644_LDO_1 */
	<0x14100079>, /* PM8644_LDO_2 */
	<0x1420007a>, /* PM8644_LDO_3 */
	<0x1430007b>, /* PM8644_LDO_4 */
	<0x1440007c>, /* PM8644_LDO_5 */
	<0x1450007d>, /* PM8644_LDO_6 */
	<0x1460007e>, /* PM8644_LDO_7 */
	<0x1470007f>, /* PM8644_LDO_8 */
	<0x14800080>, /* PM8644_LDO_9 */
	<0x14900081>, /* PM8644_LDO_10 */
	<0x14a00082>, /* PM8644_LDO_11 */
	<0x14b00083>, /* PM8644_LDO_12 */
	<0x14c00084>, /* PM8644_LDO_13 */
	<0x14d00085>, /* PM8644_LDO_14 */
	<0x14e00086>, /* PM8644_LDO_15 */
	<0x14f00087>, /* PM8644_LDO_16 */
	<0x15000088>, /* PM8644_LDO_17 */
	<0x15100089>, /* PM8644_LDO_18 */
	<0x1520008a>, /* PM8644_LDO_19 */
	<0x1530008b>, /* PM8644_LDO_20 */
	<0x1540008c>, /* PM8644_LDO_21 */
	<0x1550008d>, /* PM8644_LDO_22 */
	<0x1560008e>, /* PM8644_LDO_23 */
	<0x1570008f>, /* PM8644_LDO_24 */
	<0x15800090>, /* PM8644_LDO_25 */
	<0x18000091>, /* PM8644_LVS_1 */
	<0x18100092>, /* PM8644_LVS_2 */
	<0x18200093>, /* PM8644_OTG */
	<0x18300094>, /* PM8644_HDMI */
	<0x1a800095>, /* KEYPAD */
	<0x1b000096>, /* LPG_LUT */
	<0x1b100097>, /* LPG_CHAN_1 */
	<0x1b200098>, /* LPG_CHAN_2 */
	<0x1b300099>, /* LPG_CHAN_3 */
	<0x1b40009a>, /* LPG_CHAN_4 */
	<0x1b50009b>, /* LPG_CHAN_5 */
	<0x1b60009c>, /* LPG_CHAN_6 */
	<0x1b70009d>, /* LPG_CHAN_7 */
	<0x1b80009e>, /* LPG_CHAN_8 */
	<0x1bc0009f>; /* LPG_PWM */
	};

	sdcc1: qcom,sdcc@f9824000 {
	cell-index = <1>; /* SDC1 eMMC slot */
	compatible = "qcom,msm-sdcc";
	reg = <0xf9824000 0x800>;
	reg-names = "core_mem";
	interrupts = <0 123 0>;
	interrupt-names = "core_irq";

	qcom,sdcc-pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
	qcom,sdcc-pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
	qcom,sdcc-pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
	qcom,sdcc-pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */

	qcom,sdcc-clk-rates = <400000 25000000 50000000 100000000 200000000>;
	qcom,sdcc-sup-voltages = <2950 2950>;
	qcom,sdcc-bus-width = <8>;
	qcom,sdcc-nonremovable;
	qcom,sdcc-bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
	};

	sdcc2: qcom,sdcc@f98a4000 {
	cell-index = <2>; /* SDC2 SD card slot */
	compatible = "qcom,msm-sdcc";
	reg = <0xf98a4000 0x800>;
	reg-names = "core_mem";
	interrupts = <0 125 0>;
	interrupt-names = "core_irq";

	qcom,sdcc-pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
	qcom,sdcc-pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
	qcom,sdcc-pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
	qcom,sdcc-pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */

	qcom,sdcc-clk-rates = <400000 25000000 50000000 100000000 200000000>;
	qcom,sdcc-sup-voltages = <2950 2950>;
	qcom,sdcc-bus-width = <4>;
	qcom,sdcc-xpc;
	qcom,sdcc-bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
	qcom,sdcc-current-limit = <800>;
	};
	};

	/include/ "msm-pm8644.dtsi"
	/include/ "mpq8092-regulator.dtsi"