| /* |
| * We need constants.h for: |
| * VMA_VM_MM |
| * VMA_VM_FLAGS |
| * VM_EXEC |
| */ |
| #include <asm/asm-offsets.h> |
| #include <asm/thread_info.h> |
| |
| /* |
| * vma_vm_mm - get mm pointer from vma pointer (vma->vm_mm) |
| */ |
| .macro vma_vm_mm, rd, rn |
| ldr \rd, [\rn, #VMA_VM_MM] |
| .endm |
| |
| /* |
| * vma_vm_flags - get vma->vm_flags |
| */ |
| .macro vma_vm_flags, rd, rn |
| ldr \rd, [\rn, #VMA_VM_FLAGS] |
| .endm |
| |
| .macro tsk_mm, rd, rn |
| ldr \rd, [\rn, #TI_TASK] |
| ldr \rd, [\rd, #TSK_ACTIVE_MM] |
| .endm |
| |
| /* |
| * act_mm - get current->active_mm |
| */ |
| .macro act_mm, rd |
| bic \rd, sp, #8128 |
| bic \rd, \rd, #63 |
| ldr \rd, [\rd, #TI_TASK] |
| ldr \rd, [\rd, #TSK_ACTIVE_MM] |
| .endm |
| |
| /* |
| * mmid - get context id from mm pointer (mm->context.id) |
| */ |
| .macro mmid, rd, rn |
| ldr \rd, [\rn, #MM_CONTEXT_ID] |
| .endm |
| |
| /* |
| * mask_asid - mask the ASID from the context ID |
| */ |
| .macro asid, rd, rn |
| and \rd, \rn, #255 |
| .endm |
| |
| .macro crval, clear, mmuset, ucset |
| #ifdef CONFIG_MMU |
| .word \clear |
| .word \mmuset |
| #else |
| .word \clear |
| .word \ucset |
| #endif |
| .endm |
| |
| /* |
| * cache_line_size - get the cache line size from the CSIDR register |
| * (available on ARMv7+). It assumes that the CSSR register was configured |
| * to access the L1 data cache CSIDR. |
| */ |
| .macro dcache_line_size, reg, tmp |
| mrc p15, 1, \tmp, c0, c0, 0 @ read CSIDR |
| and \tmp, \tmp, #7 @ cache line size encoding |
| mov \reg, #16 @ size offset |
| mov \reg, \reg, lsl \tmp @ actual cache line size |
| .endm |