| /* Generic system definitions, based on MN10300 definitions. |
| * |
| * It should be possible to use these on really simple architectures, |
| * but it serves more as a starting point for new ports. |
| * |
| * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. |
| * Written by David Howells (dhowells@redhat.com) |
| * |
| * This program is free software; you can redistribute it and/or |
| * modify it under the terms of the GNU General Public Licence |
| * as published by the Free Software Foundation; either version |
| * 2 of the Licence, or (at your option) any later version. |
| */ |
| #ifndef __ASM_GENERIC_SYSTEM_H |
| #define __ASM_GENERIC_SYSTEM_H |
| |
| #ifndef __ASSEMBLY__ |
| |
| #include <linux/types.h> |
| #include <linux/irqflags.h> |
| |
| #include <asm/cmpxchg-local.h> |
| #include <asm/cmpxchg.h> |
| |
| struct task_struct; |
| |
| /* context switching is now performed out-of-line in switch_to.S */ |
| extern struct task_struct *__switch_to(struct task_struct *, |
| struct task_struct *); |
| #define switch_to(prev, next, last) \ |
| do { \ |
| ((last) = __switch_to((prev), (next))); \ |
| } while (0) |
| |
| #define arch_align_stack(x) (x) |
| |
| #define nop() asm volatile ("nop") |
| |
| #endif /* !__ASSEMBLY__ */ |
| |
| /* |
| * Force strict CPU ordering. |
| * And yes, this is required on UP too when we're talking |
| * to devices. |
| * |
| * This implementation only contains a compiler barrier. |
| */ |
| |
| #define mb() asm volatile ("": : :"memory") |
| #define rmb() mb() |
| #define wmb() asm volatile ("": : :"memory") |
| |
| #ifdef CONFIG_SMP |
| #define smp_mb() mb() |
| #define smp_rmb() rmb() |
| #define smp_wmb() wmb() |
| #else |
| #define smp_mb() barrier() |
| #define smp_rmb() barrier() |
| #define smp_wmb() barrier() |
| #endif |
| |
| #define set_mb(var, value) do { var = value; mb(); } while (0) |
| #define set_wmb(var, value) do { var = value; wmb(); } while (0) |
| |
| #define read_barrier_depends() do {} while (0) |
| #define smp_read_barrier_depends() do {} while (0) |
| |
| /* |
| * we make sure local_irq_enable() doesn't cause priority inversion |
| */ |
| #ifndef __ASSEMBLY__ |
| |
| /* This function doesn't exist, so you'll get a linker error |
| * if something tries to do an invalid xchg(). */ |
| extern void __xchg_called_with_bad_pointer(void); |
| |
| static inline |
| unsigned long __xchg(unsigned long x, volatile void *ptr, int size) |
| { |
| unsigned long ret, flags; |
| |
| switch (size) { |
| case 1: |
| #ifdef __xchg_u8 |
| return __xchg_u8(x, ptr); |
| #else |
| local_irq_save(flags); |
| ret = *(volatile u8 *)ptr; |
| *(volatile u8 *)ptr = x; |
| local_irq_restore(flags); |
| return ret; |
| #endif /* __xchg_u8 */ |
| |
| case 2: |
| #ifdef __xchg_u16 |
| return __xchg_u16(x, ptr); |
| #else |
| local_irq_save(flags); |
| ret = *(volatile u16 *)ptr; |
| *(volatile u16 *)ptr = x; |
| local_irq_restore(flags); |
| return ret; |
| #endif /* __xchg_u16 */ |
| |
| case 4: |
| #ifdef __xchg_u32 |
| return __xchg_u32(x, ptr); |
| #else |
| local_irq_save(flags); |
| ret = *(volatile u32 *)ptr; |
| *(volatile u32 *)ptr = x; |
| local_irq_restore(flags); |
| return ret; |
| #endif /* __xchg_u32 */ |
| |
| #ifdef CONFIG_64BIT |
| case 8: |
| #ifdef __xchg_u64 |
| return __xchg_u64(x, ptr); |
| #else |
| local_irq_save(flags); |
| ret = *(volatile u64 *)ptr; |
| *(volatile u64 *)ptr = x; |
| local_irq_restore(flags); |
| return ret; |
| #endif /* __xchg_u64 */ |
| #endif /* CONFIG_64BIT */ |
| |
| default: |
| __xchg_called_with_bad_pointer(); |
| return x; |
| } |
| } |
| |
| #define xchg(ptr, x) \ |
| ((__typeof__(*(ptr))) __xchg((unsigned long)(x), (ptr), sizeof(*(ptr)))) |
| |
| #endif /* !__ASSEMBLY__ */ |
| |
| #endif /* __ASM_GENERIC_SYSTEM_H */ |