arch/arm/mach-msm/board-apq8064.c - kernel/msm - Gitiles

 /* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
  * only version 2 as published by the Free Software Foundation.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  *
  */
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/i2c.h>
 #include <linux/msm_ssbi.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
 #include <asm/mach/mmc.h>

 #include <mach/board.h>
 #include <mach/msm_iomap.h>
 #include <linux/usb/msm_hsusb.h>
 #include <linux/usb/android.h>
 #include <mach/socinfo.h>
 #include <mach/msm_spi.h>
 #include "timer.h"
 #include "devices.h"
 #include <mach/gpio.h>
 #include <mach/gpiomux.h>

 #include "board-apq8064.h"

 static int __init gpiomux_init(void)
 {
 	int rc;

 	rc = msm_gpiomux_init(NR_GPIO_IRQS);
 	if (rc) {
 		pr_err(KERN_ERR "msm_gpiomux_init failed %d\n", rc);
 		return rc;
 	}
 	return 0;
 }

 #ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
 static unsigned int sdc1_sup_clk_rates[] = {
 	400000, 24000000, 48000000, 96000000
 };

 static struct mmc_platform_data sdc1_data = {
 	.ocr_mask       = MMC_VDD_27_28 | MMC_VDD_28_29,
 	.mmc_bus_width  = MMC_CAP_4_BIT_DATA,
 	.sup_clk_table	= sdc1_sup_clk_rates,
 	.sup_clk_cnt	= ARRAY_SIZE(sdc1_sup_clk_rates),
 };
 static struct mmc_platform_data *apq8064_sdc1_pdata = &sdc1_data;
 #else
 static struct mmc_platform_data *apq8064_sdc1_pdata;
 #endif

 #ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
 static unsigned int sdc3_sup_clk_rates[] = {
 	400000, 24000000, 48000000, 96000000
 };

 static struct mmc_platform_data sdc3_data = {
 	.ocr_mask       = MMC_VDD_27_28 | MMC_VDD_28_29,
 	.mmc_bus_width  = MMC_CAP_4_BIT_DATA,
 	.sup_clk_table	= sdc3_sup_clk_rates,
 	.sup_clk_cnt	= ARRAY_SIZE(sdc3_sup_clk_rates),
 };
 static struct mmc_platform_data *apq8064_sdc3_pdata = &sdc3_data;
 #else
 static struct mmc_platform_data *apq8064_sdc3_pdata;
 #endif

 static void __init apq8064_init_mmc(void)
 {
 	if (machine_is_apq8064_sim()) {
 		if (apq8064_sdc1_pdata)
 			apq8064_sdc1_pdata->disable_bam = true;
 		if (apq8064_sdc3_pdata)
 			apq8064_sdc3_pdata->disable_bam = true;
 	}
 	apq8064_add_sdcc(1, apq8064_sdc1_pdata);
 	apq8064_add_sdcc(3, apq8064_sdc3_pdata);
 }

 static void __init apq8064_map_io(void)
 {
 	msm_map_apq8064_io();
 }

 static void __init apq8064_init_irq(void)
 {
 	unsigned int i;
 	gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
 						(void *)MSM_QGIC_CPU_BASE);

 	/* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
 	writel_relaxed(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);

 	writel_relaxed(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
 	mb();

 	/*
 	 * FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
 	 * as they are configured as level, which does not play nice with
 	 * handle_percpu_irq.
 	 */
 	for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
 		if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
 			irq_set_handler(i, handle_percpu_irq);
 	}
 }

 static struct platform_device *common_devices[] __initdata = {
 	&apq8064_device_qup_i2c_gsbi4,
 	&apq8064_device_qup_spi_gsbi5,
 	&apq8064_device_ssbi_pmic1,
 	&apq8064_device_ssbi_pmic2,
 };

 static struct platform_device *sim_devices[] __initdata = {
 	&apq8064_device_dmov,
 	&apq8064_device_uart_gsbi3,
 };

 static struct platform_device *rumi3_devices[] __initdata = {
 	&apq8064_device_uart_gsbi1,
 };

 static struct msm_spi_platform_data apq8064_qup_spi_gsbi5_pdata = {
 	.max_clock_speed = 26000000,
 };

 static struct msm_otg_platform_data msm_otg_pdata = {
 	.mode			= USB_PERIPHERAL,
 	.otg_control		= OTG_PHY_CONTROL,
 	.phy_type		= SNPS_28NM_INTEGRATED_PHY,
 	.pclk_src_name		= "dfab_usb_hs_clk",
 };

 static struct pm8xxx_mpp_platform_data
 apq8064_pm8921_mpp_pdata __devinitdata = {
 	.mpp_base	= PM8921_MPP_PM_TO_SYS(1),
 };

 static struct pm8xxx_gpio_platform_data
 apq8064_pm8921_gpio_pdata __devinitdata = {
 	.gpio_base	= PM8921_GPIO_PM_TO_SYS(1),
 };

 static struct pm8xxx_irq_platform_data
 apq8064_pm8921_irq_pdata __devinitdata = {
 	.irq_base		= PM8921_IRQ_BASE,
 	.devirq			= MSM_GPIO_TO_INT(74),
 	.irq_trigger_flag	= IRQF_TRIGGER_LOW,
 };

 static struct pm8921_platform_data
 apq8064_pm8921_platform_data __devinitdata = {
 	.regulator_pdatas	= msm8064_pm8921_regulator_pdata,
 	.irq_pdata		= &apq8064_pm8921_irq_pdata,
 	.gpio_pdata		= &apq8064_pm8921_gpio_pdata,
 	.mpp_pdata		= &apq8064_pm8921_mpp_pdata,
 };

 static struct msm_ssbi_platform_data apq8064_ssbi_pm8921_pdata __devinitdata = {
 	.controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
 	.slave	= {
 		.name		= "pm8921-core",
 		.platform_data	= &apq8064_pm8921_platform_data,
 	},
 };

 static struct msm_ssbi_platform_data apq8064_ssbi_pm8821_pdata __devinitdata = {
 	.controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
 	.slave	= {
 		.name	= "pm8821-core",
 	},
 };

 static struct msm_i2c_platform_data apq8064_i2c_qup_gsbi4_pdata = {
 	.clk_freq = 100000,
 	.src_clk_rate = 24000000,
 };

 static void __init apq8064_i2c_init(void)
 {
 	apq8064_device_qup_i2c_gsbi4.dev.platform_data =
 					&apq8064_i2c_qup_gsbi4_pdata;
 }

 static void __init apq8064_common_init(void)
 {
 	if (socinfo_init() < 0)
 		pr_err("socinfo_init() failed!\n");
 	msm_clock_init(&apq8064_dummy_clock_init_data);
 	gpiomux_init();
 	apq8064_i2c_init();

 	apq8064_device_qup_spi_gsbi5.dev.platform_data =
 						&apq8064_qup_spi_gsbi5_pdata;
 	apq8064_device_ssbi_pmic1.dev.platform_data =
 						&apq8064_ssbi_pm8921_pdata;
 	apq8064_device_ssbi_pmic2.dev.platform_data =
 				&apq8064_ssbi_pm8821_pdata;
 	apq8064_device_otg.dev.platform_data = &msm_otg_pdata;
 	apq8064_device_gadget_peripheral.dev.parent = &apq8064_device_otg.dev;
 	apq8064_pm8921_platform_data.num_regulators =
 					msm8064_pm8921_regulator_pdata_len;
 	platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
 	apq8064_init_mmc();
 }

 static void __init apq8064_sim_init(void)
 {
 	apq8064_common_init();
 	platform_add_devices(sim_devices, ARRAY_SIZE(sim_devices));
 }

 static void __init apq8064_rumi3_init(void)
 {
 	apq8064_common_init();
 	platform_add_devices(rumi3_devices, ARRAY_SIZE(rumi3_devices));
 }

 MACHINE_START(APQ8064_SIM, "QCT APQ8064 SIMULATOR")
 	.map_io = apq8064_map_io,
 	.init_irq = apq8064_init_irq,
 	.timer = &msm_timer,
 	.init_machine = apq8064_sim_init,
 MACHINE_END

 MACHINE_START(APQ8064_RUMI3, "QCT APQ8064 RUMI3")
 	.map_io = apq8064_map_io,
 	.init_irq = apq8064_init_irq,
 	.timer = &msm_timer,
 	.init_machine = apq8064_rumi3_init,
 MACHINE_END
	/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
	*
	* This program is free software; you can redistribute it and/or modify
	* it under the terms of the GNU General Public License version 2 and
	* only version 2 as published by the Free Software Foundation.
	*
	* This program is distributed in the hope that it will be useful,
	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	* GNU General Public License for more details.
	*
	*/
	#include <linux/kernel.h>
	#include <linux/platform_device.h>
	#include <linux/io.h>
	#include <linux/irq.h>
	#include <linux/i2c.h>
	#include <linux/msm_ssbi.h>
	#include <asm/mach-types.h>
	#include <asm/mach/arch.h>
	#include <asm/hardware/gic.h>
	#include <asm/mach/mmc.h>

	#include <mach/board.h>
	#include <mach/msm_iomap.h>
	#include <linux/usb/msm_hsusb.h>
	#include <linux/usb/android.h>
	#include <mach/socinfo.h>
	#include <mach/msm_spi.h>
	#include "timer.h"
	#include "devices.h"
	#include <mach/gpio.h>
	#include <mach/gpiomux.h>

	#include "board-apq8064.h"

	static int __init gpiomux_init(void)
	{
	int rc;

	rc = msm_gpiomux_init(NR_GPIO_IRQS);
	if (rc) {
	pr_err(KERN_ERR "msm_gpiomux_init failed %d\n", rc);
	return rc;
	}
	return 0;
	}

	#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
	static unsigned int sdc1_sup_clk_rates[] = {
	400000, 24000000, 48000000, 96000000
	};

	static struct mmc_platform_data sdc1_data = {
	.ocr_mask = MMC_VDD_27_28 \| MMC_VDD_28_29,
	.mmc_bus_width = MMC_CAP_4_BIT_DATA,
	.sup_clk_table = sdc1_sup_clk_rates,
	.sup_clk_cnt = ARRAY_SIZE(sdc1_sup_clk_rates),
	};
	static struct mmc_platform_data *apq8064_sdc1_pdata = &sdc1_data;
	#else
	static struct mmc_platform_data *apq8064_sdc1_pdata;
	#endif

	#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
	static unsigned int sdc3_sup_clk_rates[] = {
	400000, 24000000, 48000000, 96000000
	};

	static struct mmc_platform_data sdc3_data = {
	.ocr_mask = MMC_VDD_27_28 \| MMC_VDD_28_29,
	.mmc_bus_width = MMC_CAP_4_BIT_DATA,
	.sup_clk_table = sdc3_sup_clk_rates,
	.sup_clk_cnt = ARRAY_SIZE(sdc3_sup_clk_rates),
	};
	static struct mmc_platform_data *apq8064_sdc3_pdata = &sdc3_data;
	#else
	static struct mmc_platform_data *apq8064_sdc3_pdata;
	#endif

	static void __init apq8064_init_mmc(void)
	{
	if (machine_is_apq8064_sim()) {
	if (apq8064_sdc1_pdata)
	apq8064_sdc1_pdata->disable_bam = true;
	if (apq8064_sdc3_pdata)
	apq8064_sdc3_pdata->disable_bam = true;
	}
	apq8064_add_sdcc(1, apq8064_sdc1_pdata);
	apq8064_add_sdcc(3, apq8064_sdc3_pdata);
	}

	static void __init apq8064_map_io(void)
	{
	msm_map_apq8064_io();
	}

	static void __init apq8064_init_irq(void)
	{
	unsigned int i;
	gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
	(void *)MSM_QGIC_CPU_BASE);

	/* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
	writel_relaxed(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);

	writel_relaxed(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
	mb();

	/*
	* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
	* as they are configured as level, which does not play nice with
	* handle_percpu_irq.
	*/
	for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
	if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
	irq_set_handler(i, handle_percpu_irq);
	}
	}

	static struct platform_device *common_devices[] __initdata = {
	&apq8064_device_qup_i2c_gsbi4,
	&apq8064_device_qup_spi_gsbi5,
	&apq8064_device_ssbi_pmic1,
	&apq8064_device_ssbi_pmic2,
	};

	static struct platform_device *sim_devices[] __initdata = {
	&apq8064_device_dmov,
	&apq8064_device_uart_gsbi3,
	};

	static struct platform_device *rumi3_devices[] __initdata = {
	&apq8064_device_uart_gsbi1,
	};

	static struct msm_spi_platform_data apq8064_qup_spi_gsbi5_pdata = {
	.max_clock_speed = 26000000,
	};

	static struct msm_otg_platform_data msm_otg_pdata = {
	.mode = USB_PERIPHERAL,
	.otg_control = OTG_PHY_CONTROL,
	.phy_type = SNPS_28NM_INTEGRATED_PHY,
	.pclk_src_name = "dfab_usb_hs_clk",
	};

	static struct pm8xxx_mpp_platform_data
	apq8064_pm8921_mpp_pdata __devinitdata = {
	.mpp_base = PM8921_MPP_PM_TO_SYS(1),
	};

	static struct pm8xxx_gpio_platform_data
	apq8064_pm8921_gpio_pdata __devinitdata = {
	.gpio_base = PM8921_GPIO_PM_TO_SYS(1),
	};

	static struct pm8xxx_irq_platform_data
	apq8064_pm8921_irq_pdata __devinitdata = {
	.irq_base = PM8921_IRQ_BASE,
	.devirq = MSM_GPIO_TO_INT(74),
	.irq_trigger_flag = IRQF_TRIGGER_LOW,
	};

	static struct pm8921_platform_data
	apq8064_pm8921_platform_data __devinitdata = {
	.regulator_pdatas = msm8064_pm8921_regulator_pdata,
	.irq_pdata = &apq8064_pm8921_irq_pdata,
	.gpio_pdata = &apq8064_pm8921_gpio_pdata,
	.mpp_pdata = &apq8064_pm8921_mpp_pdata,
	};

	static struct msm_ssbi_platform_data apq8064_ssbi_pm8921_pdata __devinitdata = {
	.controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
	.slave = {
	.name = "pm8921-core",
	.platform_data = &apq8064_pm8921_platform_data,
	},
	};

	static struct msm_ssbi_platform_data apq8064_ssbi_pm8821_pdata __devinitdata = {
	.controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
	.slave = {
	.name = "pm8821-core",
	},
	};

	static struct msm_i2c_platform_data apq8064_i2c_qup_gsbi4_pdata = {
	.clk_freq = 100000,
	.src_clk_rate = 24000000,
	};

	static void __init apq8064_i2c_init(void)
	{
	apq8064_device_qup_i2c_gsbi4.dev.platform_data =
	&apq8064_i2c_qup_gsbi4_pdata;
	}

	static void __init apq8064_common_init(void)
	{
	if (socinfo_init() < 0)
	pr_err("socinfo_init() failed!\n");
	msm_clock_init(&apq8064_dummy_clock_init_data);
	gpiomux_init();
	apq8064_i2c_init();

	apq8064_device_qup_spi_gsbi5.dev.platform_data =
	&apq8064_qup_spi_gsbi5_pdata;
	apq8064_device_ssbi_pmic1.dev.platform_data =
	&apq8064_ssbi_pm8921_pdata;
	apq8064_device_ssbi_pmic2.dev.platform_data =
	&apq8064_ssbi_pm8821_pdata;
	apq8064_device_otg.dev.platform_data = &msm_otg_pdata;
	apq8064_device_gadget_peripheral.dev.parent = &apq8064_device_otg.dev;
	apq8064_pm8921_platform_data.num_regulators =
	msm8064_pm8921_regulator_pdata_len;
	platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
	apq8064_init_mmc();
	}

	static void __init apq8064_sim_init(void)
	{
	apq8064_common_init();
	platform_add_devices(sim_devices, ARRAY_SIZE(sim_devices));
	}

	static void __init apq8064_rumi3_init(void)
	{
	apq8064_common_init();
	platform_add_devices(rumi3_devices, ARRAY_SIZE(rumi3_devices));
	}

	MACHINE_START(APQ8064_SIM, "QCT APQ8064 SIMULATOR")
	.map_io = apq8064_map_io,
	.init_irq = apq8064_init_irq,
	.timer = &msm_timer,
	.init_machine = apq8064_sim_init,
	MACHINE_END

	MACHINE_START(APQ8064_RUMI3, "QCT APQ8064 RUMI3")
	.map_io = apq8064_map_io,
	.init_irq = apq8064_init_irq,
	.timer = &msm_timer,
	.init_machine = apq8064_rumi3_init,
	MACHINE_END