msm: pm2: Raise SPI interrupt instread of SGI to non boot CPUs
Once APPS comes out of PC and mpdecision want to bring the non-boot
cpus to online, first CORE0 raises the SPI interrupt(MPCORE) to bring
the cores(1/2/3) online. While bringing the cores online, CORE0 raises
the SPI interrupt instead of SGI. Because once APPS does a PC QGIC
looses its state and none of the non-boot cpus are not capable of
receiving the SGI interrupt until cores configure the QGIC PPIs&SGIs
by themselves.
Change-Id: Ic4aedeffbcd3fa2f0aa15e2e8ed7e25a03468f87
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
diff --git a/arch/arm/mach-msm/pm.h b/arch/arm/mach-msm/pm.h
index faefe34..bd61feb 100644
--- a/arch/arm/mach-msm/pm.h
+++ b/arch/arm/mach-msm/pm.h
@@ -1,7 +1,7 @@
/* arch/arm/mach-msm/pm.h
*
* Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2009-2012, The Linux Foundation. All rights reserved.
* Author: San Mehat <san@android.com>
*
* This software is licensed under the terms of the GNU General Public
@@ -27,7 +27,7 @@
#define msm_secondary_startup NULL
#endif
-extern int power_collapsed;
+DECLARE_PER_CPU(int, power_collapsed);
struct msm_pm_irq_calls {
unsigned int (*irq_pending)(void);