Ivo van Doorn | 95ea362 | 2007-09-25 17:57:13 -0700 | [diff] [blame] | 1 | /* |
| 2 | Copyright (C) 2004 - 2007 rt2x00 SourceForge Project |
| 3 | <http://rt2x00.serialmonkey.com> |
| 4 | |
| 5 | This program is free software; you can redistribute it and/or modify |
| 6 | it under the terms of the GNU General Public License as published by |
| 7 | the Free Software Foundation; either version 2 of the License, or |
| 8 | (at your option) any later version. |
| 9 | |
| 10 | This program is distributed in the hope that it will be useful, |
| 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | GNU General Public License for more details. |
| 14 | |
| 15 | You should have received a copy of the GNU General Public License |
| 16 | along with this program; if not, write to the |
| 17 | Free Software Foundation, Inc., |
| 18 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 19 | */ |
| 20 | |
| 21 | /* |
| 22 | Module: rt2x00pci |
| 23 | Abstract: rt2x00 generic pci device routines. |
| 24 | */ |
| 25 | |
| 26 | /* |
| 27 | * Set enviroment defines for rt2x00.h |
| 28 | */ |
| 29 | #define DRV_NAME "rt2x00pci" |
| 30 | |
| 31 | #include <linux/dma-mapping.h> |
| 32 | #include <linux/kernel.h> |
| 33 | #include <linux/module.h> |
| 34 | #include <linux/pci.h> |
| 35 | |
| 36 | #include "rt2x00.h" |
| 37 | #include "rt2x00pci.h" |
| 38 | |
| 39 | /* |
| 40 | * Beacon handlers. |
| 41 | */ |
| 42 | int rt2x00pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb, |
| 43 | struct ieee80211_tx_control *control) |
| 44 | { |
| 45 | struct rt2x00_dev *rt2x00dev = hw->priv; |
| 46 | struct data_ring *ring = |
| 47 | rt2x00lib_get_ring(rt2x00dev, IEEE80211_TX_QUEUE_BEACON); |
| 48 | struct data_entry *entry = rt2x00_get_data_entry(ring); |
| 49 | |
| 50 | /* |
| 51 | * Just in case mac80211 doesn't set this correctly, |
| 52 | * but we need this queue set for the descriptor |
| 53 | * initialization. |
| 54 | */ |
| 55 | control->queue = IEEE80211_TX_QUEUE_BEACON; |
| 56 | |
| 57 | /* |
| 58 | * Update the beacon entry. |
| 59 | */ |
| 60 | memcpy(entry->data_addr, skb->data, skb->len); |
| 61 | rt2x00lib_write_tx_desc(rt2x00dev, entry->priv, |
| 62 | (struct ieee80211_hdr *)skb->data, |
| 63 | skb->len, control); |
| 64 | |
| 65 | /* |
| 66 | * Enable beacon generation. |
| 67 | */ |
| 68 | rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, control->queue); |
| 69 | |
| 70 | return 0; |
| 71 | } |
| 72 | EXPORT_SYMBOL_GPL(rt2x00pci_beacon_update); |
| 73 | |
| 74 | /* |
| 75 | * TX data handlers. |
| 76 | */ |
| 77 | int rt2x00pci_write_tx_data(struct rt2x00_dev *rt2x00dev, |
| 78 | struct data_ring *ring, struct sk_buff *skb, |
| 79 | struct ieee80211_tx_control *control) |
| 80 | { |
| 81 | struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data; |
| 82 | struct data_entry *entry = rt2x00_get_data_entry(ring); |
| 83 | struct data_desc *txd = entry->priv; |
| 84 | u32 word; |
| 85 | |
| 86 | if (rt2x00_ring_full(ring)) { |
| 87 | ieee80211_stop_queue(rt2x00dev->hw, control->queue); |
| 88 | return -EINVAL; |
| 89 | } |
| 90 | |
| 91 | rt2x00_desc_read(txd, 0, &word); |
| 92 | |
| 93 | if (rt2x00_get_field32(word, TXD_ENTRY_OWNER_NIC) || |
| 94 | rt2x00_get_field32(word, TXD_ENTRY_VALID)) { |
| 95 | ERROR(rt2x00dev, |
| 96 | "Arrived at non-free entry in the non-full queue %d.\n" |
| 97 | "Please file bug report to %s.\n", |
| 98 | control->queue, DRV_PROJECT); |
| 99 | ieee80211_stop_queue(rt2x00dev->hw, control->queue); |
| 100 | return -EINVAL; |
| 101 | } |
| 102 | |
| 103 | entry->skb = skb; |
| 104 | memcpy(&entry->tx_status.control, control, sizeof(*control)); |
| 105 | memcpy(entry->data_addr, skb->data, skb->len); |
| 106 | rt2x00lib_write_tx_desc(rt2x00dev, txd, ieee80211hdr, |
| 107 | skb->len, control); |
| 108 | |
| 109 | rt2x00_ring_index_inc(ring); |
| 110 | |
| 111 | if (rt2x00_ring_full(ring)) |
| 112 | ieee80211_stop_queue(rt2x00dev->hw, control->queue); |
| 113 | |
| 114 | return 0; |
| 115 | } |
| 116 | EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data); |
| 117 | |
| 118 | /* |
| 119 | * RX data handlers. |
| 120 | */ |
| 121 | void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev) |
| 122 | { |
| 123 | struct data_ring *ring = rt2x00dev->rx; |
| 124 | struct data_entry *entry; |
| 125 | struct data_desc *rxd; |
| 126 | struct sk_buff *skb; |
Johannes Berg | 4150c57 | 2007-09-17 01:29:23 -0400 | [diff] [blame] | 127 | struct rxdata_entry_desc desc; |
| 128 | u32 word; |
Ivo van Doorn | 95ea362 | 2007-09-25 17:57:13 -0700 | [diff] [blame] | 129 | |
| 130 | while (1) { |
| 131 | entry = rt2x00_get_data_entry(ring); |
| 132 | rxd = entry->priv; |
Johannes Berg | 4150c57 | 2007-09-17 01:29:23 -0400 | [diff] [blame] | 133 | rt2x00_desc_read(rxd, 0, &word); |
Ivo van Doorn | 95ea362 | 2007-09-25 17:57:13 -0700 | [diff] [blame] | 134 | |
Johannes Berg | 4150c57 | 2007-09-17 01:29:23 -0400 | [diff] [blame] | 135 | if (rt2x00_get_field32(word, RXD_ENTRY_OWNER_NIC)) |
Ivo van Doorn | 95ea362 | 2007-09-25 17:57:13 -0700 | [diff] [blame] | 136 | break; |
| 137 | |
Johannes Berg | 4150c57 | 2007-09-17 01:29:23 -0400 | [diff] [blame] | 138 | memset(&desc, 0x00, sizeof(desc)); |
| 139 | rt2x00dev->ops->lib->fill_rxdone(entry, &desc); |
Ivo van Doorn | 95ea362 | 2007-09-25 17:57:13 -0700 | [diff] [blame] | 140 | |
| 141 | /* |
| 142 | * Allocate the sk_buffer, initialize it and copy |
| 143 | * all data into it. |
| 144 | */ |
Johannes Berg | 4150c57 | 2007-09-17 01:29:23 -0400 | [diff] [blame] | 145 | skb = dev_alloc_skb(desc.size + NET_IP_ALIGN); |
Ivo van Doorn | 95ea362 | 2007-09-25 17:57:13 -0700 | [diff] [blame] | 146 | if (!skb) |
| 147 | return; |
| 148 | |
| 149 | skb_reserve(skb, NET_IP_ALIGN); |
Johannes Berg | 4150c57 | 2007-09-17 01:29:23 -0400 | [diff] [blame] | 150 | skb_put(skb, desc.size); |
| 151 | memcpy(skb->data, entry->data_addr, desc.size); |
Ivo van Doorn | 95ea362 | 2007-09-25 17:57:13 -0700 | [diff] [blame] | 152 | |
| 153 | /* |
| 154 | * Send the frame to rt2x00lib for further processing. |
| 155 | */ |
Johannes Berg | 4150c57 | 2007-09-17 01:29:23 -0400 | [diff] [blame] | 156 | rt2x00lib_rxdone(entry, skb, &desc); |
Ivo van Doorn | 95ea362 | 2007-09-25 17:57:13 -0700 | [diff] [blame] | 157 | |
Ivo van Doorn | 95ea362 | 2007-09-25 17:57:13 -0700 | [diff] [blame] | 158 | if (test_bit(DEVICE_ENABLED_RADIO, &ring->rt2x00dev->flags)) { |
Johannes Berg | 4150c57 | 2007-09-17 01:29:23 -0400 | [diff] [blame] | 159 | rt2x00_set_field32(&word, RXD_ENTRY_OWNER_NIC, 1); |
| 160 | rt2x00_desc_write(rxd, 0, word); |
Ivo van Doorn | 95ea362 | 2007-09-25 17:57:13 -0700 | [diff] [blame] | 161 | } |
| 162 | |
| 163 | rt2x00_ring_index_inc(ring); |
| 164 | } |
| 165 | } |
| 166 | EXPORT_SYMBOL_GPL(rt2x00pci_rxdone); |
| 167 | |
| 168 | /* |
| 169 | * Device initialization handlers. |
| 170 | */ |
| 171 | #define priv_offset(__ring, __i) \ |
| 172 | ({ \ |
| 173 | ring->data_addr + (i * ring->desc_size); \ |
| 174 | }) |
| 175 | |
| 176 | #define data_addr_offset(__ring, __i) \ |
| 177 | ({ \ |
| 178 | (__ring)->data_addr + \ |
| 179 | ((__ring)->stats.limit * (__ring)->desc_size) + \ |
| 180 | ((__i) * (__ring)->data_size); \ |
| 181 | }) |
| 182 | |
| 183 | #define data_dma_offset(__ring, __i) \ |
| 184 | ({ \ |
| 185 | (__ring)->data_dma + \ |
| 186 | ((__ring)->stats.limit * (__ring)->desc_size) + \ |
| 187 | ((__i) * (__ring)->data_size); \ |
| 188 | }) |
| 189 | |
| 190 | static int rt2x00pci_alloc_dma(struct rt2x00_dev *rt2x00dev, |
| 191 | struct data_ring *ring) |
| 192 | { |
| 193 | unsigned int i; |
| 194 | |
| 195 | /* |
| 196 | * Allocate DMA memory for descriptor and buffer. |
| 197 | */ |
| 198 | ring->data_addr = pci_alloc_consistent(rt2x00dev_pci(rt2x00dev), |
| 199 | rt2x00_get_ring_size(ring), |
| 200 | &ring->data_dma); |
| 201 | if (!ring->data_addr) |
| 202 | return -ENOMEM; |
| 203 | |
| 204 | /* |
| 205 | * Initialize all ring entries to contain valid |
| 206 | * addresses. |
| 207 | */ |
| 208 | for (i = 0; i < ring->stats.limit; i++) { |
| 209 | ring->entry[i].priv = priv_offset(ring, i); |
| 210 | ring->entry[i].data_addr = data_addr_offset(ring, i); |
| 211 | ring->entry[i].data_dma = data_dma_offset(ring, i); |
| 212 | } |
| 213 | |
| 214 | return 0; |
| 215 | } |
| 216 | |
| 217 | static void rt2x00pci_free_dma(struct rt2x00_dev *rt2x00dev, |
| 218 | struct data_ring *ring) |
| 219 | { |
| 220 | if (ring->data_addr) |
| 221 | pci_free_consistent(rt2x00dev_pci(rt2x00dev), |
| 222 | rt2x00_get_ring_size(ring), |
| 223 | ring->data_addr, ring->data_dma); |
| 224 | ring->data_addr = NULL; |
| 225 | } |
| 226 | |
| 227 | int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev) |
| 228 | { |
| 229 | struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev); |
| 230 | struct data_ring *ring; |
| 231 | int status; |
| 232 | |
| 233 | /* |
| 234 | * Allocate DMA |
| 235 | */ |
| 236 | ring_for_each(rt2x00dev, ring) { |
| 237 | status = rt2x00pci_alloc_dma(rt2x00dev, ring); |
| 238 | if (status) |
| 239 | goto exit; |
| 240 | } |
| 241 | |
| 242 | /* |
| 243 | * Register interrupt handler. |
| 244 | */ |
| 245 | status = request_irq(pci_dev->irq, rt2x00dev->ops->lib->irq_handler, |
| 246 | IRQF_SHARED, pci_name(pci_dev), rt2x00dev); |
| 247 | if (status) { |
| 248 | ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n", |
| 249 | pci_dev->irq, status); |
| 250 | return status; |
| 251 | } |
| 252 | |
| 253 | return 0; |
| 254 | |
| 255 | exit: |
| 256 | rt2x00pci_uninitialize(rt2x00dev); |
| 257 | |
| 258 | return status; |
| 259 | } |
| 260 | EXPORT_SYMBOL_GPL(rt2x00pci_initialize); |
| 261 | |
| 262 | void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev) |
| 263 | { |
| 264 | struct data_ring *ring; |
| 265 | |
| 266 | /* |
| 267 | * Free irq line. |
| 268 | */ |
| 269 | free_irq(rt2x00dev_pci(rt2x00dev)->irq, rt2x00dev); |
| 270 | |
| 271 | /* |
| 272 | * Free DMA |
| 273 | */ |
| 274 | ring_for_each(rt2x00dev, ring) |
| 275 | rt2x00pci_free_dma(rt2x00dev, ring); |
| 276 | } |
| 277 | EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize); |
| 278 | |
| 279 | /* |
| 280 | * PCI driver handlers. |
| 281 | */ |
| 282 | static void rt2x00pci_free_reg(struct rt2x00_dev *rt2x00dev) |
| 283 | { |
| 284 | kfree(rt2x00dev->rf); |
| 285 | rt2x00dev->rf = NULL; |
| 286 | |
| 287 | kfree(rt2x00dev->eeprom); |
| 288 | rt2x00dev->eeprom = NULL; |
| 289 | |
| 290 | if (rt2x00dev->csr_addr) { |
| 291 | iounmap(rt2x00dev->csr_addr); |
| 292 | rt2x00dev->csr_addr = NULL; |
| 293 | } |
| 294 | } |
| 295 | |
| 296 | static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev) |
| 297 | { |
| 298 | struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev); |
| 299 | |
| 300 | rt2x00dev->csr_addr = ioremap(pci_resource_start(pci_dev, 0), |
| 301 | pci_resource_len(pci_dev, 0)); |
| 302 | if (!rt2x00dev->csr_addr) |
| 303 | goto exit; |
| 304 | |
| 305 | rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL); |
| 306 | if (!rt2x00dev->eeprom) |
| 307 | goto exit; |
| 308 | |
| 309 | rt2x00dev->rf = kzalloc(rt2x00dev->ops->rf_size, GFP_KERNEL); |
| 310 | if (!rt2x00dev->rf) |
| 311 | goto exit; |
| 312 | |
| 313 | return 0; |
| 314 | |
| 315 | exit: |
| 316 | ERROR_PROBE("Failed to allocate registers.\n"); |
| 317 | |
| 318 | rt2x00pci_free_reg(rt2x00dev); |
| 319 | |
| 320 | return -ENOMEM; |
| 321 | } |
| 322 | |
| 323 | int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id) |
| 324 | { |
| 325 | struct rt2x00_ops *ops = (struct rt2x00_ops *)id->driver_data; |
| 326 | struct ieee80211_hw *hw; |
| 327 | struct rt2x00_dev *rt2x00dev; |
| 328 | int retval; |
| 329 | |
| 330 | retval = pci_request_regions(pci_dev, pci_name(pci_dev)); |
| 331 | if (retval) { |
| 332 | ERROR_PROBE("PCI request regions failed.\n"); |
| 333 | return retval; |
| 334 | } |
| 335 | |
| 336 | retval = pci_enable_device(pci_dev); |
| 337 | if (retval) { |
| 338 | ERROR_PROBE("Enable device failed.\n"); |
| 339 | goto exit_release_regions; |
| 340 | } |
| 341 | |
| 342 | pci_set_master(pci_dev); |
| 343 | |
| 344 | if (pci_set_mwi(pci_dev)) |
| 345 | ERROR_PROBE("MWI not available.\n"); |
| 346 | |
| 347 | if (pci_set_dma_mask(pci_dev, DMA_64BIT_MASK) && |
| 348 | pci_set_dma_mask(pci_dev, DMA_32BIT_MASK)) { |
| 349 | ERROR_PROBE("PCI DMA not supported.\n"); |
| 350 | retval = -EIO; |
| 351 | goto exit_disable_device; |
| 352 | } |
| 353 | |
| 354 | hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw); |
| 355 | if (!hw) { |
| 356 | ERROR_PROBE("Failed to allocate hardware.\n"); |
| 357 | retval = -ENOMEM; |
| 358 | goto exit_disable_device; |
| 359 | } |
| 360 | |
| 361 | pci_set_drvdata(pci_dev, hw); |
| 362 | |
| 363 | rt2x00dev = hw->priv; |
| 364 | rt2x00dev->dev = pci_dev; |
| 365 | rt2x00dev->ops = ops; |
| 366 | rt2x00dev->hw = hw; |
| 367 | |
| 368 | retval = rt2x00pci_alloc_reg(rt2x00dev); |
| 369 | if (retval) |
| 370 | goto exit_free_device; |
| 371 | |
| 372 | retval = rt2x00lib_probe_dev(rt2x00dev); |
| 373 | if (retval) |
| 374 | goto exit_free_reg; |
| 375 | |
| 376 | return 0; |
| 377 | |
| 378 | exit_free_reg: |
| 379 | rt2x00pci_free_reg(rt2x00dev); |
| 380 | |
| 381 | exit_free_device: |
| 382 | ieee80211_free_hw(hw); |
| 383 | |
| 384 | exit_disable_device: |
| 385 | if (retval != -EBUSY) |
| 386 | pci_disable_device(pci_dev); |
| 387 | |
| 388 | exit_release_regions: |
| 389 | pci_release_regions(pci_dev); |
| 390 | |
| 391 | pci_set_drvdata(pci_dev, NULL); |
| 392 | |
| 393 | return retval; |
| 394 | } |
| 395 | EXPORT_SYMBOL_GPL(rt2x00pci_probe); |
| 396 | |
| 397 | void rt2x00pci_remove(struct pci_dev *pci_dev) |
| 398 | { |
| 399 | struct ieee80211_hw *hw = pci_get_drvdata(pci_dev); |
| 400 | struct rt2x00_dev *rt2x00dev = hw->priv; |
| 401 | |
| 402 | /* |
| 403 | * Free all allocated data. |
| 404 | */ |
| 405 | rt2x00lib_remove_dev(rt2x00dev); |
| 406 | rt2x00pci_free_reg(rt2x00dev); |
| 407 | ieee80211_free_hw(hw); |
| 408 | |
| 409 | /* |
| 410 | * Free the PCI device data. |
| 411 | */ |
| 412 | pci_set_drvdata(pci_dev, NULL); |
| 413 | pci_disable_device(pci_dev); |
| 414 | pci_release_regions(pci_dev); |
| 415 | } |
| 416 | EXPORT_SYMBOL_GPL(rt2x00pci_remove); |
| 417 | |
| 418 | #ifdef CONFIG_PM |
| 419 | int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state) |
| 420 | { |
| 421 | struct ieee80211_hw *hw = pci_get_drvdata(pci_dev); |
| 422 | struct rt2x00_dev *rt2x00dev = hw->priv; |
| 423 | int retval; |
| 424 | |
| 425 | retval = rt2x00lib_suspend(rt2x00dev, state); |
| 426 | if (retval) |
| 427 | return retval; |
| 428 | |
| 429 | rt2x00pci_free_reg(rt2x00dev); |
| 430 | |
| 431 | pci_save_state(pci_dev); |
| 432 | pci_disable_device(pci_dev); |
| 433 | return pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state)); |
| 434 | } |
| 435 | EXPORT_SYMBOL_GPL(rt2x00pci_suspend); |
| 436 | |
| 437 | int rt2x00pci_resume(struct pci_dev *pci_dev) |
| 438 | { |
| 439 | struct ieee80211_hw *hw = pci_get_drvdata(pci_dev); |
| 440 | struct rt2x00_dev *rt2x00dev = hw->priv; |
| 441 | int retval; |
| 442 | |
| 443 | if (pci_set_power_state(pci_dev, PCI_D0) || |
| 444 | pci_enable_device(pci_dev) || |
| 445 | pci_restore_state(pci_dev)) { |
| 446 | ERROR(rt2x00dev, "Failed to resume device.\n"); |
| 447 | return -EIO; |
| 448 | } |
| 449 | |
| 450 | retval = rt2x00pci_alloc_reg(rt2x00dev); |
| 451 | if (retval) |
| 452 | return retval; |
| 453 | |
| 454 | retval = rt2x00lib_resume(rt2x00dev); |
| 455 | if (retval) |
| 456 | goto exit_free_reg; |
| 457 | |
| 458 | return 0; |
| 459 | |
| 460 | exit_free_reg: |
| 461 | rt2x00pci_free_reg(rt2x00dev); |
| 462 | |
| 463 | return retval; |
| 464 | } |
| 465 | EXPORT_SYMBOL_GPL(rt2x00pci_resume); |
| 466 | #endif /* CONFIG_PM */ |
| 467 | |
| 468 | /* |
| 469 | * rt2x00pci module information. |
| 470 | */ |
| 471 | MODULE_AUTHOR(DRV_PROJECT); |
| 472 | MODULE_VERSION(DRV_VERSION); |
| 473 | MODULE_DESCRIPTION("rt2x00 library"); |
| 474 | MODULE_LICENSE("GPL"); |