blob: 1a24d317e7a3a5d52e11724e93bf2400db78a4a1 [file] [log] [blame]
Florian Fainelli7ca5dc12009-06-24 11:12:57 +02001/*
2 * Copyright (C) 2006,2007 Felix Fietkau <nbd@openwrt.org>
3 * Copyright (C) 2006,2007 Eugene Konev <ejka@openwrt.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include <linux/init.h>
21#include <linux/types.h>
22#include <linux/module.h>
23#include <linux/delay.h>
24#include <linux/dma-mapping.h>
25#include <linux/platform_device.h>
26#include <linux/mtd/physmap.h>
27#include <linux/serial.h>
28#include <linux/serial_8250.h>
29#include <linux/ioport.h>
30#include <linux/io.h>
Florian Fainelli7ca5dc12009-06-24 11:12:57 +020031#include <linux/vlynq.h>
32#include <linux/leds.h>
33#include <linux/string.h>
34#include <linux/etherdevice.h>
Florian Fainelli1e2c8d82009-08-04 10:52:47 +000035#include <linux/phy.h>
36#include <linux/phy_fixed.h>
Florian Fainelli5f3c9092010-01-03 21:16:51 +010037#include <linux/gpio.h>
Florian Fainelli780019d2010-01-27 09:10:06 +010038#include <linux/clk.h>
Florian Fainelli7ca5dc12009-06-24 11:12:57 +020039
40#include <asm/addrspace.h>
41#include <asm/mach-ar7/ar7.h>
42#include <asm/mach-ar7/gpio.h>
43#include <asm/mach-ar7/prom.h>
44
Alexander Clouter4d1da8c2010-01-31 19:38:19 +000045/*****************************************************************************
46 * VLYNQ Bus
47 ****************************************************************************/
Florian Fainelli7ca5dc12009-06-24 11:12:57 +020048struct plat_vlynq_data {
49 struct plat_vlynq_ops ops;
50 int gpio_bit;
51 int reset_bit;
52};
53
Florian Fainelli7ca5dc12009-06-24 11:12:57 +020054static int vlynq_on(struct vlynq_device *dev)
55{
Alexander Clouter4d1da8c2010-01-31 19:38:19 +000056 int ret;
Florian Fainelli7ca5dc12009-06-24 11:12:57 +020057 struct plat_vlynq_data *pdata = dev->dev.platform_data;
58
Alexander Clouter4d1da8c2010-01-31 19:38:19 +000059 ret = gpio_request(pdata->gpio_bit, "vlynq");
60 if (ret)
Florian Fainelli7ca5dc12009-06-24 11:12:57 +020061 goto out;
62
63 ar7_device_reset(pdata->reset_bit);
64
Alexander Clouter4d1da8c2010-01-31 19:38:19 +000065 ret = ar7_gpio_disable(pdata->gpio_bit);
66 if (ret)
Florian Fainelli7ca5dc12009-06-24 11:12:57 +020067 goto out_enabled;
68
Alexander Clouter4d1da8c2010-01-31 19:38:19 +000069 ret = ar7_gpio_enable(pdata->gpio_bit);
70 if (ret)
Florian Fainelli7ca5dc12009-06-24 11:12:57 +020071 goto out_enabled;
72
Alexander Clouter4d1da8c2010-01-31 19:38:19 +000073 ret = gpio_direction_output(pdata->gpio_bit, 0);
74 if (ret)
Florian Fainelli7ca5dc12009-06-24 11:12:57 +020075 goto out_gpio_enabled;
76
77 msleep(50);
78
79 gpio_set_value(pdata->gpio_bit, 1);
Alexander Clouter4d1da8c2010-01-31 19:38:19 +000080
Florian Fainelli7ca5dc12009-06-24 11:12:57 +020081 msleep(50);
82
83 return 0;
84
85out_gpio_enabled:
86 ar7_gpio_disable(pdata->gpio_bit);
87out_enabled:
88 ar7_device_disable(pdata->reset_bit);
89 gpio_free(pdata->gpio_bit);
90out:
Alexander Clouter4d1da8c2010-01-31 19:38:19 +000091 return ret;
Florian Fainelli7ca5dc12009-06-24 11:12:57 +020092}
93
94static void vlynq_off(struct vlynq_device *dev)
95{
96 struct plat_vlynq_data *pdata = dev->dev.platform_data;
Alexander Clouter4d1da8c2010-01-31 19:38:19 +000097
Florian Fainelli7ca5dc12009-06-24 11:12:57 +020098 ar7_gpio_disable(pdata->gpio_bit);
99 gpio_free(pdata->gpio_bit);
100 ar7_device_disable(pdata->reset_bit);
101}
102
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200103static struct resource vlynq_low_res[] = {
104 {
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000105 .name = "regs",
106 .flags = IORESOURCE_MEM,
107 .start = AR7_REGS_VLYNQ0,
108 .end = AR7_REGS_VLYNQ0 + 0xff,
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200109 },
110 {
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000111 .name = "irq",
112 .flags = IORESOURCE_IRQ,
113 .start = 29,
114 .end = 29,
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200115 },
116 {
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000117 .name = "mem",
118 .flags = IORESOURCE_MEM,
119 .start = 0x04000000,
120 .end = 0x04ffffff,
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200121 },
122 {
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000123 .name = "devirq",
124 .flags = IORESOURCE_IRQ,
125 .start = 80,
126 .end = 111,
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200127 },
128};
129
130static struct resource vlynq_high_res[] = {
131 {
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000132 .name = "regs",
133 .flags = IORESOURCE_MEM,
134 .start = AR7_REGS_VLYNQ1,
135 .end = AR7_REGS_VLYNQ1 + 0xff,
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200136 },
137 {
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000138 .name = "irq",
139 .flags = IORESOURCE_IRQ,
140 .start = 33,
141 .end = 33,
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200142 },
143 {
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000144 .name = "mem",
145 .flags = IORESOURCE_MEM,
146 .start = 0x0c000000,
147 .end = 0x0cffffff,
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200148 },
149 {
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000150 .name = "devirq",
151 .flags = IORESOURCE_IRQ,
152 .start = 112,
153 .end = 143,
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200154 },
155};
156
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200157static struct plat_vlynq_data vlynq_low_data = {
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000158 .ops = {
159 .on = vlynq_on,
160 .off = vlynq_off,
161 },
162 .reset_bit = 20,
163 .gpio_bit = 18,
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200164};
165
166static struct plat_vlynq_data vlynq_high_data = {
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000167 .ops = {
168 .on = vlynq_on,
169 .off = vlynq_off,
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200170 },
Alexander Clouter1e3fb372010-03-12 19:39:48 +0000171 .reset_bit = 16,
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000172 .gpio_bit = 19,
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200173};
174
175static struct platform_device vlynq_low = {
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000176 .id = 0,
177 .name = "vlynq",
178 .dev = {
179 .platform_data = &vlynq_low_data,
180 },
181 .resource = vlynq_low_res,
182 .num_resources = ARRAY_SIZE(vlynq_low_res),
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200183};
184
185static struct platform_device vlynq_high = {
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000186 .id = 1,
187 .name = "vlynq",
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200188 .dev = {
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000189 .platform_data = &vlynq_high_data,
190 },
191 .resource = vlynq_high_res,
192 .num_resources = ARRAY_SIZE(vlynq_high_res),
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200193};
194
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000195/*****************************************************************************
196 * Flash
197 ****************************************************************************/
198static struct resource physmap_flash_resource = {
199 .name = "mem",
200 .flags = IORESOURCE_MEM,
201 .start = 0x10000000,
202 .end = 0x107fffff,
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200203};
204
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000205static struct physmap_flash_data physmap_flash_data = {
206 .width = 2,
Florian Fainellid47fbb52009-07-15 12:09:34 +0200207};
208
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000209static struct platform_device physmap_flash = {
210 .name = "physmap-flash",
211 .dev = {
212 .platform_data = &physmap_flash_data,
213 },
214 .resource = &physmap_flash_resource,
215 .num_resources = 1,
216};
217
218/*****************************************************************************
219 * Ethernet
220 ****************************************************************************/
221static struct resource cpmac_low_res[] = {
222 {
223 .name = "regs",
224 .flags = IORESOURCE_MEM,
225 .start = AR7_REGS_MAC0,
226 .end = AR7_REGS_MAC0 + 0x7ff,
227 },
228 {
229 .name = "irq",
230 .flags = IORESOURCE_IRQ,
231 .start = 27,
Florian Fainelli11454102011-06-12 20:57:18 +0200232 .end = 27,
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000233 },
234};
235
236static struct resource cpmac_high_res[] = {
237 {
238 .name = "regs",
239 .flags = IORESOURCE_MEM,
240 .start = AR7_REGS_MAC1,
241 .end = AR7_REGS_MAC1 + 0x7ff,
242 },
243 {
244 .name = "irq",
245 .flags = IORESOURCE_IRQ,
246 .start = 41,
247 .end = 41,
248 },
249};
250
251static struct fixed_phy_status fixed_phy_status __initdata = {
252 .link = 1,
253 .speed = 100,
254 .duplex = 1,
255};
256
257static struct plat_cpmac_data cpmac_low_data = {
258 .reset_bit = 17,
259 .power_bit = 20,
260 .phy_mask = 0x80000000,
261};
262
263static struct plat_cpmac_data cpmac_high_data = {
264 .reset_bit = 21,
265 .power_bit = 22,
266 .phy_mask = 0x7fffffff,
267};
268
269static u64 cpmac_dma_mask = DMA_BIT_MASK(32);
270
271static struct platform_device cpmac_low = {
272 .id = 0,
273 .name = "cpmac",
274 .dev = {
275 .dma_mask = &cpmac_dma_mask,
276 .coherent_dma_mask = DMA_BIT_MASK(32),
277 .platform_data = &cpmac_low_data,
278 },
279 .resource = cpmac_low_res,
280 .num_resources = ARRAY_SIZE(cpmac_low_res),
281};
282
283static struct platform_device cpmac_high = {
284 .id = 1,
285 .name = "cpmac",
286 .dev = {
287 .dma_mask = &cpmac_dma_mask,
288 .coherent_dma_mask = DMA_BIT_MASK(32),
289 .platform_data = &cpmac_high_data,
290 },
291 .resource = cpmac_high_res,
292 .num_resources = ARRAY_SIZE(cpmac_high_res),
Florian Fainellid47fbb52009-07-15 12:09:34 +0200293};
294
Alexander Clouterd16f7092010-07-05 21:11:26 +0100295static void __init cpmac_get_mac(int instance, unsigned char *dev_addr)
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200296{
Alexander Clouterd16f7092010-07-05 21:11:26 +0100297 char name[5], *mac;
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200298
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200299 sprintf(name, "mac%c", 'a' + instance);
300 mac = prom_getenv(name);
Alexander Clouterd16f7092010-07-05 21:11:26 +0100301 if (!mac && instance) {
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200302 sprintf(name, "mac%c", 'a');
303 mac = prom_getenv(name);
304 }
Alexander Clouterd16f7092010-07-05 21:11:26 +0100305
306 if (mac) {
307 if (sscanf(mac, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx",
308 &dev_addr[0], &dev_addr[1],
309 &dev_addr[2], &dev_addr[3],
310 &dev_addr[4], &dev_addr[5]) != 6) {
311 pr_warning("cannot parse mac address, "
312 "using random address\n");
313 random_ether_addr(dev_addr);
314 }
315 } else
316 random_ether_addr(dev_addr);
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200317}
318
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000319/*****************************************************************************
320 * USB
321 ****************************************************************************/
322static struct resource usb_res[] = {
323 {
324 .name = "regs",
325 .flags = IORESOURCE_MEM,
326 .start = AR7_REGS_USB,
327 .end = AR7_REGS_USB + 0xff,
328 },
329 {
330 .name = "irq",
331 .flags = IORESOURCE_IRQ,
332 .start = 32,
333 .end = 32,
334 },
335 {
336 .name = "mem",
337 .flags = IORESOURCE_MEM,
338 .start = 0x03400000,
Alexander Clouter632b6292010-01-31 19:38:52 +0000339 .end = 0x03401fff,
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000340 },
341};
342
343static struct platform_device ar7_udc = {
344 .name = "ar7_udc",
345 .resource = usb_res,
346 .num_resources = ARRAY_SIZE(usb_res),
347};
348
349/*****************************************************************************
350 * LEDs
351 ****************************************************************************/
352static struct gpio_led default_leds[] = {
353 {
354 .name = "status",
355 .gpio = 8,
356 .active_low = 1,
357 },
358};
359
Florian Fainelli238dd312010-08-29 17:08:44 +0200360static struct gpio_led titan_leds[] = {
361 { .name = "status", .gpio = 8, .active_low = 1, },
362 { .name = "wifi", .gpio = 13, .active_low = 1, },
363};
364
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000365static struct gpio_led dsl502t_leds[] = {
366 {
367 .name = "status",
368 .gpio = 9,
369 .active_low = 1,
370 },
371 {
372 .name = "ethernet",
373 .gpio = 7,
374 .active_low = 1,
375 },
376 {
377 .name = "usb",
378 .gpio = 12,
379 .active_low = 1,
380 },
381};
382
383static struct gpio_led dg834g_leds[] = {
384 {
385 .name = "ppp",
386 .gpio = 6,
387 .active_low = 1,
388 },
389 {
390 .name = "status",
391 .gpio = 7,
392 .active_low = 1,
393 },
394 {
395 .name = "adsl",
396 .gpio = 8,
397 .active_low = 1,
398 },
399 {
400 .name = "wifi",
401 .gpio = 12,
402 .active_low = 1,
403 },
404 {
405 .name = "power",
406 .gpio = 14,
407 .active_low = 1,
408 .default_trigger = "default-on",
409 },
410};
411
412static struct gpio_led fb_sl_leds[] = {
413 {
414 .name = "1",
415 .gpio = 7,
416 },
417 {
418 .name = "2",
419 .gpio = 13,
420 .active_low = 1,
421 },
422 {
423 .name = "3",
424 .gpio = 10,
425 .active_low = 1,
426 },
427 {
428 .name = "4",
429 .gpio = 12,
430 .active_low = 1,
431 },
432 {
433 .name = "5",
434 .gpio = 9,
435 .active_low = 1,
436 },
437};
438
439static struct gpio_led fb_fon_leds[] = {
440 {
441 .name = "1",
442 .gpio = 8,
443 },
444 {
445 .name = "2",
446 .gpio = 3,
447 .active_low = 1,
448 },
449 {
450 .name = "3",
451 .gpio = 5,
452 },
453 {
454 .name = "4",
455 .gpio = 4,
456 .active_low = 1,
457 },
458 {
459 .name = "5",
460 .gpio = 11,
461 .active_low = 1,
462 },
463};
464
Florian Fainellif77138e2011-11-15 20:23:44 +0100465static struct gpio_led gt701_leds[] = {
466 {
467 .name = "inet:green",
468 .gpio = 13,
469 .active_low = 1,
470 },
471 {
472 .name = "usb",
473 .gpio = 12,
474 .active_low = 1,
475 },
476 {
477 .name = "inet:red",
478 .gpio = 9,
479 .active_low = 1,
480 },
481 {
482 .name = "power:red",
483 .gpio = 7,
484 .active_low = 1,
485 },
486 {
487 .name = "power:green",
488 .gpio = 8,
489 .active_low = 1,
490 .default_trigger = "default-on",
491 },
492 {
493 .name = "ethernet",
494 .gpio = 10,
495 .active_low = 1,
496 },
497};
498
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000499static struct gpio_led_platform_data ar7_led_data;
500
501static struct platform_device ar7_gpio_leds = {
502 .name = "leds-gpio",
503 .dev = {
504 .platform_data = &ar7_led_data,
505 }
506};
507
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200508static void __init detect_leds(void)
509{
510 char *prid, *usb_prod;
511
512 /* Default LEDs */
513 ar7_led_data.num_leds = ARRAY_SIZE(default_leds);
514 ar7_led_data.leds = default_leds;
515
516 /* FIXME: the whole thing is unreliable */
517 prid = prom_getenv("ProductID");
518 usb_prod = prom_getenv("usb_prod");
519
520 /* If we can't get the product id from PROM, use the default LEDs */
521 if (!prid)
522 return;
523
524 if (strstr(prid, "Fritz_Box_FON")) {
525 ar7_led_data.num_leds = ARRAY_SIZE(fb_fon_leds);
526 ar7_led_data.leds = fb_fon_leds;
527 } else if (strstr(prid, "Fritz_Box_")) {
528 ar7_led_data.num_leds = ARRAY_SIZE(fb_sl_leds);
529 ar7_led_data.leds = fb_sl_leds;
530 } else if ((!strcmp(prid, "AR7RD") || !strcmp(prid, "AR7DB"))
531 && usb_prod != NULL && strstr(usb_prod, "DSL-502T")) {
532 ar7_led_data.num_leds = ARRAY_SIZE(dsl502t_leds);
533 ar7_led_data.leds = dsl502t_leds;
534 } else if (strstr(prid, "DG834")) {
535 ar7_led_data.num_leds = ARRAY_SIZE(dg834g_leds);
536 ar7_led_data.leds = dg834g_leds;
Florian Fainelli238dd312010-08-29 17:08:44 +0200537 } else if (strstr(prid, "CYWM") || strstr(prid, "CYWL")) {
538 ar7_led_data.num_leds = ARRAY_SIZE(titan_leds);
539 ar7_led_data.leds = titan_leds;
Florian Fainellif77138e2011-11-15 20:23:44 +0100540 } else if (strstr(prid, "GT701")) {
541 ar7_led_data.num_leds = ARRAY_SIZE(gt701_leds);
542 ar7_led_data.leds = gt701_leds;
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200543 }
544}
545
Alexander Clouter4d1da8c2010-01-31 19:38:19 +0000546/*****************************************************************************
547 * Watchdog
548 ****************************************************************************/
549static struct resource ar7_wdt_res = {
550 .name = "regs",
551 .flags = IORESOURCE_MEM,
552 .start = -1, /* Filled at runtime */
553 .end = -1, /* Filled at runtime */
554};
555
556static struct platform_device ar7_wdt = {
557 .name = "ar7_wdt",
558 .resource = &ar7_wdt_res,
559 .num_resources = 1,
560};
561
562/*****************************************************************************
563 * Init
564 ****************************************************************************/
Alexander Clouter70843382010-01-31 19:39:57 +0000565static int __init ar7_register_uarts(void)
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200566{
Florian Fainelli50ca9612009-07-24 13:24:15 +0200567#ifdef CONFIG_SERIAL_8250
Alexander Clouter70843382010-01-31 19:39:57 +0000568 static struct uart_port uart_port __initdata;
Florian Fainelli780019d2010-01-27 09:10:06 +0100569 struct clk *bus_clk;
Alexander Clouter70843382010-01-31 19:39:57 +0000570 int res;
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200571
Alexander Clouter70843382010-01-31 19:39:57 +0000572 memset(&uart_port, 0, sizeof(struct uart_port));
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200573
Florian Fainelli780019d2010-01-27 09:10:06 +0100574 bus_clk = clk_get(NULL, "bus");
575 if (IS_ERR(bus_clk))
Ralf Baechleab75dc02011-11-17 15:07:31 +0000576 panic("unable to get bus clk");
Florian Fainelli780019d2010-01-27 09:10:06 +0100577
Florian Fainelli154615d2010-05-16 15:25:17 +0200578 uart_port.type = PORT_AR7;
Alexander Clouter70843382010-01-31 19:39:57 +0000579 uart_port.uartclk = clk_get_rate(bus_clk) / 2;
580 uart_port.iotype = UPIO_MEM32;
581 uart_port.regshift = 2;
582
583 uart_port.line = 0;
584 uart_port.irq = AR7_IRQ_UART0;
585 uart_port.mapbase = AR7_REGS_UART0;
586 uart_port.membase = ioremap(uart_port.mapbase, 256);
587
588 res = early_serial_setup(&uart_port);
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200589 if (res)
590 return res;
591
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200592 /* Only TNETD73xx have a second serial port */
593 if (ar7_has_second_uart()) {
Alexander Clouter70843382010-01-31 19:39:57 +0000594 uart_port.line = 1;
595 uart_port.irq = AR7_IRQ_UART1;
596 uart_port.mapbase = UR8_REGS_UART1;
597 uart_port.membase = ioremap(uart_port.mapbase, 256);
598
599 res = early_serial_setup(&uart_port);
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200600 if (res)
601 return res;
602 }
Alexander Clouter70843382010-01-31 19:39:57 +0000603#endif
604
605 return 0;
606}
607
Florian Fainelli238dd312010-08-29 17:08:44 +0200608static void __init titan_fixup_devices(void)
609{
610 /* Set vlynq0 data */
611 vlynq_low_data.reset_bit = 15;
612 vlynq_low_data.gpio_bit = 14;
613
614 /* Set vlynq1 data */
615 vlynq_high_data.reset_bit = 16;
616 vlynq_high_data.gpio_bit = 7;
617
618 /* Set vlynq0 resources */
619 vlynq_low_res[0].start = TITAN_REGS_VLYNQ0;
620 vlynq_low_res[0].end = TITAN_REGS_VLYNQ0 + 0xff;
621 vlynq_low_res[1].start = 33;
622 vlynq_low_res[1].end = 33;
623 vlynq_low_res[2].start = 0x0c000000;
624 vlynq_low_res[2].end = 0x0fffffff;
625 vlynq_low_res[3].start = 80;
626 vlynq_low_res[3].end = 111;
627
628 /* Set vlynq1 resources */
629 vlynq_high_res[0].start = TITAN_REGS_VLYNQ1;
630 vlynq_high_res[0].end = TITAN_REGS_VLYNQ1 + 0xff;
631 vlynq_high_res[1].start = 34;
632 vlynq_high_res[1].end = 34;
633 vlynq_high_res[2].start = 0x40000000;
634 vlynq_high_res[2].end = 0x43ffffff;
635 vlynq_high_res[3].start = 112;
636 vlynq_high_res[3].end = 143;
637
638 /* Set cpmac0 data */
639 cpmac_low_data.phy_mask = 0x40000000;
640
641 /* Set cpmac1 data */
642 cpmac_high_data.phy_mask = 0x80000000;
643
644 /* Set cpmac0 resources */
645 cpmac_low_res[0].start = TITAN_REGS_MAC0;
646 cpmac_low_res[0].end = TITAN_REGS_MAC0 + 0x7ff;
647
648 /* Set cpmac1 resources */
649 cpmac_high_res[0].start = TITAN_REGS_MAC1;
650 cpmac_high_res[0].end = TITAN_REGS_MAC1 + 0x7ff;
651}
652
Alexander Clouter70843382010-01-31 19:39:57 +0000653static int __init ar7_register_devices(void)
654{
655 void __iomem *bootcr;
656 u32 val;
Alexander Clouter70843382010-01-31 19:39:57 +0000657 int res;
658
659 res = ar7_register_uarts();
660 if (res)
661 pr_err("unable to setup uart(s): %d\n", res);
662
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200663 res = platform_device_register(&physmap_flash);
664 if (res)
Alexander Clouter70843382010-01-31 19:39:57 +0000665 pr_warning("unable to register physmap-flash: %d\n", res);
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200666
Florian Fainelli238dd312010-08-29 17:08:44 +0200667 if (ar7_is_titan())
668 titan_fixup_devices();
669
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200670 ar7_device_disable(vlynq_low_data.reset_bit);
671 res = platform_device_register(&vlynq_low);
672 if (res)
Alexander Clouter70843382010-01-31 19:39:57 +0000673 pr_warning("unable to register vlynq-low: %d\n", res);
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200674
675 if (ar7_has_high_vlynq()) {
676 ar7_device_disable(vlynq_high_data.reset_bit);
677 res = platform_device_register(&vlynq_high);
678 if (res)
Alexander Clouter70843382010-01-31 19:39:57 +0000679 pr_warning("unable to register vlynq-high: %d\n", res);
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200680 }
681
682 if (ar7_has_high_cpmac()) {
Alexander Clouter727c0072010-03-13 00:09:15 +0000683 res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status);
Alexander Clouter70843382010-01-31 19:39:57 +0000684 if (!res) {
685 cpmac_get_mac(1, cpmac_high_data.dev_addr);
686
687 res = platform_device_register(&cpmac_high);
688 if (res)
689 pr_warning("unable to register cpmac-high: %d\n", res);
690 } else
691 pr_warning("unable to add cpmac-high phy: %d\n", res);
692 } else
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200693 cpmac_low_data.phy_mask = 0xffffffff;
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200694
Florian Fainelli1e2c8d82009-08-04 10:52:47 +0000695 res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status);
Alexander Clouter70843382010-01-31 19:39:57 +0000696 if (!res) {
697 cpmac_get_mac(0, cpmac_low_data.dev_addr);
698 res = platform_device_register(&cpmac_low);
699 if (res)
700 pr_warning("unable to register cpmac-low: %d\n", res);
701 } else
702 pr_warning("unable to add cpmac-low phy: %d\n", res);
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200703
704 detect_leds();
705 res = platform_device_register(&ar7_gpio_leds);
706 if (res)
Alexander Clouter70843382010-01-31 19:39:57 +0000707 pr_warning("unable to register leds: %d\n", res);
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200708
709 res = platform_device_register(&ar7_udc);
Alexander Clouter70843382010-01-31 19:39:57 +0000710 if (res)
711 pr_warning("unable to register usb slave: %d\n", res);
Florian Fainelli72838a12009-08-04 23:09:36 +0200712
713 /* Register watchdog only if enabled in hardware */
Alexander Clouter70843382010-01-31 19:39:57 +0000714 bootcr = ioremap_nocache(AR7_REGS_DCL, 4);
715 val = readl(bootcr);
716 iounmap(bootcr);
717 if (val & AR7_WDT_HW_ENA) {
Florian Fainelli9c1b0132010-05-11 11:20:09 +0200718 if (ar7_has_high_vlynq())
Alexander Clouter70843382010-01-31 19:39:57 +0000719 ar7_wdt_res.start = UR8_REGS_WDT;
Florian Fainelli9c1b0132010-05-11 11:20:09 +0200720 else
721 ar7_wdt_res.start = AR7_REGS_WDT;
Florian Fainellid47fbb52009-07-15 12:09:34 +0200722
Alexander Clouter70843382010-01-31 19:39:57 +0000723 ar7_wdt_res.end = ar7_wdt_res.start + 0x20;
724 res = platform_device_register(&ar7_wdt);
725 if (res)
726 pr_warning("unable to register watchdog: %d\n", res);
727 }
728
729 return 0;
Florian Fainelli7ca5dc12009-06-24 11:12:57 +0200730}
Florian Fainelli142a2ce2010-05-11 11:20:14 +0200731device_initcall(ar7_register_devices);