blob: db2633f67789ad994df5b0fb9527c5d1f347e7bd [file] [log] [blame]
Chris Zankel9a8fd552005-06-23 22:01:26 -07001/*
2 * include/asm-xtensa/dma.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2003 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_DMA_H
12#define _XTENSA_DMA_H
13
Chris Zankel9a8fd552005-06-23 22:01:26 -070014#include <asm/io.h> /* need byte IO */
15#include <xtensa/config/core.h>
16
17/*
18 * This is only to be defined if we have PC-like DMA.
19 * By default this is not true on an Xtensa processor,
20 * however on boards with a PCI bus, such functionality
21 * might be emulated externally.
22 *
23 * NOTE: there still exists driver code that assumes
24 * this is defined, eg. drivers/sound/soundcard.c (as of 2.4).
25 */
26#define MAX_DMA_CHANNELS 8
27
28/*
29 * The maximum virtual address to which DMA transfers
30 * can be performed on this platform.
31 *
32 * NOTE: This is board (platform) specific, not processor-specific!
33 *
34 * NOTE: This assumes DMA transfers can only be performed on
35 * the section of physical memory contiguously mapped in virtual
36 * space for the kernel. For the Xtensa architecture, this
37 * means the maximum possible size of this DMA area is
38 * the size of the statically mapped kernel segment
39 * (XCHAL_KSEG_{CACHED,BYPASS}_SIZE), ie. 128 MB.
40 *
41 * NOTE: When the entire KSEG area is DMA capable, we substract
42 * one from the max address so that the virt_to_phys() macro
43 * works correctly on the address (otherwise the address
44 * enters another area, and virt_to_phys() may not return
45 * the value desired).
46 */
47#define MAX_DMA_ADDRESS (PAGE_OFFSET + XCHAL_KSEG_CACHED_SIZE - 1)
48
49/* Reserve and release a DMA channel */
50extern int request_dma(unsigned int dmanr, const char * device_id);
51extern void free_dma(unsigned int dmanr);
52
53#ifdef CONFIG_PCI
54extern int isa_dma_bridge_buggy;
55#else
56#define isa_dma_bridge_buggy (0)
57#endif
58
59
60#endif