blob: 03ed742ae2be2aac5bf24a900d75ea1c060d2353 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/arch/arm/mm/mm-lusl7200.c
3 *
4 * Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
5 *
6 * Extra MM routines for L7200 architecture
7 */
8#include <linux/kernel.h>
9#include <linux/init.h>
Deepak Saxenacb90d682005-10-14 12:49:15 +010010#include <linux/device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070011
Deepak Saxenacb90d682005-10-14 12:49:15 +010012#include <asm/types.h>
13#include <asm/irq.h>
14#include <asm/mach-types.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#include <asm/hardware.h>
16#include <asm/page.h>
17
Deepak Saxenacb90d682005-10-14 12:49:15 +010018#include <asm/mach/arch.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070019#include <asm/mach/map.h>
Deepak Saxenacb90d682005-10-14 12:49:15 +010020#include <asm/mach/irq.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070021
22/*
23 * IRQ base register
24 */
25#define IRQ_BASE (IO_BASE_2 + 0x1000)
26
27/*
28 * Normal IRQ registers
29 */
30#define IRQ_STATUS (*(volatile unsigned long *) (IRQ_BASE + 0x000))
31#define IRQ_RAWSTATUS (*(volatile unsigned long *) (IRQ_BASE + 0x004))
32#define IRQ_ENABLE (*(volatile unsigned long *) (IRQ_BASE + 0x008))
33#define IRQ_ENABLECLEAR (*(volatile unsigned long *) (IRQ_BASE + 0x00c))
34#define IRQ_SOFT (*(volatile unsigned long *) (IRQ_BASE + 0x010))
35#define IRQ_SOURCESEL (*(volatile unsigned long *) (IRQ_BASE + 0x018))
36
37/*
38 * Fast IRQ registers
39 */
40#define FIQ_STATUS (*(volatile unsigned long *) (IRQ_BASE + 0x100))
41#define FIQ_RAWSTATUS (*(volatile unsigned long *) (IRQ_BASE + 0x104))
42#define FIQ_ENABLE (*(volatile unsigned long *) (IRQ_BASE + 0x108))
43#define FIQ_ENABLECLEAR (*(volatile unsigned long *) (IRQ_BASE + 0x10c))
44#define FIQ_SOFT (*(volatile unsigned long *) (IRQ_BASE + 0x110))
45#define FIQ_SOURCESEL (*(volatile unsigned long *) (IRQ_BASE + 0x118))
46
47static void l7200_mask_irq(unsigned int irq)
48{
49 IRQ_ENABLECLEAR = 1 << irq;
50}
51
52static void l7200_unmask_irq(unsigned int irq)
53{
54 IRQ_ENABLE = 1 << irq;
55}
Deepak Saxenacb90d682005-10-14 12:49:15 +010056
57static struct irqchip l7200_irq_chip = {
58 .ack = l7200_mask_irq,
59 .mask = l7200_mask_irq,
60 .unmask = l7200_unmask_irq
61};
Linus Torvalds1da177e2005-04-16 15:20:36 -070062
63static void __init l7200_init_irq(void)
64{
65 int irq;
66
67 IRQ_ENABLECLEAR = 0xffffffff; /* clear all interrupt enables */
68 FIQ_ENABLECLEAR = 0xffffffff; /* clear all fast interrupt enables */
69
70 for (irq = 0; irq < NR_IRQS; irq++) {
Deepak Saxenacb90d682005-10-14 12:49:15 +010071 set_irq_chip(irq, &l7200_irq_chip);
72 set_irq_flags(irq, IRQF_VALID);
73 set_irq_handler(irq, do_level_IRQ);
Linus Torvalds1da177e2005-04-16 15:20:36 -070074 }
75
76 init_FIQ();
77}
78
79static struct map_desc l7200_io_desc[] __initdata = {
80 { IO_BASE, IO_START, IO_SIZE, MT_DEVICE },
81 { IO_BASE_2, IO_START_2, IO_SIZE_2, MT_DEVICE },
82 { AUX_BASE, AUX_START, AUX_SIZE, MT_DEVICE },
83 { FLASH1_BASE, FLASH1_START, FLASH1_SIZE, MT_DEVICE },
84 { FLASH2_BASE, FLASH2_START, FLASH2_SIZE, MT_DEVICE }
85};
86
87static void __init l7200_map_io(void)
88{
89 iotable_init(l7200_io_desc, ARRAY_SIZE(l7200_io_desc));
90}
91
92MACHINE_START(L7200, "LinkUp Systems L7200")
Russell Kinge9dea0c2005-07-03 17:38:58 +010093 /* Maintainer: Steve Hill / Scott McConnell */
94 .phys_ram = 0xf0000000,
95 .phys_io = 0x80040000,
96 .io_pg_offst = ((0xd0000000) >> 18) & 0xfffc,
97 .map_io = l7200_map_io,
98 .init_irq = l7200_init_irq,
Linus Torvalds1da177e2005-04-16 15:20:36 -070099MACHINE_END
100