R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 1 | Kernel driver lm90 |
| 2 | ================== |
| 3 | |
| 4 | Supported chips: |
| 5 | * National Semiconductor LM90 |
| 6 | Prefix: 'lm90' |
| 7 | Addresses scanned: I2C 0x4c |
| 8 | Datasheet: Publicly available at the National Semiconductor website |
| 9 | http://www.national.com/pf/LM/LM90.html |
| 10 | * National Semiconductor LM89 |
| 11 | Prefix: 'lm99' |
| 12 | Addresses scanned: I2C 0x4c and 0x4d |
| 13 | Datasheet: Publicly available at the National Semiconductor website |
| 14 | http://www.national.com/pf/LM/LM89.html |
| 15 | * National Semiconductor LM99 |
| 16 | Prefix: 'lm99' |
| 17 | Addresses scanned: I2C 0x4c and 0x4d |
| 18 | Datasheet: Publicly available at the National Semiconductor website |
| 19 | http://www.national.com/pf/LM/LM99.html |
| 20 | * National Semiconductor LM86 |
| 21 | Prefix: 'lm86' |
| 22 | Addresses scanned: I2C 0x4c |
| 23 | Datasheet: Publicly available at the National Semiconductor website |
| 24 | http://www.national.com/pf/LM/LM86.html |
| 25 | * Analog Devices ADM1032 |
| 26 | Prefix: 'adm1032' |
Jean Delvare | 90209b4 | 2005-10-26 22:20:21 +0200 | [diff] [blame] | 27 | Addresses scanned: I2C 0x4c and 0x4d |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 28 | Datasheet: Publicly available at the Analog Devices website |
Jean Delvare | 90209b4 | 2005-10-26 22:20:21 +0200 | [diff] [blame] | 29 | http://www.analog.com/en/prod/0,2877,ADM1032,00.html |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 30 | * Analog Devices ADT7461 |
| 31 | Prefix: 'adt7461' |
Jean Delvare | 90209b4 | 2005-10-26 22:20:21 +0200 | [diff] [blame] | 32 | Addresses scanned: I2C 0x4c and 0x4d |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 33 | Datasheet: Publicly available at the Analog Devices website |
Jean Delvare | 90209b4 | 2005-10-26 22:20:21 +0200 | [diff] [blame] | 34 | http://www.analog.com/en/prod/0,2877,ADT7461,00.html |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 35 | Note: Only if in ADM1032 compatibility mode |
| 36 | * Maxim MAX6657 |
| 37 | Prefix: 'max6657' |
| 38 | Addresses scanned: I2C 0x4c |
| 39 | Datasheet: Publicly available at the Maxim website |
| 40 | http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578 |
| 41 | * Maxim MAX6658 |
| 42 | Prefix: 'max6657' |
| 43 | Addresses scanned: I2C 0x4c |
| 44 | Datasheet: Publicly available at the Maxim website |
| 45 | http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578 |
| 46 | * Maxim MAX6659 |
| 47 | Prefix: 'max6657' |
| 48 | Addresses scanned: I2C 0x4c, 0x4d (unsupported 0x4e) |
| 49 | Datasheet: Publicly available at the Maxim website |
| 50 | http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578 |
| 51 | |
| 52 | |
| 53 | Author: Jean Delvare <khali@linux-fr.org> |
| 54 | |
| 55 | |
| 56 | Description |
| 57 | ----------- |
| 58 | |
| 59 | The LM90 is a digital temperature sensor. It senses its own temperature as |
| 60 | well as the temperature of up to one external diode. It is compatible |
| 61 | with many other devices such as the LM86, the LM89, the LM99, the ADM1032, |
| 62 | the MAX6657, MAX6658 and the MAX6659 all of which are supported by this driver. |
| 63 | Note that there is no easy way to differentiate between the last three |
| 64 | variants. The extra address and features of the MAX6659 are not supported by |
| 65 | this driver. Additionally, the ADT7461 is supported if found in ADM1032 |
| 66 | compatibility mode. |
| 67 | |
| 68 | The specificity of this family of chipsets over the ADM1021/LM84 |
| 69 | family is that it features critical limits with hysteresis, and an |
| 70 | increased resolution of the remote temperature measurement. |
| 71 | |
| 72 | The different chipsets of the family are not strictly identical, although |
| 73 | very similar. This driver doesn't handle any specific feature for now, |
Jean Delvare | c3df580 | 2005-10-26 21:39:40 +0200 | [diff] [blame] | 74 | with the exception of SMBus PEC. For reference, here comes a non-exhaustive |
| 75 | list of specific features: |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 76 | |
| 77 | LM90: |
| 78 | * Filter and alert configuration register at 0xBF. |
| 79 | * ALERT is triggered by temperatures over critical limits. |
| 80 | |
| 81 | LM86 and LM89: |
| 82 | * Same as LM90 |
| 83 | * Better external channel accuracy |
| 84 | |
| 85 | LM99: |
| 86 | * Same as LM89 |
| 87 | * External temperature shifted by 16 degrees down |
| 88 | |
| 89 | ADM1032: |
| 90 | * Consecutive alert register at 0x22. |
| 91 | * Conversion averaging. |
| 92 | * Up to 64 conversions/s. |
| 93 | * ALERT is triggered by open remote sensor. |
Jean Delvare | c3df580 | 2005-10-26 21:39:40 +0200 | [diff] [blame] | 94 | * SMBus PEC support for Write Byte and Receive Byte transactions. |
R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 95 | |
| 96 | ADT7461 |
| 97 | * Extended temperature range (breaks compatibility) |
| 98 | * Lower resolution for remote temperature |
| 99 | |
| 100 | MAX6657 and MAX6658: |
| 101 | * Remote sensor type selection |
| 102 | |
| 103 | MAX6659 |
| 104 | * Selectable address |
| 105 | * Second critical temperature limit |
| 106 | * Remote sensor type selection |
| 107 | |
| 108 | All temperature values are given in degrees Celsius. Resolution |
| 109 | is 1.0 degree for the local temperature, 0.125 degree for the remote |
| 110 | temperature. |
| 111 | |
| 112 | Each sensor has its own high and low limits, plus a critical limit. |
| 113 | Additionally, there is a relative hysteresis value common to both critical |
| 114 | values. To make life easier to user-space applications, two absolute values |
| 115 | are exported, one for each channel, but these values are of course linked. |
| 116 | Only the local hysteresis can be set from user-space, and the same delta |
| 117 | applies to the remote hysteresis. |
| 118 | |
| 119 | The lm90 driver will not update its values more frequently than every |
| 120 | other second; reading them more often will do no harm, but will return |
| 121 | 'old' values. |
| 122 | |
Jean Delvare | c3df580 | 2005-10-26 21:39:40 +0200 | [diff] [blame] | 123 | PEC Support |
| 124 | ----------- |
| 125 | |
| 126 | The ADM1032 is the only chip of the family which supports PEC. It does |
| 127 | not support PEC on all transactions though, so some care must be taken. |
| 128 | |
| 129 | When reading a register value, the PEC byte is computed and sent by the |
| 130 | ADM1032 chip. However, in the case of a combined transaction (SMBus Read |
| 131 | Byte), the ADM1032 computes the CRC value over only the second half of |
| 132 | the message rather than its entirety, because it thinks the first half |
| 133 | of the message belongs to a different transaction. As a result, the CRC |
| 134 | value differs from what the SMBus master expects, and all reads fail. |
| 135 | |
| 136 | For this reason, the lm90 driver will enable PEC for the ADM1032 only if |
| 137 | the bus supports the SMBus Send Byte and Receive Byte transaction types. |
| 138 | These transactions will be used to read register values, instead of |
| 139 | SMBus Read Byte, and PEC will work properly. |
| 140 | |
| 141 | Additionally, the ADM1032 doesn't support SMBus Send Byte with PEC. |
| 142 | Instead, it will try to write the PEC value to the register (because the |
| 143 | SMBus Send Byte transaction with PEC is similar to a Write Byte transaction |
Jean Delvare | 0966415 | 2007-06-09 10:11:15 -0400 | [diff] [blame^] | 144 | without PEC), which is not what we want. Thus, PEC is explicitly disabled |
Jean Delvare | c3df580 | 2005-10-26 21:39:40 +0200 | [diff] [blame] | 145 | on SMBus Send Byte transactions in the lm90 driver. |
| 146 | |
| 147 | PEC on byte data transactions represents a significant increase in bandwidth |
| 148 | usage (+33% for writes, +25% for reads) in normal conditions. With the need |
| 149 | to use two SMBus transaction for reads, this overhead jumps to +50%. Worse, |
| 150 | two transactions will typically mean twice as much delay waiting for |
| 151 | transaction completion, effectively doubling the register cache refresh time. |
| 152 | I guess reliability comes at a price, but it's quite expensive this time. |
| 153 | |
| 154 | So, as not everyone might enjoy the slowdown, PEC can be disabled through |
| 155 | sysfs. Just write 0 to the "pec" file and PEC will be disabled. Write 1 |
| 156 | to that file to enable PEC again. |