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Hans Verkuil1c1e45d2008-04-28 20:24:33 -03001/*
2 * cx18 System Control Block initialization
3 *
4 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
Andy Walls1ed9dcc2008-11-22 01:37:34 -03005 * Copyright (C) 2008 Andy Walls <awalls@radix.net>
Hans Verkuil1c1e45d2008-04-28 20:24:33 -03006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
20 * 02111-1307 USA
21 */
22
23#include "cx18-driver.h"
Andy Wallsb1526422008-08-30 16:03:44 -030024#include "cx18-io.h"
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030025#include "cx18-scb.h"
26
27void cx18_init_scb(struct cx18 *cx)
28{
Andy Wallsb1526422008-08-30 16:03:44 -030029 cx18_setup_page(cx, SCB_OFFSET);
30 cx18_memset_io(cx, cx->scb, 0, 0x10000);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030031
Andy Wallsb1526422008-08-30 16:03:44 -030032 cx18_writel(cx, IRQ_APU_TO_CPU, &cx->scb->apu2cpu_irq);
33 cx18_writel(cx, IRQ_CPU_TO_APU_ACK, &cx->scb->cpu2apu_irq_ack);
34 cx18_writel(cx, IRQ_HPU_TO_CPU, &cx->scb->hpu2cpu_irq);
35 cx18_writel(cx, IRQ_CPU_TO_HPU_ACK, &cx->scb->cpu2hpu_irq_ack);
36 cx18_writel(cx, IRQ_PPU_TO_CPU, &cx->scb->ppu2cpu_irq);
37 cx18_writel(cx, IRQ_CPU_TO_PPU_ACK, &cx->scb->cpu2ppu_irq_ack);
38 cx18_writel(cx, IRQ_EPU_TO_CPU, &cx->scb->epu2cpu_irq);
39 cx18_writel(cx, IRQ_CPU_TO_EPU_ACK, &cx->scb->cpu2epu_irq_ack);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030040
Andy Wallsb1526422008-08-30 16:03:44 -030041 cx18_writel(cx, IRQ_CPU_TO_APU, &cx->scb->cpu2apu_irq);
42 cx18_writel(cx, IRQ_APU_TO_CPU_ACK, &cx->scb->apu2cpu_irq_ack);
43 cx18_writel(cx, IRQ_HPU_TO_APU, &cx->scb->hpu2apu_irq);
44 cx18_writel(cx, IRQ_APU_TO_HPU_ACK, &cx->scb->apu2hpu_irq_ack);
45 cx18_writel(cx, IRQ_PPU_TO_APU, &cx->scb->ppu2apu_irq);
46 cx18_writel(cx, IRQ_APU_TO_PPU_ACK, &cx->scb->apu2ppu_irq_ack);
47 cx18_writel(cx, IRQ_EPU_TO_APU, &cx->scb->epu2apu_irq);
48 cx18_writel(cx, IRQ_APU_TO_EPU_ACK, &cx->scb->apu2epu_irq_ack);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030049
Andy Wallsb1526422008-08-30 16:03:44 -030050 cx18_writel(cx, IRQ_CPU_TO_HPU, &cx->scb->cpu2hpu_irq);
51 cx18_writel(cx, IRQ_HPU_TO_CPU_ACK, &cx->scb->hpu2cpu_irq_ack);
52 cx18_writel(cx, IRQ_APU_TO_HPU, &cx->scb->apu2hpu_irq);
53 cx18_writel(cx, IRQ_HPU_TO_APU_ACK, &cx->scb->hpu2apu_irq_ack);
54 cx18_writel(cx, IRQ_PPU_TO_HPU, &cx->scb->ppu2hpu_irq);
55 cx18_writel(cx, IRQ_HPU_TO_PPU_ACK, &cx->scb->hpu2ppu_irq_ack);
56 cx18_writel(cx, IRQ_EPU_TO_HPU, &cx->scb->epu2hpu_irq);
57 cx18_writel(cx, IRQ_HPU_TO_EPU_ACK, &cx->scb->hpu2epu_irq_ack);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030058
Andy Wallsb1526422008-08-30 16:03:44 -030059 cx18_writel(cx, IRQ_CPU_TO_PPU, &cx->scb->cpu2ppu_irq);
60 cx18_writel(cx, IRQ_PPU_TO_CPU_ACK, &cx->scb->ppu2cpu_irq_ack);
61 cx18_writel(cx, IRQ_APU_TO_PPU, &cx->scb->apu2ppu_irq);
62 cx18_writel(cx, IRQ_PPU_TO_APU_ACK, &cx->scb->ppu2apu_irq_ack);
63 cx18_writel(cx, IRQ_HPU_TO_PPU, &cx->scb->hpu2ppu_irq);
64 cx18_writel(cx, IRQ_PPU_TO_HPU_ACK, &cx->scb->ppu2hpu_irq_ack);
65 cx18_writel(cx, IRQ_EPU_TO_PPU, &cx->scb->epu2ppu_irq);
66 cx18_writel(cx, IRQ_PPU_TO_EPU_ACK, &cx->scb->ppu2epu_irq_ack);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030067
Andy Wallsb1526422008-08-30 16:03:44 -030068 cx18_writel(cx, IRQ_CPU_TO_EPU, &cx->scb->cpu2epu_irq);
69 cx18_writel(cx, IRQ_EPU_TO_CPU_ACK, &cx->scb->epu2cpu_irq_ack);
70 cx18_writel(cx, IRQ_APU_TO_EPU, &cx->scb->apu2epu_irq);
71 cx18_writel(cx, IRQ_EPU_TO_APU_ACK, &cx->scb->epu2apu_irq_ack);
72 cx18_writel(cx, IRQ_HPU_TO_EPU, &cx->scb->hpu2epu_irq);
73 cx18_writel(cx, IRQ_EPU_TO_HPU_ACK, &cx->scb->epu2hpu_irq_ack);
74 cx18_writel(cx, IRQ_PPU_TO_EPU, &cx->scb->ppu2epu_irq);
75 cx18_writel(cx, IRQ_EPU_TO_PPU_ACK, &cx->scb->epu2ppu_irq_ack);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030076
Andy Wallsb1526422008-08-30 16:03:44 -030077 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, apu2cpu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030078 &cx->scb->apu2cpu_mb_offset);
Andy Wallsb1526422008-08-30 16:03:44 -030079 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, hpu2cpu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030080 &cx->scb->hpu2cpu_mb_offset);
Andy Wallsb1526422008-08-30 16:03:44 -030081 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, ppu2cpu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030082 &cx->scb->ppu2cpu_mb_offset);
Andy Wallsb1526422008-08-30 16:03:44 -030083 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, epu2cpu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030084 &cx->scb->epu2cpu_mb_offset);
Andy Wallsb1526422008-08-30 16:03:44 -030085 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, cpu2apu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030086 &cx->scb->cpu2apu_mb_offset);
Andy Wallsb1526422008-08-30 16:03:44 -030087 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, hpu2apu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030088 &cx->scb->hpu2apu_mb_offset);
Andy Wallsb1526422008-08-30 16:03:44 -030089 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, ppu2apu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030090 &cx->scb->ppu2apu_mb_offset);
Andy Wallsb1526422008-08-30 16:03:44 -030091 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, epu2apu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030092 &cx->scb->epu2apu_mb_offset);
Andy Wallsb1526422008-08-30 16:03:44 -030093 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, cpu2hpu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030094 &cx->scb->cpu2hpu_mb_offset);
Andy Wallsb1526422008-08-30 16:03:44 -030095 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, apu2hpu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030096 &cx->scb->apu2hpu_mb_offset);
Andy Wallsb1526422008-08-30 16:03:44 -030097 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, ppu2hpu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030098 &cx->scb->ppu2hpu_mb_offset);
Andy Wallsb1526422008-08-30 16:03:44 -030099 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, epu2hpu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300100 &cx->scb->epu2hpu_mb_offset);
Andy Wallsb1526422008-08-30 16:03:44 -0300101 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, cpu2ppu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300102 &cx->scb->cpu2ppu_mb_offset);
Andy Wallsb1526422008-08-30 16:03:44 -0300103 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, apu2ppu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300104 &cx->scb->apu2ppu_mb_offset);
Andy Wallsb1526422008-08-30 16:03:44 -0300105 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, hpu2ppu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300106 &cx->scb->hpu2ppu_mb_offset);
Andy Wallsb1526422008-08-30 16:03:44 -0300107 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, epu2ppu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300108 &cx->scb->epu2ppu_mb_offset);
Andy Wallsb1526422008-08-30 16:03:44 -0300109 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, cpu2epu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300110 &cx->scb->cpu2epu_mb_offset);
Andy Wallsb1526422008-08-30 16:03:44 -0300111 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, apu2epu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300112 &cx->scb->apu2epu_mb_offset);
Andy Wallsb1526422008-08-30 16:03:44 -0300113 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, hpu2epu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300114 &cx->scb->hpu2epu_mb_offset);
Andy Wallsb1526422008-08-30 16:03:44 -0300115 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, ppu2epu_mb),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300116 &cx->scb->ppu2epu_mb_offset);
117
Andy Wallsb1526422008-08-30 16:03:44 -0300118 cx18_writel(cx, SCB_OFFSET + offsetof(struct cx18_scb, cpu_state),
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300119 &cx->scb->ipc_offset);
120
Andy Wallsb1526422008-08-30 16:03:44 -0300121 cx18_writel(cx, 1, &cx->scb->epu_state);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300122}