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Magnus Damm02ab3f72007-07-18 17:25:09 +09001/*
2 * Shared interrupt handling code for IPR and INTC2 types of IRQs.
3 *
Magnus Dammd58876e2008-04-24 21:36:34 +09004 * Copyright (C) 2007, 2008 Magnus Damm
Paul Mundt1ce7b032009-11-02 10:30:26 +09005 * Copyright (C) 2009 Paul Mundt
Magnus Damm02ab3f72007-07-18 17:25:09 +09006 *
7 * Based on intc2.c and ipr.c
8 *
9 * Copyright (C) 1999 Niibe Yutaka & Takeshi Yaegashi
10 * Copyright (C) 2000 Kazumoto Kojima
11 * Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
12 * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
13 * Copyright (C) 2005, 2006 Paul Mundt
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file "COPYING" in the main directory of this archive
17 * for more details.
18 */
19#include <linux/init.h>
20#include <linux/irq.h>
21#include <linux/module.h>
22#include <linux/io.h>
23#include <linux/interrupt.h>
Paul Mundtbbfbd8b2008-10-01 16:13:54 +090024#include <linux/sh_intc.h>
Magnus Damm2dcec7a2009-04-01 14:30:59 +000025#include <linux/sysdev.h>
26#include <linux/list.h>
Paul Mundt54ff3282009-06-11 10:33:09 +030027#include <linux/topology.h>
Paul Mundt1ce7b032009-11-02 10:30:26 +090028#include <linux/bitmap.h>
Magnus Damm02ab3f72007-07-18 17:25:09 +090029
Magnus Damm73505b42007-08-12 15:26:12 +090030#define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \
31 ((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \
32 ((addr_e) << 16) | ((addr_d << 24)))
Magnus Damm02ab3f72007-07-18 17:25:09 +090033
Magnus Damm73505b42007-08-12 15:26:12 +090034#define _INTC_SHIFT(h) (h & 0x1f)
35#define _INTC_WIDTH(h) ((h >> 5) & 0xf)
36#define _INTC_FN(h) ((h >> 9) & 0xf)
37#define _INTC_MODE(h) ((h >> 13) & 0x7)
38#define _INTC_ADDR_E(h) ((h >> 16) & 0xff)
39#define _INTC_ADDR_D(h) ((h >> 24) & 0xff)
Magnus Damm02ab3f72007-07-18 17:25:09 +090040
Magnus Damm73505b42007-08-12 15:26:12 +090041struct intc_handle_int {
42 unsigned int irq;
43 unsigned long handle;
44};
45
46struct intc_desc_int {
Magnus Damm2dcec7a2009-04-01 14:30:59 +000047 struct list_head list;
48 struct sys_device sysdev;
Francesco VIRLINZI7fd87b32009-04-06 07:17:04 +000049 pm_message_t state;
Magnus Damm73505b42007-08-12 15:26:12 +090050 unsigned long *reg;
Magnus Dammf18d5332007-09-21 18:16:42 +090051#ifdef CONFIG_SMP
52 unsigned long *smp;
53#endif
Magnus Damm73505b42007-08-12 15:26:12 +090054 unsigned int nr_reg;
55 struct intc_handle_int *prio;
56 unsigned int nr_prio;
57 struct intc_handle_int *sense;
58 unsigned int nr_sense;
59 struct irq_chip chip;
60};
61
Magnus Damm2dcec7a2009-04-01 14:30:59 +000062static LIST_HEAD(intc_list);
63
Paul Mundt1ce7b032009-11-02 10:30:26 +090064/*
65 * The intc_irq_map provides a global map of bound IRQ vectors for a
66 * given platform. Allocation of IRQs are either static through the CPU
67 * vector map, or dynamic in the case of board mux vectors or MSI.
68 *
69 * As this is a central point for all IRQ controllers on the system,
70 * each of the available sources are mapped out here. This combined with
71 * sparseirq makes it quite trivial to keep the vector map tightly packed
72 * when dynamically creating IRQs, as well as tying in to otherwise
73 * unused irq_desc positions in the sparse array.
74 */
75static DECLARE_BITMAP(intc_irq_map, NR_IRQS);
76static DEFINE_SPINLOCK(vector_lock);
77
Magnus Dammf18d5332007-09-21 18:16:42 +090078#ifdef CONFIG_SMP
79#define IS_SMP(x) x.smp
80#define INTC_REG(d, x, c) (d->reg[(x)] + ((d->smp[(x)] & 0xff) * c))
81#define SMP_NR(d, x) ((d->smp[(x)] >> 8) ? (d->smp[(x)] >> 8) : 1)
82#else
83#define IS_SMP(x) 0
84#define INTC_REG(d, x, c) (d->reg[(x)])
85#define SMP_NR(d, x) 1
86#endif
87
Magnus Damm73505b42007-08-12 15:26:12 +090088static unsigned int intc_prio_level[NR_IRQS]; /* for now */
Magnus Dammd58876e2008-04-24 21:36:34 +090089static unsigned long ack_handle[NR_IRQS];
Magnus Damm73505b42007-08-12 15:26:12 +090090
91static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
Magnus Damm02ab3f72007-07-18 17:25:09 +090092{
93 struct irq_chip *chip = get_irq_chip(irq);
Stuart Menefy6000fc42009-08-24 18:27:33 +090094 return container_of(chip, struct intc_desc_int, chip);
Magnus Damm02ab3f72007-07-18 17:25:09 +090095}
96
97static inline unsigned int set_field(unsigned int value,
98 unsigned int field_value,
Magnus Damm73505b42007-08-12 15:26:12 +090099 unsigned int handle)
Magnus Damm02ab3f72007-07-18 17:25:09 +0900100{
Magnus Damm73505b42007-08-12 15:26:12 +0900101 unsigned int width = _INTC_WIDTH(handle);
102 unsigned int shift = _INTC_SHIFT(handle);
103
Magnus Damm02ab3f72007-07-18 17:25:09 +0900104 value &= ~(((1 << width) - 1) << shift);
105 value |= field_value << shift;
106 return value;
107}
108
Magnus Damm73505b42007-08-12 15:26:12 +0900109static void write_8(unsigned long addr, unsigned long h, unsigned long data)
Magnus Damm02ab3f72007-07-18 17:25:09 +0900110{
Paul Mundt62429e02008-10-01 15:19:10 +0900111 __raw_writeb(set_field(0, data, h), addr);
Stuart Menefy6000fc42009-08-24 18:27:33 +0900112 (void)__raw_readb(addr); /* Defeat write posting */
Magnus Damm02ab3f72007-07-18 17:25:09 +0900113}
114
Magnus Damm73505b42007-08-12 15:26:12 +0900115static void write_16(unsigned long addr, unsigned long h, unsigned long data)
Magnus Damm02ab3f72007-07-18 17:25:09 +0900116{
Paul Mundt62429e02008-10-01 15:19:10 +0900117 __raw_writew(set_field(0, data, h), addr);
Stuart Menefy6000fc42009-08-24 18:27:33 +0900118 (void)__raw_readw(addr); /* Defeat write posting */
Magnus Damm02ab3f72007-07-18 17:25:09 +0900119}
120
Magnus Damm73505b42007-08-12 15:26:12 +0900121static void write_32(unsigned long addr, unsigned long h, unsigned long data)
Magnus Damm02ab3f72007-07-18 17:25:09 +0900122{
Paul Mundt62429e02008-10-01 15:19:10 +0900123 __raw_writel(set_field(0, data, h), addr);
Stuart Menefy6000fc42009-08-24 18:27:33 +0900124 (void)__raw_readl(addr); /* Defeat write posting */
Magnus Damm02ab3f72007-07-18 17:25:09 +0900125}
126
Magnus Damm73505b42007-08-12 15:26:12 +0900127static void modify_8(unsigned long addr, unsigned long h, unsigned long data)
Magnus Damm02ab3f72007-07-18 17:25:09 +0900128{
Magnus Damm4370fe12008-04-24 21:53:07 +0900129 unsigned long flags;
130 local_irq_save(flags);
Paul Mundt62429e02008-10-01 15:19:10 +0900131 __raw_writeb(set_field(__raw_readb(addr), data, h), addr);
Stuart Menefy6000fc42009-08-24 18:27:33 +0900132 (void)__raw_readb(addr); /* Defeat write posting */
Magnus Damm4370fe12008-04-24 21:53:07 +0900133 local_irq_restore(flags);
Magnus Damm02ab3f72007-07-18 17:25:09 +0900134}
135
Magnus Damm73505b42007-08-12 15:26:12 +0900136static void modify_16(unsigned long addr, unsigned long h, unsigned long data)
Magnus Damm02ab3f72007-07-18 17:25:09 +0900137{
Magnus Damm4370fe12008-04-24 21:53:07 +0900138 unsigned long flags;
139 local_irq_save(flags);
Paul Mundt62429e02008-10-01 15:19:10 +0900140 __raw_writew(set_field(__raw_readw(addr), data, h), addr);
Stuart Menefy6000fc42009-08-24 18:27:33 +0900141 (void)__raw_readw(addr); /* Defeat write posting */
Magnus Damm4370fe12008-04-24 21:53:07 +0900142 local_irq_restore(flags);
Magnus Damm02ab3f72007-07-18 17:25:09 +0900143}
144
Magnus Damm73505b42007-08-12 15:26:12 +0900145static void modify_32(unsigned long addr, unsigned long h, unsigned long data)
Magnus Damm02ab3f72007-07-18 17:25:09 +0900146{
Magnus Damm4370fe12008-04-24 21:53:07 +0900147 unsigned long flags;
148 local_irq_save(flags);
Paul Mundt62429e02008-10-01 15:19:10 +0900149 __raw_writel(set_field(__raw_readl(addr), data, h), addr);
Stuart Menefy6000fc42009-08-24 18:27:33 +0900150 (void)__raw_readl(addr); /* Defeat write posting */
Magnus Damm4370fe12008-04-24 21:53:07 +0900151 local_irq_restore(flags);
Magnus Damm02ab3f72007-07-18 17:25:09 +0900152}
153
Magnus Damm73505b42007-08-12 15:26:12 +0900154enum { REG_FN_ERR = 0, REG_FN_WRITE_BASE = 1, REG_FN_MODIFY_BASE = 5 };
Magnus Damm02ab3f72007-07-18 17:25:09 +0900155
Magnus Damm73505b42007-08-12 15:26:12 +0900156static void (*intc_reg_fns[])(unsigned long addr,
157 unsigned long h,
158 unsigned long data) = {
159 [REG_FN_WRITE_BASE + 0] = write_8,
160 [REG_FN_WRITE_BASE + 1] = write_16,
161 [REG_FN_WRITE_BASE + 3] = write_32,
162 [REG_FN_MODIFY_BASE + 0] = modify_8,
163 [REG_FN_MODIFY_BASE + 1] = modify_16,
164 [REG_FN_MODIFY_BASE + 3] = modify_32,
Magnus Damm02ab3f72007-07-18 17:25:09 +0900165};
166
Magnus Damm73505b42007-08-12 15:26:12 +0900167enum { MODE_ENABLE_REG = 0, /* Bit(s) set -> interrupt enabled */
168 MODE_MASK_REG, /* Bit(s) set -> interrupt disabled */
169 MODE_DUAL_REG, /* Two registers, set bit to enable / disable */
170 MODE_PRIO_REG, /* Priority value written to enable interrupt */
171 MODE_PCLR_REG, /* Above plus all bits set to disable interrupt */
172};
173
174static void intc_mode_field(unsigned long addr,
175 unsigned long handle,
176 void (*fn)(unsigned long,
177 unsigned long,
178 unsigned long),
179 unsigned int irq)
180{
181 fn(addr, handle, ((1 << _INTC_WIDTH(handle)) - 1));
182}
183
184static void intc_mode_zero(unsigned long addr,
185 unsigned long handle,
186 void (*fn)(unsigned long,
187 unsigned long,
188 unsigned long),
189 unsigned int irq)
190{
191 fn(addr, handle, 0);
192}
193
194static void intc_mode_prio(unsigned long addr,
195 unsigned long handle,
196 void (*fn)(unsigned long,
197 unsigned long,
198 unsigned long),
199 unsigned int irq)
200{
201 fn(addr, handle, intc_prio_level[irq]);
202}
203
204static void (*intc_enable_fns[])(unsigned long addr,
205 unsigned long handle,
206 void (*fn)(unsigned long,
207 unsigned long,
208 unsigned long),
209 unsigned int irq) = {
210 [MODE_ENABLE_REG] = intc_mode_field,
211 [MODE_MASK_REG] = intc_mode_zero,
212 [MODE_DUAL_REG] = intc_mode_field,
213 [MODE_PRIO_REG] = intc_mode_prio,
214 [MODE_PCLR_REG] = intc_mode_prio,
215};
216
217static void (*intc_disable_fns[])(unsigned long addr,
218 unsigned long handle,
219 void (*fn)(unsigned long,
220 unsigned long,
221 unsigned long),
222 unsigned int irq) = {
223 [MODE_ENABLE_REG] = intc_mode_zero,
224 [MODE_MASK_REG] = intc_mode_field,
225 [MODE_DUAL_REG] = intc_mode_field,
226 [MODE_PRIO_REG] = intc_mode_zero,
227 [MODE_PCLR_REG] = intc_mode_field,
228};
229
230static inline void _intc_enable(unsigned int irq, unsigned long handle)
231{
232 struct intc_desc_int *d = get_intc_desc(irq);
Magnus Dammf18d5332007-09-21 18:16:42 +0900233 unsigned long addr;
234 unsigned int cpu;
Magnus Damm73505b42007-08-12 15:26:12 +0900235
Magnus Dammf18d5332007-09-21 18:16:42 +0900236 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_E(handle)); cpu++) {
237 addr = INTC_REG(d, _INTC_ADDR_E(handle), cpu);
238 intc_enable_fns[_INTC_MODE(handle)](addr, handle, intc_reg_fns\
239 [_INTC_FN(handle)], irq);
240 }
Magnus Damm73505b42007-08-12 15:26:12 +0900241}
242
Magnus Damm02ab3f72007-07-18 17:25:09 +0900243static void intc_enable(unsigned int irq)
244{
Magnus Damm73505b42007-08-12 15:26:12 +0900245 _intc_enable(irq, (unsigned long)get_irq_chip_data(irq));
Magnus Damm02ab3f72007-07-18 17:25:09 +0900246}
247
248static void intc_disable(unsigned int irq)
249{
Magnus Dammf18d5332007-09-21 18:16:42 +0900250 struct intc_desc_int *d = get_intc_desc(irq);
Magnus Damm73505b42007-08-12 15:26:12 +0900251 unsigned long handle = (unsigned long) get_irq_chip_data(irq);
Magnus Dammf18d5332007-09-21 18:16:42 +0900252 unsigned long addr;
253 unsigned int cpu;
Magnus Damm02ab3f72007-07-18 17:25:09 +0900254
Magnus Dammf18d5332007-09-21 18:16:42 +0900255 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_D(handle)); cpu++) {
256 addr = INTC_REG(d, _INTC_ADDR_D(handle), cpu);
257 intc_disable_fns[_INTC_MODE(handle)](addr, handle,intc_reg_fns\
258 [_INTC_FN(handle)], irq);
259 }
Magnus Damm02ab3f72007-07-18 17:25:09 +0900260}
261
Magnus Damm2dcec7a2009-04-01 14:30:59 +0000262static int intc_set_wake(unsigned int irq, unsigned int on)
263{
264 return 0; /* allow wakeup, but setup hardware in intc_suspend() */
265}
266
Magnus Dammd58876e2008-04-24 21:36:34 +0900267static void intc_mask_ack(unsigned int irq)
268{
269 struct intc_desc_int *d = get_intc_desc(irq);
270 unsigned long handle = ack_handle[irq];
271 unsigned long addr;
272
273 intc_disable(irq);
274
275 /* read register and write zero only to the assocaited bit */
276
277 if (handle) {
278 addr = INTC_REG(d, _INTC_ADDR_D(handle), 0);
Yoshihiro Shimoda6bdfb222008-07-04 12:37:12 +0900279 switch (_INTC_FN(handle)) {
280 case REG_FN_MODIFY_BASE + 0: /* 8bit */
Paul Mundt62429e02008-10-01 15:19:10 +0900281 __raw_readb(addr);
282 __raw_writeb(0xff ^ set_field(0, 1, handle), addr);
Yoshihiro Shimoda6bdfb222008-07-04 12:37:12 +0900283 break;
284 case REG_FN_MODIFY_BASE + 1: /* 16bit */
Paul Mundt62429e02008-10-01 15:19:10 +0900285 __raw_readw(addr);
286 __raw_writew(0xffff ^ set_field(0, 1, handle), addr);
Yoshihiro Shimoda6bdfb222008-07-04 12:37:12 +0900287 break;
288 case REG_FN_MODIFY_BASE + 3: /* 32bit */
Paul Mundt62429e02008-10-01 15:19:10 +0900289 __raw_readl(addr);
290 __raw_writel(0xffffffff ^ set_field(0, 1, handle), addr);
Yoshihiro Shimoda6bdfb222008-07-04 12:37:12 +0900291 break;
292 default:
293 BUG();
294 break;
295 }
Magnus Dammd58876e2008-04-24 21:36:34 +0900296 }
297}
Magnus Dammd58876e2008-04-24 21:36:34 +0900298
Magnus Damm73505b42007-08-12 15:26:12 +0900299static struct intc_handle_int *intc_find_irq(struct intc_handle_int *hp,
300 unsigned int nr_hp,
301 unsigned int irq)
Magnus Damm02ab3f72007-07-18 17:25:09 +0900302{
Magnus Damm73505b42007-08-12 15:26:12 +0900303 int i;
Magnus Damm02ab3f72007-07-18 17:25:09 +0900304
Magnus Damm3d37d942007-08-17 00:50:44 +0900305 /* this doesn't scale well, but...
306 *
307 * this function should only be used for cerain uncommon
308 * operations such as intc_set_priority() and intc_set_sense()
309 * and in those rare cases performance doesn't matter that much.
310 * keeping the memory footprint low is more important.
311 *
312 * one rather simple way to speed this up and still keep the
313 * memory footprint down is to make sure the array is sorted
314 * and then perform a bisect to lookup the irq.
315 */
316
Magnus Damm73505b42007-08-12 15:26:12 +0900317 for (i = 0; i < nr_hp; i++) {
318 if ((hp + i)->irq != irq)
319 continue;
320
321 return hp + i;
322 }
323
324 return NULL;
Magnus Damm02ab3f72007-07-18 17:25:09 +0900325}
326
Magnus Damm73505b42007-08-12 15:26:12 +0900327int intc_set_priority(unsigned int irq, unsigned int prio)
Magnus Damm02ab3f72007-07-18 17:25:09 +0900328{
Magnus Damm73505b42007-08-12 15:26:12 +0900329 struct intc_desc_int *d = get_intc_desc(irq);
330 struct intc_handle_int *ihp;
Magnus Damm02ab3f72007-07-18 17:25:09 +0900331
Magnus Damm73505b42007-08-12 15:26:12 +0900332 if (!intc_prio_level[irq] || prio <= 1)
333 return -EINVAL;
334
335 ihp = intc_find_irq(d->prio, d->nr_prio, irq);
336 if (ihp) {
Magnus Damm3d37d942007-08-17 00:50:44 +0900337 if (prio >= (1 << _INTC_WIDTH(ihp->handle)))
Magnus Damm73505b42007-08-12 15:26:12 +0900338 return -EINVAL;
339
340 intc_prio_level[irq] = prio;
341
342 /*
343 * only set secondary masking method directly
344 * primary masking method is using intc_prio_level[irq]
345 * priority level will be set during next enable()
346 */
347
Magnus Damm3d37d942007-08-17 00:50:44 +0900348 if (_INTC_FN(ihp->handle) != REG_FN_ERR)
Magnus Damm73505b42007-08-12 15:26:12 +0900349 _intc_enable(irq, ihp->handle);
350 }
351 return 0;
Magnus Damm02ab3f72007-07-18 17:25:09 +0900352}
353
354#define VALID(x) (x | 0x80)
355
356static unsigned char intc_irq_sense_table[IRQ_TYPE_SENSE_MASK + 1] = {
357 [IRQ_TYPE_EDGE_FALLING] = VALID(0),
358 [IRQ_TYPE_EDGE_RISING] = VALID(1),
359 [IRQ_TYPE_LEVEL_LOW] = VALID(2),
Magnus Damm720be992008-04-24 21:47:15 +0900360 /* SH7706, SH7707 and SH7709 do not support high level triggered */
361#if !defined(CONFIG_CPU_SUBTYPE_SH7706) && \
362 !defined(CONFIG_CPU_SUBTYPE_SH7707) && \
363 !defined(CONFIG_CPU_SUBTYPE_SH7709)
Magnus Damm02ab3f72007-07-18 17:25:09 +0900364 [IRQ_TYPE_LEVEL_HIGH] = VALID(3),
Magnus Damm720be992008-04-24 21:47:15 +0900365#endif
Magnus Damm02ab3f72007-07-18 17:25:09 +0900366};
367
368static int intc_set_sense(unsigned int irq, unsigned int type)
369{
Magnus Damm73505b42007-08-12 15:26:12 +0900370 struct intc_desc_int *d = get_intc_desc(irq);
Magnus Damm02ab3f72007-07-18 17:25:09 +0900371 unsigned char value = intc_irq_sense_table[type & IRQ_TYPE_SENSE_MASK];
Magnus Damm73505b42007-08-12 15:26:12 +0900372 struct intc_handle_int *ihp;
373 unsigned long addr;
Magnus Damm02ab3f72007-07-18 17:25:09 +0900374
Magnus Damm73505b42007-08-12 15:26:12 +0900375 if (!value)
Magnus Damm02ab3f72007-07-18 17:25:09 +0900376 return -EINVAL;
377
Magnus Damm73505b42007-08-12 15:26:12 +0900378 ihp = intc_find_irq(d->sense, d->nr_sense, irq);
379 if (ihp) {
Magnus Dammf18d5332007-09-21 18:16:42 +0900380 addr = INTC_REG(d, _INTC_ADDR_E(ihp->handle), 0);
Magnus Damm73505b42007-08-12 15:26:12 +0900381 intc_reg_fns[_INTC_FN(ihp->handle)](addr, ihp->handle, value);
Magnus Damm02ab3f72007-07-18 17:25:09 +0900382 }
Magnus Damm73505b42007-08-12 15:26:12 +0900383 return 0;
Magnus Damm02ab3f72007-07-18 17:25:09 +0900384}
385
Magnus Damm73505b42007-08-12 15:26:12 +0900386static unsigned int __init intc_get_reg(struct intc_desc_int *d,
387 unsigned long address)
Magnus Damm02ab3f72007-07-18 17:25:09 +0900388{
Magnus Damm73505b42007-08-12 15:26:12 +0900389 unsigned int k;
390
391 for (k = 0; k < d->nr_reg; k++) {
392 if (d->reg[k] == address)
393 return k;
Magnus Damm02ab3f72007-07-18 17:25:09 +0900394 }
395
396 BUG();
Magnus Damm73505b42007-08-12 15:26:12 +0900397 return 0;
Magnus Damm02ab3f72007-07-18 17:25:09 +0900398}
399
Magnus Damm73505b42007-08-12 15:26:12 +0900400static intc_enum __init intc_grp_id(struct intc_desc *desc,
401 intc_enum enum_id)
Magnus Damm02ab3f72007-07-18 17:25:09 +0900402{
Magnus Damm680c4592007-07-20 12:09:29 +0900403 struct intc_group *g = desc->groups;
404 unsigned int i, j;
405
406 for (i = 0; g && enum_id && i < desc->nr_groups; i++) {
407 g = desc->groups + i;
408
409 for (j = 0; g->enum_ids[j]; j++) {
410 if (g->enum_ids[j] != enum_id)
411 continue;
412
413 return g->enum_id;
414 }
415 }
416
417 return 0;
418}
419
Magnus Damm02ab3f72007-07-18 17:25:09 +0900420static unsigned int __init intc_mask_data(struct intc_desc *desc,
Magnus Damm73505b42007-08-12 15:26:12 +0900421 struct intc_desc_int *d,
Magnus Damm680c4592007-07-20 12:09:29 +0900422 intc_enum enum_id, int do_grps)
Magnus Damm02ab3f72007-07-18 17:25:09 +0900423{
Magnus Damm680c4592007-07-20 12:09:29 +0900424 struct intc_mask_reg *mr = desc->mask_regs;
Magnus Damm73505b42007-08-12 15:26:12 +0900425 unsigned int i, j, fn, mode;
426 unsigned long reg_e, reg_d;
Magnus Damm02ab3f72007-07-18 17:25:09 +0900427
Magnus Damm680c4592007-07-20 12:09:29 +0900428 for (i = 0; mr && enum_id && i < desc->nr_mask_regs; i++) {
429 mr = desc->mask_regs + i;
Magnus Damm02ab3f72007-07-18 17:25:09 +0900430
431 for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) {
432 if (mr->enum_ids[j] != enum_id)
433 continue;
434
Magnus Damm73505b42007-08-12 15:26:12 +0900435 if (mr->set_reg && mr->clr_reg) {
436 fn = REG_FN_WRITE_BASE;
437 mode = MODE_DUAL_REG;
438 reg_e = mr->clr_reg;
439 reg_d = mr->set_reg;
440 } else {
441 fn = REG_FN_MODIFY_BASE;
442 if (mr->set_reg) {
443 mode = MODE_ENABLE_REG;
444 reg_e = mr->set_reg;
445 reg_d = mr->set_reg;
446 } else {
447 mode = MODE_MASK_REG;
448 reg_e = mr->clr_reg;
449 reg_d = mr->clr_reg;
450 }
Magnus Damm51da6422007-08-03 14:25:32 +0900451 }
452
Magnus Damm73505b42007-08-12 15:26:12 +0900453 fn += (mr->reg_width >> 3) - 1;
454 return _INTC_MK(fn, mode,
455 intc_get_reg(d, reg_e),
456 intc_get_reg(d, reg_d),
457 1,
458 (mr->reg_width - 1) - j);
Magnus Damm02ab3f72007-07-18 17:25:09 +0900459 }
460 }
461
Magnus Damm680c4592007-07-20 12:09:29 +0900462 if (do_grps)
Magnus Damm73505b42007-08-12 15:26:12 +0900463 return intc_mask_data(desc, d, intc_grp_id(desc, enum_id), 0);
Magnus Damm680c4592007-07-20 12:09:29 +0900464
Magnus Damm02ab3f72007-07-18 17:25:09 +0900465 return 0;
466}
467
468static unsigned int __init intc_prio_data(struct intc_desc *desc,
Magnus Damm73505b42007-08-12 15:26:12 +0900469 struct intc_desc_int *d,
Magnus Damm680c4592007-07-20 12:09:29 +0900470 intc_enum enum_id, int do_grps)
Magnus Damm02ab3f72007-07-18 17:25:09 +0900471{
Magnus Damm680c4592007-07-20 12:09:29 +0900472 struct intc_prio_reg *pr = desc->prio_regs;
Magnus Damm73505b42007-08-12 15:26:12 +0900473 unsigned int i, j, fn, mode, bit;
474 unsigned long reg_e, reg_d;
Magnus Damm02ab3f72007-07-18 17:25:09 +0900475
Magnus Damm680c4592007-07-20 12:09:29 +0900476 for (i = 0; pr && enum_id && i < desc->nr_prio_regs; i++) {
477 pr = desc->prio_regs + i;
Magnus Damm02ab3f72007-07-18 17:25:09 +0900478
479 for (j = 0; j < ARRAY_SIZE(pr->enum_ids); j++) {
480 if (pr->enum_ids[j] != enum_id)
481 continue;
482
Magnus Damm73505b42007-08-12 15:26:12 +0900483 if (pr->set_reg && pr->clr_reg) {
484 fn = REG_FN_WRITE_BASE;
485 mode = MODE_PCLR_REG;
486 reg_e = pr->set_reg;
487 reg_d = pr->clr_reg;
488 } else {
489 fn = REG_FN_MODIFY_BASE;
490 mode = MODE_PRIO_REG;
491 if (!pr->set_reg)
492 BUG();
493 reg_e = pr->set_reg;
494 reg_d = pr->set_reg;
495 }
Magnus Damm02ab3f72007-07-18 17:25:09 +0900496
Magnus Damm73505b42007-08-12 15:26:12 +0900497 fn += (pr->reg_width >> 3) - 1;
Magnus Damm02ab3f72007-07-18 17:25:09 +0900498
roel kluinb21a9102008-09-09 23:02:43 +0200499 BUG_ON((j + 1) * pr->field_width > pr->reg_width);
500
501 bit = pr->reg_width - ((j + 1) * pr->field_width);
Magnus Damm02ab3f72007-07-18 17:25:09 +0900502
Magnus Damm73505b42007-08-12 15:26:12 +0900503 return _INTC_MK(fn, mode,
504 intc_get_reg(d, reg_e),
505 intc_get_reg(d, reg_d),
506 pr->field_width, bit);
Magnus Damm02ab3f72007-07-18 17:25:09 +0900507 }
508 }
509
Magnus Damm680c4592007-07-20 12:09:29 +0900510 if (do_grps)
Magnus Damm73505b42007-08-12 15:26:12 +0900511 return intc_prio_data(desc, d, intc_grp_id(desc, enum_id), 0);
Magnus Damm680c4592007-07-20 12:09:29 +0900512
Magnus Damm02ab3f72007-07-18 17:25:09 +0900513 return 0;
514}
515
Magnus Dammd58876e2008-04-24 21:36:34 +0900516static unsigned int __init intc_ack_data(struct intc_desc *desc,
517 struct intc_desc_int *d,
518 intc_enum enum_id)
519{
520 struct intc_mask_reg *mr = desc->ack_regs;
521 unsigned int i, j, fn, mode;
522 unsigned long reg_e, reg_d;
523
524 for (i = 0; mr && enum_id && i < desc->nr_ack_regs; i++) {
525 mr = desc->ack_regs + i;
526
527 for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) {
528 if (mr->enum_ids[j] != enum_id)
529 continue;
530
531 fn = REG_FN_MODIFY_BASE;
532 mode = MODE_ENABLE_REG;
533 reg_e = mr->set_reg;
534 reg_d = mr->set_reg;
535
536 fn += (mr->reg_width >> 3) - 1;
537 return _INTC_MK(fn, mode,
538 intc_get_reg(d, reg_e),
539 intc_get_reg(d, reg_d),
540 1,
541 (mr->reg_width - 1) - j);
542 }
543 }
544
545 return 0;
546}
Magnus Dammd58876e2008-04-24 21:36:34 +0900547
Magnus Damm73505b42007-08-12 15:26:12 +0900548static unsigned int __init intc_sense_data(struct intc_desc *desc,
549 struct intc_desc_int *d,
550 intc_enum enum_id)
551{
552 struct intc_sense_reg *sr = desc->sense_regs;
553 unsigned int i, j, fn, bit;
554
555 for (i = 0; sr && enum_id && i < desc->nr_sense_regs; i++) {
556 sr = desc->sense_regs + i;
557
558 for (j = 0; j < ARRAY_SIZE(sr->enum_ids); j++) {
559 if (sr->enum_ids[j] != enum_id)
560 continue;
561
562 fn = REG_FN_MODIFY_BASE;
563 fn += (sr->reg_width >> 3) - 1;
Magnus Damm73505b42007-08-12 15:26:12 +0900564
roel kluinb21a9102008-09-09 23:02:43 +0200565 BUG_ON((j + 1) * sr->field_width > sr->reg_width);
566
567 bit = sr->reg_width - ((j + 1) * sr->field_width);
Magnus Damm73505b42007-08-12 15:26:12 +0900568
569 return _INTC_MK(fn, 0, intc_get_reg(d, sr->reg),
570 0, sr->field_width, bit);
571 }
572 }
573
574 return 0;
575}
576
577static void __init intc_register_irq(struct intc_desc *desc,
578 struct intc_desc_int *d,
579 intc_enum enum_id,
Magnus Damm02ab3f72007-07-18 17:25:09 +0900580 unsigned int irq)
581{
Magnus Damm3d37d942007-08-17 00:50:44 +0900582 struct intc_handle_int *hp;
Magnus Damm680c4592007-07-20 12:09:29 +0900583 unsigned int data[2], primary;
Magnus Damm02ab3f72007-07-18 17:25:09 +0900584
Paul Mundt1ce7b032009-11-02 10:30:26 +0900585 /*
586 * Register the IRQ position with the global IRQ map
587 */
588 set_bit(irq, intc_irq_map);
589
Magnus Damm680c4592007-07-20 12:09:29 +0900590 /* Prefer single interrupt source bitmap over other combinations:
591 * 1. bitmap, single interrupt source
592 * 2. priority, single interrupt source
593 * 3. bitmap, multiple interrupt sources (groups)
594 * 4. priority, multiple interrupt sources (groups)
595 */
596
Magnus Damm73505b42007-08-12 15:26:12 +0900597 data[0] = intc_mask_data(desc, d, enum_id, 0);
598 data[1] = intc_prio_data(desc, d, enum_id, 0);
Magnus Damm680c4592007-07-20 12:09:29 +0900599
600 primary = 0;
601 if (!data[0] && data[1])
602 primary = 1;
603
Magnus Dammbdaa6e82009-02-24 22:58:57 +0900604 if (!data[0] && !data[1])
Paul Mundtf0335992009-03-06 17:56:58 +0900605 pr_warning("intc: missing unique irq mask for "
606 "irq %d (vect 0x%04x)\n", irq, irq2evt(irq));
Magnus Dammbdaa6e82009-02-24 22:58:57 +0900607
Magnus Damm73505b42007-08-12 15:26:12 +0900608 data[0] = data[0] ? data[0] : intc_mask_data(desc, d, enum_id, 1);
609 data[1] = data[1] ? data[1] : intc_prio_data(desc, d, enum_id, 1);
Magnus Damm680c4592007-07-20 12:09:29 +0900610
611 if (!data[primary])
612 primary ^= 1;
613
614 BUG_ON(!data[primary]); /* must have primary masking method */
Magnus Damm02ab3f72007-07-18 17:25:09 +0900615
616 disable_irq_nosync(irq);
Magnus Damm73505b42007-08-12 15:26:12 +0900617 set_irq_chip_and_handler_name(irq, &d->chip,
Magnus Damm02ab3f72007-07-18 17:25:09 +0900618 handle_level_irq, "level");
Magnus Damm680c4592007-07-20 12:09:29 +0900619 set_irq_chip_data(irq, (void *)data[primary]);
Magnus Damm02ab3f72007-07-18 17:25:09 +0900620
Magnus Damm7f3edee2008-01-10 14:08:55 +0900621 /* set priority level
622 * - this needs to be at least 2 for 5-bit priorities on 7780
623 */
624 intc_prio_level[irq] = 2;
Magnus Damm73505b42007-08-12 15:26:12 +0900625
Magnus Damm680c4592007-07-20 12:09:29 +0900626 /* enable secondary masking method if present */
627 if (data[!primary])
Magnus Damm73505b42007-08-12 15:26:12 +0900628 _intc_enable(irq, data[!primary]);
629
630 /* add irq to d->prio list if priority is available */
631 if (data[1]) {
Magnus Damm3d37d942007-08-17 00:50:44 +0900632 hp = d->prio + d->nr_prio;
633 hp->irq = irq;
634 hp->handle = data[1];
635
636 if (primary) {
637 /*
638 * only secondary priority should access registers, so
639 * set _INTC_FN(h) = REG_FN_ERR for intc_set_priority()
640 */
641
642 hp->handle &= ~_INTC_MK(0x0f, 0, 0, 0, 0, 0);
643 hp->handle |= _INTC_MK(REG_FN_ERR, 0, 0, 0, 0, 0);
644 }
Magnus Damm73505b42007-08-12 15:26:12 +0900645 d->nr_prio++;
646 }
647
648 /* add irq to d->sense list if sense is available */
649 data[0] = intc_sense_data(desc, d, enum_id);
650 if (data[0]) {
651 (d->sense + d->nr_sense)->irq = irq;
652 (d->sense + d->nr_sense)->handle = data[0];
653 d->nr_sense++;
654 }
Magnus Damm02ab3f72007-07-18 17:25:09 +0900655
656 /* irq should be disabled by default */
Magnus Damm73505b42007-08-12 15:26:12 +0900657 d->chip.mask(irq);
Magnus Dammd58876e2008-04-24 21:36:34 +0900658
Magnus Dammd58876e2008-04-24 21:36:34 +0900659 if (desc->ack_regs)
660 ack_handle[irq] = intc_ack_data(desc, d, enum_id);
Magnus Damm02ab3f72007-07-18 17:25:09 +0900661}
662
Magnus Dammf18d5332007-09-21 18:16:42 +0900663static unsigned int __init save_reg(struct intc_desc_int *d,
664 unsigned int cnt,
665 unsigned long value,
666 unsigned int smp)
667{
668 if (value) {
669 d->reg[cnt] = value;
670#ifdef CONFIG_SMP
671 d->smp[cnt] = smp;
672#endif
673 return 1;
674 }
675
676 return 0;
677}
678
Pawel Moll05ecd5a2009-08-24 19:52:38 +0900679static void intc_redirect_irq(unsigned int irq, struct irq_desc *desc)
Magnus Dammbdaa6e82009-02-24 22:58:57 +0900680{
Pawel Moll05ecd5a2009-08-24 19:52:38 +0900681 generic_handle_irq((unsigned int)get_irq_data(irq));
Magnus Dammbdaa6e82009-02-24 22:58:57 +0900682}
Magnus Dammf18d5332007-09-21 18:16:42 +0900683
Magnus Damm02ab3f72007-07-18 17:25:09 +0900684void __init register_intc_controller(struct intc_desc *desc)
685{
Paul Mundt54ff3282009-06-11 10:33:09 +0300686 unsigned int i, k, smp;
Magnus Damm73505b42007-08-12 15:26:12 +0900687 struct intc_desc_int *d;
Magnus Damm02ab3f72007-07-18 17:25:09 +0900688
Paul Mundt11b6aa92009-06-12 01:34:12 +0300689 d = kzalloc(sizeof(*d), GFP_NOWAIT);
Magnus Damm73505b42007-08-12 15:26:12 +0900690
Magnus Damm2dcec7a2009-04-01 14:30:59 +0000691 INIT_LIST_HEAD(&d->list);
692 list_add(&d->list, &intc_list);
693
Magnus Damm73505b42007-08-12 15:26:12 +0900694 d->nr_reg = desc->mask_regs ? desc->nr_mask_regs * 2 : 0;
695 d->nr_reg += desc->prio_regs ? desc->nr_prio_regs * 2 : 0;
696 d->nr_reg += desc->sense_regs ? desc->nr_sense_regs : 0;
Magnus Dammd58876e2008-04-24 21:36:34 +0900697 d->nr_reg += desc->ack_regs ? desc->nr_ack_regs : 0;
Paul Mundt9b798d52009-10-27 11:36:43 +0900698
Paul Mundt11b6aa92009-06-12 01:34:12 +0300699 d->reg = kzalloc(d->nr_reg * sizeof(*d->reg), GFP_NOWAIT);
Magnus Dammf18d5332007-09-21 18:16:42 +0900700#ifdef CONFIG_SMP
Paul Mundt11b6aa92009-06-12 01:34:12 +0300701 d->smp = kzalloc(d->nr_reg * sizeof(*d->smp), GFP_NOWAIT);
Magnus Dammf18d5332007-09-21 18:16:42 +0900702#endif
Magnus Damm73505b42007-08-12 15:26:12 +0900703 k = 0;
704
705 if (desc->mask_regs) {
706 for (i = 0; i < desc->nr_mask_regs; i++) {
Magnus Dammf18d5332007-09-21 18:16:42 +0900707 smp = IS_SMP(desc->mask_regs[i]);
708 k += save_reg(d, k, desc->mask_regs[i].set_reg, smp);
709 k += save_reg(d, k, desc->mask_regs[i].clr_reg, smp);
Magnus Damm73505b42007-08-12 15:26:12 +0900710 }
711 }
712
713 if (desc->prio_regs) {
Paul Mundt11b6aa92009-06-12 01:34:12 +0300714 d->prio = kzalloc(desc->nr_vectors * sizeof(*d->prio), GFP_NOWAIT);
Magnus Damm73505b42007-08-12 15:26:12 +0900715
716 for (i = 0; i < desc->nr_prio_regs; i++) {
Magnus Dammf18d5332007-09-21 18:16:42 +0900717 smp = IS_SMP(desc->prio_regs[i]);
718 k += save_reg(d, k, desc->prio_regs[i].set_reg, smp);
719 k += save_reg(d, k, desc->prio_regs[i].clr_reg, smp);
Magnus Damm73505b42007-08-12 15:26:12 +0900720 }
721 }
722
723 if (desc->sense_regs) {
Paul Mundt11b6aa92009-06-12 01:34:12 +0300724 d->sense = kzalloc(desc->nr_vectors * sizeof(*d->sense), GFP_NOWAIT);
Magnus Damm73505b42007-08-12 15:26:12 +0900725
726 for (i = 0; i < desc->nr_sense_regs; i++) {
Magnus Dammf18d5332007-09-21 18:16:42 +0900727 k += save_reg(d, k, desc->sense_regs[i].reg, 0);
Magnus Damm73505b42007-08-12 15:26:12 +0900728 }
729 }
730
Magnus Damm73505b42007-08-12 15:26:12 +0900731 d->chip.name = desc->name;
732 d->chip.mask = intc_disable;
733 d->chip.unmask = intc_enable;
734 d->chip.mask_ack = intc_disable;
Magnus Dammf7dd2542009-04-01 14:20:58 +0000735 d->chip.enable = intc_enable;
736 d->chip.disable = intc_disable;
737 d->chip.shutdown = intc_disable;
Magnus Damm73505b42007-08-12 15:26:12 +0900738 d->chip.set_type = intc_set_sense;
Magnus Damm2dcec7a2009-04-01 14:30:59 +0000739 d->chip.set_wake = intc_set_wake;
Magnus Damm02ab3f72007-07-18 17:25:09 +0900740
Magnus Dammd58876e2008-04-24 21:36:34 +0900741 if (desc->ack_regs) {
742 for (i = 0; i < desc->nr_ack_regs; i++)
743 k += save_reg(d, k, desc->ack_regs[i].set_reg, 0);
744
745 d->chip.mask_ack = intc_mask_ack;
746 }
Magnus Dammd58876e2008-04-24 21:36:34 +0900747
748 BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
749
Magnus Dammbdaa6e82009-02-24 22:58:57 +0900750 /* register the vectors one by one */
751 for (i = 0; i < desc->nr_vectors; i++) {
752 struct intc_vect *vect = desc->vectors + i;
Paul Mundt05ff3002009-05-22 01:28:33 +0900753 unsigned int irq = evt2irq(vect->vect);
754 struct irq_desc *irq_desc;
Paul Mundt54ff3282009-06-11 10:33:09 +0300755
Magnus Dammbdaa6e82009-02-24 22:58:57 +0900756 if (!vect->enum_id)
757 continue;
Magnus Damm02ab3f72007-07-18 17:25:09 +0900758
Paul Mundt54ff3282009-06-11 10:33:09 +0300759 irq_desc = irq_to_desc_alloc_node(irq, numa_node_id());
Paul Mundt05ff3002009-05-22 01:28:33 +0900760 if (unlikely(!irq_desc)) {
Paul Mundt1279b7f2009-08-31 15:15:33 +0900761 pr_info("can't get irq_desc for %d\n", irq);
Paul Mundt05ff3002009-05-22 01:28:33 +0900762 continue;
763 }
764
765 intc_register_irq(desc, d, vect->enum_id, irq);
Pawel Moll05ecd5a2009-08-24 19:52:38 +0900766
767 for (k = i + 1; k < desc->nr_vectors; k++) {
768 struct intc_vect *vect2 = desc->vectors + k;
769 unsigned int irq2 = evt2irq(vect2->vect);
770
771 if (vect->enum_id != vect2->enum_id)
772 continue;
773
Paul Mundt1279b7f2009-08-31 15:15:33 +0900774 /*
775 * In the case of multi-evt handling and sparse
776 * IRQ support, each vector still needs to have
777 * its own backing irq_desc.
778 */
779 irq_desc = irq_to_desc_alloc_node(irq2, numa_node_id());
780 if (unlikely(!irq_desc)) {
781 pr_info("can't get irq_desc for %d\n", irq2);
782 continue;
783 }
784
Pawel Moll05ecd5a2009-08-24 19:52:38 +0900785 vect2->enum_id = 0;
786
787 /* redirect this interrupts to the first one */
788 set_irq_chip_and_handler_name(irq2, &d->chip,
789 intc_redirect_irq, "redirect");
790 set_irq_data(irq2, (void *)irq);
791 }
Magnus Damm02ab3f72007-07-18 17:25:09 +0900792 }
793}
Magnus Damm2dcec7a2009-04-01 14:30:59 +0000794
795static int intc_suspend(struct sys_device *dev, pm_message_t state)
796{
797 struct intc_desc_int *d;
798 struct irq_desc *desc;
799 int irq;
800
801 /* get intc controller associated with this sysdev */
802 d = container_of(dev, struct intc_desc_int, sysdev);
803
Francesco VIRLINZI7fd87b32009-04-06 07:17:04 +0000804 switch (state.event) {
805 case PM_EVENT_ON:
806 if (d->state.event != PM_EVENT_FREEZE)
807 break;
808 for_each_irq_desc(irq, desc) {
Francesco VIRLINZI87a705d2009-12-04 08:57:58 +0000809 if (desc->handle_irq == intc_redirect_irq)
Paul Mundt0a753d52009-12-09 14:36:16 +0900810 continue;
Francesco VIRLINZI7fd87b32009-04-06 07:17:04 +0000811 if (desc->chip != &d->chip)
812 continue;
813 if (desc->status & IRQ_DISABLED)
814 intc_disable(irq);
815 else
816 intc_enable(irq);
817 }
818 break;
819 case PM_EVENT_FREEZE:
820 /* nothing has to be done */
821 break;
822 case PM_EVENT_SUSPEND:
823 /* enable wakeup irqs belonging to this intc controller */
824 for_each_irq_desc(irq, desc) {
825 if ((desc->status & IRQ_WAKEUP) && (desc->chip == &d->chip))
826 intc_enable(irq);
827 }
828 break;
Magnus Damm2dcec7a2009-04-01 14:30:59 +0000829 }
Francesco VIRLINZI7fd87b32009-04-06 07:17:04 +0000830 d->state = state;
Magnus Damm2dcec7a2009-04-01 14:30:59 +0000831
832 return 0;
833}
834
Francesco VIRLINZI7fd87b32009-04-06 07:17:04 +0000835static int intc_resume(struct sys_device *dev)
836{
837 return intc_suspend(dev, PMSG_ON);
838}
839
Magnus Damm2dcec7a2009-04-01 14:30:59 +0000840static struct sysdev_class intc_sysdev_class = {
841 .name = "intc",
842 .suspend = intc_suspend,
Francesco VIRLINZI7fd87b32009-04-06 07:17:04 +0000843 .resume = intc_resume,
Magnus Damm2dcec7a2009-04-01 14:30:59 +0000844};
845
846/* register this intc as sysdev to allow suspend/resume */
847static int __init register_intc_sysdevs(void)
848{
849 struct intc_desc_int *d;
850 int error;
851 int id = 0;
852
853 error = sysdev_class_register(&intc_sysdev_class);
854 if (!error) {
855 list_for_each_entry(d, &intc_list, list) {
856 d->sysdev.id = id;
857 d->sysdev.cls = &intc_sysdev_class;
858 error = sysdev_register(&d->sysdev);
859 if (error)
860 break;
861 id++;
862 }
863 }
864
865 if (error)
866 pr_warning("intc: sysdev registration error\n");
867
868 return error;
869}
Magnus Damm2dcec7a2009-04-01 14:30:59 +0000870device_initcall(register_intc_sysdevs);
Paul Mundt1ce7b032009-11-02 10:30:26 +0900871
872/*
873 * Dynamic IRQ allocation and deallocation
874 */
875static unsigned int create_irq_on_node(unsigned int irq_want, int node)
876{
877 unsigned int irq = 0, new;
878 unsigned long flags;
879 struct irq_desc *desc;
880
881 spin_lock_irqsave(&vector_lock, flags);
882
883 /*
884 * First try the wanted IRQ, then scan.
885 */
886 if (test_and_set_bit(irq_want, intc_irq_map)) {
887 new = find_first_zero_bit(intc_irq_map, nr_irqs);
888 if (unlikely(new == nr_irqs))
889 goto out_unlock;
890
891 desc = irq_to_desc_alloc_node(new, node);
892 if (unlikely(!desc)) {
893 pr_info("can't get irq_desc for %d\n", new);
894 goto out_unlock;
895 }
896
897 desc = move_irq_desc(desc, node);
898 __set_bit(new, intc_irq_map);
899 irq = new;
900 }
901
902out_unlock:
903 spin_unlock_irqrestore(&vector_lock, flags);
904
905 if (irq > 0)
906 dynamic_irq_init(irq);
907
908 return irq;
909}
910
911int create_irq(void)
912{
913 int nid = cpu_to_node(smp_processor_id());
914 int irq;
915
916 irq = create_irq_on_node(NR_IRQS_LEGACY, nid);
917 if (irq == 0)
918 irq = -1;
919
920 return irq;
921}
922
923void destroy_irq(unsigned int irq)
924{
925 unsigned long flags;
926
927 dynamic_irq_cleanup(irq);
928
929 spin_lock_irqsave(&vector_lock, flags);
930 __clear_bit(irq, intc_irq_map);
931 spin_unlock_irqrestore(&vector_lock, flags);
932}
Paul Mundt45b9dea2009-11-02 15:43:20 +0900933
934int reserve_irq_vector(unsigned int irq)
935{
936 unsigned long flags;
937 int ret = 0;
938
939 spin_lock_irqsave(&vector_lock, flags);
940 if (test_and_set_bit(irq, intc_irq_map))
941 ret = -EBUSY;
942 spin_unlock_irqrestore(&vector_lock, flags);
943
944 return ret;
945}
946
947void reserve_irq_legacy(void)
948{
949 unsigned long flags;
950 int i, j;
951
952 spin_lock_irqsave(&vector_lock, flags);
953 j = find_first_bit(intc_irq_map, nr_irqs);
954 for (i = 0; i < j; i++)
955 __set_bit(i, intc_irq_map);
956 spin_unlock_irqrestore(&vector_lock, flags);
957}