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gerrit-public.fairphone.software / kernel / msm / 0da34b6dfe55810ae60db57e08e2af8a808c0a55 / . / drivers / net / myri10ge / myri10ge_mcp.h
blob: ac23e18db63d8bf29ba7f4578f1aaa25bef588bb [file] [log] [blame]
Brice Goglin0da34b62006-05-23 06:10:15 -0400[diff] [blame^]1#ifndef __MYRI10GE_MCP_H__
2#define __MYRI10GE_MCP_H__
3
4#define MXGEFW_VERSION_MAJOR 1
5#define MXGEFW_VERSION_MINOR 4
6
7/* 8 Bytes */
8struct mcp_dma_addr {
9 u32 high;
10 u32 low;
11};
12
13/* 4 Bytes */
14struct mcp_slot {
15 u16 checksum;
16 u16 length;
17};
18
19/* 64 Bytes */
20struct mcp_cmd {
21 u32 cmd;
22 u32 data0; /* will be low portion if data > 32 bits */
23 /* 8 */
24 u32 data1; /* will be high portion if data > 32 bits */
25 u32 data2; /* currently unused.. */
26 /* 16 */
27 struct mcp_dma_addr response_addr;
28 /* 24 */
29 u8 pad[40];
30};
31
32/* 8 Bytes */
33struct mcp_cmd_response {
34 u32 data;
35 u32 result;
36};
37
38/*
39 * flags used in mcp_kreq_ether_send_t:
40 *
41 * The SMALL flag is only needed in the first segment. It is raised
42 * for packets that are total less or equal 512 bytes.
43 *
44 * The CKSUM flag must be set in all segments.
45 *
46 * The PADDED flags is set if the packet needs to be padded, and it
47 * must be set for all segments.
48 *
49 * The MXGEFW_FLAGS_ALIGN_ODD must be set if the cumulative
50 * length of all previous segments was odd.
51 */
52
53#define MXGEFW_FLAGS_SMALL 0x1
54#define MXGEFW_FLAGS_TSO_HDR 0x1
55#define MXGEFW_FLAGS_FIRST 0x2
56#define MXGEFW_FLAGS_ALIGN_ODD 0x4
57#define MXGEFW_FLAGS_CKSUM 0x8
58#define MXGEFW_FLAGS_TSO_LAST 0x8
59#define MXGEFW_FLAGS_NO_TSO 0x10
60#define MXGEFW_FLAGS_TSO_CHOP 0x10
61#define MXGEFW_FLAGS_TSO_PLD 0x20
62
63#define MXGEFW_SEND_SMALL_SIZE 1520
64#define MXGEFW_MAX_MTU 9400
65
66union mcp_pso_or_cumlen {
67 u16 pseudo_hdr_offset;
68 u16 cum_len;
69};
70
71#define MXGEFW_MAX_SEND_DESC 12
72#define MXGEFW_PAD 2
73
74/* 16 Bytes */
75struct mcp_kreq_ether_send {
76 u32 addr_high;
77 u32 addr_low;
78 u16 pseudo_hdr_offset;
79 u16 length;
80 u8 pad;
81 u8 rdma_count;
82 u8 cksum_offset; /* where to start computing cksum */
83 u8 flags; /* as defined above */
84};
85
86/* 8 Bytes */
87struct mcp_kreq_ether_recv {
88 u32 addr_high;
89 u32 addr_low;
90};
91
92/* Commands */
93
94#define MXGEFW_CMD_OFFSET 0xf80000
95
96enum myri10ge_mcp_cmd_type {
97 MXGEFW_CMD_NONE = 0,
98 /* Reset the mcp, it is left in a safe state, waiting
99 * for the driver to set all its parameters */
100 MXGEFW_CMD_RESET,
101
102 /* get the version number of the current firmware..
103 * (may be available in the eeprom strings..? */
104 MXGEFW_GET_MCP_VERSION,
105
106 /* Parameters which must be set by the driver before it can
107 * issue MXGEFW_CMD_ETHERNET_UP. They persist until the next
108 * MXGEFW_CMD_RESET is issued */
109
110 MXGEFW_CMD_SET_INTRQ_DMA,
111 MXGEFW_CMD_SET_BIG_BUFFER_SIZE, /* in bytes, power of 2 */
112 MXGEFW_CMD_SET_SMALL_BUFFER_SIZE, /* in bytes */
113
114 /* Parameters which refer to lanai SRAM addresses where the
115 * driver must issue PIO writes for various things */
116
117 MXGEFW_CMD_GET_SEND_OFFSET,
118 MXGEFW_CMD_GET_SMALL_RX_OFFSET,
119 MXGEFW_CMD_GET_BIG_RX_OFFSET,
120 MXGEFW_CMD_GET_IRQ_ACK_OFFSET,
121 MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET,
122
123 /* Parameters which refer to rings stored on the MCP,
124 * and whose size is controlled by the mcp */
125
126 MXGEFW_CMD_GET_SEND_RING_SIZE, /* in bytes */
127 MXGEFW_CMD_GET_RX_RING_SIZE, /* in bytes */
128
129 /* Parameters which refer to rings stored in the host,
130 * and whose size is controlled by the host. Note that
131 * all must be physically contiguous and must contain
132 * a power of 2 number of entries. */
133
134 MXGEFW_CMD_SET_INTRQ_SIZE, /* in bytes */
135
136 /* command to bring ethernet interface up. Above parameters
137 * (plus mtu & mac address) must have been exchanged prior
138 * to issuing this command */
139 MXGEFW_CMD_ETHERNET_UP,
140
141 /* command to bring ethernet interface down. No further sends
142 * or receives may be processed until an MXGEFW_CMD_ETHERNET_UP
143 * is issued, and all interrupt queues must be flushed prior
144 * to ack'ing this command */
145
146 MXGEFW_CMD_ETHERNET_DOWN,
147
148 /* commands the driver may issue live, without resetting
149 * the nic. Note that increasing the mtu "live" should
150 * only be done if the driver has already supplied buffers
151 * sufficiently large to handle the new mtu. Decreasing
152 * the mtu live is safe */
153
154 MXGEFW_CMD_SET_MTU,
155 MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET, /* in microseconds */
156 MXGEFW_CMD_SET_STATS_INTERVAL, /* in microseconds */
157 MXGEFW_CMD_SET_STATS_DMA,
158
159 MXGEFW_ENABLE_PROMISC,
160 MXGEFW_DISABLE_PROMISC,
161 MXGEFW_SET_MAC_ADDRESS,
162
163 MXGEFW_ENABLE_FLOW_CONTROL,
164 MXGEFW_DISABLE_FLOW_CONTROL,
165
166 /* do a DMA test
167 * data0,data1 = DMA address
168 * data2 = RDMA length (MSH), WDMA length (LSH)
169 * command return data = repetitions (MSH), 0.5-ms ticks (LSH)
170 */
171 MXGEFW_DMA_TEST
172};
173
174enum myri10ge_mcp_cmd_status {
175 MXGEFW_CMD_OK = 0,
176 MXGEFW_CMD_UNKNOWN,
177 MXGEFW_CMD_ERROR_RANGE,
178 MXGEFW_CMD_ERROR_BUSY,
179 MXGEFW_CMD_ERROR_EMPTY,
180 MXGEFW_CMD_ERROR_CLOSED,
181 MXGEFW_CMD_ERROR_HASH_ERROR,
182 MXGEFW_CMD_ERROR_BAD_PORT,
183 MXGEFW_CMD_ERROR_RESOURCES
184};
185
186/* 40 Bytes */
187struct mcp_irq_data {
188 u32 send_done_count;
189
190 u32 link_up;
191 u32 dropped_link_overflow;
192 u32 dropped_link_error_or_filtered;
193 u32 dropped_runt;
194 u32 dropped_overrun;
195 u32 dropped_no_small_buffer;
196 u32 dropped_no_big_buffer;
197 u32 rdma_tags_available;
198
199 u8 tx_stopped;
200 u8 link_down;
201 u8 stats_updated;
202 u8 valid;
203};
204
205#endif /* __MYRI10GE_MCP_H__ */