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Mauro Carvalho Chehabafd1a0c2005-12-12 00:37:27 -08001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * dmx.h
3 *
4 * Copyright (C) 2000 Marcus Metzler <marcus@convergence.de>
5 * & Ralph Metzler <ralph@convergence.de>
6 * for convergence integrated media GmbH
7 *
Hamad Kadmanyd432f712013-01-17 17:36:17 +02008 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Hamad Kadmany32cb9822012-05-10 08:47:44 +03009 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070010 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU Lesser General Public License
12 * as published by the Free Software Foundation; either version 2.1
13 * of the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU Lesser General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 *
24 */
25
26#ifndef _DVBDMX_H_
27#define _DVBDMX_H_
28
Jaswinder Singh Rajputc86629c2009-01-30 19:55:32 +053029#include <linux/types.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070030#ifdef __KERNEL__
31#include <linux/time.h>
32#else
33#include <time.h>
34#endif
35
36
37#define DMX_FILTER_SIZE 16
38
Hamad Kadmany4f877942012-07-15 15:06:01 +030039/* Min recording chunk upon which event is generated */
40#define DMX_REC_BUFF_CHUNK_MIN_SIZE (100*188)
41
Hamad Kadmany168203b2013-01-28 15:22:46 +020042#define DMX_MAX_DECODER_BUFFER_NUM (32)
Gilad Broner526e57e2012-12-03 15:57:44 +020043
Linus Torvalds1da177e2005-04-16 15:20:36 -070044typedef enum
45{
46 DMX_OUT_DECODER, /* Streaming directly to decoder. */
47 DMX_OUT_TAP, /* Output going to a memory buffer */
Mauro Carvalho Chehab674434c2005-12-12 00:37:28 -080048 /* (to be retrieved via the read command).*/
Peter Hartleyb01cd932008-04-22 14:45:36 -030049 DMX_OUT_TS_TAP, /* Output multiplexed into a new TS */
Mauro Carvalho Chehab674434c2005-12-12 00:37:28 -080050 /* (to be retrieved by reading from the */
51 /* logical DVR device). */
Peter Hartleyb01cd932008-04-22 14:45:36 -030052 DMX_OUT_TSDEMUX_TAP /* Like TS_TAP but retrieved from the DMX device */
Linus Torvalds1da177e2005-04-16 15:20:36 -070053} dmx_output_t;
54
55
56typedef enum
57{
58 DMX_IN_FRONTEND, /* Input from a front-end device. */
59 DMX_IN_DVR /* Input from the logical DVR device. */
60} dmx_input_t;
61
62
63typedef enum
64{
Mauro Carvalho Chehabafd1a0c2005-12-12 00:37:27 -080065 DMX_PES_AUDIO0,
Linus Torvalds1da177e2005-04-16 15:20:36 -070066 DMX_PES_VIDEO0,
67 DMX_PES_TELETEXT0,
68 DMX_PES_SUBTITLE0,
69 DMX_PES_PCR0,
70
Mauro Carvalho Chehabafd1a0c2005-12-12 00:37:27 -080071 DMX_PES_AUDIO1,
Linus Torvalds1da177e2005-04-16 15:20:36 -070072 DMX_PES_VIDEO1,
73 DMX_PES_TELETEXT1,
74 DMX_PES_SUBTITLE1,
75 DMX_PES_PCR1,
76
Mauro Carvalho Chehabafd1a0c2005-12-12 00:37:27 -080077 DMX_PES_AUDIO2,
Linus Torvalds1da177e2005-04-16 15:20:36 -070078 DMX_PES_VIDEO2,
79 DMX_PES_TELETEXT2,
80 DMX_PES_SUBTITLE2,
81 DMX_PES_PCR2,
82
Mauro Carvalho Chehabafd1a0c2005-12-12 00:37:27 -080083 DMX_PES_AUDIO3,
Linus Torvalds1da177e2005-04-16 15:20:36 -070084 DMX_PES_VIDEO3,
85 DMX_PES_TELETEXT3,
86 DMX_PES_SUBTITLE3,
87 DMX_PES_PCR3,
88
89 DMX_PES_OTHER
90} dmx_pes_type_t;
91
92#define DMX_PES_AUDIO DMX_PES_AUDIO0
93#define DMX_PES_VIDEO DMX_PES_VIDEO0
94#define DMX_PES_TELETEXT DMX_PES_TELETEXT0
95#define DMX_PES_SUBTITLE DMX_PES_SUBTITLE0
96#define DMX_PES_PCR DMX_PES_PCR0
97
98
Linus Torvalds1da177e2005-04-16 15:20:36 -070099typedef struct dmx_filter
100{
101 __u8 filter[DMX_FILTER_SIZE];
102 __u8 mask[DMX_FILTER_SIZE];
103 __u8 mode[DMX_FILTER_SIZE];
104} dmx_filter_t;
105
106
Liron Kuchd4cc3b02012-05-17 16:31:58 +0300107/* Filter flags */
108#define DMX_CHECK_CRC 0x01
109#define DMX_ONESHOT 0x02
110#define DMX_IMMEDIATE_START 0x04
Liron Kuchd4cc3b02012-05-17 16:31:58 +0300111#define DMX_KERNEL_CLIENT 0x8000
112
Linus Torvalds1da177e2005-04-16 15:20:36 -0700113struct dmx_sct_filter_params
114{
115 __u16 pid;
116 dmx_filter_t filter;
117 __u32 timeout;
118 __u32 flags;
Liron Kuchd4cc3b02012-05-17 16:31:58 +0300119};
120
121
Hamad Kadmanyc37dee82013-04-10 18:14:48 +0300122enum dmx_video_codec {
123 DMX_VIDEO_CODEC_MPEG2,
124 DMX_VIDEO_CODEC_H264,
125 DMX_VIDEO_CODEC_VC1
Liron Kuchd4cc3b02012-05-17 16:31:58 +0300126};
127
Hamad Kadmanyc37dee82013-04-10 18:14:48 +0300128/* Index entries types */
129#define DMX_IDX_RAI 0x00000001
130#define DMX_IDX_PUSI 0x00000002
131#define DMX_IDX_MPEG_SEQ_HEADER 0x00000004
132#define DMX_IDX_MPEG_GOP 0x00000008
133#define DMX_IDX_MPEG_FIRST_SEQ_FRAME_START 0x00000010
134#define DMX_IDX_MPEG_FIRST_SEQ_FRAME_END 0x00000020
135#define DMX_IDX_MPEG_I_FRAME_START 0x00000040
136#define DMX_IDX_MPEG_I_FRAME_END 0x00000080
137#define DMX_IDX_MPEG_P_FRAME_START 0x00000100
138#define DMX_IDX_MPEG_P_FRAME_END 0x00000200
139#define DMX_IDX_MPEG_B_FRAME_START 0x00000400
140#define DMX_IDX_MPEG_B_FRAME_END 0x00000800
141#define DMX_IDX_H264_SPS 0x00001000
142#define DMX_IDX_H264_PPS 0x00002000
143#define DMX_IDX_H264_FIRST_SPS_FRAME_START 0x00004000
144#define DMX_IDX_H264_FIRST_SPS_FRAME_END 0x00008000
145#define DMX_IDX_H264_IDR_START 0x00010000
146#define DMX_IDX_H264_IDR_END 0x00020000
147#define DMX_IDX_H264_NON_IDR_START 0x00040000
148#define DMX_IDX_H264_NON_IDR_END 0x00080000
149#define DMX_IDX_VC1_SEQ_HEADER 0x00100000
150#define DMX_IDX_VC1_ENTRY_POINT 0x00200000
151#define DMX_IDX_VC1_FIRST_SEQ_FRAME_START 0x00400000
152#define DMX_IDX_VC1_FIRST_SEQ_FRAME_END 0x00800000
153#define DMX_IDX_VC1_FRAME_START 0x01000000
154#define DMX_IDX_VC1_FRAME_END 0x02000000
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156struct dmx_pes_filter_params
157{
158 __u16 pid;
159 dmx_input_t input;
160 dmx_output_t output;
161 dmx_pes_type_t pes_type;
162 __u32 flags;
Liron Kuchd4cc3b02012-05-17 16:31:58 +0300163
Hamad Kadmany4f877942012-07-15 15:06:01 +0300164 /*
165 * The following configures when the event
166 * DMX_EVENT_NEW_REC_CHUNK will be triggered.
167 * When new recorded data is received with size
168 * equal or larger than this value a new event
Gilad Bronera81f42e2013-04-07 16:38:47 +0300169 * will be triggered. This is relevant when
Hamad Kadmany4f877942012-07-15 15:06:01 +0300170 * output is DMX_OUT_TS_TAP or DMX_OUT_TSDEMUX_TAP,
171 * size must be at least DMX_REC_BUFF_CHUNK_MIN_SIZE
172 * and smaller than buffer size.
173 */
174 __u32 rec_chunk_size;
175
Hamad Kadmanyc37dee82013-04-10 18:14:48 +0300176 enum dmx_video_codec video_codec;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700177};
178
Hamad Kadmany32cb9822012-05-10 08:47:44 +0300179struct dmx_buffer_status {
180 /* size of buffer in bytes */
181 unsigned int size;
182
183 /* fullness of buffer in bytes */
184 unsigned int fullness;
185
186 /*
187 * How many bytes are free
188 * It's the same as: size-fullness-1
189 */
190 unsigned int free_bytes;
191
192 /* read pointer offset in bytes */
193 unsigned int read_offset;
194
195 /* write pointer offset in bytes */
196 unsigned int write_offset;
197
198 /* non-zero if data error occured */
199 int error;
200};
201
Hamad Kadmany4f877942012-07-15 15:06:01 +0300202/* Events associated with each demux filter */
203enum dmx_event {
204 /* New PES packet is ready to be consumed */
Hamad Kadmanya0a00f52013-03-19 10:11:45 +0200205 DMX_EVENT_NEW_PES = 0x00000001,
Hamad Kadmany4f877942012-07-15 15:06:01 +0300206
207 /* New section is ready to be consumed */
Hamad Kadmanya0a00f52013-03-19 10:11:45 +0200208 DMX_EVENT_NEW_SECTION = 0x00000002,
Hamad Kadmany4f877942012-07-15 15:06:01 +0300209
210 /* New recording chunk is ready to be consumed */
Hamad Kadmanya0a00f52013-03-19 10:11:45 +0200211 DMX_EVENT_NEW_REC_CHUNK = 0x00000004,
Hamad Kadmany4f877942012-07-15 15:06:01 +0300212
213 /* New PCR value is ready */
Hamad Kadmanya0a00f52013-03-19 10:11:45 +0200214 DMX_EVENT_NEW_PCR = 0x00000008,
Hamad Kadmany4f877942012-07-15 15:06:01 +0300215
216 /* Overflow */
Hamad Kadmanya0a00f52013-03-19 10:11:45 +0200217 DMX_EVENT_BUFFER_OVERFLOW = 0x00000010,
Hamad Kadmany4f877942012-07-15 15:06:01 +0300218
219 /* Section was dropped due to CRC error */
Hamad Kadmanya0a00f52013-03-19 10:11:45 +0200220 DMX_EVENT_SECTION_CRC_ERROR = 0x00000020,
Hamad Kadmany4f877942012-07-15 15:06:01 +0300221
222 /* End-of-stream, no more data from this filter */
Hamad Kadmanya0a00f52013-03-19 10:11:45 +0200223 DMX_EVENT_EOS = 0x00000040,
Liron Kuch41543b72012-11-26 13:27:22 +0200224
225 /* New Elementary Stream data is ready */
Gilad Bronera81f42e2013-04-07 16:38:47 +0300226 DMX_EVENT_NEW_ES_DATA = 0x00000080,
227
228 /* Data markers */
Hamad Kadmanye1dba202013-04-10 18:37:25 +0300229 DMX_EVENT_MARKER = 0x00000100,
230
231 /* New indexing entry is ready */
232 DMX_EVENT_NEW_INDEX_ENTRY = 0x00000200
Gilad Bronera81f42e2013-04-07 16:38:47 +0300233};
234
235enum dmx_oob_cmd {
236 /* End-of-stream, no more data from this filter */
237 DMX_OOB_CMD_EOS,
238
239 /* Data markers */
240 DMX_OOB_CMD_MARKER,
Hamad Kadmany4f877942012-07-15 15:06:01 +0300241};
242
243/* Flags passed in filter events */
244
245/* Continuity counter error was detected */
246#define DMX_FILTER_CC_ERROR 0x01
247
248/* Discontinuity indicator was set */
Liron Kuch41543b72012-11-26 13:27:22 +0200249#define DMX_FILTER_DISCONTINUITY_INDICATOR 0x02
Hamad Kadmany4f877942012-07-15 15:06:01 +0300250
251/* PES legnth in PES header is not correct */
252#define DMX_FILTER_PES_LENGTH_ERROR 0x04
253
254
255/* PES info associated with DMX_EVENT_NEW_PES event */
256struct dmx_pes_event_info {
257 /* Offset at which PES information starts */
258 __u32 base_offset;
259
260 /*
261 * Start offset at which PES data
262 * from the stream starts.
263 * Equal to base_offset if PES data
264 * starts from the beginning.
265 */
266 __u32 start_offset;
267
268 /* Total length holding the PES information */
269 __u32 total_length;
270
271 /* Actual length holding the PES data */
272 __u32 actual_length;
273
274 /* Local receiver timestamp in 27MHz */
275 __u64 stc;
276
277 /* Flags passed in filter events */
278 __u32 flags;
Hamad Kadmanyd432f712013-01-17 17:36:17 +0200279
280 /*
281 * Number of TS packets with Transport Error Indicator (TEI)
282 * found while constructing the PES.
283 */
284 __u32 transport_error_indicator_counter;
285
286 /* Number of continuity errors found while constructing the PES */
287 __u32 continuity_error_counter;
288
289 /* Total number of TS packets holding the PES */
290 __u32 ts_packets_num;
Hamad Kadmany4f877942012-07-15 15:06:01 +0300291};
292
293/* Section info associated with DMX_EVENT_NEW_SECTION event */
294struct dmx_section_event_info {
295 /* Offset at which section information starts */
296 __u32 base_offset;
297
298 /*
299 * Start offset at which section data
300 * from the stream starts.
301 * Equal to base_offset if section data
302 * starts from the beginning.
303 */
304 __u32 start_offset;
305
306 /* Total length holding the section information */
307 __u32 total_length;
308
309 /* Actual length holding the section data */
310 __u32 actual_length;
311
312 /* Flags passed in filter events */
313 __u32 flags;
314};
315
316/* Recording info associated with DMX_EVENT_NEW_REC_CHUNK event */
317struct dmx_rec_chunk_event_info {
318 /* Offset at which recording chunk starts */
319 __u32 offset;
320
321 /* Size of recording chunk in bytes */
322 __u32 size;
323};
324
325/* PCR info associated with DMX_EVENT_NEW_PCR event */
326struct dmx_pcr_event_info {
327 /* Local timestamp in 27MHz
328 * when PCR packet was received
329 */
330 __u64 stc;
331
332 /* PCR value in 27MHz */
333 __u64 pcr;
334
335 /* Flags passed in filter events */
336 __u32 flags;
337};
338
339/*
Liron Kuch41543b72012-11-26 13:27:22 +0200340 * Elementary stream data information associated
341 * with DMX_EVENT_NEW_ES_DATA event
342 */
343struct dmx_es_data_event_info {
344 /* Buffer user-space handle */
345 int buf_handle;
346
347 /*
348 * Cookie to provide when releasing the buffer
349 * using the DMX_RELEASE_DECODER_BUFFER ioctl command
350 */
351 int cookie;
352
353 /* Offset of data from the beginning of the buffer */
354 __u32 offset;
355
356 /* Length of data in buffer (in bytes) */
357 __u32 data_len;
358
359 /* Indication whether PTS value is valid */
360 int pts_valid;
361
362 /* PTS value associated with the buffer */
363 __u64 pts;
364
365 /* Indication whether DTS value is valid */
366 int dts_valid;
367
368 /* DTS value associated with the buffer */
369 __u64 dts;
370
Hamad Kadmany103365a2013-04-21 08:34:08 +0300371 /* STC value associated with the buffer in 27MHz */
372 __u64 stc;
373
Liron Kuch41543b72012-11-26 13:27:22 +0200374 /*
375 * Number of TS packets with Transport Error Indicator (TEI) set
376 * in the TS packet header since last reported event
377 */
378 __u32 transport_error_indicator_counter;
379
380 /* Number of continuity errors since last reported event */
381 __u32 continuity_error_counter;
382
383 /* Total number of TS packets processed since last reported event */
384 __u32 ts_packets_num;
385
386 /*
387 * Number of dropped bytes due to insufficient buffer space,
388 * since last reported event
389 */
390 __u32 ts_dropped_bytes;
391};
392
Gilad Bronera81f42e2013-04-07 16:38:47 +0300393/* Marker details associated with DMX_EVENT_MARKER event */
394struct dmx_marker_event_info {
395 /* Marker id */
396 __u64 id;
397};
398
Hamad Kadmanye1dba202013-04-10 18:37:25 +0300399/* Indexing information associated with DMX_EVENT_NEW_INDEX_ENTRY event */
400struct dmx_index_event_info {
401 /* Index entry type, one of of DMX_IDX_* */
402 __u64 type;
403
404 /*
405 * The PID the index entry belongs to.
406 * In case of recording filter, multiple PIDs may exist in the same
407 * filter through DMX_ADD_PID ioctl and each can be indexed seperatly.
408 */
409 __u16 pid;
410
411 /*
412 * The TS packet number in the recorded data at which
413 * the indexing event is found.
414 */
415 __u64 match_tsp_num;
416
417 /*
418 * The TS packet number in the recorded data preceeding
419 * match_tsp_num and has PUSI set.
420 */
421 __u64 last_pusi_tsp_num;
422
423 /* STC associated with match_tsp_num, in 27MHz */
424 __u64 stc;
425};
426
Liron Kuch41543b72012-11-26 13:27:22 +0200427/*
Hamad Kadmany4f877942012-07-15 15:06:01 +0300428 * Filter's event returned through DMX_GET_EVENT.
429 * poll with POLLPRI would block until events are available.
430 */
431struct dmx_filter_event {
432 enum dmx_event type;
433
434 union {
435 struct dmx_pes_event_info pes;
436 struct dmx_section_event_info section;
437 struct dmx_rec_chunk_event_info recording_chunk;
438 struct dmx_pcr_event_info pcr;
Liron Kuch41543b72012-11-26 13:27:22 +0200439 struct dmx_es_data_event_info es_data;
Gilad Bronera81f42e2013-04-07 16:38:47 +0300440 struct dmx_marker_event_info marker;
Hamad Kadmanye1dba202013-04-10 18:37:25 +0300441 struct dmx_index_event_info index;
Hamad Kadmany4f877942012-07-15 15:06:01 +0300442 } params;
443};
444
Hamad Kadmanyec6202d2012-09-20 07:58:57 +0300445/* Filter's buffer requirement returned in dmx_caps */
446struct dmx_buffer_requirement {
447 /* Buffer size alignment, 0 means no special requirement */
448 __u32 size_alignment;
449
450 /* Maximum buffer size allowed */
451 __u32 max_size;
Gilad Broner526e57e2012-12-03 15:57:44 +0200452
453 /* Maximum number of linear buffers handled by demux */
454 __u32 max_buffer_num;
455
456 /* Feature support bitmap as detailed below */
Hamad Kadmanyec6202d2012-09-20 07:58:57 +0300457 __u32 flags;
458
Gilad Broner526e57e2012-12-03 15:57:44 +0200459/* Buffer must be allocated as physically contiguous memory */
460#define DMX_BUFFER_CONTIGUOUS_MEM 0x1
Hamad Kadmanyec6202d2012-09-20 07:58:57 +0300461
462/* If the filter's data is decrypted, the buffer should be secured one */
463#define DMX_BUFFER_SECURED_IF_DECRYPTED 0x2
Gilad Broner526e57e2012-12-03 15:57:44 +0200464
465/* Buffer can be allocated externally */
466#define DMX_BUFFER_EXTERNAL_SUPPORT 0x4
467
468/* Buffer can be allocated internally */
469#define DMX_BUFFER_INTERNAL_SUPPORT 0x8
470
471/* Filter output can be output to a linear buffer group */
472#define DMX_BUFFER_LINEAR_GROUP_SUPPORT 0x10
Hamad Kadmanyec6202d2012-09-20 07:58:57 +0300473};
474
Gilad Bronera81f42e2013-04-07 16:38:47 +0300475/* Out-of-band (OOB) command */
476struct dmx_oob_command {
477 enum dmx_oob_cmd type;
478
479 union {
480 struct dmx_marker_event_info marker;
481 } params;
482};
483
Linus Torvalds1da177e2005-04-16 15:20:36 -0700484typedef struct dmx_caps {
485 __u32 caps;
Hamad Kadmanyd2c325e2012-05-28 13:52:49 +0300486
487/* Indicates whether demux support playback from memory in pull mode */
488#define DMX_CAP_PULL_MODE 0x01
489
490/* Indicates whether demux support indexing of recorded video stream */
491#define DMX_CAP_VIDEO_INDEXING 0x02
492
493/* Indicates whether demux support sending data directly to video decoder */
494#define DMX_CAP_VIDEO_DECODER_DATA 0x04
495
496/* Indicates whether demux support sending data directly to audio decoder */
497#define DMX_CAP_AUDIO_DECODER_DATA 0x08
498
499/* Indicates whether demux support sending data directly to subtitle decoder */
500#define DMX_CAP_SUBTITLE_DECODER_DATA 0x10
501
502 /* Number of decoders demux can output data to */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700503 int num_decoders;
Hamad Kadmanyd2c325e2012-05-28 13:52:49 +0300504
505 /* Number of demux devices */
506 int num_demux_devices;
507
508 /* Max number of PID filters */
509 int num_pid_filters;
510
511 /* Max number of section filters */
512 int num_section_filters;
513
514 /*
515 * Max number of section filters using same PID,
516 * 0 if not supported
517 */
518 int num_section_filters_per_pid;
519
520 /*
521 * Length of section filter, not including section
522 * length field (2 bytes).
523 */
524 int section_filter_length;
525
526 /* Max number of demod based input */
527 int num_demod_inputs;
528
529 /* Max number of memory based input */
530 int num_memory_inputs;
531
532 /* Overall bitrate from all inputs concurrently. Mbit/sec */
533 int max_bitrate;
534
535 /* Max bitrate from single demod input. Mbit/sec */
536 int demod_input_max_bitrate;
537
538 /* Max bitrate from single memory input. Mbit/sec */
539 int memory_input_max_bitrate;
Hamad Kadmanyec6202d2012-09-20 07:58:57 +0300540
541 struct dmx_buffer_requirement section;
542
543 /* For PES not sent to decoder */
544 struct dmx_buffer_requirement pes;
545
Gilad Broner526e57e2012-12-03 15:57:44 +0200546 /* For PES sent to decoder */
547 struct dmx_buffer_requirement decoder;
548
Hamad Kadmanyec6202d2012-09-20 07:58:57 +0300549 /* Recording buffer for recording of 188 bytes packets */
550 struct dmx_buffer_requirement recording_188_tsp;
551
552 /* Recording buffer for recording of 192 bytes packets */
553 struct dmx_buffer_requirement recording_192_tsp;
554
555 /* DVR input buffer for playback of 188 bytes packets */
556 struct dmx_buffer_requirement playback_188_tsp;
557
558 /* DVR input buffer for playback of 192 bytes packets */
559 struct dmx_buffer_requirement playback_192_tsp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700560} dmx_caps_t;
561
562typedef enum {
563 DMX_SOURCE_FRONT0 = 0,
564 DMX_SOURCE_FRONT1,
565 DMX_SOURCE_FRONT2,
566 DMX_SOURCE_FRONT3,
567 DMX_SOURCE_DVR0 = 16,
568 DMX_SOURCE_DVR1,
569 DMX_SOURCE_DVR2,
570 DMX_SOURCE_DVR3
571} dmx_source_t;
572
Hamad Kadmany32cb9822012-05-10 08:47:44 +0300573enum dmx_tsp_format_t {
574 DMX_TSP_FORMAT_188 = 0,
575 DMX_TSP_FORMAT_192_TAIL,
576 DMX_TSP_FORMAT_192_HEAD,
577 DMX_TSP_FORMAT_204,
578};
579
580enum dmx_playback_mode_t {
581 /*
582 * In push mode, if one of output buffers
583 * is full, the buffer would overflow
584 * and demux continue processing incoming stream.
585 * This is the default mode. When playing from frontend,
586 * this is the only mode that is allowed.
587 */
588 DMX_PB_MODE_PUSH = 0,
589
590 /*
591 * In pull mode, if one of output buffers
592 * is full, demux stalls waiting for free space,
593 * this would cause DVR input buffer fullness
594 * to accumulate.
595 * This mode is possible only when playing
596 * from DVR.
597 */
598 DMX_PB_MODE_PULL,
599};
600
Linus Torvalds1da177e2005-04-16 15:20:36 -0700601struct dmx_stc {
Gilad Broner526e57e2012-12-03 15:57:44 +0200602 unsigned int num; /* input : which STC? 0..N */
603 unsigned int base; /* output: divisor for stc to get 90 kHz clock */
604 __u64 stc; /* output: stc in 'base'*90 kHz units */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700605};
606
Hamad Kadmanyec6202d2012-09-20 07:58:57 +0300607enum dmx_buffer_mode {
608 /*
609 * demux buffers are allocated internally
610 * by the demux driver. This is the default mode.
611 * DMX_SET_BUFFER_SIZE can be used to set the size of
612 * this buffer.
613 */
614 DMX_BUFFER_MODE_INTERNAL,
615
616 /*
617 * demux buffers are allocated externally and provided
618 * to demux through DMX_SET_BUFFER.
619 * When this mode is used DMX_SET_BUFFER_SIZE and
620 * mmap are prohibited.
621 */
622 DMX_BUFFER_MODE_EXTERNAL,
623};
624
625struct dmx_buffer {
626 unsigned int size;
627 int handle;
628};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700629
Gilad Broner526e57e2012-12-03 15:57:44 +0200630struct dmx_decoder_buffers {
631 /*
632 * Specify if linear buffer support is requested. If set, buffers_num
633 * must be greater than 1
634 */
635 int is_linear;
636
637 /*
638 * Specify number of external buffers allocated by user.
639 * If set to 0 means internal buffer allocation is requested
640 */
641 __u32 buffers_num;
642
643 /* Specify buffer size, either external or internal */
644 __u32 buffers_size;
645
646 /* Array of externally allocated buffer handles */
647 int handles[DMX_MAX_DECODER_BUFFER_NUM];
648};
649
Hamad Kadmany168203b2013-01-28 15:22:46 +0200650struct dmx_secure_mode {
651 /*
652 * Specifies whether secure mode should be set or not for the filter's
653 * pid. Note that DMX_OUT_TSDEMUX_TAP filters can have more than 1 pid
654 */
655 int is_secured;
656
657 /* PID to associate with key ladder id */
658 __u16 pid;
659
660 /* key ladder information to associate with the specified pid */
661 __u32 key_ladder_id;
662};
663
Hamad Kadmanya0a00f52013-03-19 10:11:45 +0200664struct dmx_events_mask {
665 /*
666 * Bitmask of events to be disabled (dmx_event).
667 * Disabled events will not be notified to the user.
668 * By default all events are enabled except for
669 * DMX_EVENT_NEW_ES_DATA.
670 * Overflow event can't be disabled.
671 */
672 __u32 disable_mask;
673
674 /*
675 * Bitmask of events that will not wake-up the user
676 * when user calls poll with POLLPRI flag.
677 * Events that are used as wake-up source should not be
678 * disabled in disable_mask or they would not be used
679 * as a wake-up source.
680 * By default all enabled events are set as wake-up events.
681 * Overflow event can't be disabled as a wake-up source.
682 */
683 __u32 no_wakeup_mask;
684
685 /*
686 * Number of ready wake-up events which will trigger
687 * a wake-up when user calls poll with POLLPRI flag.
688 * Default is set to 1.
689 */
690 __u32 wakeup_threshold;
691};
692
Hamad Kadmanye1dba202013-04-10 18:37:25 +0300693struct dmx_indexing_params {
694 /*
695 * PID to index. In case of recording filter, multiple PIDs
696 * may exist in the same filter through DMX_ADD_PID ioctl.
697 * It is assumed that the PID was already added using DMX_ADD_PID
698 * or an error will be reported.
699 */
700 __u16 pid;
701
702 /* enable or disable indexing, default is disabled */
703 int enable;
704
705 /* combination of DMX_IDX_* bits */
706 __u64 types;
707};
708
Linus Torvalds1da177e2005-04-16 15:20:36 -0700709#define DMX_START _IO('o', 41)
710#define DMX_STOP _IO('o', 42)
711#define DMX_SET_FILTER _IOW('o', 43, struct dmx_sct_filter_params)
712#define DMX_SET_PES_FILTER _IOW('o', 44, struct dmx_pes_filter_params)
713#define DMX_SET_BUFFER_SIZE _IO('o', 45)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700714#define DMX_GET_PES_PIDS _IOR('o', 47, __u16[5])
715#define DMX_GET_CAPS _IOR('o', 48, dmx_caps_t)
716#define DMX_SET_SOURCE _IOW('o', 49, dmx_source_t)
717#define DMX_GET_STC _IOWR('o', 50, struct dmx_stc)
Andreas Oberritter1cb662a2009-07-14 20:28:50 -0300718#define DMX_ADD_PID _IOW('o', 51, __u16)
719#define DMX_REMOVE_PID _IOW('o', 52, __u16)
Hamad Kadmany32cb9822012-05-10 08:47:44 +0300720#define DMX_SET_TS_PACKET_FORMAT _IOW('o', 53, enum dmx_tsp_format_t)
721#define DMX_SET_TS_OUT_FORMAT _IOW('o', 54, enum dmx_tsp_format_t)
722#define DMX_SET_DECODER_BUFFER_SIZE _IO('o', 55)
723#define DMX_GET_BUFFER_STATUS _IOR('o', 56, struct dmx_buffer_status)
724#define DMX_RELEASE_DATA _IO('o', 57)
725#define DMX_FEED_DATA _IO('o', 58)
726#define DMX_SET_PLAYBACK_MODE _IOW('o', 59, enum dmx_playback_mode_t)
Liron Kuch41543b72012-11-26 13:27:22 +0200727#define DMX_GET_EVENT _IOR('o', 60, struct dmx_filter_event)
728#define DMX_SET_BUFFER_MODE _IOW('o', 61, enum dmx_buffer_mode)
729#define DMX_SET_BUFFER _IOW('o', 62, struct dmx_buffer)
Gilad Broner526e57e2012-12-03 15:57:44 +0200730#define DMX_SET_DECODER_BUFFER _IOW('o', 63, struct dmx_decoder_buffers)
Liron Kuch41543b72012-11-26 13:27:22 +0200731#define DMX_REUSE_DECODER_BUFFER _IO('o', 64)
Hamad Kadmany168203b2013-01-28 15:22:46 +0200732#define DMX_SET_SECURE_MODE _IOW('o', 65, struct dmx_secure_mode)
Hamad Kadmanya0a00f52013-03-19 10:11:45 +0200733#define DMX_SET_EVENTS_MASK _IOW('o', 66, struct dmx_events_mask)
734#define DMX_GET_EVENTS_MASK _IOR('o', 67, struct dmx_events_mask)
Gilad Bronera81f42e2013-04-07 16:38:47 +0300735#define DMX_PUSH_OOB_COMMAND _IOW('o', 68, struct dmx_oob_command)
Hamad Kadmanye1dba202013-04-10 18:37:25 +0300736#define DMX_SET_INDEXING_PARAMS _IOW('o', 69, struct dmx_indexing_params)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700737
738#endif /*_DVBDMX_H_*/