| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame^] | 1 | if (BF537 || BF534 || BF536) |
| 2 | |
| 3 | menu "BF537 Specific Configuration" |
| 4 | |
| 5 | comment "PORT F/G Selection" |
| 6 | choice |
| 7 | prompt "Select BF537/6/4 default GPIO PFx PORTx" |
| 8 | help |
| 9 | Quick Hack for BF537/6/4 default GPIO PFx PORTF. |
| 10 | |
| 11 | config BF537_PORT_F |
| 12 | bool "Select BF537/6/4 default GPIO PFx PORTF" |
| 13 | depends on (BF537 || BF536 || BF534) |
| 14 | help |
| 15 | Quick Hack for BF537/6/4 default GPIO PFx PORTF. |
| 16 | |
| 17 | config BF537_PORT_G |
| 18 | bool "Select BF537/6/4 default GPIO PFx PORTG" |
| 19 | depends on (BF537 || BF536 || BF534) |
| 20 | help |
| 21 | Quick Hack for BF537/6/4 default GPIO PFx PORTG. |
| 22 | |
| 23 | config BF537_PORT_H |
| 24 | bool "Select BF537/6/4 default GPIO PFx PORTH" |
| 25 | depends on (BF537 || BF536 || BF534) |
| 26 | help |
| 27 | Quick Hack for BF537/6/4 default GPIO PFx PORTH |
| 28 | Use only when Blackfin EMAC support is not required. |
| 29 | |
| 30 | endchoice |
| 31 | |
| 32 | comment "Interrupt Priority Assignment" |
| 33 | menu "Priority" |
| 34 | |
| 35 | config IRQ_PLL_WAKEUP |
| 36 | int "IRQ_PLL_WAKEUP" |
| 37 | default 7 |
| 38 | config IRQ_DMA_ERROR |
| 39 | int "IRQ_DMA_ERROR Generic" |
| 40 | default 7 |
| 41 | config IRQ_ERROR |
| 42 | int "IRQ_ERROR: CAN MAC SPORT0 SPORT1 SPI UART0 UART1" |
| 43 | default 7 |
| 44 | config IRQ_RTC |
| 45 | int "IRQ_RTC" |
| 46 | default 8 |
| 47 | config IRQ_PPI |
| 48 | int "IRQ_PPI" |
| 49 | default 8 |
| 50 | config IRQ_SPORT0_RX |
| 51 | int "IRQ_SPORT0_RX" |
| 52 | default 9 |
| 53 | config IRQ_SPORT0_TX |
| 54 | int "IRQ_SPORT0_TX" |
| 55 | default 9 |
| 56 | config IRQ_SPORT1_RX |
| 57 | int "IRQ_SPORT1_RX" |
| 58 | default 9 |
| 59 | config IRQ_SPORT1_TX |
| 60 | int "IRQ_SPORT1_TX" |
| 61 | default 9 |
| 62 | config IRQ_TWI |
| 63 | int "IRQ_TWI" |
| 64 | default 10 |
| 65 | config IRQ_SPI |
| 66 | int "IRQ_SPI" |
| 67 | default 10 |
| 68 | config IRQ_UART0_RX |
| 69 | int "IRQ_UART0_RX" |
| 70 | default 10 |
| 71 | config IRQ_UART0_TX |
| 72 | int "IRQ_UART0_TX" |
| 73 | default 10 |
| 74 | config IRQ_UART1_RX |
| 75 | int "IRQ_UART1_RX" |
| 76 | default 10 |
| 77 | config IRQ_UART1_TX |
| 78 | int "IRQ_UART1_TX" |
| 79 | default 10 |
| 80 | config IRQ_CAN_RX |
| 81 | int "IRQ_CAN_RX" |
| 82 | default 11 |
| 83 | config IRQ_CAN_TX |
| 84 | int "IRQ_CAN_TX" |
| 85 | default 11 |
| 86 | config IRQ_MAC_RX |
| 87 | int "IRQ_MAC_RX" |
| 88 | default 11 |
| 89 | config IRQ_MAC_TX |
| 90 | int "IRQ_MAC_TX" |
| 91 | default 11 |
| 92 | config IRQ_TMR0 |
| 93 | int "IRQ_TMR0" |
| 94 | default 12 |
| 95 | config IRQ_TMR1 |
| 96 | int "IRQ_TMR1" |
| 97 | default 12 |
| 98 | config IRQ_TMR2 |
| 99 | int "IRQ_TMR2" |
| 100 | default 12 |
| 101 | config IRQ_TMR3 |
| 102 | int "IRQ_TMR3" |
| 103 | default 12 |
| 104 | config IRQ_TMR4 |
| 105 | int "IRQ_TMR4" |
| 106 | default 12 |
| 107 | config IRQ_TMR5 |
| 108 | int "IRQ_TMR5" |
| 109 | default 12 |
| 110 | config IRQ_TMR6 |
| 111 | int "IRQ_TMR6" |
| 112 | default 12 |
| 113 | config IRQ_TMR7 |
| 114 | int "IRQ_TMR7" |
| 115 | default 12 |
| 116 | config IRQ_PROG_INTA |
| 117 | int "IRQ_PROG_INTA" |
| 118 | default 12 |
| 119 | config IRQ_PORTG_INTB |
| 120 | int "IRQ_PORTG_INTB" |
| 121 | default 12 |
| 122 | config IRQ_MEM_DMA0 |
| 123 | int "IRQ_MEM_DMA0" |
| 124 | default 13 |
| 125 | config IRQ_MEM_DMA1 |
| 126 | int "IRQ_MEM_DMA1" |
| 127 | default 13 |
| 128 | config IRQ_WATCH |
| 129 | int "IRQ_WATCH" |
| 130 | default 13 |
| 131 | |
| 132 | help |
| 133 | Enter the priority numbers between 7-13 ONLY. Others are Reserved. |
| 134 | This applies to all the above. It is not recommended to assign the |
| 135 | highest priority number 7 to UART or any other device. |
| 136 | |
| 137 | endmenu |
| 138 | |
| 139 | endmenu |
| 140 | |
| 141 | endif |