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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef __HEAD_BOOKE_H__
2#define __HEAD_BOOKE_H__
3
4/*
5 * Macros used for common Book-e exception handling
6 */
7
8#define SET_IVOR(vector_number, vector_label) \
9 li r26,vector_label@l; \
10 mtspr SPRN_IVOR##vector_number,r26; \
11 sync
12
13#define NORMAL_EXCEPTION_PROLOG \
14 mtspr SPRN_SPRG0,r10; /* save two registers to work with */\
15 mtspr SPRN_SPRG1,r11; \
16 mtspr SPRN_SPRG4W,r1; \
17 mfcr r10; /* save CR in r10 for now */\
18 mfspr r11,SPRN_SRR1; /* check whether user or kernel */\
19 andi. r11,r11,MSR_PR; \
20 beq 1f; \
21 mfspr r1,SPRN_SPRG3; /* if from user, start at top of */\
22 lwz r1,THREAD_INFO-THREAD(r1); /* this thread's kernel stack */\
23 addi r1,r1,THREAD_SIZE; \
241: subi r1,r1,INT_FRAME_SIZE; /* Allocate an exception frame */\
25 mr r11,r1; \
26 stw r10,_CCR(r11); /* save various registers */\
27 stw r12,GPR12(r11); \
28 stw r9,GPR9(r11); \
29 mfspr r10,SPRN_SPRG0; \
30 stw r10,GPR10(r11); \
31 mfspr r12,SPRN_SPRG1; \
32 stw r12,GPR11(r11); \
33 mflr r10; \
34 stw r10,_LINK(r11); \
35 mfspr r10,SPRN_SPRG4R; \
36 mfspr r12,SPRN_SRR0; \
37 stw r10,GPR1(r11); \
38 mfspr r9,SPRN_SRR1; \
39 stw r10,0(r11); \
40 rlwinm r9,r9,0,14,12; /* clear MSR_WE (necessary?) */\
41 stw r0,GPR0(r11); \
42 SAVE_4GPRS(3, r11); \
43 SAVE_2GPRS(7, r11)
44
45/* To handle the additional exception priority levels on 40x and Book-E
46 * processors we allocate a 4k stack per additional priority level. The various
47 * head_xxx.S files allocate space (exception_stack_top) for each priority's
48 * stack times the number of CPUs
49 *
50 * On 40x critical is the only additional level
51 * On 44x/e500 we have critical and machine check
52 *
53 * Additionally we reserve a SPRG for each priority level so we can free up a
54 * GPR to use as the base for indirect access to the exception stacks. This
55 * is necessary since the MMU is always on, for Book-E parts, and the stacks
56 * are offset from KERNELBASE.
57 *
58 */
59#define BOOKE_EXCEPTION_STACK_SIZE (8192)
60
61/* CRIT_SPRG only used in critical exception handling */
62#define CRIT_SPRG SPRN_SPRG2
63/* MCHECK_SPRG only used in critical exception handling */
64#define MCHECK_SPRG SPRN_SPRG6W
65
66#define MCHECK_STACK_TOP (exception_stack_top - 4096)
67#define CRIT_STACK_TOP (exception_stack_top)
68
69#ifdef CONFIG_SMP
Kumar Gala1492ec82005-06-21 17:15:27 -070070#define BOOKE_LOAD_EXC_LEVEL_STACK(level) \
Linus Torvalds1da177e2005-04-16 15:20:36 -070071 mfspr r8,SPRN_PIR; \
72 mulli r8,r8,BOOKE_EXCEPTION_STACK_SIZE; \
73 neg r8,r8; \
Kumar Gala1492ec82005-06-21 17:15:27 -070074 addis r8,r8,level##_STACK_TOP@ha; \
75 addi r8,r8,level##_STACK_TOP@l
Linus Torvalds1da177e2005-04-16 15:20:36 -070076#else
Kumar Gala1492ec82005-06-21 17:15:27 -070077#define BOOKE_LOAD_EXC_LEVEL_STACK(level) \
78 lis r8,level##_STACK_TOP@h; \
79 ori r8,r8,level##_STACK_TOP@l
Linus Torvalds1da177e2005-04-16 15:20:36 -070080#endif
81
82/*
Kumar Gala1492ec82005-06-21 17:15:27 -070083 * Exception prolog for critical/machine check exceptions. This is a
84 * little different from the normal exception prolog above since a
85 * critical/machine check exception can potentially occur at any point
86 * during normal exception processing. Thus we cannot use the same SPRG
87 * registers as the normal prolog above. Instead we use a portion of the
88 * critical/machine check exception stack at low physical addresses.
Linus Torvalds1da177e2005-04-16 15:20:36 -070089 */
Kumar Gala1492ec82005-06-21 17:15:27 -070090#define EXC_LEVEL_EXCEPTION_PROLOG(exc_level, exc_level_srr0, exc_level_srr1) \
91 mtspr exc_level##_SPRG,r8; \
92 BOOKE_LOAD_EXC_LEVEL_STACK(exc_level);/* r8 points to the exc_level stack*/ \
Linus Torvalds1da177e2005-04-16 15:20:36 -070093 stw r10,GPR10-INT_FRAME_SIZE(r8); \
94 stw r11,GPR11-INT_FRAME_SIZE(r8); \
95 mfcr r10; /* save CR in r10 for now */\
Kumar Gala1492ec82005-06-21 17:15:27 -070096 mfspr r11,exc_level_srr1; /* check whether user or kernel */\
Linus Torvalds1da177e2005-04-16 15:20:36 -070097 andi. r11,r11,MSR_PR; \
98 mr r11,r8; \
Kumar Gala1492ec82005-06-21 17:15:27 -070099 mfspr r8,exc_level##_SPRG; \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700100 beq 1f; \
101 /* COMING FROM USER MODE */ \
102 mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\
103 lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\
104 addi r11,r11,THREAD_SIZE; \
1051: subi r11,r11,INT_FRAME_SIZE; /* Allocate an exception frame */\
106 stw r10,_CCR(r11); /* save various registers */\
107 stw r12,GPR12(r11); \
108 stw r9,GPR9(r11); \
109 mflr r10; \
110 stw r10,_LINK(r11); \
111 mfspr r12,SPRN_DEAR; /* save DEAR and ESR in the frame */\
112 stw r12,_DEAR(r11); /* since they may have had stuff */\
113 mfspr r9,SPRN_ESR; /* in them at the point where the */\
114 stw r9,_ESR(r11); /* exception was taken */\
Kumar Gala1492ec82005-06-21 17:15:27 -0700115 mfspr r12,exc_level_srr0; \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700116 stw r1,GPR1(r11); \
Kumar Gala1492ec82005-06-21 17:15:27 -0700117 mfspr r9,exc_level_srr1; \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700118 stw r1,0(r11); \
119 mr r1,r11; \
120 rlwinm r9,r9,0,14,12; /* clear MSR_WE (necessary?) */\
121 stw r0,GPR0(r11); \
122 SAVE_4GPRS(3, r11); \
123 SAVE_2GPRS(7, r11)
124
Kumar Gala1492ec82005-06-21 17:15:27 -0700125#define CRITICAL_EXCEPTION_PROLOG \
126 EXC_LEVEL_EXCEPTION_PROLOG(CRIT, SPRN_CSRR0, SPRN_CSRR1)
127#define MCHECK_EXCEPTION_PROLOG \
128 EXC_LEVEL_EXCEPTION_PROLOG(MCHECK, SPRN_MCSRR0, SPRN_MCSRR1)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129
130/*
131 * Exception vectors.
132 */
133#define START_EXCEPTION(label) \
134 .align 5; \
135label:
136
137#define FINISH_EXCEPTION(func) \
138 bl transfer_to_handler_full; \
139 .long func; \
140 .long ret_from_except_full
141
142#define EXCEPTION(n, label, hdlr, xfer) \
143 START_EXCEPTION(label); \
144 NORMAL_EXCEPTION_PROLOG; \
145 addi r3,r1,STACK_FRAME_OVERHEAD; \
146 xfer(n, hdlr)
147
148#define CRITICAL_EXCEPTION(n, label, hdlr) \
149 START_EXCEPTION(label); \
150 CRITICAL_EXCEPTION_PROLOG; \
151 addi r3,r1,STACK_FRAME_OVERHEAD; \
152 EXC_XFER_TEMPLATE(hdlr, n+2, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \
153 NOCOPY, crit_transfer_to_handler, \
154 ret_from_crit_exc)
155
156#define MCHECK_EXCEPTION(n, label, hdlr) \
157 START_EXCEPTION(label); \
158 MCHECK_EXCEPTION_PROLOG; \
159 mfspr r5,SPRN_ESR; \
160 stw r5,_ESR(r11); \
161 addi r3,r1,STACK_FRAME_OVERHEAD; \
162 EXC_XFER_TEMPLATE(hdlr, n+2, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \
163 NOCOPY, mcheck_transfer_to_handler, \
164 ret_from_mcheck_exc)
165
166#define EXC_XFER_TEMPLATE(hdlr, trap, msr, copyee, tfer, ret) \
167 li r10,trap; \
168 stw r10,TRAP(r11); \
169 lis r10,msr@h; \
170 ori r10,r10,msr@l; \
171 copyee(r10, r9); \
172 bl tfer; \
173 .long hdlr; \
174 .long ret
175
176#define COPY_EE(d, s) rlwimi d,s,0,16,16
177#define NOCOPY(d, s)
178
179#define EXC_XFER_STD(n, hdlr) \
180 EXC_XFER_TEMPLATE(hdlr, n, MSR_KERNEL, NOCOPY, transfer_to_handler_full, \
181 ret_from_except_full)
182
183#define EXC_XFER_LITE(n, hdlr) \
184 EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, NOCOPY, transfer_to_handler, \
185 ret_from_except)
186
187#define EXC_XFER_EE(n, hdlr) \
188 EXC_XFER_TEMPLATE(hdlr, n, MSR_KERNEL, COPY_EE, transfer_to_handler_full, \
189 ret_from_except_full)
190
191#define EXC_XFER_EE_LITE(n, hdlr) \
192 EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, COPY_EE, transfer_to_handler, \
193 ret_from_except)
194
Linus Torvalds1da177e2005-04-16 15:20:36 -0700195/* Check for a single step debug exception while in an exception
196 * handler before state has been saved. This is to catch the case
197 * where an instruction that we are trying to single step causes
198 * an exception (eg ITLB/DTLB miss) and thus the first instruction of
199 * the exception handler generates a single step debug exception.
200 *
201 * If we get a debug trap on the first instruction of an exception handler,
202 * we reset the MSR_DE in the _exception handler's_ MSR (the debug trap is
203 * a critical exception, so we are using SPRN_CSRR1 to manipulate the MSR).
204 * The exception handler was handling a non-critical interrupt, so it will
205 * save (and later restore) the MSR via SPRN_CSRR1, which will still have
206 * the MSR_DE bit set.
207 */
208#define DEBUG_EXCEPTION \
209 START_EXCEPTION(Debug); \
210 CRITICAL_EXCEPTION_PROLOG; \
211 \
212 /* \
213 * If there is a single step or branch-taken exception in an \
214 * exception entry sequence, it was probably meant to apply to \
215 * the code where the exception occurred (since exception entry \
216 * doesn't turn off DE automatically). We simulate the effect \
217 * of turning off DE on entry to an exception handler by turning \
218 * off DE in the CSRR1 value and clearing the debug status. \
219 */ \
220 mfspr r10,SPRN_DBSR; /* check single-step/branch taken */ \
221 andis. r10,r10,DBSR_IC@h; \
222 beq+ 2f; \
223 \
224 lis r10,KERNELBASE@h; /* check if exception in vectors */ \
225 ori r10,r10,KERNELBASE@l; \
226 cmplw r12,r10; \
227 blt+ 2f; /* addr below exception vectors */ \
228 \
229 lis r10,Debug@h; \
230 ori r10,r10,Debug@l; \
231 cmplw r12,r10; \
232 bgt+ 2f; /* addr above exception vectors */ \
233 \
234 /* here it looks like we got an inappropriate debug exception. */ \
2351: rlwinm r9,r9,0,~MSR_DE; /* clear DE in the CSRR1 value */ \
236 lis r10,DBSR_IC@h; /* clear the IC event */ \
237 mtspr SPRN_DBSR,r10; \
238 /* restore state and get out */ \
239 lwz r10,_CCR(r11); \
240 lwz r0,GPR0(r11); \
241 lwz r1,GPR1(r11); \
242 mtcrf 0x80,r10; \
243 mtspr SPRN_CSRR0,r12; \
244 mtspr SPRN_CSRR1,r9; \
245 lwz r9,GPR9(r11); \
246 lwz r12,GPR12(r11); \
247 mtspr CRIT_SPRG,r8; \
Kumar Gala1492ec82005-06-21 17:15:27 -0700248 BOOKE_LOAD_EXC_LEVEL_STACK(CRIT); /* r8 points to the debug stack */ \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700249 lwz r10,GPR10-INT_FRAME_SIZE(r8); \
250 lwz r11,GPR11-INT_FRAME_SIZE(r8); \
251 mfspr r8,CRIT_SPRG; \
252 \
253 rfci; \
254 b .; \
255 \
256 /* continue normal handling for a critical exception... */ \
2572: mfspr r4,SPRN_DBSR; \
258 addi r3,r1,STACK_FRAME_OVERHEAD; \
259 EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, crit_transfer_to_handler, ret_from_crit_exc)
260
261#define INSTRUCTION_STORAGE_EXCEPTION \
262 START_EXCEPTION(InstructionStorage) \
263 NORMAL_EXCEPTION_PROLOG; \
264 mfspr r5,SPRN_ESR; /* Grab the ESR and save it */ \
265 stw r5,_ESR(r11); \
266 mr r4,r12; /* Pass SRR0 as arg2 */ \
267 li r5,0; /* Pass zero as arg3 */ \
268 EXC_XFER_EE_LITE(0x0400, handle_page_fault)
269
270#define ALIGNMENT_EXCEPTION \
271 START_EXCEPTION(Alignment) \
272 NORMAL_EXCEPTION_PROLOG; \
273 mfspr r4,SPRN_DEAR; /* Grab the DEAR and save it */ \
274 stw r4,_DEAR(r11); \
275 addi r3,r1,STACK_FRAME_OVERHEAD; \
276 EXC_XFER_EE(0x0600, AlignmentException)
277
278#define PROGRAM_EXCEPTION \
279 START_EXCEPTION(Program) \
280 NORMAL_EXCEPTION_PROLOG; \
281 mfspr r4,SPRN_ESR; /* Grab the ESR and save it */ \
282 stw r4,_ESR(r11); \
283 addi r3,r1,STACK_FRAME_OVERHEAD; \
284 EXC_XFER_STD(0x0700, ProgramCheckException)
285
286#define DECREMENTER_EXCEPTION \
287 START_EXCEPTION(Decrementer) \
288 NORMAL_EXCEPTION_PROLOG; \
289 lis r0,TSR_DIS@h; /* Setup the DEC interrupt mask */ \
290 mtspr SPRN_TSR,r0; /* Clear the DEC interrupt */ \
291 addi r3,r1,STACK_FRAME_OVERHEAD; \
292 EXC_XFER_LITE(0x0900, timer_interrupt)
293
Paul Mackerras443a8482005-05-01 08:58:40 -0700294#define FP_UNAVAILABLE_EXCEPTION \
295 START_EXCEPTION(FloatingPointUnavailable) \
296 NORMAL_EXCEPTION_PROLOG; \
297 bne load_up_fpu; /* if from user, just load it up */ \
298 addi r3,r1,STACK_FRAME_OVERHEAD; \
299 EXC_XFER_EE_LITE(0x800, KernelFP)
300
Linus Torvalds1da177e2005-04-16 15:20:36 -0700301#endif /* __HEAD_BOOKE_H__ */