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Tony Lindgren90c62bf2008-12-10 17:37:17 -08001/*
Adrian Hunterd02a9002010-02-15 10:03:34 -08002 * linux/arch/arm/mach-omap2/hsmmc.c
Tony Lindgren90c62bf2008-12-10 17:37:17 -08003 *
4 * Copyright (C) 2007-2008 Texas Instruments
5 * Copyright (C) 2008 Nokia Corporation
6 * Author: Texas Instruments
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
Adrian Hunterdb0fefc2010-02-15 10:03:34 -080012#include <linux/kernel.h>
13#include <linux/slab.h>
14#include <linux/string.h>
Tony Lindgren90c62bf2008-12-10 17:37:17 -080015#include <linux/delay.h>
Tony Lindgren90c62bf2008-12-10 17:37:17 -080016#include <mach/hardware.h>
Tony Lindgrence491cf2009-10-20 09:40:47 -070017#include <plat/control.h>
18#include <plat/mmc.h>
Adrian Huntere3df0fb2010-02-15 10:03:34 -080019#include <plat/omap-pm.h>
Tony Lindgren90c62bf2008-12-10 17:37:17 -080020
Adrian Hunterd02a9002010-02-15 10:03:34 -080021#include "hsmmc.h"
Tony Lindgren90c62bf2008-12-10 17:37:17 -080022
Adrian Hunterdb0fefc2010-02-15 10:03:34 -080023#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
Tony Lindgren90c62bf2008-12-10 17:37:17 -080024
Tony Lindgren90c62bf2008-12-10 17:37:17 -080025static u16 control_pbias_offset;
26static u16 control_devconf1_offset;
kishore kadiyalac83c8e62010-05-15 18:21:25 +000027static u16 control_mmc1;
Tony Lindgren90c62bf2008-12-10 17:37:17 -080028
29#define HSMMC_NAME_LEN 9
30
Adrian Hunter68ff0422010-02-15 10:03:34 -080031static struct hsmmc_controller {
David Brownellb583f262009-05-28 14:04:03 -070032 char name[HSMMC_NAME_LEN + 1];
33} hsmmc[OMAP34XX_NR_MMC];
Tony Lindgren90c62bf2008-12-10 17:37:17 -080034
Denis Karpov1887bde2009-09-22 16:44:40 -070035#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
36
Adrian Hunter68ff0422010-02-15 10:03:34 -080037static int hsmmc_get_context_loss(struct device *dev)
Denis Karpov1887bde2009-09-22 16:44:40 -070038{
Adrian Huntere3df0fb2010-02-15 10:03:34 -080039 return omap_pm_get_dev_context_loss_count(dev);
Denis Karpov1887bde2009-09-22 16:44:40 -070040}
41
42#else
Adrian Hunter68ff0422010-02-15 10:03:34 -080043#define hsmmc_get_context_loss NULL
Denis Karpov1887bde2009-09-22 16:44:40 -070044#endif
45
kishore kadiyalac83c8e62010-05-15 18:21:25 +000046static void omap_hsmmc1_before_set_reg(struct device *dev, int slot,
Adrian Hunterdb0fefc2010-02-15 10:03:34 -080047 int power_on, int vdd)
Tony Lindgren90c62bf2008-12-10 17:37:17 -080048{
Madhu555d5032009-11-22 10:11:08 -080049 u32 reg, prog_io;
Tony Lindgren90c62bf2008-12-10 17:37:17 -080050 struct omap_mmc_platform_data *mmc = dev->platform_data;
51
Adrian Hunterce6f0012010-02-15 10:03:34 -080052 if (mmc->slots[0].remux)
53 mmc->slots[0].remux(dev, slot, power_on);
54
David Brownell0329c372009-03-23 18:23:47 -070055 /*
56 * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
David Brownellb583f262009-05-28 14:04:03 -070057 * card with Vcc regulator (from twl4030 or whatever). OMAP has both
David Brownell0329c372009-03-23 18:23:47 -070058 * 1.8V and 3.0V modes, controlled by the PBIAS register.
59 *
60 * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which
61 * is most naturally TWL VSIM; those pins also use PBIAS.
David Brownellb583f262009-05-28 14:04:03 -070062 *
63 * FIXME handle VMMC1A as needed ...
David Brownell0329c372009-03-23 18:23:47 -070064 */
Tony Lindgren90c62bf2008-12-10 17:37:17 -080065 if (power_on) {
66 if (cpu_is_omap2430()) {
67 reg = omap_ctrl_readl(OMAP243X_CONTROL_DEVCONF1);
68 if ((1 << vdd) >= MMC_VDD_30_31)
69 reg |= OMAP243X_MMC1_ACTIVE_OVERWRITE;
70 else
71 reg &= ~OMAP243X_MMC1_ACTIVE_OVERWRITE;
72 omap_ctrl_writel(reg, OMAP243X_CONTROL_DEVCONF1);
73 }
74
75 if (mmc->slots[0].internal_clock) {
76 reg = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
77 reg |= OMAP2_MMCSDIO1ADPCLKISEL;
78 omap_ctrl_writel(reg, OMAP2_CONTROL_DEVCONF0);
79 }
80
81 reg = omap_ctrl_readl(control_pbias_offset);
Madhu555d5032009-11-22 10:11:08 -080082 if (cpu_is_omap3630()) {
83 /* Set MMC I/O to 52Mhz */
84 prog_io = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1);
85 prog_io |= OMAP3630_PRG_SDMMC1_SPEEDCTRL;
86 omap_ctrl_writel(prog_io, OMAP343X_CONTROL_PROG_IO1);
87 } else {
88 reg |= OMAP2_PBIASSPEEDCTRL0;
89 }
Tony Lindgren90c62bf2008-12-10 17:37:17 -080090 reg &= ~OMAP2_PBIASLITEPWRDNZ0;
91 omap_ctrl_writel(reg, control_pbias_offset);
Adrian Hunterdb0fefc2010-02-15 10:03:34 -080092 } else {
93 reg = omap_ctrl_readl(control_pbias_offset);
94 reg &= ~OMAP2_PBIASLITEPWRDNZ0;
95 omap_ctrl_writel(reg, control_pbias_offset);
96 }
97}
Tony Lindgren90c62bf2008-12-10 17:37:17 -080098
kishore kadiyalac83c8e62010-05-15 18:21:25 +000099static void omap_hsmmc1_after_set_reg(struct device *dev, int slot,
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800100 int power_on, int vdd)
101{
102 u32 reg;
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800103
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800104 /* 100ms delay required for PBIAS configuration */
105 msleep(100);
106
107 if (power_on) {
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800108 reg = omap_ctrl_readl(control_pbias_offset);
109 reg |= (OMAP2_PBIASLITEPWRDNZ0 | OMAP2_PBIASSPEEDCTRL0);
110 if ((1 << vdd) <= MMC_VDD_165_195)
111 reg &= ~OMAP2_PBIASLITEVMODE0;
112 else
113 reg |= OMAP2_PBIASLITEVMODE0;
114 omap_ctrl_writel(reg, control_pbias_offset);
115 } else {
116 reg = omap_ctrl_readl(control_pbias_offset);
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800117 reg |= (OMAP2_PBIASSPEEDCTRL0 | OMAP2_PBIASLITEPWRDNZ0 |
118 OMAP2_PBIASLITEVMODE0);
119 omap_ctrl_writel(reg, control_pbias_offset);
120 }
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800121}
122
kishore kadiyalac83c8e62010-05-15 18:21:25 +0000123static void omap4_hsmmc1_before_set_reg(struct device *dev, int slot,
124 int power_on, int vdd)
125{
126 u32 reg;
127
128 /*
129 * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
130 * card with Vcc regulator (from twl4030 or whatever). OMAP has both
131 * 1.8V and 3.0V modes, controlled by the PBIAS register.
132 *
133 * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which
134 * is most naturally TWL VSIM; those pins also use PBIAS.
135 *
136 * FIXME handle VMMC1A as needed ...
137 */
138 reg = omap_ctrl_readl(control_pbias_offset);
139 reg &= ~(OMAP4_MMC1_PBIASLITE_PWRDNZ | OMAP4_MMC1_PWRDNZ |
140 OMAP4_USBC1_ICUSB_PWRDNZ);
141 omap_ctrl_writel(reg, control_pbias_offset);
142}
143
144static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot,
145 int power_on, int vdd)
146{
147 u32 reg;
148
149 if (power_on) {
150 reg = omap_ctrl_readl(control_pbias_offset);
151 reg |= OMAP4_MMC1_PBIASLITE_PWRDNZ;
152 if ((1 << vdd) <= MMC_VDD_165_195)
153 reg &= ~OMAP4_MMC1_PBIASLITE_VMODE;
154 else
155 reg |= OMAP4_MMC1_PBIASLITE_VMODE;
156 reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ | OMAP4_MMC1_PWRDNZ |
157 OMAP4_USBC1_ICUSB_PWRDNZ);
158 omap_ctrl_writel(reg, control_pbias_offset);
159 /* 4 microsec delay for comparator to generate an error*/
160 udelay(4);
161 reg = omap_ctrl_readl(control_pbias_offset);
162 if (reg & OMAP4_MMC1_PBIASLITE_VMODE_ERROR) {
163 pr_err("Pbias Voltage is not same as LDO\n");
164 /* Caution : On VMODE_ERROR Power Down MMC IO */
165 reg &= ~(OMAP4_MMC1_PWRDNZ | OMAP4_USBC1_ICUSB_PWRDNZ);
166 omap_ctrl_writel(reg, control_pbias_offset);
167 }
168 } else {
169 reg = omap_ctrl_readl(control_pbias_offset);
170 reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ |
171 OMAP4_MMC1_PBIASLITE_VMODE | OMAP4_MMC1_PWRDNZ |
172 OMAP4_USBC1_ICUSB_PWRDNZ);
173 omap_ctrl_writel(reg, control_pbias_offset);
174 }
175}
176
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800177static void hsmmc23_before_set_reg(struct device *dev, int slot,
178 int power_on, int vdd)
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800179{
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800180 struct omap_mmc_platform_data *mmc = dev->platform_data;
Grazvydas Ignotas762ad3a42009-06-23 13:30:22 +0300181
Adrian Hunterce6f0012010-02-15 10:03:34 -0800182 if (mmc->slots[0].remux)
183 mmc->slots[0].remux(dev, slot, power_on);
184
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800185 if (power_on) {
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800186 /* Only MMC2 supports a CLKIN */
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800187 if (mmc->slots[0].internal_clock) {
188 u32 reg;
189
190 reg = omap_ctrl_readl(control_devconf1_offset);
191 reg |= OMAP2_MMCSDIO2ADPCLKISEL;
192 omap_ctrl_writel(reg, control_devconf1_offset);
193 }
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800194 }
Adrian Hunter9b7c18e2009-09-22 16:44:50 -0700195}
196
stanley.miao03e7e172010-05-13 12:39:31 +0000197static int nop_mmc_set_power(struct device *dev, int slot, int power_on,
198 int vdd)
199{
200 return 0;
201}
202
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800203static struct omap_mmc_platform_data *hsmmc_data[OMAP34XX_NR_MMC] __initdata;
204
Adrian Hunter68ff0422010-02-15 10:03:34 -0800205void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800206{
Adrian Hunter68ff0422010-02-15 10:03:34 -0800207 struct omap2_hsmmc_info *c;
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800208 int nr_hsmmc = ARRAY_SIZE(hsmmc_data);
Aaro Koskinena6c7fdd2010-02-04 13:06:59 +0200209 int i;
kishore kadiyalac83c8e62010-05-15 18:21:25 +0000210 u32 reg;
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800211
kishore kadiyalac83c8e62010-05-15 18:21:25 +0000212 if (!cpu_is_omap44xx()) {
213 if (cpu_is_omap2430()) {
214 control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
215 control_devconf1_offset = OMAP243X_CONTROL_DEVCONF1;
216 } else {
217 control_pbias_offset = OMAP343X_CONTROL_PBIAS_LITE;
218 control_devconf1_offset = OMAP343X_CONTROL_DEVCONF1;
219 }
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800220 } else {
kishore kadiyalac83c8e62010-05-15 18:21:25 +0000221 control_pbias_offset = OMAP44XX_CONTROL_PBIAS_LITE;
222 control_mmc1 = OMAP44XX_CONTROL_MMC1;
223 reg = omap_ctrl_readl(control_mmc1);
224 reg |= (OMAP4_CONTROL_SDMMC1_PUSTRENGTHGRP0 |
225 OMAP4_CONTROL_SDMMC1_PUSTRENGTHGRP1);
226 reg &= ~(OMAP4_CONTROL_SDMMC1_PUSTRENGTHGRP2 |
227 OMAP4_CONTROL_SDMMC1_PUSTRENGTHGRP3);
228 reg |= (OMAP4_CONTROL_SDMMC1_DR0_SPEEDCTRL |
229 OMAP4_CONTROL_SDMMC1_DR1_SPEEDCTRL |
230 OMAP4_CONTROL_SDMMC1_DR2_SPEEDCTRL);
231 omap_ctrl_writel(reg, control_mmc1);
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800232 }
233
234 for (c = controllers; c->mmc; c++) {
Adrian Hunter68ff0422010-02-15 10:03:34 -0800235 struct hsmmc_controller *hc = hsmmc + c->mmc - 1;
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800236 struct omap_mmc_platform_data *mmc = hsmmc_data[c->mmc - 1];
237
238 if (!c->mmc || c->mmc > nr_hsmmc) {
239 pr_debug("MMC%d: no such controller\n", c->mmc);
240 continue;
241 }
242 if (mmc) {
243 pr_debug("MMC%d: already configured\n", c->mmc);
244 continue;
245 }
246
Adrian Hunter68ff0422010-02-15 10:03:34 -0800247 mmc = kzalloc(sizeof(struct omap_mmc_platform_data),
248 GFP_KERNEL);
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800249 if (!mmc) {
250 pr_err("Cannot allocate memory for mmc device!\n");
Aaro Koskinena6c7fdd2010-02-04 13:06:59 +0200251 goto done;
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800252 }
253
Adrian Huntere51151a2009-03-23 18:23:48 -0700254 if (c->name)
Adrian Hunter68ff0422010-02-15 10:03:34 -0800255 strncpy(hc->name, c->name, HSMMC_NAME_LEN);
Adrian Huntere51151a2009-03-23 18:23:48 -0700256 else
Adrian Hunter68ff0422010-02-15 10:03:34 -0800257 snprintf(hc->name, ARRAY_SIZE(hc->name),
Adrian Huntere51151a2009-03-23 18:23:48 -0700258 "mmc%islot%i", c->mmc, 1);
Adrian Hunter68ff0422010-02-15 10:03:34 -0800259 mmc->slots[0].name = hc->name;
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800260 mmc->nr_slots = 1;
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800261 mmc->slots[0].wires = c->wires;
262 mmc->slots[0].internal_clock = !c->ext_clock;
263 mmc->dma_mask = 0xffffffff;
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800264
Adrian Hunter68ff0422010-02-15 10:03:34 -0800265 mmc->get_context_loss_count = hsmmc_get_context_loss;
Denis Karpov1887bde2009-09-22 16:44:40 -0700266
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800267 mmc->slots[0].switch_pin = c->gpio_cd;
268 mmc->slots[0].gpio_wp = c->gpio_wp;
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800269
Adrian Hunterce6f0012010-02-15 10:03:34 -0800270 mmc->slots[0].remux = c->remux;
Grazvydas Ignotased199f72010-08-10 18:01:52 -0700271 mmc->slots[0].init_card = c->init_card;
Adrian Hunterce6f0012010-02-15 10:03:34 -0800272
Adrian Hunterdb0fefc2010-02-15 10:03:34 -0800273 if (c->cover_only)
274 mmc->slots[0].cover = 1;
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800275
Adrian Hunter23d99bb2009-09-22 16:44:48 -0700276 if (c->nonremovable)
277 mmc->slots[0].nonremovable = 1;
278
Denis Karpovdd498ef2009-09-22 16:44:49 -0700279 if (c->power_saving)
280 mmc->slots[0].power_saving = 1;
281
Adrian Hunter1df58db2010-02-15 10:03:34 -0800282 if (c->no_off)
283 mmc->slots[0].no_off = 1;
284
Adrian Huntere0eb2422010-02-15 10:03:34 -0800285 if (c->vcc_aux_disable_is_sleep)
286 mmc->slots[0].vcc_aux_disable_is_sleep = 1;
287
David Brownellb583f262009-05-28 14:04:03 -0700288 /* NOTE: MMC slots should have a Vcc regulator set up.
289 * This may be from a TWL4030-family chip, another
290 * controllable regulator, or a fixed supply.
291 *
292 * temporary HACK: ocr_mask instead of fixed supply
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800293 */
David Brownellb583f262009-05-28 14:04:03 -0700294 mmc->slots[0].ocr_mask = c->ocr_mask;
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800295
stanley.miao03e7e172010-05-13 12:39:31 +0000296 if (cpu_is_omap3517() || cpu_is_omap3505())
297 mmc->slots[0].set_power = nop_mmc_set_power;
298 else
299 mmc->slots[0].features |= HSMMC_HAS_PBIAS;
300
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800301 switch (c->mmc) {
302 case 1:
stanley.miao03e7e172010-05-13 12:39:31 +0000303 if (mmc->slots[0].features & HSMMC_HAS_PBIAS) {
304 /* on-chip level shifting via PBIAS0/PBIAS1 */
kishore kadiyalac83c8e62010-05-15 18:21:25 +0000305 if (cpu_is_omap44xx()) {
306 mmc->slots[0].before_set_reg =
307 omap4_hsmmc1_before_set_reg;
308 mmc->slots[0].after_set_reg =
309 omap4_hsmmc1_after_set_reg;
310 } else {
311 mmc->slots[0].before_set_reg =
312 omap_hsmmc1_before_set_reg;
313 mmc->slots[0].after_set_reg =
314 omap_hsmmc1_after_set_reg;
315 }
stanley.miao03e7e172010-05-13 12:39:31 +0000316 }
Madhu41fd03d2009-11-22 10:11:07 -0800317
318 /* Omap3630 HSMMC1 supports only 4-bit */
319 if (cpu_is_omap3630() && c->wires > 4) {
320 c->wires = 4;
321 mmc->slots[0].wires = c->wires;
322 }
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800323 break;
324 case 2:
David Brownellb583f262009-05-28 14:04:03 -0700325 if (c->ext_clock)
326 c->transceiver = 1;
327 if (c->transceiver && c->wires > 4)
328 c->wires = 4;
329 /* FALLTHROUGH */
Grazvydas Ignotas07d83cc2009-03-23 18:23:47 -0700330 case 3:
stanley.miao03e7e172010-05-13 12:39:31 +0000331 if (mmc->slots[0].features & HSMMC_HAS_PBIAS) {
332 /* off-chip level shifting, or none */
333 mmc->slots[0].before_set_reg = hsmmc23_before_set_reg;
334 mmc->slots[0].after_set_reg = NULL;
335 }
Grazvydas Ignotas07d83cc2009-03-23 18:23:47 -0700336 break;
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800337 default:
338 pr_err("MMC%d configuration not supported!\n", c->mmc);
Grazvydas Ignotas07d83cc2009-03-23 18:23:47 -0700339 kfree(mmc);
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800340 continue;
341 }
342 hsmmc_data[c->mmc - 1] = mmc;
343 }
344
345 omap2_init_mmc(hsmmc_data, OMAP34XX_NR_MMC);
David Brownell01971f62009-03-23 18:23:47 -0700346
347 /* pass the device nodes back to board setup code */
348 for (c = controllers; c->mmc; c++) {
349 struct omap_mmc_platform_data *mmc = hsmmc_data[c->mmc - 1];
350
351 if (!c->mmc || c->mmc > nr_hsmmc)
352 continue;
353 c->dev = mmc->dev;
354 }
Aaro Koskinena6c7fdd2010-02-04 13:06:59 +0200355
356done:
357 for (i = 0; i < nr_hsmmc; i++)
358 kfree(hsmmc_data[i]);
Tony Lindgren90c62bf2008-12-10 17:37:17 -0800359}
360
361#endif