blob: 23b582d01eba3fe3f9455ab8287b8be980b718d9 [file] [log] [blame]
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +02001/**
2 * dwc3_otg.c - DesignWare USB3 DRD Controller OTG
3 *
4 * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 and
8 * only version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/usb.h>
17#include <linux/usb/hcd.h>
18#include <linux/platform_device.h>
19
20#include "core.h"
21#include "dwc3_otg.h"
22#include "io.h"
23#include "xhci.h"
24
25
26/**
27 * dwc3_otg_set_host_regs - reset dwc3 otg registers to host operation.
28 *
29 * This function sets the OTG registers to work in A-Device host mode.
30 * This function should be called just before entering to A-Device mode.
31 *
32 * @w: Pointer to the dwc3 otg workqueue.
33 */
34static void dwc3_otg_set_host_regs(struct dwc3_otg *dotg)
35{
36 u32 octl;
37
38 /* Set OCTL[6](PeriMode) to 0 (host) */
39 octl = dwc3_readl(dotg->regs, DWC3_OCTL);
40 octl &= ~DWC3_OTG_OCTL_PERIMODE;
41 dwc3_writel(dotg->regs, DWC3_OCTL, octl);
42
43 /*
44 * TODO: add more OTG registers writes for HOST mode here,
45 * see figure 12-10 A-device flow in dwc3 Synopsis spec
46 */
47}
48
49/**
50 * dwc3_otg_set_peripheral_regs - reset dwc3 otg registers to peripheral operation.
51 *
52 * This function sets the OTG registers to work in B-Device peripheral mode.
53 * This function should be called just before entering to B-Device mode.
54 *
55 * @w: Pointer to the dwc3 otg workqueue.
56 */
57static void dwc3_otg_set_peripheral_regs(struct dwc3_otg *dotg)
58{
59 u32 octl;
60
61 /* Set OCTL[6](PeriMode) to 1 (peripheral) */
62 octl = dwc3_readl(dotg->regs, DWC3_OCTL);
63 octl |= DWC3_OTG_OCTL_PERIMODE;
64 dwc3_writel(dotg->regs, DWC3_OCTL, octl);
65
66 /*
67 * TODO: add more OTG registers writes for PERIPHERAL mode here,
68 * see figure 12-19 B-device flow in dwc3 Synopsis spec
69 */
70}
71
72/**
73 * dwc3_otg_start_host - helper function for starting/stoping the host controller driver.
74 *
75 * @otg: Pointer to the otg_transceiver structure.
76 * @on: start / stop the host controller driver.
77 *
78 * Returns 0 on success otherwise negative errno.
79 */
80static int dwc3_otg_start_host(struct usb_otg *otg, int on)
81{
82 struct dwc3_otg *dotg = container_of(otg, struct dwc3_otg, otg);
83 struct usb_hcd *hcd;
84 struct xhci_hcd *xhci;
85 int ret = 0;
86
87 if (!otg->host)
88 return -EINVAL;
89
90 hcd = bus_to_hcd(otg->host);
91 xhci = hcd_to_xhci(hcd);
92 if (on) {
93 dev_dbg(otg->phy->dev, "%s: turn on host %s\n",
94 __func__, otg->host->bus_name);
95 dwc3_otg_set_host_regs(dotg);
96
97 /*
98 * This should be revisited for more testing post-silicon.
99 * In worst case we may need to disconnect the root hub
100 * before stopping the controller so that it does not
101 * interfere with runtime pm/system pm.
102 * We can also consider registering and unregistering xhci
103 * platform device. It is almost similar to add_hcd and
104 * remove_hcd, But we may not use standard set_host method
105 * anymore.
106 */
107 ret = hcd->driver->start(hcd);
108 if (ret) {
109 dev_err(otg->phy->dev,
110 "%s: failed to start primary hcd, ret=%d\n",
111 __func__, ret);
112 return ret;
113 }
114
115 ret = xhci->shared_hcd->driver->start(xhci->shared_hcd);
116 if (ret) {
117 dev_err(otg->phy->dev,
118 "%s: failed to start secondary hcd, ret=%d\n",
119 __func__, ret);
120 return ret;
121 }
122 } else {
123 dev_dbg(otg->phy->dev, "%s: turn off host %s\n",
124 __func__, otg->host->bus_name);
125 hcd->driver->stop(hcd);
126 }
127
128 return 0;
129}
130
131/**
132 * dwc3_otg_set_host - bind/unbind the host controller driver.
133 *
134 * @otg: Pointer to the otg_transceiver structure.
135 * @host: Pointer to the usb_bus structure.
136 *
137 * Returns 0 on success otherwise negative errno.
138 */
139static int dwc3_otg_set_host(struct usb_otg *otg, struct usb_bus *host)
140{
141 struct dwc3_otg *dotg = container_of(otg, struct dwc3_otg, otg);
142
143 if (host) {
144 dev_dbg(otg->phy->dev, "%s: set host %s\n",
145 __func__, host->bus_name);
146 otg->host = host;
147
148 /*
149 * Only after both peripheral and host are set then check
150 * OTG sm. This prevents unnecessary activation of the sm
151 * in case the ID is high.
152 */
153 if (otg->gadget)
154 schedule_work(&dotg->sm_work);
155 } else {
156 if (otg->phy->state == OTG_STATE_A_HOST) {
157 dwc3_otg_start_host(otg, 0);
158 otg->host = NULL;
159 otg->phy->state = OTG_STATE_UNDEFINED;
160 schedule_work(&dotg->sm_work);
161 } else {
162 otg->host = NULL;
163 }
164 }
165
166 return 0;
167}
168
169/**
170 * dwc3_otg_start_peripheral - bind/unbind the peripheral controller.
171 *
172 * @otg: Pointer to the otg_transceiver structure.
173 * @gadget: pointer to the usb_gadget structure.
174 *
175 * Returns 0 on success otherwise negative errno.
176 */
177static int dwc3_otg_start_peripheral(struct usb_otg *otg, int on)
178{
179 struct dwc3_otg *dotg = container_of(otg, struct dwc3_otg, otg);
180
181 if (!otg->gadget)
182 return -EINVAL;
183
184 if (on) {
185 dev_dbg(otg->phy->dev, "%s: turn on gadget %s\n",
186 __func__, otg->gadget->name);
187 dwc3_otg_set_peripheral_regs(dotg);
188 usb_gadget_vbus_connect(otg->gadget);
189 } else {
190 dev_dbg(otg->phy->dev, "%s: turn off gadget %s\n",
191 __func__, otg->gadget->name);
192 usb_gadget_vbus_disconnect(otg->gadget);
193 }
194
195 return 0;
196}
197
198/**
199 * dwc3_otg_set_peripheral - bind/unbind the peripheral controller driver.
200 *
201 * @otg: Pointer to the otg_transceiver structure.
202 * @gadget: pointer to the usb_gadget structure.
203 *
204 * Returns 0 on success otherwise negative errno.
205 */
206static int dwc3_otg_set_peripheral(struct usb_otg *otg,
207 struct usb_gadget *gadget)
208{
209 struct dwc3_otg *dotg = container_of(otg, struct dwc3_otg, otg);
210
211 if (gadget) {
212 dev_dbg(otg->phy->dev, "%s: set gadget %s\n",
213 __func__, gadget->name);
214 otg->gadget = gadget;
215
216 /*
217 * Only after both peripheral and host are set then check
218 * OTG sm. This prevents unnecessary activation of the sm
219 * in case the ID is grounded.
220 */
221 if (otg->host)
222 schedule_work(&dotg->sm_work);
223 } else {
224 if (otg->phy->state == OTG_STATE_B_PERIPHERAL) {
225 dwc3_otg_start_peripheral(otg, 0);
226 otg->gadget = NULL;
227 otg->phy->state = OTG_STATE_UNDEFINED;
228 schedule_work(&dotg->sm_work);
229 } else {
230 otg->gadget = NULL;
231 }
232 }
233
234 return 0;
235}
236
237/**
Manu Gautam8c642812012-06-07 10:35:10 +0530238 * dwc3_ext_chg_det_done - callback to handle charger detection completion
239 * @otg: Pointer to the otg transceiver structure
240 * @charger: Pointer to the external charger structure
241 *
242 * Returns 0 on success
243 */
244static void dwc3_ext_chg_det_done(struct usb_otg *otg, struct dwc3_charger *chg)
245{
246 struct dwc3_otg *dotg = container_of(otg, struct dwc3_otg, otg);
247
248 /*
249 * Ignore chg_detection notification if BSV has gone off by this time.
250 * STOP chg_det as part of !BSV handling would reset the chg_det flags
251 */
252 if (test_bit(B_SESS_VLD, &dotg->inputs))
253 schedule_work(&dotg->sm_work);
254}
255
256/**
257 * dwc3_set_charger - bind/unbind external charger driver
258 * @otg: Pointer to the otg transceiver structure
259 * @charger: Pointer to the external charger structure
260 *
261 * Returns 0 on success
262 */
263int dwc3_set_charger(struct usb_otg *otg, struct dwc3_charger *charger)
264{
265 struct dwc3_otg *dotg = container_of(otg, struct dwc3_otg, otg);
266
267 dotg->charger = charger;
268 if (charger)
269 charger->notify_detection_complete = dwc3_ext_chg_det_done;
270
271 return 0;
272}
273
274/* IRQs which OTG driver is interested in handling */
275#define DWC3_OEVT_MASK (DWC3_OEVTEN_OTGCONIDSTSCHNGEVNT | \
276 DWC3_OEVTEN_OTGBDEVVBUSCHNGEVNT)
277
278/**
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200279 * dwc3_otg_interrupt - interrupt handler for dwc3 otg events.
280 * @_dotg: Pointer to out controller context structure
281 *
282 * Returns IRQ_HANDLED on success otherwise IRQ_NONE.
283 */
284static irqreturn_t dwc3_otg_interrupt(int irq, void *_dotg)
285{
286 struct dwc3_otg *dotg = (struct dwc3_otg *)_dotg;
Manu Gautam8c642812012-06-07 10:35:10 +0530287 u32 osts, oevt_reg;
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200288 int ret = IRQ_NONE;
289 int handled_irqs = 0;
290
291 oevt_reg = dwc3_readl(dotg->regs, DWC3_OEVT);
292
Manu Gautam8c642812012-06-07 10:35:10 +0530293 if (!(oevt_reg & DWC3_OEVT_MASK))
294 return IRQ_NONE;
295
296 osts = dwc3_readl(dotg->regs, DWC3_OSTS);
297
298 if ((oevt_reg & DWC3_OEVTEN_OTGCONIDSTSCHNGEVNT) ||
299 (oevt_reg & DWC3_OEVTEN_OTGBDEVVBUSCHNGEVNT)) {
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200300 /*
Manu Gautam8c642812012-06-07 10:35:10 +0530301 * ID sts has changed, set inputs later, in the workqueue
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200302 * function, switch from A to B or from B to A.
303 */
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200304
Manu Gautam8c642812012-06-07 10:35:10 +0530305 if (osts & DWC3_OTG_OSTS_CONIDSTS)
306 set_bit(ID, &dotg->inputs);
307 else
308 clear_bit(ID, &dotg->inputs);
309
310 if (osts & DWC3_OTG_OSTS_BSESVALID)
311 set_bit(B_SESS_VLD, &dotg->inputs);
312 else
313 clear_bit(B_SESS_VLD, &dotg->inputs);
314
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200315 schedule_work(&dotg->sm_work);
316
Manu Gautam8c642812012-06-07 10:35:10 +0530317 handled_irqs |= (oevt_reg & DWC3_OEVTEN_OTGCONIDSTSCHNGEVNT) ?
318 DWC3_OEVTEN_OTGCONIDSTSCHNGEVNT : 0;
319 handled_irqs |= (oevt_reg & DWC3_OEVTEN_OTGBDEVVBUSCHNGEVNT) ?
320 DWC3_OEVTEN_OTGBDEVVBUSCHNGEVNT : 0;
321
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200322 ret = IRQ_HANDLED;
Manu Gautam8c642812012-06-07 10:35:10 +0530323
324 /* Clear the interrupts we handled */
325 dwc3_writel(dotg->regs, DWC3_OEVT, handled_irqs);
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200326 }
327
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200328 return ret;
329}
330
331/**
Manu Gautam8c642812012-06-07 10:35:10 +0530332 * dwc3_otg_init_sm - initialize OTG statemachine input
333 * @dotg: Pointer to the dwc3_otg structure
334 *
335 */
336void dwc3_otg_init_sm(struct dwc3_otg *dotg)
337{
338 u32 osts = dwc3_readl(dotg->regs, DWC3_OSTS);
339 struct usb_phy *phy = dotg->otg.phy;
340
341 /*
342 * TODO: If using external notifications then wait here till initial
343 * state is reported
344 */
345
346 dev_dbg(phy->dev, "Initialize OTG inputs, osts: 0x%x\n", osts);
347
348 if (osts & DWC3_OTG_OSTS_CONIDSTS)
349 set_bit(ID, &dotg->inputs);
350 else
351 clear_bit(ID, &dotg->inputs);
352
353 if (osts & DWC3_OTG_OSTS_BSESVALID)
354 set_bit(B_SESS_VLD, &dotg->inputs);
355 else
356 clear_bit(B_SESS_VLD, &dotg->inputs);
357}
358
359/**
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200360 * dwc3_otg_sm_work - workqueue function.
361 *
362 * @w: Pointer to the dwc3 otg workqueue
363 *
364 * NOTE: After any change in phy->state,
365 * we must reschdule the state machine.
366 */
367static void dwc3_otg_sm_work(struct work_struct *w)
368{
369 struct dwc3_otg *dotg = container_of(w, struct dwc3_otg, sm_work);
370 struct usb_phy *phy = dotg->otg.phy;
Manu Gautam8c642812012-06-07 10:35:10 +0530371 struct dwc3_charger *charger = dotg->charger;
372 bool work = 0;
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200373
374 dev_dbg(phy->dev, "%s state\n", otg_state_string(phy->state));
375
376 /* Check OTG state */
377 switch (phy->state) {
378 case OTG_STATE_UNDEFINED:
Manu Gautam8c642812012-06-07 10:35:10 +0530379 dwc3_otg_init_sm(dotg);
380 /* Switch to A or B-Device according to ID / BSV */
381 if (!test_bit(ID, &dotg->inputs) && phy->otg->host) {
382 dev_dbg(phy->dev, "!id\n");
383 phy->state = OTG_STATE_A_IDLE;
384 work = 1;
385 } else if (test_bit(B_SESS_VLD, &dotg->inputs)) {
386 dev_dbg(phy->dev, "b_sess_vld\n");
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200387 phy->state = OTG_STATE_B_IDLE;
Manu Gautam8c642812012-06-07 10:35:10 +0530388 work = 1;
389 } else {
390 phy->state = OTG_STATE_B_IDLE;
391 /* TODO: Enter low power state */
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200392 }
393 break;
Manu Gautam8c642812012-06-07 10:35:10 +0530394
395 case OTG_STATE_B_IDLE:
396 if (!test_bit(ID, &dotg->inputs) && phy->otg->host) {
397 dev_dbg(phy->dev, "!id\n");
398 phy->state = OTG_STATE_A_IDLE;
399 work = 1;
400 if (charger) {
401 if (charger->chg_type == DWC3_INVALID_CHARGER)
402 charger->start_detection(dotg->charger,
403 false);
404 else
405 charger->chg_type =
406 DWC3_INVALID_CHARGER;
407 }
408 } else if (test_bit(B_SESS_VLD, &dotg->inputs)) {
409 dev_dbg(phy->dev, "b_sess_vld\n");
410 if (charger) {
411 /* Has charger been detected? If no detect it */
412 switch (charger->chg_type) {
413 case DWC3_DCP_CHARGER:
414 /* TODO: initiate LPM */
415 break;
416 case DWC3_CDP_CHARGER:
417 dwc3_otg_start_peripheral(&dotg->otg,
418 1);
419 phy->state = OTG_STATE_B_PERIPHERAL;
420 work = 1;
421 break;
422 case DWC3_SDP_CHARGER:
423 dwc3_otg_start_peripheral(&dotg->otg,
424 1);
425 phy->state = OTG_STATE_B_PERIPHERAL;
426 work = 1;
427 break;
428 default:
429 dev_dbg(phy->dev, "chg_det started\n");
430 charger->start_detection(charger, true);
431 break;
432 }
433 } else {
434 /* no charger registered, start peripheral */
435 if (dwc3_otg_start_peripheral(&dotg->otg, 1)) {
436 /*
437 * Probably set_peripheral not called
438 * yet. We will re-try as soon as it
439 * will be called
440 */
441 dev_err(phy->dev,
442 "unable to start B-device\n");
443 phy->state = OTG_STATE_UNDEFINED;
444 return;
445 }
446 }
447 } else {
448 if (charger) {
449 if (charger->chg_type == DWC3_INVALID_CHARGER)
450 charger->start_detection(dotg->charger,
451 false);
452 else
453 charger->chg_type =
454 DWC3_INVALID_CHARGER;
455 }
456 /* TODO: Enter low power state */
457 }
458 break;
459
460 case OTG_STATE_B_PERIPHERAL:
461 if (!test_bit(B_SESS_VLD, &dotg->inputs) ||
462 !test_bit(ID, &dotg->inputs)) {
463 dev_dbg(phy->dev, "!id || !bsv\n");
464 dwc3_otg_start_peripheral(&dotg->otg, 0);
465 phy->state = OTG_STATE_B_IDLE;
466 if (charger)
467 charger->chg_type = DWC3_INVALID_CHARGER;
468 work = 1;
469 }
470 break;
471
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200472 case OTG_STATE_A_IDLE:
473 /* Switch to A-Device*/
Manu Gautam8c642812012-06-07 10:35:10 +0530474 if (test_bit(ID, &dotg->inputs)) {
475 dev_dbg(phy->dev, "id\n");
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200476 phy->state = OTG_STATE_B_IDLE;
Manu Gautam8c642812012-06-07 10:35:10 +0530477 work = 1;
478 } else {
479 if (dwc3_otg_start_host(&dotg->otg, 1)) {
480 /*
481 * Probably set_host was not called yet.
482 * We will re-try as soon as it will be called
483 */
484 dev_dbg(phy->dev,
485 "unable to start A-device\n");
486 phy->state = OTG_STATE_UNDEFINED;
487 return;
488 }
489 phy->state = OTG_STATE_A_HOST;
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200490 }
491 break;
Manu Gautam8c642812012-06-07 10:35:10 +0530492
493 case OTG_STATE_A_HOST:
494 if (test_bit(ID, &dotg->inputs)) {
495 dev_dbg(phy->dev, "id\n");
496 dwc3_otg_start_host(&dotg->otg, 0);
497 phy->state = OTG_STATE_B_IDLE;
498 work = 1;
499 }
500 break;
501
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200502 default:
503 dev_err(phy->dev, "%s: invalid otg-state\n", __func__);
504
505 }
Manu Gautam8c642812012-06-07 10:35:10 +0530506
507 if (work)
508 schedule_work(&dotg->sm_work);
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200509}
510
511
512/**
513 * dwc3_otg_reset - reset dwc3 otg registers.
514 *
515 * @w: Pointer to the dwc3 otg workqueue
516 */
517static void dwc3_otg_reset(struct dwc3_otg *dotg)
518{
519 /*
520 * OCFG[2] - OTG-Version = 1
521 * OCFG[1] - HNPCap = 0
522 * OCFG[0] - SRPCap = 0
523 */
524 dwc3_writel(dotg->regs, DWC3_OCFG, 0x4);
525
526 /*
527 * OCTL[6] - PeriMode = 1
528 * OCTL[5] - PrtPwrCtl = 0
529 * OCTL[4] - HNPReq = 0
530 * OCTL[3] - SesReq = 0
531 * OCTL[2] - TermSelDLPulse = 0
532 * OCTL[1] - DevSetHNPEn = 0
533 * OCTL[0] - HstSetHNPEn = 0
534 */
535 dwc3_writel(dotg->regs, DWC3_OCTL, 0x40);
536
537 /* Clear all otg events (interrupts) indications */
538 dwc3_writel(dotg->regs, DWC3_OEVT, 0xFFFF);
539
Manu Gautam8c642812012-06-07 10:35:10 +0530540 /* Enable ID/BSV StsChngEn event*/
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200541 dwc3_writel(dotg->regs, DWC3_OEVTEN,
Manu Gautam8c642812012-06-07 10:35:10 +0530542 DWC3_OEVTEN_OTGCONIDSTSCHNGEVNT |
543 DWC3_OEVTEN_OTGBDEVVBUSCHNGEVNT);
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200544}
545
546/**
547 * dwc3_otg_init - Initializes otg related registers
548 * @dwc: Pointer to out controller context structure
549 *
550 * Returns 0 on success otherwise negative errno.
551 */
552int dwc3_otg_init(struct dwc3 *dwc)
553{
554 u32 reg;
555 int ret = 0;
556 struct dwc3_otg *dotg;
557
558 dev_dbg(dwc->dev, "dwc3_otg_init\n");
559
560 /*
561 * GHWPARAMS6[10] bit is SRPSupport.
562 * This bit also reflects DWC_USB3_EN_OTG
563 */
564 reg = dwc3_readl(dwc->regs, DWC3_GHWPARAMS6);
565 if (!(reg & DWC3_GHWPARAMS6_SRP_SUPPORT)) {
566 /*
567 * No OTG support in the HW core.
568 * We return 0 to indicate no error, since this is acceptable
569 * situation, just continue probe the dwc3 driver without otg.
570 */
571 dev_dbg(dwc->dev, "dwc3_otg address space is not supported\n");
572 return 0;
573 }
574
575 /* Allocate and init otg instance */
576 dotg = kzalloc(sizeof(struct dwc3_otg), GFP_KERNEL);
577 if (!dotg) {
578 dev_err(dwc->dev, "unable to allocate dwc3_otg\n");
579 return -ENOMEM;
580 }
581
Manu Gautam17206c22012-06-21 10:17:53 +0530582 /* DWC3 has separate IRQ line for OTG events (ID/BSV etc.) */
583 dotg->irq = platform_get_irq_byname(to_platform_device(dwc->dev),
584 "otg_irq");
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200585 if (dotg->irq < 0) {
Manu Gautam17206c22012-06-21 10:17:53 +0530586 dev_err(dwc->dev, "%s: missing OTG IRQ\n", __func__);
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200587 ret = -ENODEV;
588 goto err1;
589 }
590
591 dotg->regs = dwc->regs;
592
593 dotg->otg.set_peripheral = dwc3_otg_set_peripheral;
594 dotg->otg.set_host = dwc3_otg_set_host;
595
596 /* This reference is used by dwc3 modules for checking otg existance */
597 dwc->dotg = dotg;
598
599 dotg->otg.phy = kzalloc(sizeof(struct usb_phy), GFP_KERNEL);
600 if (!dotg->otg.phy) {
601 dev_err(dwc->dev, "unable to allocate dwc3_otg.phy\n");
602 ret = -ENOMEM;
603 goto err1;
604 }
605
606 dotg->otg.phy->otg = &dotg->otg;
607 dotg->otg.phy->dev = dwc->dev;
608
609 ret = usb_set_transceiver(dotg->otg.phy);
610 if (ret) {
611 dev_err(dotg->otg.phy->dev,
612 "%s: failed to set transceiver, already exists\n",
613 __func__);
614 goto err2;
615 }
616
617 dwc3_otg_reset(dotg);
618
619 dotg->otg.phy->state = OTG_STATE_UNDEFINED;
620
621 INIT_WORK(&dotg->sm_work, dwc3_otg_sm_work);
622
623 ret = request_irq(dotg->irq, dwc3_otg_interrupt, IRQF_SHARED,
624 "dwc3_otg", dotg);
625 if (ret) {
626 dev_err(dotg->otg.phy->dev, "failed to request irq #%d --> %d\n",
627 dotg->irq, ret);
628 goto err3;
629 }
630
631 return 0;
632
633err3:
634 cancel_work_sync(&dotg->sm_work);
635 usb_set_transceiver(NULL);
636err2:
637 kfree(dotg->otg.phy);
638err1:
639 dwc->dotg = NULL;
640 kfree(dotg);
641
642 return ret;
643}
644
645/**
646 * dwc3_otg_exit
647 * @dwc: Pointer to out controller context structure
648 *
649 * Returns 0 on success otherwise negative errno.
650 */
651void dwc3_otg_exit(struct dwc3 *dwc)
652{
653 struct dwc3_otg *dotg = dwc->dotg;
654
655 /* dotg is null when GHWPARAMS6[10]=SRPSupport=0, see dwc3_otg_init */
656 if (dotg) {
Manu Gautam8c642812012-06-07 10:35:10 +0530657 if (dotg->charger)
658 dotg->charger->start_detection(dotg->charger, false);
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +0200659 cancel_work_sync(&dotg->sm_work);
660 usb_set_transceiver(NULL);
661 free_irq(dotg->irq, dotg);
662 kfree(dotg->otg.phy);
663 kfree(dotg);
664 dwc->dotg = NULL;
665 }
666}