Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #ifndef __ASM_ARM_DMA_H |
| 2 | #define __ASM_ARM_DMA_H |
| 3 | |
| 4 | typedef unsigned int dmach_t; |
| 5 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | #include <linux/spinlock.h> |
| 7 | #include <asm/system.h> |
| 8 | #include <asm/memory.h> |
| 9 | #include <asm/scatterlist.h> |
| 10 | |
| 11 | // FIXME - do we really need this? arm26 cant do 'proper' DMA |
| 12 | |
| 13 | typedef struct dma_struct dma_t; |
| 14 | typedef unsigned int dmamode_t; |
| 15 | |
| 16 | struct dma_ops { |
| 17 | int (*request)(dmach_t, dma_t *); /* optional */ |
| 18 | void (*free)(dmach_t, dma_t *); /* optional */ |
| 19 | void (*enable)(dmach_t, dma_t *); /* mandatory */ |
| 20 | void (*disable)(dmach_t, dma_t *); /* mandatory */ |
| 21 | int (*residue)(dmach_t, dma_t *); /* optional */ |
| 22 | int (*setspeed)(dmach_t, dma_t *, int); /* optional */ |
| 23 | char *type; |
| 24 | }; |
| 25 | |
| 26 | struct dma_struct { |
| 27 | struct scatterlist buf; /* single DMA */ |
| 28 | int sgcount; /* number of DMA SG */ |
| 29 | struct scatterlist *sg; /* DMA Scatter-Gather List */ |
| 30 | |
| 31 | unsigned int active:1; /* Transfer active */ |
| 32 | unsigned int invalid:1; /* Address/Count changed */ |
| 33 | unsigned int using_sg:1; /* using scatter list? */ |
| 34 | dmamode_t dma_mode; /* DMA mode */ |
| 35 | int speed; /* DMA speed */ |
| 36 | |
| 37 | unsigned int lock; /* Device is allocated */ |
| 38 | const char *device_id; /* Device name */ |
| 39 | |
| 40 | unsigned int dma_base; /* Controller base address */ |
| 41 | int dma_irq; /* Controller IRQ */ |
| 42 | int state; /* Controller state */ |
| 43 | struct scatterlist cur_sg; /* Current controller buffer */ |
| 44 | |
| 45 | struct dma_ops *d_ops; |
| 46 | }; |
| 47 | |
| 48 | /* Prototype: void arch_dma_init(dma) |
| 49 | * Purpose : Initialise architecture specific DMA |
| 50 | * Params : dma - pointer to array of DMA structures |
| 51 | */ |
| 52 | extern void arch_dma_init(dma_t *dma); |
| 53 | |
| 54 | extern void isa_init_dma(dma_t *dma); |
| 55 | |
| 56 | |
| 57 | #define MAX_DMA_ADDRESS 0x03000000 |
| 58 | #define MAX_DMA_CHANNELS 3 |
| 59 | |
| 60 | /* ARC */ |
| 61 | #define DMA_VIRTUAL_FLOPPY0 0 |
| 62 | #define DMA_VIRTUAL_FLOPPY1 1 |
| 63 | #define DMA_VIRTUAL_SOUND 2 |
| 64 | |
| 65 | /* A5K */ |
| 66 | #define DMA_FLOPPY 0 |
| 67 | |
| 68 | /* |
| 69 | * DMA modes |
| 70 | */ |
| 71 | #define DMA_MODE_MASK 3 |
| 72 | |
| 73 | #define DMA_MODE_READ 0 |
| 74 | #define DMA_MODE_WRITE 1 |
| 75 | #define DMA_MODE_CASCADE 2 |
| 76 | #define DMA_AUTOINIT 4 |
| 77 | |
| 78 | extern spinlock_t dma_spin_lock; |
| 79 | |
| 80 | static inline unsigned long claim_dma_lock(void) |
| 81 | { |
| 82 | unsigned long flags; |
| 83 | spin_lock_irqsave(&dma_spin_lock, flags); |
| 84 | return flags; |
| 85 | } |
| 86 | |
| 87 | static inline void release_dma_lock(unsigned long flags) |
| 88 | { |
| 89 | spin_unlock_irqrestore(&dma_spin_lock, flags); |
| 90 | } |
| 91 | |
| 92 | /* Clear the 'DMA Pointer Flip Flop'. |
| 93 | * Write 0 for LSB/MSB, 1 for MSB/LSB access. |
| 94 | */ |
| 95 | #define clear_dma_ff(channel) |
| 96 | |
| 97 | /* Set only the page register bits of the transfer address. |
| 98 | * |
| 99 | * NOTE: This is an architecture specific function, and should |
| 100 | * be hidden from the drivers |
| 101 | */ |
| 102 | extern void set_dma_page(dmach_t channel, char pagenr); |
| 103 | |
| 104 | /* Request a DMA channel |
| 105 | * |
| 106 | * Some architectures may need to do allocate an interrupt |
| 107 | */ |
| 108 | extern int request_dma(dmach_t channel, const char * device_id); |
| 109 | |
| 110 | /* Free a DMA channel |
| 111 | * |
| 112 | * Some architectures may need to do free an interrupt |
| 113 | */ |
| 114 | extern void free_dma(dmach_t channel); |
| 115 | |
| 116 | /* Enable DMA for this channel |
| 117 | * |
| 118 | * On some architectures, this may have other side effects like |
| 119 | * enabling an interrupt and setting the DMA registers. |
| 120 | */ |
| 121 | extern void enable_dma(dmach_t channel); |
| 122 | |
| 123 | /* Disable DMA for this channel |
| 124 | * |
| 125 | * On some architectures, this may have other side effects like |
| 126 | * disabling an interrupt or whatever. |
| 127 | */ |
| 128 | extern void disable_dma(dmach_t channel); |
| 129 | |
| 130 | /* Test whether the specified channel has an active DMA transfer |
| 131 | */ |
| 132 | extern int dma_channel_active(dmach_t channel); |
| 133 | |
| 134 | /* Set the DMA scatter gather list for this channel |
| 135 | * |
| 136 | * This should not be called if a DMA channel is enabled, |
| 137 | * especially since some DMA architectures don't update the |
| 138 | * DMA address immediately, but defer it to the enable_dma(). |
| 139 | */ |
| 140 | extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg); |
| 141 | |
| 142 | /* Set the DMA address for this channel |
| 143 | * |
| 144 | * This should not be called if a DMA channel is enabled, |
| 145 | * especially since some DMA architectures don't update the |
| 146 | * DMA address immediately, but defer it to the enable_dma(). |
| 147 | */ |
| 148 | extern void set_dma_addr(dmach_t channel, unsigned long physaddr); |
| 149 | |
| 150 | /* Set the DMA byte count for this channel |
| 151 | * |
| 152 | * This should not be called if a DMA channel is enabled, |
| 153 | * especially since some DMA architectures don't update the |
| 154 | * DMA count immediately, but defer it to the enable_dma(). |
| 155 | */ |
| 156 | extern void set_dma_count(dmach_t channel, unsigned long count); |
| 157 | |
| 158 | /* Set the transfer direction for this channel |
| 159 | * |
| 160 | * This should not be called if a DMA channel is enabled, |
| 161 | * especially since some DMA architectures don't update the |
| 162 | * DMA transfer direction immediately, but defer it to the |
| 163 | * enable_dma(). |
| 164 | */ |
| 165 | extern void set_dma_mode(dmach_t channel, dmamode_t mode); |
| 166 | |
| 167 | /* Set the transfer speed for this channel |
| 168 | */ |
| 169 | extern void set_dma_speed(dmach_t channel, int cycle_ns); |
| 170 | |
| 171 | /* Get DMA residue count. After a DMA transfer, this |
| 172 | * should return zero. Reading this while a DMA transfer is |
| 173 | * still in progress will return unpredictable results. |
| 174 | * If called before the channel has been used, it may return 1. |
| 175 | * Otherwise, it returns the number of _bytes_ left to transfer. |
| 176 | */ |
| 177 | extern int get_dma_residue(dmach_t channel); |
| 178 | |
| 179 | #ifndef NO_DMA |
| 180 | #define NO_DMA 255 |
| 181 | #endif |
| 182 | |
| 183 | #endif /* _ARM_DMA_H */ |