David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1 | /* |
| 2 | * drivers/net/ibm_newemac/tah.h |
| 3 | * |
| 4 | * Driver for PowerPC 4xx on-chip ethernet controller, TAH support. |
| 5 | * |
Benjamin Herrenschmidt | 17cf803 | 2007-12-05 11:14:33 +1100 | [diff] [blame^] | 6 | * Copyright 2007 Benjamin Herrenschmidt, IBM Corp. |
| 7 | * <benh@kernel.crashing.org> |
| 8 | * |
| 9 | * Based on the arch/ppc version of the driver: |
| 10 | * |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 11 | * Copyright 2004 MontaVista Software, Inc. |
| 12 | * Matt Porter <mporter@kernel.crashing.org> |
| 13 | * |
| 14 | * Copyright (c) 2005 Eugene Surovegin <ebs@ebshome.net> |
| 15 | * |
| 16 | * This program is free software; you can redistribute it and/or modify it |
| 17 | * under the terms of the GNU General Public License as published by the |
| 18 | * Free Software Foundation; either version 2 of the License, or (at your |
| 19 | * option) any later version. |
| 20 | */ |
| 21 | |
| 22 | #ifndef __IBM_NEWEMAC_TAH_H |
| 23 | #define __IBM_NEWEMAC_TAH_H |
| 24 | |
| 25 | /* TAH */ |
| 26 | struct tah_regs { |
| 27 | u32 revid; |
| 28 | u32 pad[3]; |
| 29 | u32 mr; |
| 30 | u32 ssr0; |
| 31 | u32 ssr1; |
| 32 | u32 ssr2; |
| 33 | u32 ssr3; |
| 34 | u32 ssr4; |
| 35 | u32 ssr5; |
| 36 | u32 tsr; |
| 37 | }; |
| 38 | |
| 39 | |
| 40 | /* TAH device */ |
| 41 | struct tah_instance { |
| 42 | struct tah_regs __iomem *base; |
| 43 | |
| 44 | /* Only one EMAC whacks us at a time */ |
| 45 | struct mutex lock; |
| 46 | |
| 47 | /* number of EMACs using this TAH */ |
| 48 | int users; |
| 49 | |
| 50 | /* OF device instance */ |
| 51 | struct of_device *ofdev; |
| 52 | }; |
| 53 | |
| 54 | |
| 55 | /* TAH engine */ |
| 56 | #define TAH_MR_CVR 0x80000000 |
| 57 | #define TAH_MR_SR 0x40000000 |
| 58 | #define TAH_MR_ST_256 0x01000000 |
| 59 | #define TAH_MR_ST_512 0x02000000 |
| 60 | #define TAH_MR_ST_768 0x03000000 |
| 61 | #define TAH_MR_ST_1024 0x04000000 |
| 62 | #define TAH_MR_ST_1280 0x05000000 |
| 63 | #define TAH_MR_ST_1536 0x06000000 |
| 64 | #define TAH_MR_TFS_16KB 0x00000000 |
| 65 | #define TAH_MR_TFS_2KB 0x00200000 |
| 66 | #define TAH_MR_TFS_4KB 0x00400000 |
| 67 | #define TAH_MR_TFS_6KB 0x00600000 |
| 68 | #define TAH_MR_TFS_8KB 0x00800000 |
| 69 | #define TAH_MR_TFS_10KB 0x00a00000 |
| 70 | #define TAH_MR_DTFP 0x00100000 |
| 71 | #define TAH_MR_DIG 0x00080000 |
| 72 | |
| 73 | #ifdef CONFIG_IBM_NEW_EMAC_TAH |
| 74 | |
| 75 | extern int tah_init(void); |
| 76 | extern void tah_exit(void); |
| 77 | extern int tah_attach(struct of_device *ofdev, int channel); |
| 78 | extern void tah_detach(struct of_device *ofdev, int channel); |
| 79 | extern void tah_reset(struct of_device *ofdev); |
| 80 | extern int tah_get_regs_len(struct of_device *ofdev); |
| 81 | extern void *tah_dump_regs(struct of_device *ofdev, void *buf); |
| 82 | |
| 83 | #else |
| 84 | |
| 85 | # define tah_init() 0 |
| 86 | # define tah_exit() do { } while(0) |
| 87 | # define tah_attach(x,y) (-ENXIO) |
| 88 | # define tah_detach(x,y) do { } while(0) |
| 89 | # define tah_reset(x) do { } while(0) |
| 90 | # define tah_get_regs_len(x) 0 |
| 91 | # define tah_dump_regs(x,buf) (buf) |
| 92 | |
| 93 | #endif /* !CONFIG_IBM_NEW_EMAC_TAH */ |
| 94 | |
| 95 | #endif /* __IBM_NEWEMAC_TAH_H */ |