| Sathish Ambley | d1b89ed | 2012-02-07 21:47:47 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2012, Code Aurora Forum. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | / { |
| 14 | jpeg: qcom,iommu@fda64000 { |
| 15 | compatible = "qcom,msm-smmu-v2"; |
| 16 | #address-cells = <1>; |
| 17 | #size-cells = <1>; |
| 18 | ranges; |
| 19 | reg = <0xfda64000 0x10000>; |
| 20 | |
| 21 | qcom,iommu-ctx@fda6c000 { |
| 22 | reg = <0xfda6c000 0x1000>; |
| 23 | interrupts = <0 69 0>; |
| 24 | qcom,iommu-ctx-sids = <0>; |
| 25 | qcom,iommu-ctx-name = "jpeg_enc0"; |
| 26 | }; |
| 27 | qcom,iommu-ctx@fda6d000 { |
| 28 | reg = <0xfda6d000 0x1000>; |
| 29 | interrupts = <0 70 0>; |
| 30 | qcom,iommu-ctx-sids = <1>; |
| 31 | qcom,iommu-ctx-name = "jpeg_enc1"; |
| 32 | }; |
| 33 | qcom,iommu-ctx@fda6e000 { |
| 34 | reg = <0xfda6e000 0x1000>; |
| 35 | interrupts = <0 71 0>; |
| 36 | qcom,iommu-ctx-sids = <2>; |
| 37 | qcom,iommu-ctx-name = "jpeg_dec"; |
| 38 | }; |
| 39 | }; |
| 40 | |
| 41 | mdp: qcom,iommu@fd928000 { |
| 42 | compatible = "qcom,msm-smmu-v2"; |
| 43 | #address-cells = <1>; |
| 44 | #size-cells = <1>; |
| 45 | ranges; |
| 46 | reg = <0xfd928000 0x10000>; |
| 47 | |
| 48 | qcom,iommu-ctx@fd930000 { |
| 49 | reg = <0xfd930000 0x1000>; |
| 50 | interrupts = <0 74 0>; |
| 51 | qcom,iommu-ctx-sids = <0>; |
| 52 | qcom,iommu-ctx-name = "mdp_0"; |
| 53 | }; |
| 54 | qcom,iommu-ctx@fd931000 { |
| 55 | reg = <0xfd931000 0x1000>; |
| 56 | interrupts = <0 75 0>; |
| 57 | qcom,iommu-ctx-sids = <1>; |
| 58 | qcom,iommu-ctx-name = "mdp_1"; |
| 59 | }; |
| 60 | }; |
| 61 | |
| 62 | venus: qcom,iommu@fdc84000 { |
| 63 | compatible = "qcom,msm-smmu-v2"; |
| 64 | #address-cells = <1>; |
| 65 | #size-cells = <1>; |
| 66 | ranges; |
| 67 | reg = <0xfdc84000 0x10000>; |
| 68 | |
| 69 | qcom,iommu-ctx@fdc8c000 { |
| 70 | reg = <0xfdc8c000 0x1000>; |
| 71 | interrupts = <0 43 0>; |
| 72 | qcom,iommu-ctx-sids = <0 1 2 3 4 5>; |
| 73 | qcom,iommu-ctx-name = "venus_ns"; |
| 74 | }; |
| 75 | qcom,iommu-ctx@fdc8d000 { |
| 76 | reg = <0xfdc8d000 0x1000>; |
| 77 | interrupts = <0 42 0>; |
| 78 | qcom,iommu-ctx-sids = <0x80 0x81 0x82 0x83 0x84 0x85>; |
| 79 | qcom,iommu-ctx-name = "venus_cp"; |
| 80 | }; |
| 81 | qcom,iommu-ctx@fdc8e000 { |
| 82 | reg = <0xfdc8e000 0x1000>; |
| 83 | interrupts = <0 41 0>; |
| 84 | qcom,iommu-ctx-sids = <0xc0 0xc6>; |
| 85 | qcom,iommu-ctx-name = "venus_fw"; |
| 86 | }; |
| 87 | }; |
| 88 | }; |