| Aparna Das | d16555b | 2013-03-06 15:46:38 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2013, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | / { |
| 14 | tmc_etr: tmc@fc326000 { |
| 15 | compatible = "arm,coresight-tmc"; |
| 16 | reg = <0xfc326000 0x1000>, |
| 17 | <0xfc37c000 0x3000>; |
| 18 | reg-names = "tmc-etr-base", "tmc-etr-bam-base"; |
| 19 | |
| 20 | qcom,memory-reservation-type = "EBI1"; |
| 21 | qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */ |
| 22 | |
| 23 | coresight-id = <0>; |
| 24 | coresight-name = "coresight-tmc-etr"; |
| 25 | coresight-nr-inports = <1>; |
| 26 | }; |
| 27 | |
| 28 | tpiu: tpiu@fc320000 { |
| 29 | compatible = "arm,coresight-tpiu"; |
| 30 | reg = <0xfc320000 0x1000>; |
| 31 | reg-names = "tpiu-base"; |
| 32 | |
| 33 | coresight-id = <1>; |
| 34 | coresight-name = "coresight-tpiu"; |
| 35 | coresight-nr-inports = <1>; |
| 36 | }; |
| 37 | |
| 38 | replicator: replicator@fc324000 { |
| 39 | compatible = "qcom,coresight-replicator"; |
| 40 | reg = <0xfc324000 0x1000>; |
| 41 | reg-names = "replicator-base"; |
| 42 | |
| 43 | coresight-id = <2>; |
| 44 | coresight-name = "coresight-replicator"; |
| 45 | coresight-nr-inports = <1>; |
| 46 | coresight-outports = <0 1>; |
| 47 | coresight-child-list = <&tmc_etr &tpiu>; |
| 48 | coresight-child-ports = <0 0>; |
| 49 | }; |
| 50 | |
| 51 | tmc_etf: tmc@fc325000 { |
| 52 | compatible = "arm,coresight-tmc"; |
| 53 | reg = <0xfc325000 0x1000>; |
| 54 | reg-names = "tmc-etf-base"; |
| 55 | |
| 56 | coresight-id = <3>; |
| 57 | coresight-name = "coresight-tmc-etf"; |
| 58 | coresight-nr-inports = <1>; |
| 59 | coresight-outports = <0>; |
| 60 | coresight-child-list = <&replicator>; |
| 61 | coresight-child-ports = <0>; |
| 62 | coresight-default-sink; |
| 63 | }; |
| 64 | |
| 65 | funnel_merg: funnel@fc323000 { |
| 66 | compatible = "arm,coresight-funnel"; |
| 67 | reg = <0xfc323000 0x1000>; |
| 68 | reg-names = "funnel-merg-base"; |
| 69 | |
| 70 | coresight-id = <4>; |
| 71 | coresight-name = "coresight-funnel-merg"; |
| 72 | coresight-nr-inports = <2>; |
| 73 | coresight-outports = <0>; |
| 74 | coresight-child-list = <&tmc_etf>; |
| 75 | coresight-child-ports = <0>; |
| 76 | }; |
| 77 | |
| 78 | funnel_in0: funnel@fc321000 { |
| 79 | compatible = "arm,coresight-funnel"; |
| 80 | reg = <0xfc321000 0x1000>; |
| 81 | reg-names = "funnel-in0-base"; |
| 82 | |
| 83 | coresight-id = <5>; |
| 84 | coresight-name = "coresight-funnel-in0"; |
| 85 | coresight-nr-inports = <8>; |
| 86 | coresight-outports = <0>; |
| 87 | coresight-child-list = <&funnel_merg>; |
| 88 | coresight-child-ports = <0>; |
| 89 | }; |
| 90 | |
| 91 | funnel_in1: funnel@fc322000 { |
| 92 | compatible = "arm,coresight-funnel"; |
| 93 | reg = <0xfc322000 0x1000>; |
| 94 | reg-names = "funnel-in1-base"; |
| 95 | |
| 96 | coresight-id = <6>; |
| 97 | coresight-name = "coresight-funnel-in1"; |
| 98 | coresight-nr-inports = <8>; |
| 99 | coresight-outports = <0>; |
| 100 | coresight-child-list = <&funnel_merg>; |
| 101 | coresight-child-ports = <1>; |
| 102 | }; |
| 103 | |
| 104 | funnel_a7ss: funnel@fc355000 { |
| 105 | compatible = "arm,coresight-funnel"; |
| 106 | reg = <0xfc355000 0x1000>; |
| 107 | reg-names = "funnel-a7ss-base"; |
| 108 | |
| 109 | coresight-id = <7>; |
| 110 | coresight-name = "coresight-funnel-a7ss"; |
| 111 | coresight-nr-inports = <4>; |
| 112 | coresight-outports = <0>; |
| 113 | coresight-child-list = <&funnel_in1>; |
| 114 | coresight-child-ports = <5>; |
| 115 | }; |
| 116 | |
| 117 | stm: stm@fc302000 { |
| 118 | compatible = "arm,coresight-stm"; |
| 119 | reg = <0xfc302000 0x1000>, |
| 120 | <0xfa280000 0x180000>; |
| 121 | reg-names = "stm-base", "stm-data-base"; |
| 122 | |
| 123 | coresight-id = <8>; |
| 124 | coresight-name = "coresight-stm"; |
| 125 | coresight-nr-inports = <0>; |
| 126 | coresight-outports = <0>; |
| 127 | coresight-child-list = <&funnel_in1>; |
| 128 | coresight-child-ports = <7>; |
| 129 | }; |
| 130 | |
| 131 | csr: csr@fc301000 { |
| 132 | compatible = "qcom,coresight-csr"; |
| 133 | reg = <0xfc301000 0x1000>; |
| 134 | reg-names = "csr-base"; |
| 135 | |
| 136 | coresight-id = <9>; |
| 137 | coresight-name = "coresight-csr"; |
| 138 | coresight-nr-inports = <0>; |
| 139 | |
| 140 | qcom,blk-size = <3>; |
| 141 | }; |
| 142 | }; |