blob: 41f7c294149b8527979ac7712931748da3396727 [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001#ifndef _KGSL_DRM_H_
2#define _KGSL_DRM_H_
3
4#include "drm.h"
5
6#define DRM_KGSL_GEM_CREATE 0x00
7#define DRM_KGSL_GEM_PREP 0x01
8#define DRM_KGSL_GEM_SETMEMTYPE 0x02
9#define DRM_KGSL_GEM_GETMEMTYPE 0x03
10#define DRM_KGSL_GEM_MMAP 0x04
11#define DRM_KGSL_GEM_ALLOC 0x05
12#define DRM_KGSL_GEM_BIND_GPU 0x06
13#define DRM_KGSL_GEM_UNBIND_GPU 0x07
14
15#define DRM_KGSL_GEM_GET_BUFINFO 0x08
16#define DRM_KGSL_GEM_SET_BUFCOUNT 0x09
17#define DRM_KGSL_GEM_SET_ACTIVE 0x0A
18#define DRM_KGSL_GEM_LOCK_HANDLE 0x0B
19#define DRM_KGSL_GEM_UNLOCK_HANDLE 0x0C
20#define DRM_KGSL_GEM_UNLOCK_ON_TS 0x0D
21#define DRM_KGSL_GEM_CREATE_FD 0x0E
Michael Street536af832012-11-08 22:36:04 -080022#define DRM_KGSL_GEM_GET_ION_FD 0x0F
Michael Street8ebe7032013-02-20 16:04:18 -080023#define DRM_KGSL_GEM_CREATE_FROM_ION 0x10
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070024
25#define DRM_IOCTL_KGSL_GEM_CREATE \
26DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_CREATE, struct drm_kgsl_gem_create)
27
28#define DRM_IOCTL_KGSL_GEM_PREP \
29DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_PREP, struct drm_kgsl_gem_prep)
30
31#define DRM_IOCTL_KGSL_GEM_SETMEMTYPE \
32DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_SETMEMTYPE, \
33struct drm_kgsl_gem_memtype)
34
35#define DRM_IOCTL_KGSL_GEM_GETMEMTYPE \
36DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_GETMEMTYPE, \
37struct drm_kgsl_gem_memtype)
38
39#define DRM_IOCTL_KGSL_GEM_MMAP \
40DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_MMAP, struct drm_kgsl_gem_mmap)
41
42#define DRM_IOCTL_KGSL_GEM_ALLOC \
43DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_ALLOC, struct drm_kgsl_gem_alloc)
44
45#define DRM_IOCTL_KGSL_GEM_BIND_GPU \
46DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_BIND_GPU, struct drm_kgsl_gem_bind_gpu)
47
48#define DRM_IOCTL_KGSL_GEM_UNBIND_GPU \
49DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_UNBIND_GPU, \
50struct drm_kgsl_gem_bind_gpu)
51
52#define DRM_IOCTL_KGSL_GEM_GET_BUFINFO \
53DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_GET_BUFINFO, \
54 struct drm_kgsl_gem_bufinfo)
55
56#define DRM_IOCTL_KGSL_GEM_SET_BUFCOUNT \
57DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_SET_BUFCOUNT, \
58 struct drm_kgsl_gem_bufcount)
59
60#define DRM_IOCTL_KGSL_GEM_SET_ACTIVE \
61DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_SET_ACTIVE, \
62 struct drm_kgsl_gem_active)
63
64#define DRM_IOCTL_KGSL_GEM_LOCK_HANDLE \
65DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_LOCK_HANDLE, \
66struct drm_kgsl_gem_lock_handles)
67
68#define DRM_IOCTL_KGSL_GEM_UNLOCK_HANDLE \
69DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_UNLOCK_HANDLE, \
70struct drm_kgsl_gem_unlock_handles)
71
72#define DRM_IOCTL_KGSL_GEM_UNLOCK_ON_TS \
73DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_UNLOCK_ON_TS, \
74struct drm_kgsl_gem_unlock_on_ts)
75
76#define DRM_IOCTL_KGSL_GEM_CREATE_FD \
77DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_CREATE_FD, \
78struct drm_kgsl_gem_create_fd)
79
Michael Street536af832012-11-08 22:36:04 -080080#define DRM_IOCTL_KGSL_GEM_GET_ION_FD \
81DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_GET_ION_FD, \
82struct drm_kgsl_gem_get_ion_fd)
83
Michael Street8ebe7032013-02-20 16:04:18 -080084#define DRM_IOCTL_KGSL_GEM_CREATE_FROM_ION \
85DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_CREATE_FROM_ION, \
86struct drm_kgsl_gem_create_from_ion)
87
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070088/* Maximum number of sub buffers per GEM object */
89#define DRM_KGSL_GEM_MAX_BUFFERS 2
90
91/* Memory types - these define the source and caching policies
92 of the GEM memory chunk */
93
94/* Legacy definitions left for compatability */
95
96#define DRM_KGSL_GEM_TYPE_EBI 0
97#define DRM_KGSL_GEM_TYPE_SMI 1
98#define DRM_KGSL_GEM_TYPE_KMEM 2
99#define DRM_KGSL_GEM_TYPE_KMEM_NOCACHE 3
100#define DRM_KGSL_GEM_TYPE_MEM_MASK 0xF
101
102/* Contiguous memory (PMEM) */
103#define DRM_KGSL_GEM_TYPE_PMEM 0x000100
104
105/* PMEM memory types */
106#define DRM_KGSL_GEM_PMEM_EBI 0x001000
107#define DRM_KGSL_GEM_PMEM_SMI 0x002000
108
109/* Standard paged memory */
110#define DRM_KGSL_GEM_TYPE_MEM 0x010000
111
112/* Caching controls */
113#define DRM_KGSL_GEM_CACHE_NONE 0x000000
114#define DRM_KGSL_GEM_CACHE_WCOMBINE 0x100000
115#define DRM_KGSL_GEM_CACHE_WTHROUGH 0x200000
116#define DRM_KGSL_GEM_CACHE_WBACK 0x400000
117#define DRM_KGSL_GEM_CACHE_WBACKWA 0x800000
118#define DRM_KGSL_GEM_CACHE_MASK 0xF00000
119
120/* FD based objects */
121#define DRM_KGSL_GEM_TYPE_FD_FBMEM 0x1000000
122#define DRM_KGSL_GEM_TYPE_FD_MASK 0xF000000
123
124/* Timestamp types */
125#define DRM_KGSL_GEM_TS_3D 0x00000430
126#define DRM_KGSL_GEM_TS_2D 0x00000180
127
128
129struct drm_kgsl_gem_create {
130 uint32_t size;
131 uint32_t handle;
132};
133
134struct drm_kgsl_gem_prep {
135 uint32_t handle;
136 uint32_t phys;
137 uint64_t offset;
138};
139
140struct drm_kgsl_gem_memtype {
141 uint32_t handle;
142 uint32_t type;
143};
144
145struct drm_kgsl_gem_mmap {
146 uint32_t handle;
147 uint32_t size;
148 uint32_t hostptr;
149 uint64_t offset;
150};
151
152struct drm_kgsl_gem_alloc {
153 uint32_t handle;
154 uint64_t offset;
155};
156
157struct drm_kgsl_gem_bind_gpu {
158 uint32_t handle;
159 uint32_t gpuptr;
160};
161
162struct drm_kgsl_gem_bufinfo {
163 uint32_t handle;
164 uint32_t count;
165 uint32_t active;
166 uint32_t offset[DRM_KGSL_GEM_MAX_BUFFERS];
167 uint32_t gpuaddr[DRM_KGSL_GEM_MAX_BUFFERS];
168};
169
170struct drm_kgsl_gem_bufcount {
171 uint32_t handle;
172 uint32_t bufcount;
173};
174
175struct drm_kgsl_gem_active {
176 uint32_t handle;
177 uint32_t active;
178};
179
180struct drm_kgsl_gem_lock_handles {
181 uint32_t num_handles;
182 uint32_t *handle_list;
183 uint32_t pid;
184 uint32_t lock_id; /* Returned lock id used for unlocking */
185};
186
187struct drm_kgsl_gem_unlock_handles {
188 uint32_t lock_id;
189};
190
191struct drm_kgsl_gem_unlock_on_ts {
192 uint32_t lock_id;
193 uint32_t timestamp; /* This field is a hw generated ts */
194 uint32_t type; /* Which pipe to check for ts generation */
195};
196
197struct drm_kgsl_gem_create_fd {
198 uint32_t fd;
199 uint32_t handle;
200};
201
Michael Street536af832012-11-08 22:36:04 -0800202struct drm_kgsl_gem_get_ion_fd {
203 uint32_t ion_fd;
204 uint32_t handle;
205};
206
Michael Street8ebe7032013-02-20 16:04:18 -0800207struct drm_kgsl_gem_create_from_ion {
208 uint32_t ion_fd;
209 uint32_t handle;
210};
211
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700212#endif