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Ben Dooksf348a2a2008-07-03 11:24:25 +01001/* linux/arch/arm/plat-s3c24xx/gpiolib.c
2 *
3 * Copyright (c) 2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C24XX GPIOlib support
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License.
12*/
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/interrupt.h>
18#include <linux/ioport.h>
19#include <linux/io.h>
20#include <linux/gpio.h>
21
Ben Dooks7db6c822008-10-31 16:14:31 +000022#include <plat/gpio-core.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010023#include <mach/hardware.h>
Ben Dooksf348a2a2008-07-03 11:24:25 +010024#include <asm/irq.h>
25
Russell Kinga09e64f2008-08-05 16:14:15 +010026#include <mach/regs-gpio.h>
Ben Dooksf348a2a2008-07-03 11:24:25 +010027
Ben Dooksf348a2a2008-07-03 11:24:25 +010028static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset)
29{
30 return -EINVAL;
31}
32
33static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
34 unsigned offset, int value)
35{
Ben Dooks7db6c822008-10-31 16:14:31 +000036 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
Ben Dooksf348a2a2008-07-03 11:24:25 +010037 void __iomem *base = ourchip->base;
38 unsigned long flags;
39 unsigned long dat;
40 unsigned long con;
41
42 local_irq_save(flags);
43
44 con = __raw_readl(base + 0x00);
45 dat = __raw_readl(base + 0x04);
46
47 dat &= ~(1 << offset);
48 if (value)
49 dat |= 1 << offset;
50
51 __raw_writel(dat, base + 0x04);
52
53 con &= ~(1 << offset);
54
55 __raw_writel(con, base + 0x00);
56 __raw_writel(dat, base + 0x04);
57
58 local_irq_restore(flags);
59 return 0;
60}
61
Ben Dooks21b23662008-10-31 16:14:34 +000062struct s3c_gpio_chip s3c24xx_gpios[] = {
Ben Dooksf348a2a2008-07-03 11:24:25 +010063 [0] = {
64 .base = S3C24XX_GPIO_BASE(S3C2410_GPA0),
65 .chip = {
66 .base = S3C2410_GPA0,
67 .owner = THIS_MODULE,
68 .label = "GPIOA",
69 .ngpio = 24,
70 .direction_input = s3c24xx_gpiolib_banka_input,
71 .direction_output = s3c24xx_gpiolib_banka_output,
Ben Dooksf348a2a2008-07-03 11:24:25 +010072 },
73 },
74 [1] = {
75 .base = S3C24XX_GPIO_BASE(S3C2410_GPB0),
76 .chip = {
77 .base = S3C2410_GPB0,
78 .owner = THIS_MODULE,
79 .label = "GPIOB",
80 .ngpio = 16,
Ben Dooksf348a2a2008-07-03 11:24:25 +010081 },
82 },
83 [2] = {
84 .base = S3C24XX_GPIO_BASE(S3C2410_GPC0),
85 .chip = {
86 .base = S3C2410_GPC0,
87 .owner = THIS_MODULE,
88 .label = "GPIOC",
89 .ngpio = 16,
Ben Dooksf348a2a2008-07-03 11:24:25 +010090 },
91 },
92 [3] = {
93 .base = S3C24XX_GPIO_BASE(S3C2410_GPD0),
94 .chip = {
95 .base = S3C2410_GPD0,
96 .owner = THIS_MODULE,
97 .label = "GPIOD",
98 .ngpio = 16,
Ben Dooksf348a2a2008-07-03 11:24:25 +010099 },
100 },
101 [4] = {
102 .base = S3C24XX_GPIO_BASE(S3C2410_GPE0),
103 .chip = {
104 .base = S3C2410_GPE0,
105 .label = "GPIOE",
106 .owner = THIS_MODULE,
107 .ngpio = 16,
Ben Dooksf348a2a2008-07-03 11:24:25 +0100108 },
109 },
110 [5] = {
111 .base = S3C24XX_GPIO_BASE(S3C2410_GPF0),
112 .chip = {
113 .base = S3C2410_GPF0,
114 .owner = THIS_MODULE,
115 .label = "GPIOF",
116 .ngpio = 8,
Ben Dooksf348a2a2008-07-03 11:24:25 +0100117 },
118 },
119 [6] = {
120 .base = S3C24XX_GPIO_BASE(S3C2410_GPG0),
121 .chip = {
122 .base = S3C2410_GPG0,
123 .owner = THIS_MODULE,
124 .label = "GPIOG",
125 .ngpio = 10,
Ben Dooksf348a2a2008-07-03 11:24:25 +0100126 },
127 },
128};
129
130static __init int s3c24xx_gpiolib_init(void)
131{
Ben Dooks21b23662008-10-31 16:14:34 +0000132 struct s3c_gpio_chip *chip = s3c24xx_gpios;
Ben Dooksf348a2a2008-07-03 11:24:25 +0100133 int gpn;
134
Ben Dooks21b23662008-10-31 16:14:34 +0000135 for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++)
Ben Dooks7db6c822008-10-31 16:14:31 +0000136 s3c_gpiolib_add(chip);
Ben Dooksf348a2a2008-07-03 11:24:25 +0100137
138 return 0;
139}
140
141arch_initcall(s3c24xx_gpiolib_init);