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Tony Lindgren1dbae812005-11-10 14:26:51 +00001/*
2 * linux/arch/arm/mach-omap2/io.c
3 *
4 * OMAP2 I/O mapping code
5 *
6 * Copyright (C) 2005 Nokia Corporation
Santosh Shilimkar44169072009-05-28 14:16:04 -07007 * Copyright (C) 2007-2009 Texas Instruments
Tony Lindgren646e3ed2008-10-06 15:49:36 +03008 *
9 * Author:
10 * Juha Yrjola <juha.yrjola@nokia.com>
11 * Syed Khasim <x0khasim@ti.com>
Tony Lindgren1dbae812005-11-10 14:26:51 +000012 *
Santosh Shilimkar44169072009-05-28 14:16:04 -070013 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
14 *
Tony Lindgren1dbae812005-11-10 14:26:51 +000015 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18 */
Tony Lindgren1dbae812005-11-10 14:26:51 +000019#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/init.h>
Russell Kingfced80c2008-09-06 12:10:45 +010022#include <linux/io.h>
Paul Walmsley2f135ea2009-06-19 19:08:25 -060023#include <linux/clk.h>
Tomi Valkeinen91773a02009-08-03 15:06:36 +030024#include <linux/omapfb.h>
Tony Lindgren1dbae812005-11-10 14:26:51 +000025
Tony Lindgren120db2c2006-04-02 17:46:27 +010026#include <asm/tlb.h>
Tony Lindgren120db2c2006-04-02 17:46:27 +010027
28#include <asm/mach/map.h>
29
Tony Lindgrence491cf2009-10-20 09:40:47 -070030#include <plat/sram.h>
31#include <plat/sdrc.h>
Tony Lindgrence491cf2009-10-20 09:40:47 -070032#include <plat/serial.h>
Tony Lindgren646e3ed2008-10-06 15:49:36 +030033
Paul Walmsleye80a9722010-01-26 20:13:12 -070034#include "clock2xxx.h"
Paul Walmsley657ebfa2010-02-22 22:09:20 -070035#include "clock3xxx.h"
Paul Walmsleye80a9722010-01-26 20:13:12 -070036#include "clock44xx.h"
Tony Lindgren1dbae812005-11-10 14:26:51 +000037
Tony Lindgren4e653312011-11-10 22:45:17 +010038#include "common.h"
Tony Lindgrence491cf2009-10-20 09:40:47 -070039#include <plat/omap-pm.h>
Kevin Hilman81a60482011-03-16 14:25:45 -070040#include "voltage.h"
Paul Walmsley72e06d02010-12-21 21:05:16 -070041#include "powerdomain.h"
Paul Walmsley97171002008-08-19 11:08:40 +030042
Paul Walmsley1540f2142010-12-21 21:05:15 -070043#include "clockdomain.h"
Tony Lindgrence491cf2009-10-20 09:40:47 -070044#include <plat/omap_hwmod.h>
Tony Lindgren5d190c42010-12-09 15:49:23 -080045#include <plat/multi.h>
Tony Lindgren4e653312011-11-10 22:45:17 +010046#include "common.h"
Paul Walmsley02bfc032009-09-03 20:14:05 +030047
Tony Lindgren1dbae812005-11-10 14:26:51 +000048/*
49 * The machine specific code may provide the extra mapping besides the
50 * default mapping provided here.
51 */
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030052
Tony Lindgren088ef952010-02-12 12:26:47 -080053#ifdef CONFIG_ARCH_OMAP2
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030054static struct map_desc omap24xx_io_desc[] __initdata = {
Tony Lindgren1dbae812005-11-10 14:26:51 +000055 {
56 .virtual = L3_24XX_VIRT,
57 .pfn = __phys_to_pfn(L3_24XX_PHYS),
58 .length = L3_24XX_SIZE,
59 .type = MT_DEVICE
60 },
Kyungmin Park09f21ed2008-02-20 15:30:06 -080061 {
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030062 .virtual = L4_24XX_VIRT,
63 .pfn = __phys_to_pfn(L4_24XX_PHYS),
64 .length = L4_24XX_SIZE,
Syed Mohammed Khasim72d0f1c2006-12-06 17:14:05 -080065 .type = MT_DEVICE
66 },
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030067};
68
Tony Lindgren59b479e2011-01-27 16:39:40 -080069#ifdef CONFIG_SOC_OMAP2420
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030070static struct map_desc omap242x_io_desc[] __initdata = {
Tony Lindgren1dbae812005-11-10 14:26:51 +000071 {
Paul Walmsley7adb9982010-01-08 15:23:05 -070072 .virtual = DSP_MEM_2420_VIRT,
73 .pfn = __phys_to_pfn(DSP_MEM_2420_PHYS),
74 .length = DSP_MEM_2420_SIZE,
Tony Lindgrenc40fae92006-12-07 13:58:10 -080075 .type = MT_DEVICE
76 },
77 {
Paul Walmsley7adb9982010-01-08 15:23:05 -070078 .virtual = DSP_IPI_2420_VIRT,
79 .pfn = __phys_to_pfn(DSP_IPI_2420_PHYS),
80 .length = DSP_IPI_2420_SIZE,
Tony Lindgrenc40fae92006-12-07 13:58:10 -080081 .type = MT_DEVICE
82 },
83 {
Paul Walmsley7adb9982010-01-08 15:23:05 -070084 .virtual = DSP_MMU_2420_VIRT,
85 .pfn = __phys_to_pfn(DSP_MMU_2420_PHYS),
86 .length = DSP_MMU_2420_SIZE,
Tony Lindgren1dbae812005-11-10 14:26:51 +000087 .type = MT_DEVICE
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030088 },
Tony Lindgren1dbae812005-11-10 14:26:51 +000089};
90
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030091#endif
92
Tony Lindgren59b479e2011-01-27 16:39:40 -080093#ifdef CONFIG_SOC_OMAP2430
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030094static struct map_desc omap243x_io_desc[] __initdata = {
95 {
96 .virtual = L4_WK_243X_VIRT,
97 .pfn = __phys_to_pfn(L4_WK_243X_PHYS),
98 .length = L4_WK_243X_SIZE,
99 .type = MT_DEVICE
100 },
101 {
102 .virtual = OMAP243X_GPMC_VIRT,
103 .pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS),
104 .length = OMAP243X_GPMC_SIZE,
105 .type = MT_DEVICE
106 },
107 {
108 .virtual = OMAP243X_SDRC_VIRT,
109 .pfn = __phys_to_pfn(OMAP243X_SDRC_PHYS),
110 .length = OMAP243X_SDRC_SIZE,
111 .type = MT_DEVICE
112 },
113 {
114 .virtual = OMAP243X_SMS_VIRT,
115 .pfn = __phys_to_pfn(OMAP243X_SMS_PHYS),
116 .length = OMAP243X_SMS_SIZE,
117 .type = MT_DEVICE
118 },
119};
120#endif
121#endif
122
Tony Lindgrena8eb7ca2010-02-12 12:26:48 -0800123#ifdef CONFIG_ARCH_OMAP3
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300124static struct map_desc omap34xx_io_desc[] __initdata = {
125 {
126 .virtual = L3_34XX_VIRT,
127 .pfn = __phys_to_pfn(L3_34XX_PHYS),
128 .length = L3_34XX_SIZE,
129 .type = MT_DEVICE
130 },
131 {
132 .virtual = L4_34XX_VIRT,
133 .pfn = __phys_to_pfn(L4_34XX_PHYS),
134 .length = L4_34XX_SIZE,
135 .type = MT_DEVICE
136 },
137 {
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300138 .virtual = OMAP34XX_GPMC_VIRT,
139 .pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
140 .length = OMAP34XX_GPMC_SIZE,
141 .type = MT_DEVICE
142 },
143 {
144 .virtual = OMAP343X_SMS_VIRT,
145 .pfn = __phys_to_pfn(OMAP343X_SMS_PHYS),
146 .length = OMAP343X_SMS_SIZE,
147 .type = MT_DEVICE
148 },
149 {
150 .virtual = OMAP343X_SDRC_VIRT,
151 .pfn = __phys_to_pfn(OMAP343X_SDRC_PHYS),
152 .length = OMAP343X_SDRC_SIZE,
153 .type = MT_DEVICE
154 },
155 {
156 .virtual = L4_PER_34XX_VIRT,
157 .pfn = __phys_to_pfn(L4_PER_34XX_PHYS),
158 .length = L4_PER_34XX_SIZE,
159 .type = MT_DEVICE
160 },
161 {
162 .virtual = L4_EMU_34XX_VIRT,
163 .pfn = __phys_to_pfn(L4_EMU_34XX_PHYS),
164 .length = L4_EMU_34XX_SIZE,
165 .type = MT_DEVICE
166 },
Tony Lindgrena4f57b82010-04-30 12:57:14 -0700167#if defined(CONFIG_DEBUG_LL) && \
168 (defined(CONFIG_MACH_OMAP_ZOOM2) || defined(CONFIG_MACH_OMAP_ZOOM3))
169 {
170 .virtual = ZOOM_UART_VIRT,
171 .pfn = __phys_to_pfn(ZOOM_UART_BASE),
172 .length = SZ_1M,
173 .type = MT_DEVICE
174 },
175#endif
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300176};
177#endif
Hemant Pedanekar01001712011-02-16 08:31:39 -0800178
Hemant Pedanekara9203602011-12-13 10:46:44 -0800179#ifdef CONFIG_SOC_OMAPTI81XX
180static struct map_desc omapti81xx_io_desc[] __initdata = {
Hemant Pedanekar01001712011-02-16 08:31:39 -0800181 {
182 .virtual = L4_34XX_VIRT,
183 .pfn = __phys_to_pfn(L4_34XX_PHYS),
184 .length = L4_34XX_SIZE,
185 .type = MT_DEVICE
Afzal Mohammed1e6cb142011-12-13 10:46:43 -0800186 }
187};
188#endif
189
190#ifdef CONFIG_SOC_OMAPAM33XX
191static struct map_desc omapam33xx_io_desc[] __initdata = {
Hemant Pedanekar01001712011-02-16 08:31:39 -0800192 {
193 .virtual = L4_34XX_VIRT,
194 .pfn = __phys_to_pfn(L4_34XX_PHYS),
195 .length = L4_34XX_SIZE,
196 .type = MT_DEVICE
197 },
Afzal Mohammed1e6cb142011-12-13 10:46:43 -0800198 {
199 .virtual = L4_WK_AM33XX_VIRT,
200 .pfn = __phys_to_pfn(L4_WK_AM33XX_PHYS),
201 .length = L4_WK_AM33XX_SIZE,
202 .type = MT_DEVICE
203 }
Hemant Pedanekar01001712011-02-16 08:31:39 -0800204};
205#endif
206
Santosh Shilimkar44169072009-05-28 14:16:04 -0700207#ifdef CONFIG_ARCH_OMAP4
208static struct map_desc omap44xx_io_desc[] __initdata = {
209 {
210 .virtual = L3_44XX_VIRT,
211 .pfn = __phys_to_pfn(L3_44XX_PHYS),
212 .length = L3_44XX_SIZE,
213 .type = MT_DEVICE,
214 },
215 {
216 .virtual = L4_44XX_VIRT,
217 .pfn = __phys_to_pfn(L4_44XX_PHYS),
218 .length = L4_44XX_SIZE,
219 .type = MT_DEVICE,
220 },
221 {
Santosh Shilimkar44169072009-05-28 14:16:04 -0700222 .virtual = OMAP44XX_GPMC_VIRT,
223 .pfn = __phys_to_pfn(OMAP44XX_GPMC_PHYS),
224 .length = OMAP44XX_GPMC_SIZE,
225 .type = MT_DEVICE,
226 },
227 {
Santosh Shilimkarf5d2d652009-10-19 17:25:57 -0700228 .virtual = OMAP44XX_EMIF1_VIRT,
229 .pfn = __phys_to_pfn(OMAP44XX_EMIF1_PHYS),
230 .length = OMAP44XX_EMIF1_SIZE,
231 .type = MT_DEVICE,
232 },
233 {
234 .virtual = OMAP44XX_EMIF2_VIRT,
235 .pfn = __phys_to_pfn(OMAP44XX_EMIF2_PHYS),
236 .length = OMAP44XX_EMIF2_SIZE,
237 .type = MT_DEVICE,
238 },
239 {
240 .virtual = OMAP44XX_DMM_VIRT,
241 .pfn = __phys_to_pfn(OMAP44XX_DMM_PHYS),
242 .length = OMAP44XX_DMM_SIZE,
243 .type = MT_DEVICE,
244 },
245 {
Santosh Shilimkar44169072009-05-28 14:16:04 -0700246 .virtual = L4_PER_44XX_VIRT,
247 .pfn = __phys_to_pfn(L4_PER_44XX_PHYS),
248 .length = L4_PER_44XX_SIZE,
249 .type = MT_DEVICE,
250 },
251 {
252 .virtual = L4_EMU_44XX_VIRT,
253 .pfn = __phys_to_pfn(L4_EMU_44XX_PHYS),
254 .length = L4_EMU_44XX_SIZE,
255 .type = MT_DEVICE,
256 },
Santosh Shilimkar137d1052011-06-25 18:04:31 -0700257#ifdef CONFIG_OMAP4_ERRATA_I688
258 {
259 .virtual = OMAP4_SRAM_VA,
260 .pfn = __phys_to_pfn(OMAP4_SRAM_PA),
261 .length = PAGE_SIZE,
262 .type = MT_MEMORY_SO,
263 },
264#endif
265
Santosh Shilimkar44169072009-05-28 14:16:04 -0700266};
267#endif
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300268
Tony Lindgren59b479e2011-01-27 16:39:40 -0800269#ifdef CONFIG_SOC_OMAP2420
Aaro Koskinen8185e462010-03-03 16:24:53 +0000270void __init omap242x_map_common_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800271{
272 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
273 iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800274}
275#endif
276
Tony Lindgren59b479e2011-01-27 16:39:40 -0800277#ifdef CONFIG_SOC_OMAP2430
Aaro Koskinen8185e462010-03-03 16:24:53 +0000278void __init omap243x_map_common_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800279{
280 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
281 iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800282}
283#endif
284
Tony Lindgrena8eb7ca2010-02-12 12:26:48 -0800285#ifdef CONFIG_ARCH_OMAP3
Aaro Koskinen8185e462010-03-03 16:24:53 +0000286void __init omap34xx_map_common_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800287{
288 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800289}
290#endif
291
Hemant Pedanekara9203602011-12-13 10:46:44 -0800292#ifdef CONFIG_SOC_OMAPTI81XX
293void __init omapti81xx_map_common_io(void)
Hemant Pedanekar01001712011-02-16 08:31:39 -0800294{
Hemant Pedanekara9203602011-12-13 10:46:44 -0800295 iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
Hemant Pedanekar01001712011-02-16 08:31:39 -0800296}
297#endif
298
Afzal Mohammed1e6cb142011-12-13 10:46:43 -0800299#ifdef CONFIG_SOC_OMAPAM33XX
300void __init omapam33xx_map_common_io(void)
301{
302 iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800303}
304#endif
305
306#ifdef CONFIG_ARCH_OMAP4
Aaro Koskinen8185e462010-03-03 16:24:53 +0000307void __init omap44xx_map_common_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800308{
309 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800310}
311#endif
312
Paul Walmsley2f135ea2009-06-19 19:08:25 -0600313/*
314 * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
315 *
316 * Sets the CORE DPLL3 M2 divider to the same value that it's at
317 * currently. This has the effect of setting the SDRC SDRAM AC timing
318 * registers to the values currently defined by the kernel. Currently
319 * only defined for OMAP3; will return 0 if called on OMAP2. Returns
320 * -EINVAL if the dpll3_m2_ck cannot be found, 0 if called on OMAP2,
321 * or passes along the return value of clk_set_rate().
322 */
323static int __init _omap2_init_reprogram_sdrc(void)
324{
325 struct clk *dpll3_m2_ck;
326 int v = -EINVAL;
327 long rate;
328
329 if (!cpu_is_omap34xx())
330 return 0;
331
332 dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
Aaro Koskinene281f7e2010-11-30 14:17:58 +0000333 if (IS_ERR(dpll3_m2_ck))
Paul Walmsley2f135ea2009-06-19 19:08:25 -0600334 return -EINVAL;
335
336 rate = clk_get_rate(dpll3_m2_ck);
337 pr_info("Reprogramming SDRC clock to %ld Hz\n", rate);
338 v = clk_set_rate(dpll3_m2_ck, rate);
339 if (v)
340 pr_err("dpll3_m2_clk rate change failed: %d\n", v);
341
342 clk_put(dpll3_m2_ck);
343
344 return v;
345}
346
Paul Walmsley2092e5c2010-12-14 12:42:35 -0700347static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
348{
349 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
350}
351
Tony Lindgren7b250af2011-10-04 18:26:28 -0700352static void __init omap_common_init_early(void)
353{
354 omap2_check_revision();
Arnd Bergmanndf804422011-11-01 13:47:27 +0100355 omap_init_consistent_dma_size();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700356}
357
358static void __init omap_hwmod_init_postsetup(void)
Tony Lindgren120db2c2006-04-02 17:46:27 +0100359{
Paul Walmsley2092e5c2010-12-14 12:42:35 -0700360 u8 postsetup_state;
361
Paul Walmsley2092e5c2010-12-14 12:42:35 -0700362 /* Set the default postsetup state for all hwmods */
363#ifdef CONFIG_PM_RUNTIME
364 postsetup_state = _HWMOD_STATE_IDLE;
365#else
366 postsetup_state = _HWMOD_STATE_ENABLED;
367#endif
368 omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state);
Benoit Cousson55d2cb02010-05-12 17:54:36 +0200369
Paul Walmsleyff2516f2010-12-21 15:39:15 -0700370 /*
371 * Set the default postsetup state for unusual modules (like
372 * MPU WDT).
373 *
374 * The postsetup_state is not actually used until
375 * omap_hwmod_late_init(), so boards that desire full watchdog
376 * coverage of kernel initialization can reprogram the
377 * postsetup_state between the calls to
Tony Lindgrena4ca9db2011-08-22 23:57:23 -0700378 * omap2_init_common_infra() and omap_sdrc_init().
Paul Walmsleyff2516f2010-12-21 15:39:15 -0700379 *
380 * XXX ideally we could detect whether the MPU WDT was currently
381 * enabled here and make this conditional
382 */
383 postsetup_state = _HWMOD_STATE_DISABLED;
384 omap_hwmod_for_each_by_class("wd_timer",
385 _set_hwmod_postsetup_state,
386 &postsetup_state);
387
Kevin Hilman53da4ce2010-12-09 09:13:48 -0600388 omap_pm_if_early_init();
Paul Walmsley48057342010-12-21 15:25:10 -0700389}
390
Paul Walmsley16110792012-01-25 12:57:46 -0700391#ifdef CONFIG_SOC_OMAP2420
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700392void __init omap2420_init_early(void)
393{
Tony Lindgren4c3cf902011-10-04 18:17:41 -0700394 omap2_set_globals_242x();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700395 omap_common_init_early();
396 omap2xxx_voltagedomains_init();
397 omap242x_powerdomains_init();
398 omap242x_clockdomains_init();
399 omap2420_hwmod_init();
400 omap_hwmod_init_postsetup();
401 omap2420_clk_init();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700402}
Paul Walmsley16110792012-01-25 12:57:46 -0700403#endif
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700404
Paul Walmsley16110792012-01-25 12:57:46 -0700405#ifdef CONFIG_SOC_OMAP2430
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700406void __init omap2430_init_early(void)
407{
Tony Lindgren4c3cf902011-10-04 18:17:41 -0700408 omap2_set_globals_243x();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700409 omap_common_init_early();
410 omap2xxx_voltagedomains_init();
411 omap243x_powerdomains_init();
412 omap243x_clockdomains_init();
413 omap2430_hwmod_init();
414 omap_hwmod_init_postsetup();
415 omap2430_clk_init();
416}
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530417#endif
Tony Lindgren7b250af2011-10-04 18:26:28 -0700418
419/*
420 * Currently only board-omap3beagle.c should call this because of the
421 * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT.
422 */
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530423#ifdef CONFIG_ARCH_OMAP3
Tony Lindgren7b250af2011-10-04 18:26:28 -0700424void __init omap3_init_early(void)
425{
Tony Lindgren4c3cf902011-10-04 18:17:41 -0700426 omap2_set_globals_3xxx();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700427 omap_common_init_early();
428 omap3xxx_voltagedomains_init();
429 omap3xxx_powerdomains_init();
430 omap3xxx_clockdomains_init();
431 omap3xxx_hwmod_init();
432 omap_hwmod_init_postsetup();
433 omap3xxx_clk_init();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700434}
435
436void __init omap3430_init_early(void)
437{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700438 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700439}
440
441void __init omap35xx_init_early(void)
442{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700443 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700444}
445
446void __init omap3630_init_early(void)
447{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700448 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700449}
450
451void __init am35xx_init_early(void)
452{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700453 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700454}
455
Hemant Pedanekara9203602011-12-13 10:46:44 -0800456void __init ti81xx_init_early(void)
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700457{
Hemant Pedanekara9203602011-12-13 10:46:44 -0800458 omap2_set_globals_ti81xx();
Tony Lindgren4c3cf902011-10-04 18:17:41 -0700459 omap_common_init_early();
460 omap3xxx_voltagedomains_init();
461 omap3xxx_powerdomains_init();
462 omap3xxx_clockdomains_init();
463 omap3xxx_hwmod_init();
464 omap_hwmod_init_postsetup();
465 omap3xxx_clk_init();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700466}
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530467#endif
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700468
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530469#ifdef CONFIG_ARCH_OMAP4
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700470void __init omap4430_init_early(void)
471{
Tony Lindgren4c3cf902011-10-04 18:17:41 -0700472 omap2_set_globals_443x();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700473 omap_common_init_early();
474 omap44xx_voltagedomains_init();
475 omap44xx_powerdomains_init();
476 omap44xx_clockdomains_init();
477 omap44xx_hwmod_init();
478 omap_hwmod_init_postsetup();
479 omap4xxx_clk_init();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700480}
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530481#endif
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700482
Tony Lindgrena4ca9db2011-08-22 23:57:23 -0700483void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
Paul Walmsley48057342010-12-21 15:25:10 -0700484 struct omap_sdrc_params *sdrc_cs1)
485{
Tony Lindgrena66cb342011-10-04 13:52:57 -0700486 omap_sram_init();
487
Hemant Pedanekar01001712011-02-16 08:31:39 -0800488 if (cpu_is_omap24xx() || omap3_has_sdrc()) {
Kevin Hilmanaa4b1f62010-03-10 17:16:31 +0000489 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
490 _omap2_init_reprogram_sdrc();
491 }
Tony Lindgren1dbae812005-11-10 14:26:51 +0000492}
Tony Lindgrendf1e9d12010-12-10 09:46:24 -0800493
494/*
495 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
496 */
497
498u8 omap_readb(u32 pa)
499{
500 return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
501}
502EXPORT_SYMBOL(omap_readb);
503
504u16 omap_readw(u32 pa)
505{
506 return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
507}
508EXPORT_SYMBOL(omap_readw);
509
510u32 omap_readl(u32 pa)
511{
512 return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
513}
514EXPORT_SYMBOL(omap_readl);
515
516void omap_writeb(u8 v, u32 pa)
517{
518 __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
519}
520EXPORT_SYMBOL(omap_writeb);
521
522void omap_writew(u16 v, u32 pa)
523{
524 __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
525}
526EXPORT_SYMBOL(omap_writew);
527
528void omap_writel(u32 v, u32 pa)
529{
530 __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
531}
532EXPORT_SYMBOL(omap_writel);