blob: 17ab5236da6618af1a9ee2ebd32968692b050252 [file] [log] [blame]
Kevin Hilman7c6337e2007-04-30 19:37:19 +01001/*
2 * Debugging macro for DaVinci
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11
Chaithrika U S17eb1572009-01-19 14:13:05 +053012/* Modifications
13 * Jan 2009 Chaithrika U S Added senduart, busyuart, waituart
14 * macros, based on debug-8250.S file
15 * but using 32-bit accesses required for
16 * some davinci devices.
17 */
18
19#include <linux/serial_reg.h>
20#define UART_SHIFT 2
21
Kevin Hilman7c6337e2007-04-30 19:37:19 +010022 .macro addruart, rx
23 mrc p15, 0, \rx, c1, c0
24 tst \rx, #1 @ MMU enabled?
25 moveq \rx, #0x01000000 @ physical base address
26 movne \rx, #0xfe000000 @ virtual base
Mark A. Greer85937902009-06-03 18:41:53 -070027#if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx)
28#error Cannot enable DaVinci and DA8XX platforms concurrently
Sudhakar Rajashekhara0fbc5592009-07-16 06:42:18 -040029#elif defined(CONFIG_MACH_DAVINCI_DA830_EVM) || \
30 defined(CONFIG_MACH_DAVINCI_DA850_EVM)
Mark A. Greer85937902009-06-03 18:41:53 -070031 orr \rx, \rx, #0x00d00000 @ physical base address
32 orr \rx, \rx, #0x0000d000 @ of UART 2
33#else
Kevin Hilman7c6337e2007-04-30 19:37:19 +010034 orr \rx, \rx, #0x00c20000 @ UART 0
Mark A. Greer85937902009-06-03 18:41:53 -070035#endif
Kevin Hilman7c6337e2007-04-30 19:37:19 +010036 .endm
37
Chaithrika U S17eb1572009-01-19 14:13:05 +053038 .macro senduart,rd,rx
39 str \rd, [\rx, #UART_TX << UART_SHIFT]
40 .endm
41
42 .macro busyuart,rd,rx
431002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT]
44 and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
45 teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
46 bne 1002b
47 .endm
48
49 .macro waituart,rd,rx
50#ifdef FLOW_CONTROL
511001: ldr \rd, [\rx, #UART_MSR << UART_SHIFT]
52 tst \rd, #UART_MSR_CTS
53 beq 1001b
54#endif
55 .endm
56