| Steve Muckle | f132c6c | 2012-06-06 18:30:57 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2012 Code Aurora Forum. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #ifndef __ARCH_ARM_MACH_MSM_IOMMU_PAGETABLE_H |
| 14 | #define __ARCH_ARM_MACH_MSM_IOMMU_PAGETABLE_H |
| 15 | |
| 16 | #define NUM_FL_PTE 4096 |
| 17 | #define NUM_SL_PTE 256 |
| 18 | #define NUM_TEX_CLASS 8 |
| 19 | |
| 20 | /* First-level page table bits */ |
| 21 | #define FL_BASE_MASK 0xFFFFFC00 |
| 22 | #define FL_TYPE_TABLE (1 << 0) |
| 23 | #define FL_TYPE_SECT (2 << 0) |
| 24 | #define FL_SUPERSECTION (1 << 18) |
| 25 | #define FL_AP0 (1 << 10) |
| 26 | #define FL_AP1 (1 << 11) |
| 27 | #define FL_AP2 (1 << 15) |
| 28 | #define FL_SHARED (1 << 16) |
| 29 | #define FL_BUFFERABLE (1 << 2) |
| 30 | #define FL_CACHEABLE (1 << 3) |
| 31 | #define FL_TEX0 (1 << 12) |
| 32 | #define FL_OFFSET(va) (((va) & 0xFFF00000) >> 20) |
| 33 | #define FL_NG (1 << 17) |
| 34 | |
| 35 | /* Second-level page table bits */ |
| 36 | #define SL_BASE_MASK_LARGE 0xFFFF0000 |
| 37 | #define SL_BASE_MASK_SMALL 0xFFFFF000 |
| 38 | #define SL_TYPE_LARGE (1 << 0) |
| 39 | #define SL_TYPE_SMALL (2 << 0) |
| 40 | #define SL_AP0 (1 << 4) |
| 41 | #define SL_AP1 (2 << 4) |
| 42 | #define SL_AP2 (1 << 9) |
| 43 | #define SL_SHARED (1 << 10) |
| 44 | #define SL_BUFFERABLE (1 << 2) |
| 45 | #define SL_CACHEABLE (1 << 3) |
| 46 | #define SL_TEX0 (1 << 6) |
| 47 | #define SL_OFFSET(va) (((va) & 0xFF000) >> 12) |
| 48 | #define SL_NG (1 << 11) |
| 49 | |
| 50 | /* Memory type and cache policy attributes */ |
| 51 | #define MT_SO 0 |
| 52 | #define MT_DEV 1 |
| 53 | #define MT_NORMAL 2 |
| 54 | #define CP_NONCACHED 0 |
| 55 | #define CP_WB_WA 1 |
| 56 | #define CP_WT 2 |
| 57 | #define CP_WB_NWA 3 |
| 58 | |
| 59 | /* TEX Remap Registers */ |
| 60 | #define NMRR_ICP(nmrr, n) (((nmrr) & (3 << ((n) * 2))) >> ((n) * 2)) |
| 61 | #define NMRR_OCP(nmrr, n) (((nmrr) & (3 << ((n) * 2 + 16))) >> ((n) * 2 + 16)) |
| 62 | |
| 63 | #define PRRR_NOS(prrr, n) ((prrr) & (1 << ((n) + 24)) ? 1 : 0) |
| 64 | #define PRRR_MT(prrr, n) ((((prrr) & (3 << ((n) * 2))) >> ((n) * 2))) |
| 65 | |
| 66 | #define MRC(reg, processor, op1, crn, crm, op2) \ |
| 67 | __asm__ __volatile__ ( \ |
| 68 | " mrc " #processor "," #op1 ", %0," #crn "," #crm "," #op2 "\n" \ |
| 69 | : "=r" (reg)) |
| 70 | |
| 71 | #define RCP15_PRRR(reg) MRC(reg, p15, 0, c10, c2, 0) |
| 72 | #define RCP15_NMRR(reg) MRC(reg, p15, 0, c10, c2, 1) |
| 73 | |
| 74 | struct iommu_pt { |
| 75 | unsigned long *fl_table; |
| 76 | int redirect; |
| 77 | }; |
| 78 | |
| 79 | void msm_iommu_pagetable_init(void); |
| 80 | int msm_iommu_pagetable_alloc(struct iommu_pt *pt); |
| 81 | void msm_iommu_pagetable_free(struct iommu_pt *pt); |
| 82 | int msm_iommu_pagetable_map(struct iommu_pt *pt, unsigned long va, |
| 83 | phys_addr_t pa, size_t len, int prot); |
| 84 | size_t msm_iommu_pagetable_unmap(struct iommu_pt *pt, unsigned long va, |
| 85 | size_t len); |
| 86 | int msm_iommu_pagetable_map_range(struct iommu_pt *pt, unsigned int va, |
| 87 | struct scatterlist *sg, unsigned int len, int prot); |
| 88 | void msm_iommu_pagetable_unmap_range(struct iommu_pt *pt, unsigned int va, |
| 89 | unsigned int len); |
| 90 | #endif |