| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * include/asm-v850/v850e_timer_d.h -- `Timer D' component often used |
| 3 | * with the V850E cpu core |
| 4 | * |
| 5 | * Copyright (C) 2001,02,03 NEC Electronics Corporation |
| 6 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> |
| 7 | * |
| 8 | * This file is subject to the terms and conditions of the GNU General |
| 9 | * Public License. See the file COPYING in the main directory of this |
| 10 | * archive for more details. |
| 11 | * |
| 12 | * Written by Miles Bader <miles@gnu.org> |
| 13 | */ |
| 14 | |
| 15 | #ifndef __V850_V850E_TIMER_D_H__ |
| 16 | #define __V850_V850E_TIMER_D_H__ |
| 17 | |
| 18 | #include <asm/types.h> |
| 19 | #include <asm/machdep.h> /* Pick up chip-specific defs. */ |
| 20 | |
| 21 | |
| 22 | /* Timer D (16-bit interval timers). */ |
| 23 | |
| 24 | /* Count registers for timer D. */ |
| 25 | #define V850E_TIMER_D_TMD_ADDR(n) (V850E_TIMER_D_TMD_BASE_ADDR + 0x10 * (n)) |
| 26 | #define V850E_TIMER_D_TMD(n) (*(volatile u16 *)V850E_TIMER_D_TMD_ADDR(n)) |
| 27 | |
| 28 | /* Count compare registers for timer D. */ |
| 29 | #define V850E_TIMER_D_CMD_ADDR(n) (V850E_TIMER_D_CMD_BASE_ADDR + 0x10 * (n)) |
| 30 | #define V850E_TIMER_D_CMD(n) (*(volatile u16 *)V850E_TIMER_D_CMD_ADDR(n)) |
| 31 | |
| 32 | /* Control registers for timer D. */ |
| 33 | #define V850E_TIMER_D_TMCD_ADDR(n) (V850E_TIMER_D_TMCD_BASE_ADDR + 0x10 * (n)) |
| 34 | #define V850E_TIMER_D_TMCD(n) (*(volatile u8 *)V850E_TIMER_D_TMCD_ADDR(n)) |
| 35 | /* Control bits for timer D. */ |
| 36 | #define V850E_TIMER_D_TMCD_CE 0x2 /* count enable */ |
| 37 | #define V850E_TIMER_D_TMCD_CAE 0x1 /* clock action enable */ |
| 38 | /* Clock divider setting (log2). */ |
| 39 | #define V850E_TIMER_D_TMCD_CS(divlog2) (((divlog2) - V850E_TIMER_D_TMCD_CS_MIN) << 4) |
| 40 | /* Minimum clock divider setting (log2). */ |
| 41 | #ifndef V850E_TIMER_D_TMCD_CS_MIN /* Can be overridden by mach-specific hdrs */ |
| 42 | #define V850E_TIMER_D_TMCD_CS_MIN 2 /* Default is correct for the v850e/ma1 */ |
| 43 | #endif |
| 44 | /* Maximum clock divider setting (log2). */ |
| 45 | #define V850E_TIMER_D_TMCD_CS_MAX (V850E_TIMER_D_TMCD_CS_MIN + 7) |
| 46 | |
| 47 | /* Return the clock-divider (log2) of timer D unit N. */ |
| 48 | #define V850E_TIMER_D_DIVLOG2(n) \ |
| 49 | (((V850E_TIMER_D_TMCD(n) >> 4) & 0x7) + V850E_TIMER_D_TMCD_CS_MIN) |
| 50 | |
| 51 | |
| 52 | #ifndef __ASSEMBLY__ |
| 53 | |
| 54 | /* Start interval timer TIMER (0-3). The timer will issue the |
| 55 | corresponding INTCMD interrupt RATE times per second. This function |
| 56 | does not enable the interrupt. */ |
| 57 | extern void v850e_timer_d_configure (unsigned timer, unsigned rate); |
| 58 | |
| 59 | #endif /* !__ASSEMBLY__ */ |
| 60 | |
| 61 | |
| 62 | #endif /* __V850_V850E_TIMER_D_H__ */ |