| Graf Yang | 0b39db2 | 2009-12-28 11:13:51 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2007-2009 Analog Devices Inc. |
| 3 | * Graff Yang <graf.yang@analog.com> |
| 4 | * |
| 5 | * Licensed under the GPL-2 or later. |
| 6 | */ |
| 7 | |
| 8 | #include <asm/blackfin.h> |
| 9 | #include <asm/smp.h> |
| 10 | #define SIC_SYSIRQ(irq) (irq - (IRQ_CORETMR + 1)) |
| 11 | |
| 12 | int hotplug_coreb; |
| 13 | |
| 14 | void platform_cpu_die(void) |
| 15 | { |
| 16 | unsigned long iwr[2] = {0, 0}; |
| 17 | unsigned long bank = SIC_SYSIRQ(IRQ_SUPPLE_0) / 32; |
| 18 | unsigned long bit = 1 << (SIC_SYSIRQ(IRQ_SUPPLE_0) % 32); |
| 19 | |
| 20 | hotplug_coreb = 1; |
| 21 | |
| 22 | iwr[bank] = bit; |
| 23 | |
| 24 | /* disable core timer */ |
| 25 | bfin_write_TCNTL(0); |
| 26 | |
| 27 | /* clear ipi interrupt IRQ_SUPPLE_0 */ |
| 28 | bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + 1))); |
| 29 | SSYNC(); |
| 30 | |
| 31 | coreb_sleep(iwr[0], iwr[1], 0); |
| 32 | } |