Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 1 | #ifndef _BFIN_PTRACE_H |
| 2 | #define _BFIN_PTRACE_H |
| 3 | |
| 4 | /* |
| 5 | * GCC defines register number like this: |
| 6 | * ----------------------------- |
| 7 | * 0 - 7 are data registers R0-R7 |
| 8 | * 8 - 15 are address registers P0-P7 |
| 9 | * 16 - 31 dsp registers I/B/L0 -- I/B/L3 & M0--M3 |
| 10 | * 32 - 33 A registers A0 & A1 |
| 11 | * 34 - status register |
| 12 | * ----------------------------- |
| 13 | * |
| 14 | * We follows above, except: |
| 15 | * 32-33 --- Low 32-bit of A0&1 |
| 16 | * 34-35 --- High 8-bit of A0&1 |
| 17 | */ |
| 18 | |
| 19 | #ifndef __ASSEMBLY__ |
| 20 | |
| 21 | /* this struct defines the way the registers are stored on the |
| 22 | stack during a system call. */ |
| 23 | |
| 24 | struct pt_regs { |
| 25 | long orig_pc; |
| 26 | long ipend; |
| 27 | long seqstat; |
| 28 | long rete; |
| 29 | long retn; |
| 30 | long retx; |
| 31 | long pc; /* PC == RETI */ |
| 32 | long rets; |
| 33 | long reserved; /* Used as scratch during system calls */ |
| 34 | long astat; |
| 35 | long lb1; |
| 36 | long lb0; |
| 37 | long lt1; |
| 38 | long lt0; |
| 39 | long lc1; |
| 40 | long lc0; |
| 41 | long a1w; |
| 42 | long a1x; |
| 43 | long a0w; |
| 44 | long a0x; |
| 45 | long b3; |
| 46 | long b2; |
| 47 | long b1; |
| 48 | long b0; |
| 49 | long l3; |
| 50 | long l2; |
| 51 | long l1; |
| 52 | long l0; |
| 53 | long m3; |
| 54 | long m2; |
| 55 | long m1; |
| 56 | long m0; |
| 57 | long i3; |
| 58 | long i2; |
| 59 | long i1; |
| 60 | long i0; |
| 61 | long usp; |
| 62 | long fp; |
| 63 | long p5; |
| 64 | long p4; |
| 65 | long p3; |
| 66 | long p2; |
| 67 | long p1; |
| 68 | long p0; |
| 69 | long r7; |
| 70 | long r6; |
| 71 | long r5; |
| 72 | long r4; |
| 73 | long r3; |
| 74 | long r2; |
| 75 | long r1; |
| 76 | long r0; |
| 77 | long orig_r0; |
| 78 | long orig_p0; |
| 79 | long syscfg; |
| 80 | }; |
| 81 | |
| 82 | /* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ |
| 83 | #define PTRACE_GETREGS 12 |
| 84 | #define PTRACE_SETREGS 13 /* ptrace signal */ |
| 85 | |
| 86 | #ifdef CONFIG_BINFMT_ELF_FDPIC |
| 87 | #define PTRACE_GETFDPIC 31 |
| 88 | #define PTRACE_GETFDPIC_EXEC 0 |
| 89 | #define PTRACE_GETFDPIC_INTERP 1 |
| 90 | #endif |
| 91 | |
| 92 | #define PS_S (0x0002) |
| 93 | |
| 94 | /* user_mode returns true if only one bit is set in IPEND, other than the |
| 95 | master interrupt enable. */ |
| 96 | #define user_mode(regs) (!(((regs)->ipend & ~0x10) & (((regs)->ipend & ~0x10) - 1))) |
| 97 | #define instruction_pointer(regs) ((regs)->pc) |
| 98 | #define profile_pc(regs) instruction_pointer(regs) |
| 99 | extern void show_regs(struct pt_regs *); |
| 100 | |
| 101 | #endif /* __ASSEMBLY__ */ |
| 102 | |
| 103 | /* |
| 104 | * Offsets used by 'ptrace' system call interface. |
| 105 | */ |
| 106 | |
| 107 | #define PT_R0 204 |
| 108 | #define PT_R1 200 |
| 109 | #define PT_R2 196 |
| 110 | #define PT_R3 192 |
| 111 | #define PT_R4 188 |
| 112 | #define PT_R5 184 |
| 113 | #define PT_R6 180 |
| 114 | #define PT_R7 176 |
| 115 | #define PT_P0 172 |
| 116 | #define PT_P1 168 |
| 117 | #define PT_P2 164 |
| 118 | #define PT_P3 160 |
| 119 | #define PT_P4 156 |
| 120 | #define PT_P5 152 |
| 121 | #define PT_FP 148 |
| 122 | #define PT_USP 144 |
| 123 | #define PT_I0 140 |
| 124 | #define PT_I1 136 |
| 125 | #define PT_I2 132 |
| 126 | #define PT_I3 128 |
| 127 | #define PT_M0 124 |
| 128 | #define PT_M1 120 |
| 129 | #define PT_M2 116 |
| 130 | #define PT_M3 112 |
| 131 | #define PT_L0 108 |
| 132 | #define PT_L1 104 |
| 133 | #define PT_L2 100 |
| 134 | #define PT_L3 96 |
| 135 | #define PT_B0 92 |
| 136 | #define PT_B1 88 |
| 137 | #define PT_B2 84 |
| 138 | #define PT_B3 80 |
| 139 | #define PT_A0X 76 |
| 140 | #define PT_A0W 72 |
| 141 | #define PT_A1X 68 |
| 142 | #define PT_A1W 64 |
| 143 | #define PT_LC0 60 |
| 144 | #define PT_LC1 56 |
| 145 | #define PT_LT0 52 |
| 146 | #define PT_LT1 48 |
| 147 | #define PT_LB0 44 |
| 148 | #define PT_LB1 40 |
| 149 | #define PT_ASTAT 36 |
| 150 | #define PT_RESERVED 32 |
| 151 | #define PT_RETS 28 |
| 152 | #define PT_PC 24 |
| 153 | #define PT_RETX 20 |
| 154 | #define PT_RETN 16 |
| 155 | #define PT_RETE 12 |
| 156 | #define PT_SEQSTAT 8 |
| 157 | #define PT_IPEND 4 |
| 158 | |
| 159 | #define PT_SYSCFG 216 |
| 160 | #define PT_TEXT_ADDR 220 |
| 161 | #define PT_TEXT_END_ADDR 224 |
| 162 | #define PT_DATA_ADDR 228 |
| 163 | #define PT_FDPIC_EXEC 232 |
| 164 | #define PT_FDPIC_INTERP 236 |
| 165 | |
| 166 | #endif /* _BFIN_PTRACE_H */ |