Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 1 | /* linux/drivers/spi/spi_s3c24xx.c |
| 2 | * |
| 3 | * Copyright (c) 2006 Ben Dooks |
| 4 | * Copyright (c) 2006 Simtec Electronics |
| 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | */ |
| 12 | |
| 13 | |
| 14 | //#define DEBUG |
| 15 | |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 16 | #include <linux/init.h> |
| 17 | #include <linux/spinlock.h> |
| 18 | #include <linux/workqueue.h> |
| 19 | #include <linux/interrupt.h> |
| 20 | #include <linux/delay.h> |
| 21 | #include <linux/errno.h> |
| 22 | #include <linux/err.h> |
| 23 | #include <linux/clk.h> |
| 24 | #include <linux/platform_device.h> |
| 25 | |
| 26 | #include <linux/spi/spi.h> |
| 27 | #include <linux/spi/spi_bitbang.h> |
| 28 | |
| 29 | #include <asm/io.h> |
| 30 | #include <asm/dma.h> |
| 31 | #include <asm/hardware.h> |
| 32 | |
| 33 | #include <asm/arch/regs-gpio.h> |
| 34 | #include <asm/arch/regs-spi.h> |
| 35 | #include <asm/arch/spi.h> |
| 36 | |
| 37 | struct s3c24xx_spi { |
| 38 | /* bitbang has to be first */ |
| 39 | struct spi_bitbang bitbang; |
| 40 | struct completion done; |
| 41 | |
| 42 | void __iomem *regs; |
| 43 | int irq; |
| 44 | int len; |
| 45 | int count; |
| 46 | |
| 47 | /* data buffers */ |
| 48 | const unsigned char *tx; |
| 49 | unsigned char *rx; |
| 50 | |
| 51 | struct clk *clk; |
| 52 | struct resource *ioarea; |
| 53 | struct spi_master *master; |
| 54 | struct spi_device *curdev; |
| 55 | struct device *dev; |
| 56 | struct s3c2410_spi_info *pdata; |
| 57 | }; |
| 58 | |
| 59 | #define SPCON_DEFAULT (S3C2410_SPCON_MSTR | S3C2410_SPCON_SMOD_INT) |
| 60 | #define SPPIN_DEFAULT (S3C2410_SPPIN_KEEP) |
| 61 | |
| 62 | static inline struct s3c24xx_spi *to_hw(struct spi_device *sdev) |
| 63 | { |
| 64 | return spi_master_get_devdata(sdev->master); |
| 65 | } |
| 66 | |
| 67 | static void s3c24xx_spi_chipsel(struct spi_device *spi, int value) |
| 68 | { |
| 69 | struct s3c24xx_spi *hw = to_hw(spi); |
| 70 | unsigned int cspol = spi->mode & SPI_CS_HIGH ? 1 : 0; |
| 71 | unsigned int spcon; |
| 72 | |
| 73 | switch (value) { |
| 74 | case BITBANG_CS_INACTIVE: |
| 75 | if (hw->pdata->set_cs) |
| 76 | hw->pdata->set_cs(hw->pdata, value, cspol); |
| 77 | else |
| 78 | s3c2410_gpio_setpin(hw->pdata->pin_cs, cspol ^ 1); |
| 79 | break; |
| 80 | |
| 81 | case BITBANG_CS_ACTIVE: |
| 82 | spcon = readb(hw->regs + S3C2410_SPCON); |
| 83 | |
| 84 | if (spi->mode & SPI_CPHA) |
| 85 | spcon |= S3C2410_SPCON_CPHA_FMTB; |
| 86 | else |
| 87 | spcon &= ~S3C2410_SPCON_CPHA_FMTB; |
| 88 | |
| 89 | if (spi->mode & SPI_CPOL) |
| 90 | spcon |= S3C2410_SPCON_CPOL_HIGH; |
| 91 | else |
| 92 | spcon &= ~S3C2410_SPCON_CPOL_HIGH; |
| 93 | |
| 94 | spcon |= S3C2410_SPCON_ENSCK; |
| 95 | |
| 96 | /* write new configration */ |
| 97 | |
| 98 | writeb(spcon, hw->regs + S3C2410_SPCON); |
| 99 | |
| 100 | if (hw->pdata->set_cs) |
| 101 | hw->pdata->set_cs(hw->pdata, value, cspol); |
| 102 | else |
| 103 | s3c2410_gpio_setpin(hw->pdata->pin_cs, cspol); |
| 104 | |
| 105 | break; |
| 106 | |
| 107 | } |
| 108 | } |
| 109 | |
| 110 | static int s3c24xx_spi_setupxfer(struct spi_device *spi, |
| 111 | struct spi_transfer *t) |
| 112 | { |
| 113 | struct s3c24xx_spi *hw = to_hw(spi); |
| 114 | unsigned int bpw; |
| 115 | unsigned int hz; |
| 116 | unsigned int div; |
| 117 | |
| 118 | bpw = t ? t->bits_per_word : spi->bits_per_word; |
| 119 | hz = t ? t->speed_hz : spi->max_speed_hz; |
| 120 | |
| 121 | if (bpw != 8) { |
| 122 | dev_err(&spi->dev, "invalid bits-per-word (%d)\n", bpw); |
| 123 | return -EINVAL; |
| 124 | } |
| 125 | |
| 126 | div = clk_get_rate(hw->clk) / hz; |
| 127 | |
| 128 | /* is clk = pclk / (2 * (pre+1)), or is it |
| 129 | * clk = (pclk * 2) / ( pre + 1) */ |
| 130 | |
| 131 | div = (div / 2) - 1; |
| 132 | |
| 133 | if (div < 0) |
| 134 | div = 1; |
| 135 | |
| 136 | if (div > 255) |
| 137 | div = 255; |
| 138 | |
| 139 | dev_dbg(&spi->dev, "setting pre-scaler to %d (hz %d)\n", div, hz); |
| 140 | writeb(div, hw->regs + S3C2410_SPPRE); |
| 141 | |
| 142 | spin_lock(&hw->bitbang.lock); |
| 143 | if (!hw->bitbang.busy) { |
| 144 | hw->bitbang.chipselect(spi, BITBANG_CS_INACTIVE); |
| 145 | /* need to ndelay for 0.5 clocktick ? */ |
| 146 | } |
| 147 | spin_unlock(&hw->bitbang.lock); |
| 148 | |
| 149 | return 0; |
| 150 | } |
| 151 | |
| 152 | static int s3c24xx_spi_setup(struct spi_device *spi) |
| 153 | { |
| 154 | int ret; |
| 155 | |
| 156 | if (!spi->bits_per_word) |
| 157 | spi->bits_per_word = 8; |
| 158 | |
| 159 | if ((spi->mode & SPI_LSB_FIRST) != 0) |
| 160 | return -EINVAL; |
| 161 | |
| 162 | ret = s3c24xx_spi_setupxfer(spi, NULL); |
| 163 | if (ret < 0) { |
| 164 | dev_err(&spi->dev, "setupxfer returned %d\n", ret); |
| 165 | return ret; |
| 166 | } |
| 167 | |
| 168 | dev_dbg(&spi->dev, "%s: mode %d, %u bpw, %d hz\n", |
| 169 | __FUNCTION__, spi->mode, spi->bits_per_word, |
| 170 | spi->max_speed_hz); |
| 171 | |
| 172 | return 0; |
| 173 | } |
| 174 | |
| 175 | static inline unsigned int hw_txbyte(struct s3c24xx_spi *hw, int count) |
| 176 | { |
| 177 | return hw->tx ? hw->tx[count] : 0xff; |
| 178 | } |
| 179 | |
| 180 | static int s3c24xx_spi_txrx(struct spi_device *spi, struct spi_transfer *t) |
| 181 | { |
| 182 | struct s3c24xx_spi *hw = to_hw(spi); |
| 183 | |
| 184 | dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n", |
| 185 | t->tx_buf, t->rx_buf, t->len); |
| 186 | |
| 187 | hw->tx = t->tx_buf; |
| 188 | hw->rx = t->rx_buf; |
| 189 | hw->len = t->len; |
| 190 | hw->count = 0; |
| 191 | |
| 192 | /* send the first byte */ |
| 193 | writeb(hw_txbyte(hw, 0), hw->regs + S3C2410_SPTDAT); |
| 194 | wait_for_completion(&hw->done); |
| 195 | |
| 196 | return hw->count; |
| 197 | } |
| 198 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 199 | static irqreturn_t s3c24xx_spi_irq(int irq, void *dev) |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 200 | { |
| 201 | struct s3c24xx_spi *hw = dev; |
| 202 | unsigned int spsta = readb(hw->regs + S3C2410_SPSTA); |
| 203 | unsigned int count = hw->count; |
| 204 | |
| 205 | if (spsta & S3C2410_SPSTA_DCOL) { |
| 206 | dev_dbg(hw->dev, "data-collision\n"); |
| 207 | complete(&hw->done); |
| 208 | goto irq_done; |
| 209 | } |
| 210 | |
| 211 | if (!(spsta & S3C2410_SPSTA_READY)) { |
| 212 | dev_dbg(hw->dev, "spi not ready for tx?\n"); |
| 213 | complete(&hw->done); |
| 214 | goto irq_done; |
| 215 | } |
| 216 | |
| 217 | hw->count++; |
| 218 | |
| 219 | if (hw->rx) |
| 220 | hw->rx[count] = readb(hw->regs + S3C2410_SPRDAT); |
| 221 | |
| 222 | count++; |
| 223 | |
| 224 | if (count < hw->len) |
| 225 | writeb(hw_txbyte(hw, count), hw->regs + S3C2410_SPTDAT); |
| 226 | else |
| 227 | complete(&hw->done); |
| 228 | |
| 229 | irq_done: |
| 230 | return IRQ_HANDLED; |
| 231 | } |
| 232 | |
| 233 | static int s3c24xx_spi_probe(struct platform_device *pdev) |
| 234 | { |
| 235 | struct s3c24xx_spi *hw; |
| 236 | struct spi_master *master; |
| 237 | struct spi_board_info *bi; |
| 238 | struct resource *res; |
| 239 | int err = 0; |
| 240 | int i; |
| 241 | |
| 242 | master = spi_alloc_master(&pdev->dev, sizeof(struct s3c24xx_spi)); |
| 243 | if (master == NULL) { |
| 244 | dev_err(&pdev->dev, "No memory for spi_master\n"); |
| 245 | err = -ENOMEM; |
| 246 | goto err_nomem; |
| 247 | } |
| 248 | |
| 249 | hw = spi_master_get_devdata(master); |
| 250 | memset(hw, 0, sizeof(struct s3c24xx_spi)); |
| 251 | |
| 252 | hw->master = spi_master_get(master); |
| 253 | hw->pdata = pdev->dev.platform_data; |
| 254 | hw->dev = &pdev->dev; |
| 255 | |
| 256 | if (hw->pdata == NULL) { |
| 257 | dev_err(&pdev->dev, "No platform data supplied\n"); |
| 258 | err = -ENOENT; |
| 259 | goto err_no_pdata; |
| 260 | } |
| 261 | |
| 262 | platform_set_drvdata(pdev, hw); |
| 263 | init_completion(&hw->done); |
| 264 | |
| 265 | /* setup the state for the bitbang driver */ |
| 266 | |
| 267 | hw->bitbang.master = hw->master; |
| 268 | hw->bitbang.setup_transfer = s3c24xx_spi_setupxfer; |
| 269 | hw->bitbang.chipselect = s3c24xx_spi_chipsel; |
| 270 | hw->bitbang.txrx_bufs = s3c24xx_spi_txrx; |
| 271 | hw->bitbang.master->setup = s3c24xx_spi_setup; |
| 272 | |
| 273 | dev_dbg(hw->dev, "bitbang at %p\n", &hw->bitbang); |
| 274 | |
| 275 | /* find and map our resources */ |
| 276 | |
| 277 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 278 | if (res == NULL) { |
| 279 | dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n"); |
| 280 | err = -ENOENT; |
| 281 | goto err_no_iores; |
| 282 | } |
| 283 | |
| 284 | hw->ioarea = request_mem_region(res->start, (res->end - res->start)+1, |
| 285 | pdev->name); |
| 286 | |
| 287 | if (hw->ioarea == NULL) { |
| 288 | dev_err(&pdev->dev, "Cannot reserve region\n"); |
| 289 | err = -ENXIO; |
| 290 | goto err_no_iores; |
| 291 | } |
| 292 | |
| 293 | hw->regs = ioremap(res->start, (res->end - res->start)+1); |
| 294 | if (hw->regs == NULL) { |
| 295 | dev_err(&pdev->dev, "Cannot map IO\n"); |
| 296 | err = -ENXIO; |
| 297 | goto err_no_iomap; |
| 298 | } |
| 299 | |
| 300 | hw->irq = platform_get_irq(pdev, 0); |
| 301 | if (hw->irq < 0) { |
| 302 | dev_err(&pdev->dev, "No IRQ specified\n"); |
| 303 | err = -ENOENT; |
| 304 | goto err_no_irq; |
| 305 | } |
| 306 | |
| 307 | err = request_irq(hw->irq, s3c24xx_spi_irq, 0, pdev->name, hw); |
| 308 | if (err) { |
| 309 | dev_err(&pdev->dev, "Cannot claim IRQ\n"); |
| 310 | goto err_no_irq; |
| 311 | } |
| 312 | |
| 313 | hw->clk = clk_get(&pdev->dev, "spi"); |
| 314 | if (IS_ERR(hw->clk)) { |
| 315 | dev_err(&pdev->dev, "No clock for device\n"); |
| 316 | err = PTR_ERR(hw->clk); |
| 317 | goto err_no_clk; |
| 318 | } |
| 319 | |
| 320 | /* for the moment, permanently enable the clock */ |
| 321 | |
| 322 | clk_enable(hw->clk); |
| 323 | |
| 324 | /* program defaults into the registers */ |
| 325 | |
| 326 | writeb(0xff, hw->regs + S3C2410_SPPRE); |
| 327 | writeb(SPPIN_DEFAULT, hw->regs + S3C2410_SPPIN); |
| 328 | writeb(SPCON_DEFAULT, hw->regs + S3C2410_SPCON); |
| 329 | |
| 330 | /* setup any gpio we can */ |
| 331 | |
| 332 | if (!hw->pdata->set_cs) { |
| 333 | s3c2410_gpio_setpin(hw->pdata->pin_cs, 1); |
| 334 | s3c2410_gpio_cfgpin(hw->pdata->pin_cs, S3C2410_GPIO_OUTPUT); |
| 335 | } |
| 336 | |
| 337 | /* register our spi controller */ |
| 338 | |
| 339 | err = spi_bitbang_start(&hw->bitbang); |
| 340 | if (err) { |
| 341 | dev_err(&pdev->dev, "Failed to register SPI master\n"); |
| 342 | goto err_register; |
| 343 | } |
| 344 | |
| 345 | dev_dbg(hw->dev, "shutdown=%d\n", hw->bitbang.shutdown); |
| 346 | |
| 347 | /* register all the devices associated */ |
| 348 | |
| 349 | bi = &hw->pdata->board_info[0]; |
| 350 | for (i = 0; i < hw->pdata->board_size; i++, bi++) { |
| 351 | dev_info(hw->dev, "registering %s\n", bi->modalias); |
| 352 | |
| 353 | bi->controller_data = hw; |
| 354 | spi_new_device(master, bi); |
| 355 | } |
| 356 | |
| 357 | return 0; |
| 358 | |
| 359 | err_register: |
| 360 | clk_disable(hw->clk); |
| 361 | clk_put(hw->clk); |
| 362 | |
| 363 | err_no_clk: |
| 364 | free_irq(hw->irq, hw); |
| 365 | |
| 366 | err_no_irq: |
| 367 | iounmap(hw->regs); |
| 368 | |
| 369 | err_no_iomap: |
| 370 | release_resource(hw->ioarea); |
| 371 | kfree(hw->ioarea); |
| 372 | |
| 373 | err_no_iores: |
| 374 | err_no_pdata: |
| 375 | spi_master_put(hw->master);; |
| 376 | |
| 377 | err_nomem: |
| 378 | return err; |
| 379 | } |
| 380 | |
| 381 | static int s3c24xx_spi_remove(struct platform_device *dev) |
| 382 | { |
| 383 | struct s3c24xx_spi *hw = platform_get_drvdata(dev); |
| 384 | |
| 385 | platform_set_drvdata(dev, NULL); |
| 386 | |
| 387 | spi_unregister_master(hw->master); |
| 388 | |
| 389 | clk_disable(hw->clk); |
| 390 | clk_put(hw->clk); |
| 391 | |
| 392 | free_irq(hw->irq, hw); |
| 393 | iounmap(hw->regs); |
| 394 | |
| 395 | release_resource(hw->ioarea); |
| 396 | kfree(hw->ioarea); |
| 397 | |
| 398 | spi_master_put(hw->master); |
| 399 | return 0; |
| 400 | } |
| 401 | |
| 402 | |
| 403 | #ifdef CONFIG_PM |
| 404 | |
| 405 | static int s3c24xx_spi_suspend(struct platform_device *pdev, pm_message_t msg) |
| 406 | { |
Ben Dooks | ac88bcf | 2006-05-25 18:44:25 -0700 | [diff] [blame] | 407 | struct s3c24xx_spi *hw = platform_get_drvdata(pdev); |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 408 | |
| 409 | clk_disable(hw->clk); |
| 410 | return 0; |
| 411 | } |
| 412 | |
| 413 | static int s3c24xx_spi_resume(struct platform_device *pdev) |
| 414 | { |
Ben Dooks | ac88bcf | 2006-05-25 18:44:25 -0700 | [diff] [blame] | 415 | struct s3c24xx_spi *hw = platform_get_drvdata(pdev); |
Ben Dooks | 7fba534 | 2006-05-20 15:00:18 -0700 | [diff] [blame] | 416 | |
| 417 | clk_enable(hw->clk); |
| 418 | return 0; |
| 419 | } |
| 420 | |
| 421 | #else |
| 422 | #define s3c24xx_spi_suspend NULL |
| 423 | #define s3c24xx_spi_resume NULL |
| 424 | #endif |
| 425 | |
| 426 | static struct platform_driver s3c24xx_spidrv = { |
| 427 | .probe = s3c24xx_spi_probe, |
| 428 | .remove = s3c24xx_spi_remove, |
| 429 | .suspend = s3c24xx_spi_suspend, |
| 430 | .resume = s3c24xx_spi_resume, |
| 431 | .driver = { |
| 432 | .name = "s3c2410-spi", |
| 433 | .owner = THIS_MODULE, |
| 434 | }, |
| 435 | }; |
| 436 | |
| 437 | static int __init s3c24xx_spi_init(void) |
| 438 | { |
| 439 | return platform_driver_register(&s3c24xx_spidrv); |
| 440 | } |
| 441 | |
| 442 | static void __exit s3c24xx_spi_exit(void) |
| 443 | { |
| 444 | platform_driver_unregister(&s3c24xx_spidrv); |
| 445 | } |
| 446 | |
| 447 | module_init(s3c24xx_spi_init); |
| 448 | module_exit(s3c24xx_spi_exit); |
| 449 | |
| 450 | MODULE_DESCRIPTION("S3C24XX SPI Driver"); |
| 451 | MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); |
| 452 | MODULE_LICENSE("GPL"); |