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gerrit-public.fairphone.software / kernel / msm / 31c1ec9282d28f4eecb5f2e431f67accdf420ac2 / . / arch / arm / boot / dts / tegra-ventana.dts
blob: 5ac0aa300fe033206f6edc6cf9221c2761255352 [file] [log] [blame]
Peter De Schrijveradd29e62011-10-12 14:53:05 +0300[diff] [blame]1/dts-v1/;
2
Peter De Schrijveradd29e62011-10-12 14:53:05 +0300[diff] [blame]3/include/ "tegra20.dtsi"
4
5/ {
6 model = "NVIDIA Tegra2 Ventana evaluation board";
7 compatible = "nvidia,ventana", "nvidia,tegra20";
8
Peter De Schrijveradd29e62011-10-12 14:53:05 +0300[diff] [blame]9 memory {
10 reg = < 0x00000000 0x40000000 >;
11 };
12
Stephen Warren88950f32011-11-21 14:44:09 -0700[diff] [blame]13 i2c@7000c000 {
14 clock-frequency = <400000>;
15 };
16
17 i2c@7000c400 {
18 clock-frequency = <400000>;
19 };
20
21 i2c@7000c500 {
22 clock-frequency = <400000>;
23 };
24
25 i2c@7000d000 {
26 clock-frequency = <400000>;
27 };
28
Stephen Warren31c1ec92011-11-21 14:44:10 -0700[diff] [blame^]29 serial@70006000 {
30 status = "disable";
31 };
32
33 serial@70006040 {
34 status = "disable";
35 };
36
37 serial@70006200 {
38 status = "disable";
39 };
40
Peter De Schrijveradd29e62011-10-12 14:53:05 +0300[diff] [blame]41 serial@70006300 {
42 clock-frequency = < 216000000 >;
43 };
44
Stephen Warren31c1ec92011-11-21 14:44:10 -0700[diff] [blame^]45 serial@70006400 {
46 status = "disable";
47 };
48
Peter De Schrijveradd29e62011-10-12 14:53:05 +0300[diff] [blame]49 sdhci@c8000400 {
50 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
51 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
Stephen Warrenc406eeb2011-10-19 06:53:57 +0000[diff] [blame]52 power-gpios = <&gpio 70 0>; /* gpio PI6 */
Peter De Schrijveradd29e62011-10-12 14:53:05 +0300[diff] [blame]53 };
54
55 sdhci@c8000600 {
Peter De Schrijveradd29e62011-10-12 14:53:05 +0300[diff] [blame]56 support-8bit;
57 };
58};