blob: d5368fa534c16839536d99605412c09188b848fa [file] [log] [blame]
Sathish Ambley9d69ac32012-03-21 10:28:26 -07001/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/dts-v1/;
14
Abhimanyu Kapur90ced6e2012-06-26 17:41:25 -070015/include/ "msm8974.dtsi"
Chandan Uddarajue16e1fa2012-07-31 00:41:05 -070016/include/ "dsi-panel-sim-video.dtsi"
Sathish Ambley9d69ac32012-03-21 10:28:26 -070017
18/ {
Abhimanyu Kapur90ced6e2012-06-26 17:41:25 -070019 model = "Qualcomm MSM 8974 Simulator";
20 compatible = "qcom,msm8974-sim", "qcom,msm8974";
David Ngd1dabbd2012-07-27 16:55:39 -070021 qcom,msm-id = <126 16 0>;
Chandan Uddarajue16e1fa2012-07-31 00:41:05 -070022
23 qcom,mdss_dsi@fd922800 {
24 qcom,mdss_dsi_sim_video {
25 status = "ok";
26 };
27 };
Stepan Moskovchenko43f11582012-08-08 17:20:38 -070028
29 serial@f991f000 {
30 status = "ok";
31 };
32
33 serial@f995e000 {
34 status = "ok";
35 };
Sathish Ambley9d69ac32012-03-21 10:28:26 -070036};
Stepan Moskovchenko32a5ef42012-08-10 01:29:30 -070037
38&jpeg_iommu {
39 qcom,iommu-ctx@fda6c000 {
40 interrupts = <0 69 0>;
41 };
42
43 qcom,iommu-ctx@fda6d000 {
44 interrupts = <0 70 0>;
45 };
46
47 qcom,iommu-ctx@fda6e000 {
48 interrupts = <0 71 0>;
49 };
50};
51
52&mdp_iommu {
53 qcom,iommu-ctx@fd930000 {
54 interrupts = <0 46 0>;
55 };
56
57 qcom,iommu-ctx@fd931000 {
58 interrupts = <0 47 0>;
59 };
60};
61
62&venus_iommu {
63 qcom,iommu-ctx@fdc8c000 {
64 interrupts = <0 43 0>;
65 };
66
67 qcom,iommu-ctx@fdc8d000 {
68 interrupts = <0 42 0>;
69 };
70
71 qcom,iommu-ctx@fdc8e000 {
72 interrupts = <0 41 0>;
73 };
74};
75
76&kgsl_iommu {
77 qcom,iommu-ctx@fdb18000 {
78 interrupts = <0 240 0>;
79 };
80
81 qcom,iommu-ctx@fdb19000 {
82 interrupts = <0 241 0>;
83 };
84};
85
86&vfe_iommu {
87 qcom,iommu-ctx@fda4c000 {
88 interrupts = <0 64 0>;
89 };
90
91 qcom,iommu-ctx@fda4d000 {
92 interrupts = <0 65 0>;
93 };
94
95 qcom,iommu-ctx@fda4e000 {
96 interrupts = <0 66 0>;
97 };
98};