Rohit Vaswani | 3fc6034 | 2012-04-23 18:55:15 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2012, Code Aurora Forum. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
Rohit Vaswani | 3fc6034 | 2012-04-23 18:55:15 -0700 | [diff] [blame] | 13 | /include/ "skeleton.dtsi" |
Mitchel Humpherys | b3f40d1 | 2012-10-05 16:26:58 -0700 | [diff] [blame] | 14 | /include/ "msm9625-ion.dtsi" |
Rohit Vaswani | 3fc6034 | 2012-04-23 18:55:15 -0700 | [diff] [blame] | 15 | |
| 16 | / { |
| 17 | model = "Qualcomm MSM 9625"; |
| 18 | compatible = "qcom,msm9625"; |
| 19 | interrupt-parent = <&intc>; |
| 20 | |
| 21 | intc: interrupt-controller@F9000000 { |
| 22 | compatible = "qcom,msm-qgic2"; |
| 23 | interrupt-controller; |
| 24 | #interrupt-cells = <3>; |
| 25 | reg = <0xF9000000 0x1000>, |
| 26 | <0xF9002000 0x1000>; |
| 27 | }; |
| 28 | |
Abhimanyu Kapur | 490d20c | 2012-06-22 17:34:20 -0700 | [diff] [blame] | 29 | l2: cache-controller@f9040000 { |
| 30 | compatible = "arm,pl310-cache"; |
| 31 | reg = <0xf9040000 0x1000>; |
Abhimanyu Kapur | 490d20c | 2012-06-22 17:34:20 -0700 | [diff] [blame] | 32 | cache-unified; |
| 33 | cache-level = <2>; |
| 34 | }; |
| 35 | |
Rohit Vaswani | 3fc6034 | 2012-04-23 18:55:15 -0700 | [diff] [blame] | 36 | msmgpio: gpio@fd510000 { |
| 37 | compatible = "qcom,msm-gpio"; |
Rohit Vaswani | b1cc493 | 2012-07-23 21:30:11 -0700 | [diff] [blame] | 38 | gpio-controller; |
| 39 | #gpio-cells = <2>; |
Rohit Vaswani | 3fc6034 | 2012-04-23 18:55:15 -0700 | [diff] [blame] | 40 | interrupt-controller; |
| 41 | #interrupt-cells = <2>; |
| 42 | reg = <0xfd510000 0x4000>; |
| 43 | }; |
| 44 | |
Rohit Vaswani | a512956 | 2012-06-12 20:11:23 -0700 | [diff] [blame] | 45 | timer: msm-qtimer@f9021000 { |
Rohit Vaswani | 3fc6034 | 2012-04-23 18:55:15 -0700 | [diff] [blame] | 46 | compatible = "qcom,msm-qtimer", "arm,armv7-timer"; |
Rohit Vaswani | a512956 | 2012-06-12 20:11:23 -0700 | [diff] [blame] | 47 | reg = <0xF9021000 0x1000>; |
Rohit Vaswani | 3fc6034 | 2012-04-23 18:55:15 -0700 | [diff] [blame] | 48 | interrupts = <0 7 0>; |
Rohit Vaswani | a512956 | 2012-06-12 20:11:23 -0700 | [diff] [blame] | 49 | irq-is-not-percpu; |
Abhimanyu Kapur | af4c4d5 | 2012-10-01 14:15:10 -0700 | [diff] [blame] | 50 | clock-frequency = <19200000>; |
Rohit Vaswani | 3fc6034 | 2012-04-23 18:55:15 -0700 | [diff] [blame] | 51 | }; |
Jin Hong | 8d32858 | 2012-05-01 15:45:29 -0700 | [diff] [blame] | 52 | |
Yan He | 3cb97ba | 2012-05-13 16:45:24 -0700 | [diff] [blame] | 53 | qcom,sps@f9980000 { |
| 54 | compatible = "qcom,msm_sps"; |
| 55 | reg = <0xf9984000 0x15000>, |
| 56 | <0xf9999000 0xb000>, |
Yan He | 6f9ae71 | 2012-09-20 12:55:47 -0700 | [diff] [blame] | 57 | <0xfe803000 0x4800>; |
Yan He | 3cb97ba | 2012-05-13 16:45:24 -0700 | [diff] [blame] | 58 | interrupts = <0 94 0>; |
| 59 | qcom,device-type = <2>; |
| 60 | }; |
| 61 | |
Jin Hong | 8d32858 | 2012-05-01 15:45:29 -0700 | [diff] [blame] | 62 | serial@f991f000 { |
| 63 | compatible = "qcom,msm-lsuart-v14"; |
| 64 | reg = <0xf991f000 0x1000>; |
| 65 | interrupts = <0 109 0>; |
| 66 | }; |
Sahitya Tummala | 9ba4b28 | 2012-06-19 11:41:51 +0530 | [diff] [blame] | 67 | |
Jack Pham | a01e9c1 | 2012-09-25 21:37:03 -0700 | [diff] [blame] | 68 | usb@f9a55000 { |
| 69 | compatible = "qcom,hsusb-otg"; |
| 70 | reg = <0xf9a55000 0x400>; |
| 71 | interrupts = <0 134 0 0 140 0>; |
| 72 | interrupt-names = "core_irq", "async_irq"; |
| 73 | HSUSB_VDDCX-supply = <&pm8019_l12>; |
| 74 | HSUSB_1p8-supply = <&pm8019_l2>; |
| 75 | HSUSB_3p3-supply = <&pm8019_l4>; |
| 76 | |
| 77 | qcom,hsusb-otg-phy-type = <2>; |
| 78 | qcom,hsusb-otg-mode = <1>; |
| 79 | qcom,hsusb-otg-otg-control = <1>; |
| 80 | qcom,hsusb-otg-disable-reset; |
| 81 | }; |
| 82 | |
| 83 | android_usb@fc42b0c8 { |
| 84 | compatible = "qcom,android-usb"; |
| 85 | reg = <0xfc42b0c8 0xc8>; |
| 86 | }; |
| 87 | |
Sahitya Tummala | 9ba4b28 | 2012-06-19 11:41:51 +0530 | [diff] [blame] | 88 | qcom,nand@f9ac0000 { |
| 89 | compatible = "qcom,msm-nand"; |
| 90 | reg = <0xf9ac0000 0x1000>, |
| 91 | <0xf9ac4000 0x8000>; |
| 92 | reg-names = "nand_phys", |
| 93 | "bam_phys"; |
| 94 | interrupts = <0 247 0>; |
| 95 | interrupt-names = "bam_irq"; |
| 96 | }; |
Rohit Vaswani | 0045df4 | 2012-06-29 16:21:48 -0700 | [diff] [blame] | 97 | |
| 98 | spi@f9928000 { |
| 99 | compatible = "qcom,spi-qup-v2"; |
| 100 | reg = <0xf9928000 0x1000>; |
| 101 | interrupts = <0 100 0>; |
| 102 | spi-max-frequency = <24000000>; |
| 103 | #address-cells = <1>; |
| 104 | #size-cells = <0>; |
| 105 | gpios = <&msmgpio 23 0>, /* CLK */ |
| 106 | <&msmgpio 21 0>, /* MISO */ |
| 107 | <&msmgpio 20 0>; /* MOSI */ |
| 108 | |
| 109 | cs-gpios = <&msmgpio 69 0>; |
| 110 | |
| 111 | ethernet-switch@0 { |
| 112 | compatible = "simtec,ks8851"; |
| 113 | reg = <0>; |
| 114 | interrupt-parent = <&msmgpio>; |
| 115 | interrupts = <75 0>; |
| 116 | spi-max-frequency = <5000000>; |
| 117 | }; |
| 118 | }; |
Hanumant Singh | 6c4bf06 | 2012-09-06 15:51:10 -0700 | [diff] [blame] | 119 | |
| 120 | qcom,wdt@f9017000 { |
| 121 | compatible = "qcom,msm-watchdog"; |
| 122 | reg = <0xf9017000 0x1000>; |
| 123 | interrupts = <1 2 0>, <1 1 0>; |
| 124 | qcom,bark-time = <11000>; |
| 125 | qcom,pet-time = <10000>; |
| 126 | qcom,ipi-ping = <0>; |
| 127 | }; |
Kenneth Heitke | c264240 | 2012-09-18 18:56:47 -0600 | [diff] [blame] | 128 | |
Girish Mahadevan | c65a711 | 2012-09-19 11:15:56 -0600 | [diff] [blame] | 129 | rpm_bus: qcom,rpm-smd { |
| 130 | compatible = "qcom,rpm-smd"; |
| 131 | rpm-channel-name = "rpm_requests"; |
| 132 | rpm-channel-type = <15>; /* SMD_APPS_RPM */ |
| 133 | }; |
| 134 | |
Kenneth Heitke | c264240 | 2012-09-18 18:56:47 -0600 | [diff] [blame] | 135 | spmi_bus: qcom,spmi@fc4c0000 { |
| 136 | cell-index = <0>; |
| 137 | compatible = "qcom,spmi-pmic-arb"; |
| 138 | reg = <0xfc4cf000 0x1000>, |
| 139 | <0Xfc4cb000 0x1000>; |
| 140 | /* 190,ee0_krait_hlos_spmi_periph_irq */ |
| 141 | /* 187,channel_0_krait_hlos_trans_done_irq */ |
| 142 | interrupts = <0 190 0 0 187 0>; |
David Collins | 830de47 | 2012-09-24 16:26:35 -0700 | [diff] [blame] | 143 | qcom,not-wakeup; |
Kenneth Heitke | c264240 | 2012-09-18 18:56:47 -0600 | [diff] [blame] | 144 | qcom,pmic-arb-ee = <0>; |
| 145 | qcom,pmic-arb-channel = <0>; |
| 146 | qcom,pmic-arb-ppid-map = <0x02400000>, /* TEMP_ALARM */ |
| 147 | <0x03100001>, /* VADC1_USR */ |
| 148 | <0x06100002>, /* RTC_ALARM */ |
| 149 | <0x06200003>, /* RTC_TIMER */ |
| 150 | <0x0a000004>, /* MPP1 */ |
| 151 | <0x0a100005>, /* MPP2 */ |
| 152 | <0x0a200006>, /* MPP3 */ |
| 153 | <0x0a300007>, /* MPP4 */ |
| 154 | <0x0a400008>, /* MPP5 */ |
| 155 | <0x0a500009>, /* MPP6 */ |
| 156 | <0x0c20000a>, /* GPIO3 */ |
| 157 | <0x0c30000b>, /* GPIO4 */ |
| 158 | <0x0c50000c>, /* GPIO6 */ |
| 159 | <0x0080000d>; /* PON */ |
| 160 | }; |
Kenneth Heitke | f92a8c7 | 2012-10-10 17:15:05 -0600 | [diff] [blame] | 161 | |
| 162 | i2c@f9925000 { |
| 163 | cell-index = <3>; |
| 164 | compatible = "qcom,i2c-qup"; |
| 165 | reg = <0xf9925000 0x1000>; |
| 166 | #address-cells = <1>; |
| 167 | #size-cells = <0>; |
| 168 | reg-names = "qup_phys_addr"; |
| 169 | interrupts = <0 97 0>; |
| 170 | interrupt-names = "qup_err_intr"; |
| 171 | qcom,i2c-bus-freq = <100000>; |
| 172 | qcom,i2c-src-freq = <24000000>; |
| 173 | }; |
Oluwafemi Adeyemi | bbbcc6e | 2012-09-14 17:24:26 -0700 | [diff] [blame] | 174 | |
| 175 | sdcc2: qcom,sdcc@f98a4000 { |
| 176 | cell-index = <2>; /* SDC2 SD card slot */ |
| 177 | compatible = "qcom,msm-sdcc"; |
| 178 | reg = <0xf98a4000 0x800>, |
| 179 | <0xf98a4800 0x100>, |
| 180 | <0xf9884000 0x7000>; |
| 181 | reg-names = "core_mem", "dml_mem", "bam_mem"; |
| 182 | |
| 183 | vdd-supply = <&ext_2p95v>; |
| 184 | |
| 185 | vdd-io-supply = <&pm8019_l13>; |
| 186 | qcom,sdcc-vdd-io-always_on; |
| 187 | qcom,sdcc-vdd-io-lpm_sup; |
| 188 | qcom,sdcc-vdd-io-voltage_level = <1800000 2950000>; |
| 189 | qcom,sdcc-vdd-io-current_level = <6 22000>; |
| 190 | |
| 191 | qcom,sdcc-pad-pull-on = <0x0 0x3 0x3>; |
| 192 | qcom,sdcc-pad-pull-off = <0x0 0x3 0x3>; |
| 193 | qcom,sdcc-pad-drv-on = <0x7 0x4 0x4>; |
| 194 | qcom,sdcc-pad-drv-off = <0x0 0x0 0x0>; |
| 195 | |
| 196 | qcom,sdcc-clk-rates = <400000 25000000 50000000 100000000 200000000>; |
| 197 | qcom,sdcc-sup-voltages = <2950 2950>; |
| 198 | qcom,sdcc-bus-width = <4>; |
| 199 | qcom,sdcc-xpc; |
| 200 | qcom,sdcc-bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104"; |
| 201 | qcom,sdcc-current-limit = <800>; |
| 202 | |
| 203 | interrupt-parent = <&sdcc2>; |
| 204 | #address-cells = <0>; |
| 205 | interrupts = <0 1 2>; |
| 206 | #interrupt-cells = <1>; |
| 207 | interrupt-map-mask = <0xffffffff>; |
| 208 | interrupt-map = <0 &intc 0 125 0 |
| 209 | 1 &intc 0 220 0 |
| 210 | 2 &msmgpio 66 0x3>; |
| 211 | interrupt-names = "core_irq", "bam_irq", "status_irq"; |
| 212 | cd-gpios = <&msmgpio 66 0>; |
| 213 | }; |
Oluwafemi Adeyemi | 4926a9e | 2012-09-14 17:39:59 -0700 | [diff] [blame] | 214 | |
| 215 | sdcc3: qcom,sdcc@f9864000 { |
| 216 | cell-index = <3>; /* SDC3 SDIO slot */ |
| 217 | compatible = "qcom,msm-sdcc"; |
| 218 | reg = <0xf9864000 0x800>, |
| 219 | <0xf9864800 0x100>, |
| 220 | <0xf9844000 0x7000>; |
| 221 | reg-names = "core_mem", "dml_mem", "bam_mem"; |
| 222 | interrupts = <0 127 0>, <0 223 0>; |
| 223 | interrupt-names = "core_irq", "bam_irq"; |
| 224 | |
| 225 | gpios = <&msmgpio 25 0>, |
| 226 | <&msmgpio 24 0>, |
| 227 | <&msmgpio 16 0>, |
| 228 | <&msmgpio 17 0>, |
| 229 | <&msmgpio 18 0>, |
| 230 | <&msmgpio 19 0>; |
| 231 | qcom,sdcc-gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3"; |
| 232 | |
| 233 | qcom,sdcc-clk-rates = <400000 25000000 50000000 100000000>; |
| 234 | qcom,sdcc-sup-voltages = <2950 2950>; |
| 235 | qcom,sdcc-bus-width = <4>; |
| 236 | qcom,sdcc-bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50"; |
Oluwafemi Adeyemi | 4926a9e | 2012-09-14 17:39:59 -0700 | [diff] [blame] | 237 | }; |
Jeff Hugo | cdcb8aa | 2012-10-16 13:41:20 -0600 | [diff] [blame] | 238 | |
| 239 | qcom,bam_dmux@fc834000 { |
| 240 | compatible = "qcom,bam_dmux"; |
| 241 | reg = <0xfc834000 0x7000>; |
| 242 | interrupts = <0 29 1>; |
| 243 | }; |
Tianyi Gou | f6ffa87 | 2012-10-22 14:22:58 -0700 | [diff] [blame] | 244 | |
| 245 | qcom,acpuclk@f9010000 { |
| 246 | compatible = "qcom,acpuclk-9625"; |
| 247 | reg = <0xf9010008 0x10>, |
| 248 | <0xf9008004 0x4>; |
| 249 | reg-names = "rcg_base", "pwr_base"; |
| 250 | a5_cpu-supply = <&pm8019_l10_corner_ao>; |
| 251 | a5_mem-supply = <&pm8019_l12_ao>; |
| 252 | }; |
Tianyi Gou | 343bd93 | 2012-10-29 11:03:03 -0700 | [diff] [blame^] | 253 | |
| 254 | gdsc_usb_hsic: qcom,gdsc@fc400404 { |
| 255 | compatible = "qcom,gdsc"; |
| 256 | reg = <0xfc400404 0x4>; |
| 257 | regulator-name = "gdsc_usb_hsic"; |
| 258 | }; |
Rohit Vaswani | 3fc6034 | 2012-04-23 18:55:15 -0700 | [diff] [blame] | 259 | }; |
David Collins | a2b73f2 | 2012-09-13 17:32:16 -0700 | [diff] [blame] | 260 | |
David Collins | 722a651 | 2012-09-14 11:09:18 -0700 | [diff] [blame] | 261 | /include/ "msm-pm8019-rpm-regulator.dtsi" |
David Collins | a2b73f2 | 2012-09-13 17:32:16 -0700 | [diff] [blame] | 262 | /include/ "msm-pm8019.dtsi" |
David Collins | 56b4112 | 2012-09-24 17:09:23 -0700 | [diff] [blame] | 263 | /include/ "msm9625-regulator.dtsi" |
Siddartha Mohanadoss | c47fcce | 2012-09-25 17:21:50 -0700 | [diff] [blame] | 264 | |
| 265 | &pm8019_vadc { |
| 266 | chan@49 { |
| 267 | label = "batt_id_therm"; |
| 268 | qcom,channel-num = <49>; |
| 269 | qcom,decimation = <0>; |
| 270 | qcom,pre-div-channel-scaling = <0>; |
| 271 | qcom,calibration-type = "ratiometric"; |
| 272 | qcom,scale-function = <0>; |
| 273 | qcom,hw-settle-time = <0>; |
| 274 | qcom,fast-avg-setup = <0>; |
| 275 | }; |
| 276 | |
| 277 | chan@51 { |
| 278 | label = "pa_therm1"; |
| 279 | qcom,channel-num = <51>; |
| 280 | qcom,decimation = <0>; |
| 281 | qcom,pre-div-channel-scaling = <0>; |
| 282 | qcom,calibration-type = "ratiometric"; |
| 283 | qcom,scale-function = <2>; |
| 284 | qcom,hw-settle-time = <0>; |
| 285 | qcom,fast-avg-setup = <0>; |
| 286 | }; |
| 287 | |
| 288 | chan@52 { |
| 289 | label = "pa_therm2"; |
| 290 | qcom,channel-num = <52>; |
| 291 | qcom,decimation = <0>; |
| 292 | qcom,pre-div-channel-scaling = <0>; |
| 293 | qcom,calibration-type = "ratiometric"; |
| 294 | qcom,scale-function = <2>; |
| 295 | qcom,hw-settle-time = <0>; |
| 296 | qcom,fast-avg-setup = <0>; |
| 297 | }; |
| 298 | |
| 299 | chan@50 { |
| 300 | label = "xo_therm"; |
| 301 | qcom,channel-num = <50>; |
| 302 | qcom,decimation = <0>; |
| 303 | qcom,pre-div-channel-scaling = <0>; |
| 304 | qcom,calibration-type = "ratiometric"; |
| 305 | qcom,scale-function = <4>; |
| 306 | qcom,hw-settle-time = <0>; |
| 307 | qcom,fast-avg-setup = <0>; |
| 308 | }; |
| 309 | |
| 310 | chan@60 { |
| 311 | label = "xo_therm_amux"; |
| 312 | qcom,channel-num = <60>; |
| 313 | qcom,decimation = <0>; |
| 314 | qcom,pre-div-channel-scaling = <0>; |
| 315 | qcom,calibration-type = "ratiometric"; |
| 316 | qcom,scale-function = <4>; |
| 317 | qcom,hw-settle-time = <0>; |
| 318 | qcom,fast-avg-setup = <0>; |
| 319 | }; |
| 320 | }; |