Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #include <asm/hardware.h> |
| 2 | |
| 3 | @ Code for DMA with the 1772 fdc |
| 4 | .text |
| 5 | |
| 6 | |
| 7 | .global fdc1772_dataaddr |
| 8 | fdc1772_fiqdata: |
| 9 | @ Number of bytes left to DMA |
| 10 | .global fdc1772_bytestogo |
| 11 | fdc1772_bytestogo: |
| 12 | .word 0 |
| 13 | @ Place to put/get data from in DMA |
| 14 | .global fdc1772_dataaddr |
| 15 | fdc1772_dataaddr: |
| 16 | .word 0 |
| 17 | |
| 18 | .global fdc1772_fdc_int_done |
| 19 | fdc1772_fdc_int_done: |
| 20 | .word 0 |
| 21 | .global fdc1772_comendstatus |
| 22 | fdc1772_comendstatus: |
| 23 | .word 0 |
| 24 | |
| 25 | @ We hang this off DMA channel 1 |
| 26 | .global fdc1772_comendhandler |
| 27 | fdc1772_comendhandler: |
| 28 | mov r8,#IOC_BASE |
| 29 | ldrb r9,[r8,#0x34] @ IOC FIQ status |
| 30 | tst r9,#2 |
| 31 | subeqs pc,r14,#4 @ should I leave a space here |
| 32 | orr r9,r8,#0x10000 @ FDC base |
| 33 | adr r8,fdc1772_fdc_int_done |
| 34 | ldrb r10,[r9,#0] @ FDC status |
| 35 | mov r9,#1 @ Got a FIQ flag |
| 36 | stmia r8,{r9,r10} |
| 37 | subs pc,r14,#4 |
| 38 | |
| 39 | |
| 40 | .global fdc1772_dma_read |
| 41 | fdc1772_dma_read: |
| 42 | mov r8,#IOC_BASE |
| 43 | ldrb r9,[r8,#0x34] @ IOC FIQ status |
| 44 | tst r9,#1 |
| 45 | beq fdc1772_dma_read_notours |
| 46 | orr r8,r8,#0x10000 @ FDC base |
| 47 | ldrb r10,[r8,#0xc] @ Read from FDC data reg (also clears interrupt) |
| 48 | ldmia r11,{r8,r9} |
| 49 | subs r8,r8,#1 @ One less byte to go |
| 50 | @ If there was somewhere for this data to go then store it and update pointers |
| 51 | strplb r10,[r9],#1 @ Store the data and increment the pointer |
| 52 | stmplia r11,{r8,r9} @ Update count/pointers |
| 53 | @ Handle any other interrupts if there are any |
| 54 | fdc1772_dma_read_notours: |
| 55 | @ Cant branch because this code has been copied down to the FIQ vector |
| 56 | ldr pc,[pc,#-4] |
| 57 | .word fdc1772_comendhandler |
| 58 | .global fdc1772_dma_read_end |
| 59 | fdc1772_dma_read_end: |
| 60 | |
| 61 | .global fdc1772_dma_write |
| 62 | fdc1772_dma_write: |
| 63 | mov r8,#IOC_BASE |
| 64 | ldrb r9,[r8,#0x34] @ IOC FIQ status |
| 65 | tst r9,#1 |
| 66 | beq fdc1772_dma_write_notours |
| 67 | orr r8,r8,#0x10000 @ FDC base |
| 68 | ldmia r11,{r9,r10} |
| 69 | subs r9,r9,#1 @ One less byte to go |
| 70 | @ If there really is some data then get it, store it and update count |
| 71 | ldrplb r12,[r10],#1 |
| 72 | strplb r12,[r8,#0xc] @ write it to FDC data reg |
| 73 | stmplia r11,{r9,r10} @ Update count and pointer - should clear interrupt |
| 74 | @ Handle any other interrupts |
| 75 | fdc1772_dma_write_notours: |
| 76 | @ Cant branch because this code has been copied down to the FIQ vector |
| 77 | ldr pc,[pc,#-4] |
| 78 | .word fdc1772_comendhandler |
| 79 | |
| 80 | .global fdc1772_dma_write_end |
| 81 | fdc1772_dma_write_end: |
| 82 | |
| 83 | |
| 84 | @ Setup the FIQ R11 to point to the data and store the count, address |
| 85 | @ for this dma |
| 86 | @ R0=count |
| 87 | @ R1=address |
| 88 | .global fdc1772_setupdma |
| 89 | fdc1772_setupdma: |
| 90 | @ The big job is flipping in and out of FIQ mode |
| 91 | adr r2,fdc1772_fiqdata @ This is what we really came here for |
| 92 | stmia r2,{r0,r1} |
| 93 | mov r3, pc |
| 94 | teqp pc,#0x0c000001 @ Disable FIQs, IRQs and switch to FIQ mode |
| 95 | mov r0,r0 @ NOP |
| 96 | mov r11,r2 |
| 97 | teqp r3,#0 @ Normal mode |
| 98 | mov r0,r0 @ NOP |
| 99 | mov pc,r14 |
| 100 | |