Alexander Graf | 0123518 | 2009-10-30 05:47:13 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This program is free software; you can redistribute it and/or modify |
| 3 | * it under the terms of the GNU General Public License, version 2, as |
| 4 | * published by the Free Software Foundation. |
| 5 | * |
| 6 | * This program is distributed in the hope that it will be useful, |
| 7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 9 | * GNU General Public License for more details. |
| 10 | * |
| 11 | * You should have received a copy of the GNU General Public License |
| 12 | * along with this program; if not, write to the Free Software |
| 13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
| 14 | * |
| 15 | * Copyright SUSE Linux Products GmbH 2009 |
| 16 | * |
| 17 | * Authors: Alexander Graf <agraf@suse.de> |
| 18 | */ |
| 19 | |
| 20 | #include <linux/types.h> |
| 21 | #include <linux/string.h> |
| 22 | #include <linux/kvm.h> |
| 23 | #include <linux/kvm_host.h> |
| 24 | #include <linux/highmem.h> |
| 25 | |
| 26 | #include <asm/tlbflush.h> |
| 27 | #include <asm/kvm_ppc.h> |
| 28 | #include <asm/kvm_book3s.h> |
| 29 | |
| 30 | /* #define DEBUG_MMU */ |
| 31 | /* #define DEBUG_MMU_PTE */ |
| 32 | /* #define DEBUG_MMU_PTE_IP 0xfff14c40 */ |
| 33 | |
| 34 | #ifdef DEBUG_MMU |
| 35 | #define dprintk(X...) printk(KERN_INFO X) |
| 36 | #else |
| 37 | #define dprintk(X...) do { } while(0) |
| 38 | #endif |
| 39 | |
| 40 | #ifdef DEBUG_PTE |
| 41 | #define dprintk_pte(X...) printk(KERN_INFO X) |
| 42 | #else |
| 43 | #define dprintk_pte(X...) do { } while(0) |
| 44 | #endif |
| 45 | |
| 46 | #define PTEG_FLAG_ACCESSED 0x00000100 |
| 47 | #define PTEG_FLAG_DIRTY 0x00000080 |
| 48 | |
| 49 | static inline bool check_debug_ip(struct kvm_vcpu *vcpu) |
| 50 | { |
| 51 | #ifdef DEBUG_MMU_PTE_IP |
| 52 | return vcpu->arch.pc == DEBUG_MMU_PTE_IP; |
| 53 | #else |
| 54 | return true; |
| 55 | #endif |
| 56 | } |
| 57 | |
| 58 | static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr, |
| 59 | struct kvmppc_pte *pte, bool data); |
| 60 | |
| 61 | static struct kvmppc_sr *find_sr(struct kvmppc_vcpu_book3s *vcpu_book3s, gva_t eaddr) |
| 62 | { |
| 63 | return &vcpu_book3s->sr[(eaddr >> 28) & 0xf]; |
| 64 | } |
| 65 | |
| 66 | static u64 kvmppc_mmu_book3s_32_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr, |
| 67 | bool data) |
| 68 | { |
| 69 | struct kvmppc_sr *sre = find_sr(to_book3s(vcpu), eaddr); |
| 70 | struct kvmppc_pte pte; |
| 71 | |
| 72 | if (!kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, &pte, data)) |
| 73 | return pte.vpage; |
| 74 | |
| 75 | return (((u64)eaddr >> 12) & 0xffff) | (((u64)sre->vsid) << 16); |
| 76 | } |
| 77 | |
| 78 | static void kvmppc_mmu_book3s_32_reset_msr(struct kvm_vcpu *vcpu) |
| 79 | { |
| 80 | kvmppc_set_msr(vcpu, 0); |
| 81 | } |
| 82 | |
| 83 | static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvmppc_vcpu_book3s *vcpu_book3s, |
| 84 | struct kvmppc_sr *sre, gva_t eaddr, |
| 85 | bool primary) |
| 86 | { |
| 87 | u32 page, hash, pteg, htabmask; |
| 88 | hva_t r; |
| 89 | |
| 90 | page = (eaddr & 0x0FFFFFFF) >> 12; |
| 91 | htabmask = ((vcpu_book3s->sdr1 & 0x1FF) << 16) | 0xFFC0; |
| 92 | |
| 93 | hash = ((sre->vsid ^ page) << 6); |
| 94 | if (!primary) |
| 95 | hash = ~hash; |
| 96 | hash &= htabmask; |
| 97 | |
| 98 | pteg = (vcpu_book3s->sdr1 & 0xffff0000) | hash; |
| 99 | |
| 100 | dprintk("MMU: pc=0x%lx eaddr=0x%lx sdr1=0x%llx pteg=0x%x vsid=0x%x\n", |
| 101 | vcpu_book3s->vcpu.arch.pc, eaddr, vcpu_book3s->sdr1, pteg, |
| 102 | sre->vsid); |
| 103 | |
| 104 | r = gfn_to_hva(vcpu_book3s->vcpu.kvm, pteg >> PAGE_SHIFT); |
| 105 | if (kvm_is_error_hva(r)) |
| 106 | return r; |
| 107 | return r | (pteg & ~PAGE_MASK); |
| 108 | } |
| 109 | |
| 110 | static u32 kvmppc_mmu_book3s_32_get_ptem(struct kvmppc_sr *sre, gva_t eaddr, |
| 111 | bool primary) |
| 112 | { |
| 113 | return ((eaddr & 0x0fffffff) >> 22) | (sre->vsid << 7) | |
| 114 | (primary ? 0 : 0x40) | 0x80000000; |
| 115 | } |
| 116 | |
| 117 | static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr, |
| 118 | struct kvmppc_pte *pte, bool data) |
| 119 | { |
| 120 | struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); |
| 121 | struct kvmppc_bat *bat; |
| 122 | int i; |
| 123 | |
| 124 | for (i = 0; i < 8; i++) { |
| 125 | if (data) |
| 126 | bat = &vcpu_book3s->dbat[i]; |
| 127 | else |
| 128 | bat = &vcpu_book3s->ibat[i]; |
| 129 | |
| 130 | if (vcpu->arch.msr & MSR_PR) { |
| 131 | if (!bat->vp) |
| 132 | continue; |
| 133 | } else { |
| 134 | if (!bat->vs) |
| 135 | continue; |
| 136 | } |
| 137 | |
| 138 | if (check_debug_ip(vcpu)) |
| 139 | { |
| 140 | dprintk_pte("%cBAT %02d: 0x%lx - 0x%x (0x%x)\n", |
| 141 | data ? 'd' : 'i', i, eaddr, bat->bepi, |
| 142 | bat->bepi_mask); |
| 143 | } |
| 144 | if ((eaddr & bat->bepi_mask) == bat->bepi) { |
| 145 | pte->raddr = bat->brpn | (eaddr & ~bat->bepi_mask); |
| 146 | pte->vpage = (eaddr >> 12) | VSID_BAT; |
| 147 | pte->may_read = bat->pp; |
| 148 | pte->may_write = bat->pp > 1; |
| 149 | pte->may_execute = true; |
| 150 | if (!pte->may_read) { |
| 151 | printk(KERN_INFO "BAT is not readable!\n"); |
| 152 | continue; |
| 153 | } |
| 154 | if (!pte->may_write) { |
| 155 | /* let's treat r/o BATs as not-readable for now */ |
| 156 | dprintk_pte("BAT is read-only!\n"); |
| 157 | continue; |
| 158 | } |
| 159 | |
| 160 | return 0; |
| 161 | } |
| 162 | } |
| 163 | |
| 164 | return -ENOENT; |
| 165 | } |
| 166 | |
| 167 | static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr, |
| 168 | struct kvmppc_pte *pte, bool data, |
| 169 | bool primary) |
| 170 | { |
| 171 | struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); |
| 172 | struct kvmppc_sr *sre; |
| 173 | hva_t ptegp; |
| 174 | u32 pteg[16]; |
| 175 | u64 ptem = 0; |
| 176 | int i; |
| 177 | int found = 0; |
| 178 | |
| 179 | sre = find_sr(vcpu_book3s, eaddr); |
| 180 | |
| 181 | dprintk_pte("SR 0x%lx: vsid=0x%x, raw=0x%x\n", eaddr >> 28, |
| 182 | sre->vsid, sre->raw); |
| 183 | |
| 184 | pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data); |
| 185 | |
| 186 | ptegp = kvmppc_mmu_book3s_32_get_pteg(vcpu_book3s, sre, eaddr, primary); |
| 187 | if (kvm_is_error_hva(ptegp)) { |
| 188 | printk(KERN_INFO "KVM: Invalid PTEG!\n"); |
| 189 | goto no_page_found; |
| 190 | } |
| 191 | |
| 192 | ptem = kvmppc_mmu_book3s_32_get_ptem(sre, eaddr, primary); |
| 193 | |
| 194 | if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) { |
| 195 | printk(KERN_ERR "KVM: Can't copy data from 0x%lx!\n", ptegp); |
| 196 | goto no_page_found; |
| 197 | } |
| 198 | |
| 199 | for (i=0; i<16; i+=2) { |
| 200 | if (ptem == pteg[i]) { |
| 201 | u8 pp; |
| 202 | |
| 203 | pte->raddr = (pteg[i+1] & ~(0xFFFULL)) | (eaddr & 0xFFF); |
| 204 | pp = pteg[i+1] & 3; |
| 205 | |
| 206 | if ((sre->Kp && (vcpu->arch.msr & MSR_PR)) || |
| 207 | (sre->Ks && !(vcpu->arch.msr & MSR_PR))) |
| 208 | pp |= 4; |
| 209 | |
| 210 | pte->may_write = false; |
| 211 | pte->may_read = false; |
| 212 | pte->may_execute = true; |
| 213 | switch (pp) { |
| 214 | case 0: |
| 215 | case 1: |
| 216 | case 2: |
| 217 | case 6: |
| 218 | pte->may_write = true; |
| 219 | case 3: |
| 220 | case 5: |
| 221 | case 7: |
| 222 | pte->may_read = true; |
| 223 | break; |
| 224 | } |
| 225 | |
| 226 | if ( !pte->may_read ) |
| 227 | continue; |
| 228 | |
| 229 | dprintk_pte("MMU: Found PTE -> %x %x - %x\n", |
| 230 | pteg[i], pteg[i+1], pp); |
| 231 | found = 1; |
| 232 | break; |
| 233 | } |
| 234 | } |
| 235 | |
| 236 | /* Update PTE C and A bits, so the guest's swapper knows we used the |
| 237 | page */ |
| 238 | if (found) { |
| 239 | u32 oldpte = pteg[i+1]; |
| 240 | |
| 241 | if (pte->may_read) |
| 242 | pteg[i+1] |= PTEG_FLAG_ACCESSED; |
| 243 | if (pte->may_write) |
| 244 | pteg[i+1] |= PTEG_FLAG_DIRTY; |
| 245 | else |
| 246 | dprintk_pte("KVM: Mapping read-only page!\n"); |
| 247 | |
| 248 | /* Write back into the PTEG */ |
| 249 | if (pteg[i+1] != oldpte) |
| 250 | copy_to_user((void __user *)ptegp, pteg, sizeof(pteg)); |
| 251 | |
| 252 | return 0; |
| 253 | } |
| 254 | |
| 255 | no_page_found: |
| 256 | |
| 257 | if (check_debug_ip(vcpu)) { |
| 258 | dprintk_pte("KVM MMU: No PTE found (sdr1=0x%llx ptegp=0x%lx)\n", |
| 259 | to_book3s(vcpu)->sdr1, ptegp); |
| 260 | for (i=0; i<16; i+=2) { |
| 261 | dprintk_pte(" %02d: 0x%x - 0x%x (0x%llx)\n", |
| 262 | i, pteg[i], pteg[i+1], ptem); |
| 263 | } |
| 264 | } |
| 265 | |
| 266 | return -ENOENT; |
| 267 | } |
| 268 | |
| 269 | static int kvmppc_mmu_book3s_32_xlate(struct kvm_vcpu *vcpu, gva_t eaddr, |
| 270 | struct kvmppc_pte *pte, bool data) |
| 271 | { |
| 272 | int r; |
| 273 | |
| 274 | pte->eaddr = eaddr; |
| 275 | r = kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, pte, data); |
| 276 | if (r < 0) |
| 277 | r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte, data, true); |
| 278 | if (r < 0) |
| 279 | r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte, data, false); |
| 280 | |
| 281 | return r; |
| 282 | } |
| 283 | |
| 284 | |
| 285 | static u32 kvmppc_mmu_book3s_32_mfsrin(struct kvm_vcpu *vcpu, u32 srnum) |
| 286 | { |
| 287 | return to_book3s(vcpu)->sr[srnum].raw; |
| 288 | } |
| 289 | |
| 290 | static void kvmppc_mmu_book3s_32_mtsrin(struct kvm_vcpu *vcpu, u32 srnum, |
| 291 | ulong value) |
| 292 | { |
| 293 | struct kvmppc_sr *sre; |
| 294 | |
| 295 | sre = &to_book3s(vcpu)->sr[srnum]; |
| 296 | |
| 297 | /* Flush any left-over shadows from the previous SR */ |
| 298 | |
| 299 | /* XXX Not necessary? */ |
| 300 | /* kvmppc_mmu_pte_flush(vcpu, ((u64)sre->vsid) << 28, 0xf0000000ULL); */ |
| 301 | |
| 302 | /* And then put in the new SR */ |
| 303 | sre->raw = value; |
| 304 | sre->vsid = (value & 0x0fffffff); |
| 305 | sre->Ks = (value & 0x40000000) ? true : false; |
| 306 | sre->Kp = (value & 0x20000000) ? true : false; |
| 307 | sre->nx = (value & 0x10000000) ? true : false; |
| 308 | |
| 309 | /* Map the new segment */ |
| 310 | kvmppc_mmu_map_segment(vcpu, srnum << SID_SHIFT); |
| 311 | } |
| 312 | |
| 313 | static void kvmppc_mmu_book3s_32_tlbie(struct kvm_vcpu *vcpu, ulong ea, bool large) |
| 314 | { |
| 315 | kvmppc_mmu_pte_flush(vcpu, ea, ~0xFFFULL); |
| 316 | } |
| 317 | |
| 318 | static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, u64 esid, |
| 319 | u64 *vsid) |
| 320 | { |
| 321 | /* In case we only have one of MSR_IR or MSR_DR set, let's put |
| 322 | that in the real-mode context (and hope RM doesn't access |
| 323 | high memory) */ |
| 324 | switch (vcpu->arch.msr & (MSR_DR|MSR_IR)) { |
| 325 | case 0: |
| 326 | *vsid = (VSID_REAL >> 16) | esid; |
| 327 | break; |
| 328 | case MSR_IR: |
| 329 | *vsid = (VSID_REAL_IR >> 16) | esid; |
| 330 | break; |
| 331 | case MSR_DR: |
| 332 | *vsid = (VSID_REAL_DR >> 16) | esid; |
| 333 | break; |
| 334 | case MSR_DR|MSR_IR: |
| 335 | { |
| 336 | ulong ea; |
| 337 | ea = esid << SID_SHIFT; |
| 338 | *vsid = find_sr(to_book3s(vcpu), ea)->vsid; |
| 339 | break; |
| 340 | } |
| 341 | default: |
| 342 | BUG(); |
| 343 | } |
| 344 | |
| 345 | return 0; |
| 346 | } |
| 347 | |
| 348 | static bool kvmppc_mmu_book3s_32_is_dcbz32(struct kvm_vcpu *vcpu) |
| 349 | { |
| 350 | return true; |
| 351 | } |
| 352 | |
| 353 | |
| 354 | void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu) |
| 355 | { |
| 356 | struct kvmppc_mmu *mmu = &vcpu->arch.mmu; |
| 357 | |
| 358 | mmu->mtsrin = kvmppc_mmu_book3s_32_mtsrin; |
| 359 | mmu->mfsrin = kvmppc_mmu_book3s_32_mfsrin; |
| 360 | mmu->xlate = kvmppc_mmu_book3s_32_xlate; |
| 361 | mmu->reset_msr = kvmppc_mmu_book3s_32_reset_msr; |
| 362 | mmu->tlbie = kvmppc_mmu_book3s_32_tlbie; |
| 363 | mmu->esid_to_vsid = kvmppc_mmu_book3s_32_esid_to_vsid; |
| 364 | mmu->ea_to_vp = kvmppc_mmu_book3s_32_ea_to_vp; |
| 365 | mmu->is_dcbz32 = kvmppc_mmu_book3s_32_is_dcbz32; |
| 366 | |
| 367 | mmu->slbmte = NULL; |
| 368 | mmu->slbmfee = NULL; |
| 369 | mmu->slbmfev = NULL; |
| 370 | mmu->slbie = NULL; |
| 371 | mmu->slbia = NULL; |
| 372 | } |