blob: b44de0d0cc9cfb689c22661e6fde1b022295a223 [file] [log] [blame]
Larry Finger0c817332010-12-08 11:12:31 -06001/******************************************************************************
2 *
3 * Copyright(c) 2009-2010 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
25 *
26 * Larry Finger <Larry.Finger@lwfinger.net>
27 *
28 *****************************************************************************/
29
30#include "core.h"
31#include "wifi.h"
32#include "pci.h"
33#include "base.h"
34#include "ps.h"
Chaoming_Lic7cfe382011-04-25 13:23:15 -050035#include "efuse.h"
Larry Finger0c817332010-12-08 11:12:31 -060036
37static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
38 INTEL_VENDOR_ID,
39 ATI_VENDOR_ID,
40 AMD_VENDOR_ID,
41 SIS_VENDOR_ID
42};
43
Chaoming_Lic7cfe382011-04-25 13:23:15 -050044static const u8 ac_to_hwq[] = {
45 VO_QUEUE,
46 VI_QUEUE,
47 BE_QUEUE,
48 BK_QUEUE
49};
50
Larry Fingerd3bb1422011-04-25 13:23:20 -050051static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
Chaoming_Lic7cfe382011-04-25 13:23:15 -050052 struct sk_buff *skb)
53{
54 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
Larry Fingerd3bb1422011-04-25 13:23:20 -050055 __le16 fc = rtl_get_fc(skb);
Chaoming_Lic7cfe382011-04-25 13:23:15 -050056 u8 queue_index = skb_get_queue_mapping(skb);
57
58 if (unlikely(ieee80211_is_beacon(fc)))
59 return BEACON_QUEUE;
60 if (ieee80211_is_mgmt(fc))
61 return MGNT_QUEUE;
62 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
63 if (ieee80211_is_nullfunc(fc))
64 return HIGH_QUEUE;
65
66 return ac_to_hwq[queue_index];
67}
68
Larry Finger0c817332010-12-08 11:12:31 -060069/* Update PCI dependent default settings*/
70static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
71{
72 struct rtl_priv *rtlpriv = rtl_priv(hw);
73 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
74 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
75 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
76 u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
Chaoming_Lic7cfe382011-04-25 13:23:15 -050077 u8 init_aspm;
Larry Finger0c817332010-12-08 11:12:31 -060078
79 ppsc->reg_rfps_level = 0;
Larry Finger7ea47242011-02-19 16:28:57 -060080 ppsc->support_aspm = 0;
Larry Finger0c817332010-12-08 11:12:31 -060081
82 /*Update PCI ASPM setting */
83 ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
84 switch (rtlpci->const_pci_aspm) {
85 case 0:
86 /*No ASPM */
87 break;
88
89 case 1:
90 /*ASPM dynamically enabled/disable. */
91 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
92 break;
93
94 case 2:
95 /*ASPM with Clock Req dynamically enabled/disable. */
96 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
97 RT_RF_OFF_LEVL_CLK_REQ);
98 break;
99
100 case 3:
101 /*
102 * Always enable ASPM and Clock Req
103 * from initialization to halt.
104 * */
105 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
106 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
107 RT_RF_OFF_LEVL_CLK_REQ);
108 break;
109
110 case 4:
111 /*
112 * Always enable ASPM without Clock Req
113 * from initialization to halt.
114 * */
115 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
116 RT_RF_OFF_LEVL_CLK_REQ);
117 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
118 break;
119 }
120
121 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
122
123 /*Update Radio OFF setting */
124 switch (rtlpci->const_hwsw_rfoff_d3) {
125 case 1:
126 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
127 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
128 break;
129
130 case 2:
131 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
132 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
133 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
134 break;
135
136 case 3:
137 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
138 break;
139 }
140
141 /*Set HW definition to determine if it supports ASPM. */
142 switch (rtlpci->const_support_pciaspm) {
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500143 case 0:{
144 /*Not support ASPM. */
145 bool support_aspm = false;
146 ppsc->support_aspm = support_aspm;
147 break;
148 }
149 case 1:{
150 /*Support ASPM. */
151 bool support_aspm = true;
152 bool support_backdoor = true;
153 ppsc->support_aspm = support_aspm;
154
155 /*if (priv->oem_id == RT_CID_TOSHIBA &&
156 !priv->ndis_adapter.amd_l1_patch)
157 support_backdoor = false; */
158
159 ppsc->support_backdoor = support_backdoor;
160
161 break;
162 }
Larry Finger0c817332010-12-08 11:12:31 -0600163 case 2:
164 /*ASPM value set by chipset. */
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500165 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
166 bool support_aspm = true;
167 ppsc->support_aspm = support_aspm;
168 }
Larry Finger0c817332010-12-08 11:12:31 -0600169 break;
170 default:
171 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
172 ("switch case not process\n"));
173 break;
174 }
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500175
176 /* toshiba aspm issue, toshiba will set aspm selfly
177 * so we should not set aspm in driver */
178 pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
179 if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
180 init_aspm == 0x43)
181 ppsc->support_aspm = false;
182}
183
Larry Finger0c817332010-12-08 11:12:31 -0600184static bool _rtl_pci_platform_switch_device_pci_aspm(
185 struct ieee80211_hw *hw,
186 u8 value)
187{
188 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500189 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
Larry Finger0c817332010-12-08 11:12:31 -0600190
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500191 if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
192 value |= 0x40;
193
Larry Finger0c817332010-12-08 11:12:31 -0600194 pci_write_config_byte(rtlpci->pdev, 0x80, value);
195
Larry Finger32473282011-03-27 16:19:57 -0500196 return false;
Larry Finger0c817332010-12-08 11:12:31 -0600197}
198
199/*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
200static bool _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
201{
202 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500203 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
Larry Finger0c817332010-12-08 11:12:31 -0600204
Larry Finger0c817332010-12-08 11:12:31 -0600205 pci_write_config_byte(rtlpci->pdev, 0x81, value);
Larry Finger0c817332010-12-08 11:12:31 -0600206
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500207 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
208 udelay(100);
209
Larry Finger32473282011-03-27 16:19:57 -0500210 return true;
Larry Finger0c817332010-12-08 11:12:31 -0600211}
212
213/*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
214static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
215{
216 struct rtl_priv *rtlpriv = rtl_priv(hw);
217 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
218 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
219 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
220 u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
221 u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
222 u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
223 /*Retrieve original configuration settings. */
224 u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
225 u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
226 pcibridge_linkctrlreg;
227 u16 aspmlevel = 0;
Larry Finger32473282011-03-27 16:19:57 -0500228 u8 tmp_u1b = 0;
Larry Finger0c817332010-12-08 11:12:31 -0600229
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500230 if (!ppsc->support_aspm)
231 return;
232
Larry Finger0c817332010-12-08 11:12:31 -0600233 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
234 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
235 ("PCI(Bridge) UNKNOWN.\n"));
236
237 return;
238 }
239
240 if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
241 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
242 _rtl_pci_switch_clk_req(hw, 0x0);
243 }
244
Larry Finger32473282011-03-27 16:19:57 -0500245 /*for promising device will in L0 state after an I/O. */
246 pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
Larry Finger0c817332010-12-08 11:12:31 -0600247
248 /*Set corresponding value. */
249 aspmlevel |= BIT(0) | BIT(1);
250 linkctrl_reg &= ~aspmlevel;
251 pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
252
253 _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
254 udelay(50);
255
256 /*4 Disable Pci Bridge ASPM */
257 rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
258 pcicfg_addrport + (num4bytes << 2));
259 rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, pcibridge_linkctrlreg);
260
261 udelay(50);
Larry Finger0c817332010-12-08 11:12:31 -0600262}
263
264/*
265 *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
266 *power saving We should follow the sequence to enable
267 *RTL8192SE first then enable Pci Bridge ASPM
268 *or the system will show bluescreen.
269 */
270static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
271{
272 struct rtl_priv *rtlpriv = rtl_priv(hw);
273 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
274 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
275 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
276 u8 pcibridge_busnum = pcipriv->ndis_adapter.pcibridge_busnum;
277 u8 pcibridge_devnum = pcipriv->ndis_adapter.pcibridge_devnum;
278 u8 pcibridge_funcnum = pcipriv->ndis_adapter.pcibridge_funcnum;
279 u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
280 u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
281 u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
282 u16 aspmlevel;
283 u8 u_pcibridge_aspmsetting;
284 u8 u_device_aspmsetting;
285
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500286 if (!ppsc->support_aspm)
287 return;
288
Larry Finger0c817332010-12-08 11:12:31 -0600289 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
290 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
291 ("PCI(Bridge) UNKNOWN.\n"));
292 return;
293 }
294
295 /*4 Enable Pci Bridge ASPM */
296 rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
297 pcicfg_addrport + (num4bytes << 2));
298
299 u_pcibridge_aspmsetting =
300 pcipriv->ndis_adapter.pcibridge_linkctrlreg |
301 rtlpci->const_hostpci_aspm_setting;
302
303 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
304 u_pcibridge_aspmsetting &= ~BIT(0);
305
306 rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, u_pcibridge_aspmsetting);
307
308 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
309 ("PlatformEnableASPM():PciBridge busnumber[%x], "
310 "DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n",
311 pcibridge_busnum, pcibridge_devnum, pcibridge_funcnum,
312 (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
313 u_pcibridge_aspmsetting));
314
315 udelay(50);
316
317 /*Get ASPM level (with/without Clock Req) */
318 aspmlevel = rtlpci->const_devicepci_aspm_setting;
319 u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
320
321 /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
322 /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
323
324 u_device_aspmsetting |= aspmlevel;
325
326 _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
327
328 if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
329 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
330 RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
331 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
332 }
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500333 udelay(100);
Larry Finger0c817332010-12-08 11:12:31 -0600334}
335
336static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
337{
338 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
339 u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
340
341 bool status = false;
342 u8 offset_e0;
343 unsigned offset_e4;
344
345 rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
346 pcicfg_addrport + 0xE0);
347 rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, 0xA0);
348
349 rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
350 pcicfg_addrport + 0xE0);
351 rtl_pci_raw_read_port_uchar(PCI_CONF_DATA, &offset_e0);
352
353 if (offset_e0 == 0xA0) {
354 rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
355 pcicfg_addrport + 0xE4);
356 rtl_pci_raw_read_port_ulong(PCI_CONF_DATA, &offset_e4);
357 if (offset_e4 & BIT(23))
358 status = true;
359 }
360
361 return status;
362}
363
Larry Fingerd3bb1422011-04-25 13:23:20 -0500364static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
Larry Finger0c817332010-12-08 11:12:31 -0600365{
366 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
367 u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
368 u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
369 u8 linkctrl_reg;
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500370 u8 num4bbytes;
Larry Finger0c817332010-12-08 11:12:31 -0600371
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500372 num4bbytes = (capabilityoffset + 0x10) / 4;
Larry Finger0c817332010-12-08 11:12:31 -0600373
374 /*Read Link Control Register */
375 rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500376 pcicfg_addrport + (num4bbytes << 2));
Larry Finger0c817332010-12-08 11:12:31 -0600377 rtl_pci_raw_read_port_uchar(PCI_CONF_DATA, &linkctrl_reg);
378
379 pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
380}
381
382static void rtl_pci_parse_configuration(struct pci_dev *pdev,
383 struct ieee80211_hw *hw)
384{
385 struct rtl_priv *rtlpriv = rtl_priv(hw);
386 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
387
388 u8 tmp;
389 int pos;
390 u8 linkctrl_reg;
391
392 /*Link Control Register */
393 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
394 pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &linkctrl_reg);
395 pcipriv->ndis_adapter.linkctrl_reg = linkctrl_reg;
396
397 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
398 ("Link Control Register =%x\n",
399 pcipriv->ndis_adapter.linkctrl_reg));
400
401 pci_read_config_byte(pdev, 0x98, &tmp);
402 tmp |= BIT(4);
403 pci_write_config_byte(pdev, 0x98, tmp);
404
405 tmp = 0x17;
406 pci_write_config_byte(pdev, 0x70f, tmp);
407}
408
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500409static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
Larry Finger0c817332010-12-08 11:12:31 -0600410{
411 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
412
413 _rtl_pci_update_default_setting(hw);
414
415 if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
416 /*Always enable ASPM & Clock Req. */
417 rtl_pci_enable_aspm(hw);
418 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
419 }
420
421}
422
Larry Finger0c817332010-12-08 11:12:31 -0600423static void _rtl_pci_io_handler_init(struct device *dev,
424 struct ieee80211_hw *hw)
425{
426 struct rtl_priv *rtlpriv = rtl_priv(hw);
427
428 rtlpriv->io.dev = dev;
429
430 rtlpriv->io.write8_async = pci_write8_async;
431 rtlpriv->io.write16_async = pci_write16_async;
432 rtlpriv->io.write32_async = pci_write32_async;
433
434 rtlpriv->io.read8_sync = pci_read8_sync;
435 rtlpriv->io.read16_sync = pci_read16_sync;
436 rtlpriv->io.read32_sync = pci_read32_sync;
437
438}
439
440static void _rtl_pci_io_handler_release(struct ieee80211_hw *hw)
441{
442}
443
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500444static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
445 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
446{
447 struct rtl_priv *rtlpriv = rtl_priv(hw);
448 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
449 u8 additionlen = FCS_LEN;
450 struct sk_buff *next_skb;
451
452 /* here open is 4, wep/tkip is 8, aes is 12*/
453 if (info->control.hw_key)
454 additionlen += info->control.hw_key->icv_len;
455
456 /* The most skb num is 6 */
457 tcb_desc->empkt_num = 0;
458 spin_lock_bh(&rtlpriv->locks.waitq_lock);
459 skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
460 struct ieee80211_tx_info *next_info;
461
462 next_info = IEEE80211_SKB_CB(next_skb);
463 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
464 tcb_desc->empkt_len[tcb_desc->empkt_num] =
465 next_skb->len + additionlen;
466 tcb_desc->empkt_num++;
467 } else {
468 break;
469 }
470
471 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
472 next_skb))
473 break;
474
475 if (tcb_desc->empkt_num >= 5)
476 break;
477 }
478 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
479
480 return true;
481}
482
483/* just for early mode now */
484static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
485{
486 struct rtl_priv *rtlpriv = rtl_priv(hw);
487 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
488 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
489 struct sk_buff *skb = NULL;
490 struct ieee80211_tx_info *info = NULL;
491 int tid; /* should be int */
492
493 if (!rtlpriv->rtlhal.earlymode_enable)
494 return;
495
496 /* we juse use em for BE/BK/VI/VO */
497 for (tid = 7; tid >= 0; tid--) {
498 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(hw, tid)];
499 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
500 while (!mac->act_scanning &&
501 rtlpriv->psc.rfpwr_state == ERFON) {
502 struct rtl_tcb_desc tcb_desc;
503 memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
504
505 spin_lock_bh(&rtlpriv->locks.waitq_lock);
506 if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
507 (ring->entries - skb_queue_len(&ring->queue) > 5)) {
508 skb = skb_dequeue(&mac->skb_waitq[tid]);
509 } else {
510 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
511 break;
512 }
513 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
514
515 /* Some macaddr can't do early mode. like
516 * multicast/broadcast/no_qos data */
517 info = IEEE80211_SKB_CB(skb);
518 if (info->flags & IEEE80211_TX_CTL_AMPDU)
519 _rtl_update_earlymode_info(hw, skb,
520 &tcb_desc, tid);
521
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500522 rtlpriv->intf_ops->adapter_tx(hw, skb, &tcb_desc);
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500523 }
524 }
525}
526
527
Larry Finger0c817332010-12-08 11:12:31 -0600528static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
529{
530 struct rtl_priv *rtlpriv = rtl_priv(hw);
531 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
532
533 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
534
535 while (skb_queue_len(&ring->queue)) {
536 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
537 struct sk_buff *skb;
538 struct ieee80211_tx_info *info;
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500539 __le16 fc;
540 u8 tid;
Larry Finger0c817332010-12-08 11:12:31 -0600541
542 u8 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) entry, true,
543 HW_DESC_OWN);
544
545 /*
546 *beacon packet will only use the first
547 *descriptor defautly,and the own may not
548 *be cleared by the hardware
549 */
550 if (own)
551 return;
552 ring->idx = (ring->idx + 1) % ring->entries;
553
554 skb = __skb_dequeue(&ring->queue);
555 pci_unmap_single(rtlpci->pdev,
Larry Fingerd3bb1422011-04-25 13:23:20 -0500556 rtlpriv->cfg->ops->
Larry Finger0c817332010-12-08 11:12:31 -0600557 get_desc((u8 *) entry, true,
Larry Fingerd3bb1422011-04-25 13:23:20 -0500558 HW_DESC_TXBUFF_ADDR),
Larry Finger0c817332010-12-08 11:12:31 -0600559 skb->len, PCI_DMA_TODEVICE);
560
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500561 /* remove early mode header */
562 if (rtlpriv->rtlhal.earlymode_enable)
563 skb_pull(skb, EM_HDR_LEN);
564
Larry Finger0c817332010-12-08 11:12:31 -0600565 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
566 ("new ring->idx:%d, "
567 "free: skb_queue_len:%d, free: seq:%x\n",
568 ring->idx,
569 skb_queue_len(&ring->queue),
570 *(u16 *) (skb->data + 22)));
571
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500572 if (prio == TXCMD_QUEUE) {
573 dev_kfree_skb(skb);
574 goto tx_status_ok;
575
576 }
577
578 /* for sw LPS, just after NULL skb send out, we can
579 * sure AP kown we are sleeped, our we should not let
580 * rf to sleep*/
581 fc = rtl_get_fc(skb);
582 if (ieee80211_is_nullfunc(fc)) {
583 if (ieee80211_has_pm(fc)) {
584 rtlpriv->mac80211.offchan_deley = true;
585 rtlpriv->psc.state_inap = 1;
586 } else {
587 rtlpriv->psc.state_inap = 0;
588 }
589 }
590
591 /* update tid tx pkt num */
592 tid = rtl_get_tid(skb);
593 if (tid <= 7)
594 rtlpriv->link_info.tidtx_inperiod[tid]++;
595
Larry Finger0c817332010-12-08 11:12:31 -0600596 info = IEEE80211_SKB_CB(skb);
597 ieee80211_tx_info_clear_status(info);
598
599 info->flags |= IEEE80211_TX_STAT_ACK;
600 /*info->status.rates[0].count = 1; */
601
602 ieee80211_tx_status_irqsafe(hw, skb);
603
604 if ((ring->entries - skb_queue_len(&ring->queue))
605 == 2) {
606
607 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
608 ("more desc left, wake"
609 "skb_queue@%d,ring->idx = %d,"
610 "skb_queue_len = 0x%d\n",
611 prio, ring->idx,
612 skb_queue_len(&ring->queue)));
613
614 ieee80211_wake_queue(hw,
615 skb_get_queue_mapping
616 (skb));
617 }
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500618tx_status_ok:
Larry Finger0c817332010-12-08 11:12:31 -0600619 skb = NULL;
620 }
621
622 if (((rtlpriv->link_info.num_rx_inperiod +
623 rtlpriv->link_info.num_tx_inperiod) > 8) ||
624 (rtlpriv->link_info.num_rx_inperiod > 2)) {
625 rtl_lps_leave(hw);
626 }
627}
628
629static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
630{
631 struct rtl_priv *rtlpriv = rtl_priv(hw);
632 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
633 int rx_queue_idx = RTL_PCI_RX_MPDU_QUEUE;
634
635 struct ieee80211_rx_status rx_status = { 0 };
636 unsigned int count = rtlpci->rxringcount;
637 u8 own;
638 u8 tmp_one;
639 u32 bufferaddress;
640 bool unicast = false;
641
642 struct rtl_stats stats = {
643 .signal = 0,
644 .noise = -98,
645 .rate = 0,
646 };
Mike McCormack34ddb202011-05-31 08:49:07 +0900647 int index = rtlpci->rx_ring[rx_queue_idx].idx;
Larry Finger0c817332010-12-08 11:12:31 -0600648
649 /*RX NORMAL PKT */
650 while (count--) {
651 /*rx descriptor */
652 struct rtl_rx_desc *pdesc = &rtlpci->rx_ring[rx_queue_idx].desc[
Mike McCormack34ddb202011-05-31 08:49:07 +0900653 index];
Larry Finger0c817332010-12-08 11:12:31 -0600654 /*rx pkt */
655 struct sk_buff *skb = rtlpci->rx_ring[rx_queue_idx].rx_buf[
Mike McCormack34ddb202011-05-31 08:49:07 +0900656 index];
Larry Finger0c817332010-12-08 11:12:31 -0600657
658 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
659 false, HW_DESC_OWN);
660
661 if (own) {
662 /*wait data to be filled by hardware */
Mike McCormack34ddb202011-05-31 08:49:07 +0900663 break;
Larry Finger0c817332010-12-08 11:12:31 -0600664 } else {
665 struct ieee80211_hdr *hdr;
Larry Finger17c9ac62011-02-19 16:29:57 -0600666 __le16 fc;
Larry Finger0c817332010-12-08 11:12:31 -0600667 struct sk_buff *new_skb = NULL;
668
669 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
670 &rx_status,
671 (u8 *) pdesc, skb);
672
Larry Finger0c817332010-12-08 11:12:31 -0600673 skb_put(skb, rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
674 false,
675 HW_DESC_RXPKT_LEN));
676 skb_reserve(skb,
677 stats.rx_drvinfo_size + stats.rx_bufshift);
678
679 /*
680 *NOTICE This can not be use for mac80211,
681 *this is done in mac80211 code,
682 *if you done here sec DHCP will fail
683 *skb_trim(skb, skb->len - 4);
684 */
685
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500686 hdr = rtl_get_hdr(skb);
687 fc = rtl_get_fc(skb);
Larry Finger0c817332010-12-08 11:12:31 -0600688
Larry Fingera9e12862011-05-19 10:17:04 -0500689 /* try for new buffer - if allocation fails, drop
690 * frame and reuse old buffer
691 */
692 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
693 if (unlikely(!new_skb)) {
694 RT_TRACE(rtlpriv, (COMP_INTR | COMP_RECV),
695 DBG_DMESG,
696 ("can't alloc skb for rx\n"));
697 goto done;
698 }
699 pci_unmap_single(rtlpci->pdev,
700 *((dma_addr_t *) skb->cb),
701 rtlpci->rxbuffersize,
702 PCI_DMA_FROMDEVICE);
703
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500704 if (!stats.crc || !stats.hwerror) {
Larry Finger0c817332010-12-08 11:12:31 -0600705 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
706 sizeof(rx_status));
707
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500708 if (is_broadcast_ether_addr(hdr->addr1)) {
Larry Finger0c817332010-12-08 11:12:31 -0600709 ;/*TODO*/
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500710 } else if (is_multicast_ether_addr(hdr->addr1)) {
711 ;/*TODO*/
712 } else {
713 unicast = true;
714 rtlpriv->stats.rxbytesunicast +=
715 skb->len;
Larry Finger0c817332010-12-08 11:12:31 -0600716 }
717
718 rtl_is_special_data(hw, skb, false);
719
720 if (ieee80211_is_data(fc)) {
721 rtlpriv->cfg->ops->led_control(hw,
722 LED_CTL_RX);
723
724 if (unicast)
725 rtlpriv->link_info.
726 num_rx_inperiod++;
727 }
728
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500729 /* for sw lps */
730 rtl_swlps_beacon(hw, (void *)skb->data,
731 skb->len);
732 rtl_recognize_peer(hw, (void *)skb->data,
733 skb->len);
734 if ((rtlpriv->mac80211.opmode ==
735 NL80211_IFTYPE_AP) &&
736 (rtlpriv->rtlhal.current_bandtype ==
737 BAND_ON_2_4G) &&
738 (ieee80211_is_beacon(fc) ||
739 ieee80211_is_probe_resp(fc))) {
Larry Finger0c817332010-12-08 11:12:31 -0600740 dev_kfree_skb_any(skb);
Chaoming Li5c4bc1c2010-12-22 10:56:02 -0600741 } else {
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500742 if (unlikely(!rtl_action_proc(hw, skb,
743 false))) {
744 dev_kfree_skb_any(skb);
745 } else {
746 struct sk_buff *uskb = NULL;
747 u8 *pdata;
748 uskb = dev_alloc_skb(skb->len
749 + 128);
750 memcpy(IEEE80211_SKB_RXCB(uskb),
751 &rx_status,
752 sizeof(rx_status));
753 pdata = (u8 *)skb_put(uskb,
754 skb->len);
755 memcpy(pdata, skb->data,
756 skb->len);
757 dev_kfree_skb_any(skb);
Chaoming Li5c4bc1c2010-12-22 10:56:02 -0600758
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500759 ieee80211_rx_irqsafe(hw, uskb);
760 }
Chaoming Li5c4bc1c2010-12-22 10:56:02 -0600761 }
Larry Finger0c817332010-12-08 11:12:31 -0600762 } else {
763 dev_kfree_skb_any(skb);
764 }
765
766 if (((rtlpriv->link_info.num_rx_inperiod +
767 rtlpriv->link_info.num_tx_inperiod) > 8) ||
768 (rtlpriv->link_info.num_rx_inperiod > 2)) {
769 rtl_lps_leave(hw);
770 }
771
Larry Finger0c817332010-12-08 11:12:31 -0600772 skb = new_skb;
Larry Finger0c817332010-12-08 11:12:31 -0600773
Mike McCormack34ddb202011-05-31 08:49:07 +0900774 rtlpci->rx_ring[rx_queue_idx].rx_buf[index] = skb;
Larry Finger0c817332010-12-08 11:12:31 -0600775 *((dma_addr_t *) skb->cb) =
776 pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
777 rtlpci->rxbuffersize,
778 PCI_DMA_FROMDEVICE);
779
780 }
781done:
Larry Fingerd3bb1422011-04-25 13:23:20 -0500782 bufferaddress = (*((dma_addr_t *)skb->cb));
Larry Finger0c817332010-12-08 11:12:31 -0600783 tmp_one = 1;
784 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, false,
785 HW_DESC_RXBUFF_ADDR,
786 (u8 *)&bufferaddress);
787 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false, HW_DESC_RXOWN,
788 (u8 *)&tmp_one);
789 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
790 HW_DESC_RXPKT_LEN,
791 (u8 *)&rtlpci->rxbuffersize);
792
Mike McCormack34ddb202011-05-31 08:49:07 +0900793 if (index == rtlpci->rxringcount - 1)
Larry Finger0c817332010-12-08 11:12:31 -0600794 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
795 HW_DESC_RXERO,
796 (u8 *)&tmp_one);
797
Mike McCormack34ddb202011-05-31 08:49:07 +0900798 index = (index + 1) % rtlpci->rxringcount;
Larry Finger0c817332010-12-08 11:12:31 -0600799 }
800
Mike McCormack34ddb202011-05-31 08:49:07 +0900801 rtlpci->rx_ring[rx_queue_idx].idx = index;
Larry Finger0c817332010-12-08 11:12:31 -0600802}
803
Larry Finger0c817332010-12-08 11:12:31 -0600804static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
805{
806 struct ieee80211_hw *hw = dev_id;
807 struct rtl_priv *rtlpriv = rtl_priv(hw);
808 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500809 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
Larry Finger0c817332010-12-08 11:12:31 -0600810 unsigned long flags;
811 u32 inta = 0;
812 u32 intb = 0;
813
814 if (rtlpci->irq_enabled == 0)
815 return IRQ_HANDLED;
816
817 spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
818
819 /*read ISR: 4/8bytes */
820 rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
821
822 /*Shared IRQ or HW disappared */
823 if (!inta || inta == 0xffff)
824 goto done;
825
826 /*<1> beacon related */
827 if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
828 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
829 ("beacon ok interrupt!\n"));
830 }
831
832 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
833 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
834 ("beacon err interrupt!\n"));
835 }
836
837 if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
838 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
839 ("beacon interrupt!\n"));
840 }
841
842 if (inta & rtlpriv->cfg->maps[RTL_IMR_BcnInt]) {
843 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
844 ("prepare beacon for interrupt!\n"));
845 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
846 }
847
848 /*<3> Tx related */
849 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
850 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("IMR_TXFOVW!\n"));
851
852 if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
853 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
854 ("Manage ok interrupt!\n"));
855 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
856 }
857
858 if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
859 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
860 ("HIGH_QUEUE ok interrupt!\n"));
861 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
862 }
863
864 if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
865 rtlpriv->link_info.num_tx_inperiod++;
866
867 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
868 ("BK Tx OK interrupt!\n"));
869 _rtl_pci_tx_isr(hw, BK_QUEUE);
870 }
871
872 if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
873 rtlpriv->link_info.num_tx_inperiod++;
874
875 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
876 ("BE TX OK interrupt!\n"));
877 _rtl_pci_tx_isr(hw, BE_QUEUE);
878 }
879
880 if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
881 rtlpriv->link_info.num_tx_inperiod++;
882
883 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
884 ("VI TX OK interrupt!\n"));
885 _rtl_pci_tx_isr(hw, VI_QUEUE);
886 }
887
888 if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
889 rtlpriv->link_info.num_tx_inperiod++;
890
891 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
892 ("Vo TX OK interrupt!\n"));
893 _rtl_pci_tx_isr(hw, VO_QUEUE);
894 }
895
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500896 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
897 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
898 rtlpriv->link_info.num_tx_inperiod++;
899
900 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
901 ("CMD TX OK interrupt!\n"));
902 _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
903 }
904 }
905
Larry Finger0c817332010-12-08 11:12:31 -0600906 /*<2> Rx related */
907 if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
908 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, ("Rx ok interrupt!\n"));
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500909 _rtl_pci_rx_interrupt(hw);
Larry Finger0c817332010-12-08 11:12:31 -0600910 }
911
912 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
913 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
914 ("rx descriptor unavailable!\n"));
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500915 _rtl_pci_rx_interrupt(hw);
Larry Finger0c817332010-12-08 11:12:31 -0600916 }
917
918 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
919 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("rx overflow !\n"));
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500920 _rtl_pci_rx_interrupt(hw);
Larry Finger0c817332010-12-08 11:12:31 -0600921 }
922
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500923 if (rtlpriv->rtlhal.earlymode_enable)
924 tasklet_schedule(&rtlpriv->works.irq_tasklet);
925
Larry Finger0c817332010-12-08 11:12:31 -0600926 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
927 return IRQ_HANDLED;
928
929done:
930 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
931 return IRQ_HANDLED;
932}
933
934static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
935{
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500936 _rtl_pci_tx_chk_waitq(hw);
Larry Finger0c817332010-12-08 11:12:31 -0600937}
938
939static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
940{
941 struct rtl_priv *rtlpriv = rtl_priv(hw);
942 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
943 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500944 struct rtl8192_tx_ring *ring = NULL;
Larry Finger0c817332010-12-08 11:12:31 -0600945 struct ieee80211_hdr *hdr = NULL;
946 struct ieee80211_tx_info *info = NULL;
947 struct sk_buff *pskb = NULL;
948 struct rtl_tx_desc *pdesc = NULL;
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500949 struct rtl_tcb_desc tcb_desc;
Larry Finger0c817332010-12-08 11:12:31 -0600950 u8 temp_one = 1;
951
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500952 memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
Larry Finger0c817332010-12-08 11:12:31 -0600953 ring = &rtlpci->tx_ring[BEACON_QUEUE];
954 pskb = __skb_dequeue(&ring->queue);
955 if (pskb)
956 kfree_skb(pskb);
957
958 /*NB: the beacon data buffer must be 32-bit aligned. */
959 pskb = ieee80211_beacon_get(hw, mac->vif);
960 if (pskb == NULL)
961 return;
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500962 hdr = rtl_get_hdr(pskb);
Larry Finger0c817332010-12-08 11:12:31 -0600963 info = IEEE80211_SKB_CB(pskb);
Larry Finger0c817332010-12-08 11:12:31 -0600964 pdesc = &ring->desc[0];
965 rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *) pdesc,
Chaoming_Lic7cfe382011-04-25 13:23:15 -0500966 info, pskb, BEACON_QUEUE, &tcb_desc);
Larry Finger0c817332010-12-08 11:12:31 -0600967
968 __skb_queue_tail(&ring->queue, pskb);
969
970 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, true, HW_DESC_OWN,
971 (u8 *)&temp_one);
972
973 return;
974}
975
976static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
977{
978 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
979 u8 i;
980
981 for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
982 rtlpci->txringcount[i] = RT_TXDESC_NUM;
983
984 /*
985 *we just alloc 2 desc for beacon queue,
986 *because we just need first desc in hw beacon.
987 */
988 rtlpci->txringcount[BEACON_QUEUE] = 2;
989
990 /*
991 *BE queue need more descriptor for performance
992 *consideration or, No more tx desc will happen,
993 *and may cause mac80211 mem leakage.
994 */
995 rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
996
997 rtlpci->rxbuffersize = 9100; /*2048/1024; */
998 rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT; /*64; */
999}
1000
1001static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
1002 struct pci_dev *pdev)
1003{
1004 struct rtl_priv *rtlpriv = rtl_priv(hw);
1005 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1006 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1007 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
Larry Finger0c817332010-12-08 11:12:31 -06001008
1009 rtlpci->up_first_time = true;
1010 rtlpci->being_init_adapter = false;
1011
1012 rtlhal->hw = hw;
1013 rtlpci->pdev = pdev;
1014
Larry Finger0c817332010-12-08 11:12:31 -06001015 /*Tx/Rx related var */
1016 _rtl_pci_init_trx_var(hw);
1017
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001018 /*IBSS*/ mac->beacon_interval = 100;
Larry Finger0c817332010-12-08 11:12:31 -06001019
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001020 /*AMPDU*/
1021 mac->min_space_cfg = 0;
Larry Finger0c817332010-12-08 11:12:31 -06001022 mac->max_mss_density = 0;
1023 /*set sane AMPDU defaults */
1024 mac->current_ampdu_density = 7;
1025 mac->current_ampdu_factor = 3;
1026
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001027 /*QOS*/
1028 rtlpci->acm_method = eAcmWay2_SW;
Larry Finger0c817332010-12-08 11:12:31 -06001029
1030 /*task */
1031 tasklet_init(&rtlpriv->works.irq_tasklet,
1032 (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1033 (unsigned long)hw);
1034 tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1035 (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1036 (unsigned long)hw);
1037}
1038
1039static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1040 unsigned int prio, unsigned int entries)
1041{
1042 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1043 struct rtl_priv *rtlpriv = rtl_priv(hw);
1044 struct rtl_tx_desc *ring;
1045 dma_addr_t dma;
1046 u32 nextdescaddress;
1047 int i;
1048
1049 ring = pci_alloc_consistent(rtlpci->pdev,
1050 sizeof(*ring) * entries, &dma);
1051
1052 if (!ring || (unsigned long)ring & 0xFF) {
1053 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1054 ("Cannot allocate TX ring (prio = %d)\n", prio));
1055 return -ENOMEM;
1056 }
1057
1058 memset(ring, 0, sizeof(*ring) * entries);
1059 rtlpci->tx_ring[prio].desc = ring;
1060 rtlpci->tx_ring[prio].dma = dma;
1061 rtlpci->tx_ring[prio].idx = 0;
1062 rtlpci->tx_ring[prio].entries = entries;
1063 skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1064
1065 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1066 ("queue:%d, ring_addr:%p\n", prio, ring));
1067
1068 for (i = 0; i < entries; i++) {
Larry Fingerd3bb1422011-04-25 13:23:20 -05001069 nextdescaddress = (u32) dma +
Larry Finger982d96b2011-05-01 22:30:54 -05001070 ((i + 1) % entries) *
Larry Fingerd3bb1422011-04-25 13:23:20 -05001071 sizeof(*ring);
Larry Finger0c817332010-12-08 11:12:31 -06001072
1073 rtlpriv->cfg->ops->set_desc((u8 *)&(ring[i]),
1074 true, HW_DESC_TX_NEXTDESC_ADDR,
1075 (u8 *)&nextdescaddress);
1076 }
1077
1078 return 0;
1079}
1080
1081static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw)
1082{
1083 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1084 struct rtl_priv *rtlpriv = rtl_priv(hw);
1085 struct rtl_rx_desc *entry = NULL;
1086 int i, rx_queue_idx;
1087 u8 tmp_one = 1;
1088
1089 /*
1090 *rx_queue_idx 0:RX_MPDU_QUEUE
1091 *rx_queue_idx 1:RX_CMD_QUEUE
1092 */
1093 for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1094 rx_queue_idx++) {
1095 rtlpci->rx_ring[rx_queue_idx].desc =
1096 pci_alloc_consistent(rtlpci->pdev,
1097 sizeof(*rtlpci->rx_ring[rx_queue_idx].
1098 desc) * rtlpci->rxringcount,
1099 &rtlpci->rx_ring[rx_queue_idx].dma);
1100
1101 if (!rtlpci->rx_ring[rx_queue_idx].desc ||
1102 (unsigned long)rtlpci->rx_ring[rx_queue_idx].desc & 0xFF) {
1103 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1104 ("Cannot allocate RX ring\n"));
1105 return -ENOMEM;
1106 }
1107
1108 memset(rtlpci->rx_ring[rx_queue_idx].desc, 0,
1109 sizeof(*rtlpci->rx_ring[rx_queue_idx].desc) *
1110 rtlpci->rxringcount);
1111
1112 rtlpci->rx_ring[rx_queue_idx].idx = 0;
1113
Larry Finger0019a2c2011-05-19 11:48:45 -05001114 /* If amsdu_8k is disabled, set buffersize to 4096. This
1115 * change will reduce memory fragmentation.
1116 */
1117 if (rtlpci->rxbuffersize > 4096 &&
1118 rtlpriv->rtlhal.disable_amsdu_8k)
1119 rtlpci->rxbuffersize = 4096;
1120
Larry Finger0c817332010-12-08 11:12:31 -06001121 for (i = 0; i < rtlpci->rxringcount; i++) {
1122 struct sk_buff *skb =
1123 dev_alloc_skb(rtlpci->rxbuffersize);
1124 u32 bufferaddress;
Larry Finger0c817332010-12-08 11:12:31 -06001125 if (!skb)
1126 return 0;
Jesper Juhlbdc4bf652011-01-21 13:40:54 -06001127 entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
Larry Finger0c817332010-12-08 11:12:31 -06001128
1129 /*skb->dev = dev; */
1130
1131 rtlpci->rx_ring[rx_queue_idx].rx_buf[i] = skb;
1132
1133 /*
1134 *just set skb->cb to mapping addr
1135 *for pci_unmap_single use
1136 */
1137 *((dma_addr_t *) skb->cb) =
1138 pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
1139 rtlpci->rxbuffersize,
1140 PCI_DMA_FROMDEVICE);
1141
Larry Fingerd3bb1422011-04-25 13:23:20 -05001142 bufferaddress = (*((dma_addr_t *)skb->cb));
Larry Finger0c817332010-12-08 11:12:31 -06001143 rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1144 HW_DESC_RXBUFF_ADDR,
1145 (u8 *)&bufferaddress);
1146 rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1147 HW_DESC_RXPKT_LEN,
1148 (u8 *)&rtlpci->
1149 rxbuffersize);
1150 rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1151 HW_DESC_RXOWN,
1152 (u8 *)&tmp_one);
1153 }
1154
1155 rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1156 HW_DESC_RXERO, (u8 *)&tmp_one);
1157 }
1158 return 0;
1159}
1160
1161static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1162 unsigned int prio)
1163{
1164 struct rtl_priv *rtlpriv = rtl_priv(hw);
1165 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1166 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1167
1168 while (skb_queue_len(&ring->queue)) {
1169 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
1170 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1171
1172 pci_unmap_single(rtlpci->pdev,
Larry Fingerd3bb1422011-04-25 13:23:20 -05001173 rtlpriv->cfg->
Larry Finger0c817332010-12-08 11:12:31 -06001174 ops->get_desc((u8 *) entry, true,
Larry Fingerd3bb1422011-04-25 13:23:20 -05001175 HW_DESC_TXBUFF_ADDR),
Larry Finger0c817332010-12-08 11:12:31 -06001176 skb->len, PCI_DMA_TODEVICE);
1177 kfree_skb(skb);
1178 ring->idx = (ring->idx + 1) % ring->entries;
1179 }
1180
1181 pci_free_consistent(rtlpci->pdev,
1182 sizeof(*ring->desc) * ring->entries,
1183 ring->desc, ring->dma);
1184 ring->desc = NULL;
1185}
1186
1187static void _rtl_pci_free_rx_ring(struct rtl_pci *rtlpci)
1188{
1189 int i, rx_queue_idx;
1190
1191 /*rx_queue_idx 0:RX_MPDU_QUEUE */
1192 /*rx_queue_idx 1:RX_CMD_QUEUE */
1193 for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1194 rx_queue_idx++) {
1195 for (i = 0; i < rtlpci->rxringcount; i++) {
1196 struct sk_buff *skb =
1197 rtlpci->rx_ring[rx_queue_idx].rx_buf[i];
1198 if (!skb)
1199 continue;
1200
1201 pci_unmap_single(rtlpci->pdev,
1202 *((dma_addr_t *) skb->cb),
1203 rtlpci->rxbuffersize,
1204 PCI_DMA_FROMDEVICE);
1205 kfree_skb(skb);
1206 }
1207
1208 pci_free_consistent(rtlpci->pdev,
1209 sizeof(*rtlpci->rx_ring[rx_queue_idx].
1210 desc) * rtlpci->rxringcount,
1211 rtlpci->rx_ring[rx_queue_idx].desc,
1212 rtlpci->rx_ring[rx_queue_idx].dma);
1213 rtlpci->rx_ring[rx_queue_idx].desc = NULL;
1214 }
1215}
1216
1217static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1218{
1219 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1220 int ret;
1221 int i;
1222
1223 ret = _rtl_pci_init_rx_ring(hw);
1224 if (ret)
1225 return ret;
1226
1227 for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1228 ret = _rtl_pci_init_tx_ring(hw, i,
1229 rtlpci->txringcount[i]);
1230 if (ret)
1231 goto err_free_rings;
1232 }
1233
1234 return 0;
1235
1236err_free_rings:
1237 _rtl_pci_free_rx_ring(rtlpci);
1238
1239 for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1240 if (rtlpci->tx_ring[i].desc)
1241 _rtl_pci_free_tx_ring(hw, i);
1242
1243 return 1;
1244}
1245
1246static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1247{
1248 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1249 u32 i;
1250
1251 /*free rx rings */
1252 _rtl_pci_free_rx_ring(rtlpci);
1253
1254 /*free tx rings */
1255 for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1256 _rtl_pci_free_tx_ring(hw, i);
1257
1258 return 0;
1259}
1260
1261int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1262{
1263 struct rtl_priv *rtlpriv = rtl_priv(hw);
1264 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1265 int i, rx_queue_idx;
1266 unsigned long flags;
1267 u8 tmp_one = 1;
1268
1269 /*rx_queue_idx 0:RX_MPDU_QUEUE */
1270 /*rx_queue_idx 1:RX_CMD_QUEUE */
1271 for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1272 rx_queue_idx++) {
1273 /*
1274 *force the rx_ring[RX_MPDU_QUEUE/
1275 *RX_CMD_QUEUE].idx to the first one
1276 */
1277 if (rtlpci->rx_ring[rx_queue_idx].desc) {
1278 struct rtl_rx_desc *entry = NULL;
1279
1280 for (i = 0; i < rtlpci->rxringcount; i++) {
1281 entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
1282 rtlpriv->cfg->ops->set_desc((u8 *) entry,
1283 false,
1284 HW_DESC_RXOWN,
1285 (u8 *)&tmp_one);
1286 }
1287 rtlpci->rx_ring[rx_queue_idx].idx = 0;
1288 }
1289 }
1290
1291 /*
1292 *after reset, release previous pending packet,
1293 *and force the tx idx to the first one
1294 */
1295 spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1296 for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1297 if (rtlpci->tx_ring[i].desc) {
1298 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1299
1300 while (skb_queue_len(&ring->queue)) {
1301 struct rtl_tx_desc *entry =
1302 &ring->desc[ring->idx];
1303 struct sk_buff *skb =
1304 __skb_dequeue(&ring->queue);
1305
1306 pci_unmap_single(rtlpci->pdev,
Larry Fingerd3bb1422011-04-25 13:23:20 -05001307 rtlpriv->cfg->ops->
Larry Finger0c817332010-12-08 11:12:31 -06001308 get_desc((u8 *)
1309 entry,
1310 true,
Larry Fingerd3bb1422011-04-25 13:23:20 -05001311 HW_DESC_TXBUFF_ADDR),
Larry Finger0c817332010-12-08 11:12:31 -06001312 skb->len, PCI_DMA_TODEVICE);
1313 kfree_skb(skb);
1314 ring->idx = (ring->idx + 1) % ring->entries;
1315 }
1316 ring->idx = 0;
1317 }
1318 }
1319
1320 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1321
1322 return 0;
1323}
1324
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001325static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1326 struct sk_buff *skb)
Larry Finger0c817332010-12-08 11:12:31 -06001327{
1328 struct rtl_priv *rtlpriv = rtl_priv(hw);
Larry Finger0c817332010-12-08 11:12:31 -06001329 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001330 struct ieee80211_sta *sta = info->control.sta;
1331 struct rtl_sta_info *sta_entry = NULL;
1332 u8 tid = rtl_get_tid(skb);
1333
1334 if (!sta)
1335 return false;
1336 sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1337
1338 if (!rtlpriv->rtlhal.earlymode_enable)
1339 return false;
1340 if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1341 return false;
1342 if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1343 return false;
1344 if (tid > 7)
1345 return false;
1346
1347 /* maybe every tid should be checked */
1348 if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1349 return false;
1350
1351 spin_lock_bh(&rtlpriv->locks.waitq_lock);
1352 skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1353 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1354
1355 return true;
1356}
1357
Larry Fingerd3bb1422011-04-25 13:23:20 -05001358static int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001359 struct rtl_tcb_desc *ptcb_desc)
1360{
1361 struct rtl_priv *rtlpriv = rtl_priv(hw);
1362 struct rtl_sta_info *sta_entry = NULL;
1363 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1364 struct ieee80211_sta *sta = info->control.sta;
Larry Finger0c817332010-12-08 11:12:31 -06001365 struct rtl8192_tx_ring *ring;
1366 struct rtl_tx_desc *pdesc;
1367 u8 idx;
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001368 u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
Larry Finger0c817332010-12-08 11:12:31 -06001369 unsigned long flags;
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001370 struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1371 __le16 fc = rtl_get_fc(skb);
Larry Finger0c817332010-12-08 11:12:31 -06001372 u8 *pda_addr = hdr->addr1;
1373 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1374 /*ssn */
Larry Finger0c817332010-12-08 11:12:31 -06001375 u8 tid = 0;
1376 u16 seq_number = 0;
1377 u8 own;
1378 u8 temp_one = 1;
1379
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001380 if (ieee80211_is_auth(fc)) {
1381 RT_TRACE(rtlpriv, COMP_SEND, DBG_DMESG, ("MAC80211_LINKING\n"));
1382 rtl_ips_nic_on(hw);
1383 }
Larry Finger0c817332010-12-08 11:12:31 -06001384
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001385 if (rtlpriv->psc.sw_ps_enabled) {
1386 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1387 !ieee80211_has_pm(fc))
1388 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1389 }
1390
1391 rtl_action_proc(hw, skb, true);
Larry Finger0c817332010-12-08 11:12:31 -06001392
1393 if (is_multicast_ether_addr(pda_addr))
1394 rtlpriv->stats.txbytesmulticast += skb->len;
1395 else if (is_broadcast_ether_addr(pda_addr))
1396 rtlpriv->stats.txbytesbroadcast += skb->len;
1397 else
1398 rtlpriv->stats.txbytesunicast += skb->len;
1399
1400 spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
Larry Finger0c817332010-12-08 11:12:31 -06001401 ring = &rtlpci->tx_ring[hw_queue];
1402 if (hw_queue != BEACON_QUEUE)
1403 idx = (ring->idx + skb_queue_len(&ring->queue)) %
1404 ring->entries;
1405 else
1406 idx = 0;
1407
1408 pdesc = &ring->desc[idx];
1409 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
1410 true, HW_DESC_OWN);
1411
1412 if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1413 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1414 ("No more TX desc@%d, ring->idx = %d,"
1415 "idx = %d, skb_queue_len = 0x%d\n",
1416 hw_queue, ring->idx, idx,
1417 skb_queue_len(&ring->queue)));
1418
1419 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1420 return skb->len;
1421 }
1422
Larry Finger0c817332010-12-08 11:12:31 -06001423 if (ieee80211_is_data_qos(fc)) {
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001424 tid = rtl_get_tid(skb);
1425 if (sta) {
1426 sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1427 seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1428 IEEE80211_SCTL_SEQ) >> 4;
1429 seq_number += 1;
Larry Finger0c817332010-12-08 11:12:31 -06001430
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001431 if (!ieee80211_has_morefrags(hdr->frame_control))
1432 sta_entry->tids[tid].seq_number = seq_number;
1433 }
Larry Finger0c817332010-12-08 11:12:31 -06001434 }
1435
1436 if (ieee80211_is_data(fc))
1437 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1438
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001439 rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1440 info, skb, hw_queue, ptcb_desc);
Larry Finger0c817332010-12-08 11:12:31 -06001441
1442 __skb_queue_tail(&ring->queue, skb);
1443
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001444 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, true,
Larry Finger0c817332010-12-08 11:12:31 -06001445 HW_DESC_OWN, (u8 *)&temp_one);
1446
Larry Finger0c817332010-12-08 11:12:31 -06001447
1448 if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1449 hw_queue != BEACON_QUEUE) {
1450
1451 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1452 ("less desc left, stop skb_queue@%d, "
1453 "ring->idx = %d,"
1454 "idx = %d, skb_queue_len = 0x%d\n",
1455 hw_queue, ring->idx, idx,
1456 skb_queue_len(&ring->queue)));
1457
1458 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1459 }
1460
1461 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1462
1463 rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1464
1465 return 0;
1466}
1467
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001468static void rtl_pci_flush(struct ieee80211_hw *hw, bool drop)
1469{
1470 struct rtl_priv *rtlpriv = rtl_priv(hw);
1471 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1472 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1473 u16 i = 0;
1474 int queue_id;
1475 struct rtl8192_tx_ring *ring;
1476
1477 for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1478 u32 queue_len;
1479 ring = &pcipriv->dev.tx_ring[queue_id];
1480 queue_len = skb_queue_len(&ring->queue);
1481 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1482 queue_id == TXCMD_QUEUE) {
1483 queue_id--;
1484 continue;
1485 } else {
1486 msleep(20);
1487 i++;
1488 }
1489
1490 /* we just wait 1s for all queues */
1491 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1492 is_hal_stop(rtlhal) || i >= 200)
1493 return;
1494 }
1495}
1496
Larry Fingerd3bb1422011-04-25 13:23:20 -05001497static void rtl_pci_deinit(struct ieee80211_hw *hw)
Larry Finger0c817332010-12-08 11:12:31 -06001498{
1499 struct rtl_priv *rtlpriv = rtl_priv(hw);
1500 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1501
1502 _rtl_pci_deinit_trx_ring(hw);
1503
1504 synchronize_irq(rtlpci->pdev->irq);
1505 tasklet_kill(&rtlpriv->works.irq_tasklet);
1506
1507 flush_workqueue(rtlpriv->works.rtl_wq);
1508 destroy_workqueue(rtlpriv->works.rtl_wq);
1509
1510}
1511
Larry Fingerd3bb1422011-04-25 13:23:20 -05001512static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
Larry Finger0c817332010-12-08 11:12:31 -06001513{
1514 struct rtl_priv *rtlpriv = rtl_priv(hw);
1515 int err;
1516
1517 _rtl_pci_init_struct(hw, pdev);
1518
1519 err = _rtl_pci_init_trx_ring(hw);
1520 if (err) {
1521 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1522 ("tx ring initialization failed"));
1523 return err;
1524 }
1525
1526 return 1;
1527}
1528
Larry Fingerd3bb1422011-04-25 13:23:20 -05001529static int rtl_pci_start(struct ieee80211_hw *hw)
Larry Finger0c817332010-12-08 11:12:31 -06001530{
1531 struct rtl_priv *rtlpriv = rtl_priv(hw);
1532 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1533 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1534 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1535
1536 int err;
1537
1538 rtl_pci_reset_trx_ring(hw);
1539
1540 rtlpci->driver_is_goingto_unload = false;
1541 err = rtlpriv->cfg->ops->hw_init(hw);
1542 if (err) {
1543 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1544 ("Failed to config hardware!\n"));
1545 return err;
1546 }
1547
1548 rtlpriv->cfg->ops->enable_interrupt(hw);
1549 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("enable_interrupt OK\n"));
1550
1551 rtl_init_rx_config(hw);
1552
1553 /*should after adapter start and interrupt enable. */
1554 set_hal_start(rtlhal);
1555
1556 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1557
1558 rtlpci->up_first_time = false;
1559
1560 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("OK\n"));
1561 return 0;
1562}
1563
Larry Fingerd3bb1422011-04-25 13:23:20 -05001564static void rtl_pci_stop(struct ieee80211_hw *hw)
Larry Finger0c817332010-12-08 11:12:31 -06001565{
1566 struct rtl_priv *rtlpriv = rtl_priv(hw);
1567 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1568 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1569 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1570 unsigned long flags;
1571 u8 RFInProgressTimeOut = 0;
1572
1573 /*
1574 *should before disable interrrupt&adapter
1575 *and will do it immediately.
1576 */
1577 set_hal_stop(rtlhal);
1578
1579 rtlpriv->cfg->ops->disable_interrupt(hw);
1580
1581 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1582 while (ppsc->rfchange_inprogress) {
1583 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1584 if (RFInProgressTimeOut > 100) {
1585 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1586 break;
1587 }
1588 mdelay(1);
1589 RFInProgressTimeOut++;
1590 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1591 }
1592 ppsc->rfchange_inprogress = true;
1593 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1594
1595 rtlpci->driver_is_goingto_unload = true;
1596 rtlpriv->cfg->ops->hw_disable(hw);
1597 rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1598
1599 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1600 ppsc->rfchange_inprogress = false;
1601 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1602
1603 rtl_pci_enable_aspm(hw);
1604}
1605
1606static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1607 struct ieee80211_hw *hw)
1608{
1609 struct rtl_priv *rtlpriv = rtl_priv(hw);
1610 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1611 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1612 struct pci_dev *bridge_pdev = pdev->bus->self;
1613 u16 venderid;
1614 u16 deviceid;
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001615 u8 revisionid;
Larry Finger0c817332010-12-08 11:12:31 -06001616 u16 irqline;
1617 u8 tmp;
1618
Chaoming Lifc7707a2011-05-06 15:32:02 -05001619 pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
Larry Finger0c817332010-12-08 11:12:31 -06001620 venderid = pdev->vendor;
1621 deviceid = pdev->device;
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001622 pci_read_config_byte(pdev, 0x8, &revisionid);
Larry Finger0c817332010-12-08 11:12:31 -06001623 pci_read_config_word(pdev, 0x3C, &irqline);
1624
1625 if (deviceid == RTL_PCI_8192_DID ||
1626 deviceid == RTL_PCI_0044_DID ||
1627 deviceid == RTL_PCI_0047_DID ||
1628 deviceid == RTL_PCI_8192SE_DID ||
1629 deviceid == RTL_PCI_8174_DID ||
1630 deviceid == RTL_PCI_8173_DID ||
1631 deviceid == RTL_PCI_8172_DID ||
1632 deviceid == RTL_PCI_8171_DID) {
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001633 switch (revisionid) {
Larry Finger0c817332010-12-08 11:12:31 -06001634 case RTL_PCI_REVISION_ID_8192PCIE:
1635 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1636 ("8192 PCI-E is found - "
1637 "vid/did=%x/%x\n", venderid, deviceid));
1638 rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1639 break;
1640 case RTL_PCI_REVISION_ID_8192SE:
1641 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1642 ("8192SE is found - "
1643 "vid/did=%x/%x\n", venderid, deviceid));
1644 rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1645 break;
1646 default:
1647 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1648 ("Err: Unknown device - "
1649 "vid/did=%x/%x\n", venderid, deviceid));
1650 rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1651 break;
1652
1653 }
1654 } else if (deviceid == RTL_PCI_8192CET_DID ||
1655 deviceid == RTL_PCI_8192CE_DID ||
1656 deviceid == RTL_PCI_8191CE_DID ||
1657 deviceid == RTL_PCI_8188CE_DID) {
1658 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1659 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1660 ("8192C PCI-E is found - "
1661 "vid/did=%x/%x\n", venderid, deviceid));
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001662 } else if (deviceid == RTL_PCI_8192DE_DID ||
1663 deviceid == RTL_PCI_8192DE_DID2) {
1664 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1665 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1666 ("8192D PCI-E is found - "
1667 "vid/did=%x/%x\n", venderid, deviceid));
Larry Finger0c817332010-12-08 11:12:31 -06001668 } else {
1669 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1670 ("Err: Unknown device -"
1671 " vid/did=%x/%x\n", venderid, deviceid));
1672
1673 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
1674 }
1675
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001676 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
1677 if (revisionid == 0 || revisionid == 1) {
1678 if (revisionid == 0) {
1679 RT_TRACE(rtlpriv, COMP_INIT,
1680 DBG_LOUD, ("Find 92DE MAC0.\n"));
1681 rtlhal->interfaceindex = 0;
1682 } else if (revisionid == 1) {
1683 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1684 ("Find 92DE MAC1.\n"));
1685 rtlhal->interfaceindex = 1;
1686 }
1687 } else {
1688 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1689 ("Unknown device - "
1690 "VendorID/DeviceID=%x/%x, Revision=%x\n",
1691 venderid, deviceid, revisionid));
1692 rtlhal->interfaceindex = 0;
1693 }
1694 }
Larry Finger0c817332010-12-08 11:12:31 -06001695 /*find bus info */
1696 pcipriv->ndis_adapter.busnumber = pdev->bus->number;
1697 pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
1698 pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
1699
1700 /*find bridge info */
1701 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
1702 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
1703 if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
1704 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
1705 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1706 ("Pci Bridge Vendor is found index: %d\n",
1707 tmp));
1708 break;
1709 }
1710 }
1711
1712 if (pcipriv->ndis_adapter.pcibridge_vendor !=
1713 PCI_BRIDGE_VENDOR_UNKNOWN) {
1714 pcipriv->ndis_adapter.pcibridge_busnum =
1715 bridge_pdev->bus->number;
1716 pcipriv->ndis_adapter.pcibridge_devnum =
1717 PCI_SLOT(bridge_pdev->devfn);
1718 pcipriv->ndis_adapter.pcibridge_funcnum =
1719 PCI_FUNC(bridge_pdev->devfn);
Larry Finger0c817332010-12-08 11:12:31 -06001720 pcipriv->ndis_adapter.pcicfg_addrport =
1721 (pcipriv->ndis_adapter.pcibridge_busnum << 16) |
1722 (pcipriv->ndis_adapter.pcibridge_devnum << 11) |
1723 (pcipriv->ndis_adapter.pcibridge_funcnum << 8) | (1 << 31);
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001724 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
1725 pci_pcie_cap(bridge_pdev);
Larry Finger0c817332010-12-08 11:12:31 -06001726 pcipriv->ndis_adapter.num4bytes =
1727 (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
1728
1729 rtl_pci_get_linkcontrol_field(hw);
1730
1731 if (pcipriv->ndis_adapter.pcibridge_vendor ==
1732 PCI_BRIDGE_VENDOR_AMD) {
1733 pcipriv->ndis_adapter.amd_l1_patch =
1734 rtl_pci_get_amd_l1_patch(hw);
1735 }
1736 }
1737
1738 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1739 ("pcidev busnumber:devnumber:funcnumber:"
1740 "vendor:link_ctl %d:%d:%d:%x:%x\n",
1741 pcipriv->ndis_adapter.busnumber,
1742 pcipriv->ndis_adapter.devnumber,
1743 pcipriv->ndis_adapter.funcnumber,
1744 pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg));
1745
1746 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1747 ("pci_bridge busnumber:devnumber:funcnumber:vendor:"
1748 "pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
1749 pcipriv->ndis_adapter.pcibridge_busnum,
1750 pcipriv->ndis_adapter.pcibridge_devnum,
1751 pcipriv->ndis_adapter.pcibridge_funcnum,
1752 pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
1753 pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
1754 pcipriv->ndis_adapter.pcibridge_linkctrlreg,
1755 pcipriv->ndis_adapter.amd_l1_patch));
1756
1757 rtl_pci_parse_configuration(pdev, hw);
1758
1759 return true;
1760}
1761
1762int __devinit rtl_pci_probe(struct pci_dev *pdev,
1763 const struct pci_device_id *id)
1764{
1765 struct ieee80211_hw *hw = NULL;
1766
1767 struct rtl_priv *rtlpriv = NULL;
1768 struct rtl_pci_priv *pcipriv = NULL;
1769 struct rtl_pci *rtlpci;
1770 unsigned long pmem_start, pmem_len, pmem_flags;
1771 int err;
1772
1773 err = pci_enable_device(pdev);
1774 if (err) {
1775 RT_ASSERT(false,
1776 ("%s : Cannot enable new PCI device\n",
1777 pci_name(pdev)));
1778 return err;
1779 }
1780
1781 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1782 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1783 RT_ASSERT(false, ("Unable to obtain 32bit DMA "
1784 "for consistent allocations\n"));
1785 pci_disable_device(pdev);
1786 return -ENOMEM;
1787 }
1788 }
1789
1790 pci_set_master(pdev);
1791
1792 hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
1793 sizeof(struct rtl_priv), &rtl_ops);
1794 if (!hw) {
1795 RT_ASSERT(false,
1796 ("%s : ieee80211 alloc failed\n", pci_name(pdev)));
1797 err = -ENOMEM;
1798 goto fail1;
1799 }
1800
1801 SET_IEEE80211_DEV(hw, &pdev->dev);
1802 pci_set_drvdata(pdev, hw);
1803
1804 rtlpriv = hw->priv;
1805 pcipriv = (void *)rtlpriv->priv;
1806 pcipriv->dev.pdev = pdev;
1807
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001808 /* init cfg & intf_ops */
1809 rtlpriv->rtlhal.interface = INTF_PCI;
1810 rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
1811 rtlpriv->intf_ops = &rtl_pci_ops;
1812
Larry Finger0c817332010-12-08 11:12:31 -06001813 /*
1814 *init dbgp flags before all
1815 *other functions, because we will
1816 *use it in other funtions like
1817 *RT_TRACE/RT_PRINT/RTL_PRINT_DATA
1818 *you can not use these macro
1819 *before this
1820 */
1821 rtl_dbgp_flag_init(hw);
1822
1823 /* MEM map */
1824 err = pci_request_regions(pdev, KBUILD_MODNAME);
1825 if (err) {
1826 RT_ASSERT(false, ("Can't obtain PCI resources\n"));
1827 return err;
1828 }
1829
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001830 pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
1831 pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
1832 pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
Larry Finger0c817332010-12-08 11:12:31 -06001833
1834 /*shared mem start */
1835 rtlpriv->io.pci_mem_start =
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001836 (unsigned long)pci_iomap(pdev,
1837 rtlpriv->cfg->bar_id, pmem_len);
Larry Finger0c817332010-12-08 11:12:31 -06001838 if (rtlpriv->io.pci_mem_start == 0) {
1839 RT_ASSERT(false, ("Can't map PCI mem\n"));
1840 goto fail2;
1841 }
1842
1843 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1844 ("mem mapped space: start: 0x%08lx len:%08lx "
1845 "flags:%08lx, after map:0x%08lx\n",
1846 pmem_start, pmem_len, pmem_flags,
1847 rtlpriv->io.pci_mem_start));
1848
1849 /* Disable Clk Request */
1850 pci_write_config_byte(pdev, 0x81, 0);
1851 /* leave D3 mode */
1852 pci_write_config_byte(pdev, 0x44, 0);
1853 pci_write_config_byte(pdev, 0x04, 0x06);
1854 pci_write_config_byte(pdev, 0x04, 0x07);
1855
Larry Finger0c817332010-12-08 11:12:31 -06001856 /* find adapter */
1857 _rtl_pci_find_adapter(pdev, hw);
1858
1859 /* Init IO handler */
1860 _rtl_pci_io_handler_init(&pdev->dev, hw);
1861
1862 /*like read eeprom and so on */
1863 rtlpriv->cfg->ops->read_eeprom_info(hw);
1864
1865 if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
1866 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1867 ("Can't init_sw_vars.\n"));
1868 goto fail3;
1869 }
1870
1871 rtlpriv->cfg->ops->init_sw_leds(hw);
1872
1873 /*aspm */
1874 rtl_pci_init_aspm(hw);
1875
1876 /* Init mac80211 sw */
1877 err = rtl_init_core(hw);
1878 if (err) {
1879 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1880 ("Can't allocate sw for mac80211.\n"));
1881 goto fail3;
1882 }
1883
1884 /* Init PCI sw */
1885 err = !rtl_pci_init(hw, pdev);
1886 if (err) {
1887 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1888 ("Failed to init PCI.\n"));
1889 goto fail3;
1890 }
1891
1892 err = ieee80211_register_hw(hw);
1893 if (err) {
1894 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1895 ("Can't register mac80211 hw.\n"));
1896 goto fail3;
1897 } else {
1898 rtlpriv->mac80211.mac80211_registered = 1;
1899 }
1900
1901 err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group);
1902 if (err) {
1903 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1904 ("failed to create sysfs device attributes\n"));
1905 goto fail3;
1906 }
1907
1908 /*init rfkill */
1909 rtl_init_rfkill(hw);
1910
1911 rtlpci = rtl_pcidev(pcipriv);
1912 err = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
1913 IRQF_SHARED, KBUILD_MODNAME, hw);
1914 if (err) {
1915 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1916 ("%s: failed to register IRQ handler\n",
1917 wiphy_name(hw->wiphy)));
1918 goto fail3;
1919 } else {
1920 rtlpci->irq_alloc = 1;
1921 }
1922
1923 set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
1924 return 0;
1925
1926fail3:
1927 pci_set_drvdata(pdev, NULL);
1928 rtl_deinit_core(hw);
1929 _rtl_pci_io_handler_release(hw);
1930 ieee80211_free_hw(hw);
1931
1932 if (rtlpriv->io.pci_mem_start != 0)
Larry Finger62e63972011-02-11 14:27:46 -06001933 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
Larry Finger0c817332010-12-08 11:12:31 -06001934
1935fail2:
1936 pci_release_regions(pdev);
1937
1938fail1:
1939
1940 pci_disable_device(pdev);
1941
1942 return -ENODEV;
1943
1944}
1945EXPORT_SYMBOL(rtl_pci_probe);
1946
1947void rtl_pci_disconnect(struct pci_dev *pdev)
1948{
1949 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1950 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1951 struct rtl_priv *rtlpriv = rtl_priv(hw);
1952 struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
1953 struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
1954
1955 clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
1956
1957 sysfs_remove_group(&pdev->dev.kobj, &rtl_attribute_group);
1958
1959 /*ieee80211_unregister_hw will call ops_stop */
1960 if (rtlmac->mac80211_registered == 1) {
1961 ieee80211_unregister_hw(hw);
1962 rtlmac->mac80211_registered = 0;
1963 } else {
1964 rtl_deinit_deferred_work(hw);
1965 rtlpriv->intf_ops->adapter_stop(hw);
1966 }
1967
1968 /*deinit rfkill */
1969 rtl_deinit_rfkill(hw);
1970
1971 rtl_pci_deinit(hw);
1972 rtl_deinit_core(hw);
Larry Finger0c817332010-12-08 11:12:31 -06001973 _rtl_pci_io_handler_release(hw);
1974 rtlpriv->cfg->ops->deinit_sw_vars(hw);
1975
1976 if (rtlpci->irq_alloc) {
1977 free_irq(rtlpci->pdev->irq, hw);
1978 rtlpci->irq_alloc = 0;
1979 }
1980
1981 if (rtlpriv->io.pci_mem_start != 0) {
Larry Finger62e63972011-02-11 14:27:46 -06001982 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
Larry Finger0c817332010-12-08 11:12:31 -06001983 pci_release_regions(pdev);
1984 }
1985
1986 pci_disable_device(pdev);
Chaoming_Lic7cfe382011-04-25 13:23:15 -05001987
1988 rtl_pci_disable_aspm(hw);
1989
Larry Finger0c817332010-12-08 11:12:31 -06001990 pci_set_drvdata(pdev, NULL);
1991
1992 ieee80211_free_hw(hw);
1993}
1994EXPORT_SYMBOL(rtl_pci_disconnect);
1995
1996/***************************************
1997kernel pci power state define:
1998PCI_D0 ((pci_power_t __force) 0)
1999PCI_D1 ((pci_power_t __force) 1)
2000PCI_D2 ((pci_power_t __force) 2)
2001PCI_D3hot ((pci_power_t __force) 3)
2002PCI_D3cold ((pci_power_t __force) 4)
2003PCI_UNKNOWN ((pci_power_t __force) 5)
2004
2005This function is called when system
2006goes into suspend state mac80211 will
2007call rtl_mac_stop() from the mac80211
2008suspend function first, So there is
2009no need to call hw_disable here.
2010****************************************/
2011int rtl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2012{
Chaoming_Lic7cfe382011-04-25 13:23:15 -05002013 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2014 struct rtl_priv *rtlpriv = rtl_priv(hw);
2015
2016 rtlpriv->cfg->ops->hw_suspend(hw);
2017 rtl_deinit_rfkill(hw);
2018
Larry Finger0c817332010-12-08 11:12:31 -06002019 pci_save_state(pdev);
2020 pci_disable_device(pdev);
2021 pci_set_power_state(pdev, PCI_D3hot);
Larry Finger0c817332010-12-08 11:12:31 -06002022 return 0;
2023}
2024EXPORT_SYMBOL(rtl_pci_suspend);
2025
2026int rtl_pci_resume(struct pci_dev *pdev)
2027{
2028 int ret;
Chaoming_Lic7cfe382011-04-25 13:23:15 -05002029 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2030 struct rtl_priv *rtlpriv = rtl_priv(hw);
Larry Finger0c817332010-12-08 11:12:31 -06002031
2032 pci_set_power_state(pdev, PCI_D0);
2033 ret = pci_enable_device(pdev);
2034 if (ret) {
2035 RT_ASSERT(false, ("ERR: <======\n"));
2036 return ret;
2037 }
2038
2039 pci_restore_state(pdev);
2040
Chaoming_Lic7cfe382011-04-25 13:23:15 -05002041 rtlpriv->cfg->ops->hw_resume(hw);
2042 rtl_init_rfkill(hw);
Larry Finger0c817332010-12-08 11:12:31 -06002043 return 0;
2044}
2045EXPORT_SYMBOL(rtl_pci_resume);
2046
2047struct rtl_intf_ops rtl_pci_ops = {
Chaoming_Lic7cfe382011-04-25 13:23:15 -05002048 .read_efuse_byte = read_efuse_byte,
Larry Finger0c817332010-12-08 11:12:31 -06002049 .adapter_start = rtl_pci_start,
2050 .adapter_stop = rtl_pci_stop,
2051 .adapter_tx = rtl_pci_tx,
Chaoming_Lic7cfe382011-04-25 13:23:15 -05002052 .flush = rtl_pci_flush,
Larry Finger0c817332010-12-08 11:12:31 -06002053 .reset_trx_ring = rtl_pci_reset_trx_ring,
Chaoming_Lic7cfe382011-04-25 13:23:15 -05002054 .waitq_insert = rtl_pci_tx_chk_waitq_insert,
Larry Finger0c817332010-12-08 11:12:31 -06002055
2056 .disable_aspm = rtl_pci_disable_aspm,
2057 .enable_aspm = rtl_pci_enable_aspm,
2058};