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Bhalchandra Gajare87fef4c2013-02-19 14:57:03 -08001/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#ifndef WCD9XXX_CODEC_COMMON
14
15#define WCD9XXX_CODEC_COMMON
16
Joonwoo Parka08e0552013-03-05 18:28:23 -080017#include "wcd9xxx-resmgr.h"
18
Bhalchandra Gajare87fef4c2013-02-19 14:57:03 -080019#define WCD9XXX_CLSH_REQ_ENABLE true
20#define WCD9XXX_CLSH_REQ_DISABLE false
21
22#define WCD9XXX_CLSH_EVENT_PRE_DAC 0x01
23#define WCD9XXX_CLSH_EVENT_POST_PA 0x02
24
25/* Basic states for Class H state machine.
26 * represented as a bit mask within a u8 data type
27 * bit 0: EAR mode
28 * bit 1: HPH Left mode
29 * bit 2: HPH Right mode
30 * bit 3: Lineout mode
31 * bit 4: Ultrasound mode
32 */
33#define WCD9XXX_CLSH_STATE_IDLE 0x00
34#define WCD9XXX_CLSH_STATE_EAR (0x01 << 0)
35#define WCD9XXX_CLSH_STATE_HPHL (0x01 << 1)
36#define WCD9XXX_CLSH_STATE_HPHR (0x01 << 2)
37#define WCD9XXX_CLSH_STATE_LO (0x01 << 3)
38#define NUM_CLSH_STATES ((0x01 << 4) - 1)
39
40/* Derived State: Bits 1 and 2 should be set for Headphone stereo */
41#define WCD9XXX_CLSH_STATE_HPH_ST (WCD9XXX_CLSH_STATE_HPHL | \
42 WCD9XXX_CLSH_STATE_HPHR)
43
44
45struct wcd9xxx_reg_mask_val {
46 u16 reg;
47 u8 mask;
48 u8 val;
49};
50
51/* Class H data that the codec driver will maintain */
52struct wcd9xxx_clsh_cdc_data {
53 u8 state;
54 int buck_mv;
Bhalchandra Gajare7c739522013-06-20 15:31:02 -070055 bool is_dynamic_vdd_cp;
Joonwoo Parka08e0552013-03-05 18:28:23 -080056 struct wcd9xxx_resmgr *resmgr;
Bhalchandra Gajare87fef4c2013-02-19 14:57:03 -080057};
58
Simmi Pateriyadf675e92013-04-05 01:15:54 +053059struct wcd9xxx_anc_header {
60 u32 reserved[3];
61 u32 num_anc_slots;
62};
Bhalchandra Gajare87fef4c2013-02-19 14:57:03 -080063
64enum wcd9xxx_buck_volt {
65 WCD9XXX_CDC_BUCK_UNSUPPORTED = 0,
66 WCD9XXX_CDC_BUCK_MV_1P8 = 1800000,
67 WCD9XXX_CDC_BUCK_MV_2P15 = 2150000,
68};
69
70extern void wcd9xxx_clsh_fsm(struct snd_soc_codec *codec,
71 struct wcd9xxx_clsh_cdc_data *cdc_clsh_d,
72 u8 req_state, bool req_type, u8 clsh_event);
73
Joonwoo Parka08e0552013-03-05 18:28:23 -080074extern void wcd9xxx_clsh_init(struct wcd9xxx_clsh_cdc_data *clsh,
75 struct wcd9xxx_resmgr *resmgr);
Bhalchandra Gajare87fef4c2013-02-19 14:57:03 -080076
Santosh Mardi93a69192013-07-03 23:37:29 +053077extern void wcd9xxx_clsh_imped_config(struct snd_soc_codec *codec,
78 int imped);
79
Kiran Kandia1bed422013-05-28 18:29:12 -070080enum wcd9xxx_codec_event {
81 WCD9XXX_CODEC_EVENT_CODEC_UP = 0,
82};
83
Bhalchandra Gajare87fef4c2013-02-19 14:57:03 -080084#endif