Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /*+M************************************************************************* |
| 2 | * Adaptec AIC7xxx device driver for Linux. |
| 3 | * |
| 4 | * Copyright (c) 1994 John Aycock |
| 5 | * The University of Calgary Department of Computer Science. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2, or (at your option) |
| 10 | * any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; see the file COPYING. If not, write to |
| 19 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. |
| 20 | * |
| 21 | * Sources include the Adaptec 1740 driver (aha1740.c), the Ultrastor 24F |
| 22 | * driver (ultrastor.c), various Linux kernel source, the Adaptec EISA |
| 23 | * config file (!adp7771.cfg), the Adaptec AHA-2740A Series User's Guide, |
| 24 | * the Linux Kernel Hacker's Guide, Writing a SCSI Device Driver for Linux, |
| 25 | * the Adaptec 1542 driver (aha1542.c), the Adaptec EISA overlay file |
| 26 | * (adp7770.ovl), the Adaptec AHA-2740 Series Technical Reference Manual, |
| 27 | * the Adaptec AIC-7770 Data Book, the ANSI SCSI specification, the |
| 28 | * ANSI SCSI-2 specification (draft 10c), ... |
| 29 | * |
| 30 | * -------------------------------------------------------------------------- |
| 31 | * |
| 32 | * Modifications by Daniel M. Eischen (deischen@iworks.InterWorks.org): |
| 33 | * |
| 34 | * Substantially modified to include support for wide and twin bus |
| 35 | * adapters, DMAing of SCBs, tagged queueing, IRQ sharing, bug fixes, |
| 36 | * SCB paging, and other rework of the code. |
| 37 | * |
| 38 | * Parts of this driver were also based on the FreeBSD driver by |
| 39 | * Justin T. Gibbs. His copyright follows: |
| 40 | * |
| 41 | * -------------------------------------------------------------------------- |
| 42 | * Copyright (c) 1994-1997 Justin Gibbs. |
| 43 | * All rights reserved. |
| 44 | * |
| 45 | * Redistribution and use in source and binary forms, with or without |
| 46 | * modification, are permitted provided that the following conditions |
| 47 | * are met: |
| 48 | * 1. Redistributions of source code must retain the above copyright |
| 49 | * notice, this list of conditions, and the following disclaimer, |
| 50 | * without modification, immediately at the beginning of the file. |
| 51 | * 2. Redistributions in binary form must reproduce the above copyright |
| 52 | * notice, this list of conditions and the following disclaimer in the |
| 53 | * documentation and/or other materials provided with the distribution. |
| 54 | * 3. The name of the author may not be used to endorse or promote products |
| 55 | * derived from this software without specific prior written permission. |
| 56 | * |
| 57 | * Where this Software is combined with software released under the terms of |
| 58 | * the GNU General Public License ("GPL") and the terms of the GPL would require the |
| 59 | * combined work to also be released under the terms of the GPL, the terms |
| 60 | * and conditions of this License will apply in addition to those of the |
| 61 | * GPL with the exception of any terms or conditions of this License that |
| 62 | * conflict with, or are expressly prohibited by, the GPL. |
| 63 | * |
| 64 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
| 65 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 66 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 67 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR |
| 68 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 69 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 70 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 71 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 72 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 73 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 74 | * SUCH DAMAGE. |
| 75 | * |
| 76 | * $Id: aic7xxx.c,v 1.119 1997/06/27 19:39:18 gibbs Exp $ |
| 77 | *--------------------------------------------------------------------------- |
| 78 | * |
| 79 | * Thanks also go to (in alphabetical order) the following: |
| 80 | * |
| 81 | * Rory Bolt - Sequencer bug fixes |
| 82 | * Jay Estabrook - Initial DEC Alpha support |
| 83 | * Doug Ledford - Much needed abort/reset bug fixes |
| 84 | * Kai Makisara - DMAing of SCBs |
| 85 | * |
| 86 | * A Boot time option was also added for not resetting the scsi bus. |
| 87 | * |
| 88 | * Form: aic7xxx=extended |
| 89 | * aic7xxx=no_reset |
| 90 | * aic7xxx=ultra |
| 91 | * aic7xxx=irq_trigger:[0,1] # 0 edge, 1 level |
| 92 | * aic7xxx=verbose |
| 93 | * |
| 94 | * Daniel M. Eischen, deischen@iworks.InterWorks.org, 1/23/97 |
| 95 | * |
| 96 | * $Id: aic7xxx.c,v 4.1 1997/06/12 08:23:42 deang Exp $ |
| 97 | *-M*************************************************************************/ |
| 98 | |
| 99 | /*+M************************************************************************** |
| 100 | * |
| 101 | * Further driver modifications made by Doug Ledford <dledford@redhat.com> |
| 102 | * |
| 103 | * Copyright (c) 1997-1999 Doug Ledford |
| 104 | * |
| 105 | * These changes are released under the same licensing terms as the FreeBSD |
| 106 | * driver written by Justin Gibbs. Please see his Copyright notice above |
| 107 | * for the exact terms and conditions covering my changes as well as the |
| 108 | * warranty statement. |
| 109 | * |
| 110 | * Modifications made to the aic7xxx.c,v 4.1 driver from Dan Eischen include |
| 111 | * but are not limited to: |
| 112 | * |
| 113 | * 1: Import of the latest FreeBSD sequencer code for this driver |
| 114 | * 2: Modification of kernel code to accommodate different sequencer semantics |
| 115 | * 3: Extensive changes throughout kernel portion of driver to improve |
| 116 | * abort/reset processing and error hanndling |
| 117 | * 4: Other work contributed by various people on the Internet |
| 118 | * 5: Changes to printk information and verbosity selection code |
| 119 | * 6: General reliability related changes, especially in IRQ management |
| 120 | * 7: Modifications to the default probe/attach order for supported cards |
| 121 | * 8: SMP friendliness has been improved |
| 122 | * |
| 123 | * Overall, this driver represents a significant departure from the official |
| 124 | * aic7xxx driver released by Dan Eischen in two ways. First, in the code |
| 125 | * itself. A diff between the two version of the driver is now a several |
| 126 | * thousand line diff. Second, in approach to solving the same problem. The |
| 127 | * problem is importing the FreeBSD aic7xxx driver code to linux can be a |
| 128 | * difficult and time consuming process, that also can be error prone. Dan |
| 129 | * Eischen's official driver uses the approach that the linux and FreeBSD |
| 130 | * drivers should be as identical as possible. To that end, his next version |
| 131 | * of this driver will be using a mid-layer code library that he is developing |
| 132 | * to moderate communications between the linux mid-level SCSI code and the |
| 133 | * low level FreeBSD driver. He intends to be able to essentially drop the |
| 134 | * FreeBSD driver into the linux kernel with only a few minor tweaks to some |
| 135 | * include files and the like and get things working, making for fast easy |
| 136 | * imports of the FreeBSD code into linux. |
| 137 | * |
| 138 | * I disagree with Dan's approach. Not that I don't think his way of doing |
| 139 | * things would be nice, easy to maintain, and create a more uniform driver |
| 140 | * between FreeBSD and Linux. I have no objection to those issues. My |
| 141 | * disagreement is on the needed functionality. There simply are certain |
| 142 | * things that are done differently in FreeBSD than linux that will cause |
| 143 | * problems for this driver regardless of any middle ware Dan implements. |
| 144 | * The biggest example of this at the moment is interrupt semantics. Linux |
| 145 | * doesn't provide the same protection techniques as FreeBSD does, nor can |
| 146 | * they be easily implemented in any middle ware code since they would truly |
| 147 | * belong in the kernel proper and would effect all drivers. For the time |
| 148 | * being, I see issues such as these as major stumbling blocks to the |
| 149 | * reliability of code based upon such middle ware. Therefore, I choose to |
| 150 | * use a different approach to importing the FreeBSD code that doesn't |
| 151 | * involve any middle ware type code. My approach is to import the sequencer |
| 152 | * code from FreeBSD wholesale. Then, to only make changes in the kernel |
| 153 | * portion of the driver as they are needed for the new sequencer semantics. |
| 154 | * In this way, the portion of the driver that speaks to the rest of the |
| 155 | * linux kernel is fairly static and can be changed/modified to solve |
| 156 | * any problems one might encounter without concern for the FreeBSD driver. |
| 157 | * |
| 158 | * Note: If time and experience should prove me wrong that the middle ware |
| 159 | * code Dan writes is reliable in its operation, then I'll retract my above |
| 160 | * statements. But, for those that don't know, I'm from Missouri (in the US) |
| 161 | * and our state motto is "The Show-Me State". Well, before I will put |
| 162 | * faith into it, you'll have to show me that it works :) |
| 163 | * |
| 164 | *_M*************************************************************************/ |
| 165 | |
| 166 | /* |
| 167 | * The next three defines are user configurable. These should be the only |
| 168 | * defines a user might need to get in here and change. There are other |
| 169 | * defines buried deeper in the code, but those really shouldn't need touched |
| 170 | * under normal conditions. |
| 171 | */ |
| 172 | |
| 173 | /* |
| 174 | * AIC7XXX_STRICT_PCI_SETUP |
| 175 | * Should we assume the PCI config options on our controllers are set with |
| 176 | * sane and proper values, or should we be anal about our PCI config |
| 177 | * registers and force them to what we want? The main advantage to |
| 178 | * defining this option is on non-Intel hardware where the BIOS may not |
| 179 | * have been run to set things up, or if you have one of the BIOSless |
| 180 | * Adaptec controllers, such as a 2910, that don't get set up by the |
| 181 | * BIOS. However, keep in mind that we really do set the most important |
| 182 | * items in the driver regardless of this setting, this only controls some |
| 183 | * of the more esoteric PCI options on these cards. In that sense, I |
| 184 | * would default to leaving this off. However, if people wish to try |
| 185 | * things both ways, that would also help me to know if there are some |
| 186 | * machines where it works one way but not another. |
| 187 | * |
| 188 | * -- July 7, 17:09 |
| 189 | * OK...I need this on my machine for testing, so the default is to |
| 190 | * leave it defined. |
| 191 | * |
| 192 | * -- July 7, 18:49 |
| 193 | * I needed it for testing, but it didn't make any difference, so back |
| 194 | * off she goes. |
| 195 | * |
| 196 | * -- July 16, 23:04 |
| 197 | * I turned it back on to try and compensate for the 2.1.x PCI code |
| 198 | * which no longer relies solely on the BIOS and now tries to set |
| 199 | * things itself. |
| 200 | */ |
| 201 | |
| 202 | #define AIC7XXX_STRICT_PCI_SETUP |
| 203 | |
| 204 | /* |
| 205 | * AIC7XXX_VERBOSE_DEBUGGING |
| 206 | * This option enables a lot of extra printk();s in the code, surrounded |
| 207 | * by if (aic7xxx_verbose ...) statements. Executing all of those if |
| 208 | * statements and the extra checks can get to where it actually does have |
| 209 | * an impact on CPU usage and such, as well as code size. Disabling this |
| 210 | * define will keep some of those from becoming part of the code. |
| 211 | * |
| 212 | * NOTE: Currently, this option has no real effect, I will be adding the |
| 213 | * various #ifdef's in the code later when I've decided a section is |
| 214 | * complete and no longer needs debugging. OK...a lot of things are now |
| 215 | * surrounded by this define, so turning this off does have an impact. |
| 216 | */ |
| 217 | |
| 218 | /* |
| 219 | * #define AIC7XXX_VERBOSE_DEBUGGING |
| 220 | */ |
| 221 | |
| 222 | #include <linux/module.h> |
| 223 | #include <stdarg.h> |
| 224 | #include <asm/io.h> |
| 225 | #include <asm/irq.h> |
| 226 | #include <asm/byteorder.h> |
| 227 | #include <linux/string.h> |
| 228 | #include <linux/errno.h> |
| 229 | #include <linux/kernel.h> |
| 230 | #include <linux/ioport.h> |
| 231 | #include <linux/delay.h> |
| 232 | #include <linux/sched.h> |
| 233 | #include <linux/pci.h> |
| 234 | #include <linux/proc_fs.h> |
| 235 | #include <linux/blkdev.h> |
| 236 | #include <linux/init.h> |
| 237 | #include <linux/spinlock.h> |
| 238 | #include <linux/smp.h> |
| 239 | #include <linux/interrupt.h> |
| 240 | #include "scsi.h" |
| 241 | #include <scsi/scsi_host.h> |
| 242 | #include "aic7xxx_old/aic7xxx.h" |
| 243 | |
| 244 | #include "aic7xxx_old/sequencer.h" |
| 245 | #include "aic7xxx_old/scsi_message.h" |
| 246 | #include "aic7xxx_old/aic7xxx_reg.h" |
| 247 | #include <scsi/scsicam.h> |
| 248 | |
| 249 | #include <linux/stat.h> |
| 250 | #include <linux/slab.h> /* for kmalloc() */ |
| 251 | |
| 252 | #include <linux/config.h> /* for CONFIG_PCI */ |
| 253 | |
| 254 | #define AIC7XXX_C_VERSION "5.2.6" |
| 255 | |
| 256 | #define ALL_TARGETS -1 |
| 257 | #define ALL_CHANNELS -1 |
| 258 | #define ALL_LUNS -1 |
| 259 | #define MAX_TARGETS 16 |
| 260 | #define MAX_LUNS 8 |
| 261 | #ifndef TRUE |
| 262 | # define TRUE 1 |
| 263 | #endif |
| 264 | #ifndef FALSE |
| 265 | # define FALSE 0 |
| 266 | #endif |
| 267 | |
| 268 | #if defined(__powerpc__) || defined(__i386__) || defined(__x86_64__) |
| 269 | # define MMAPIO |
| 270 | #endif |
| 271 | |
| 272 | /* |
| 273 | * You can try raising me for better performance or lowering me if you have |
| 274 | * flaky devices that go off the scsi bus when hit with too many tagged |
| 275 | * commands (like some IBM SCSI-3 LVD drives). |
| 276 | */ |
| 277 | #define AIC7XXX_CMDS_PER_DEVICE 32 |
| 278 | |
| 279 | typedef struct |
| 280 | { |
| 281 | unsigned char tag_commands[16]; /* Allow for wide/twin adapters. */ |
| 282 | } adapter_tag_info_t; |
| 283 | |
| 284 | /* |
| 285 | * Make a define that will tell the driver not to the default tag depth |
| 286 | * everywhere. |
| 287 | */ |
| 288 | #define DEFAULT_TAG_COMMANDS {0, 0, 0, 0, 0, 0, 0, 0,\ |
| 289 | 0, 0, 0, 0, 0, 0, 0, 0} |
| 290 | |
| 291 | /* |
| 292 | * Modify this as you see fit for your system. By setting tag_commands |
| 293 | * to 0, the driver will use it's own algorithm for determining the |
| 294 | * number of commands to use (see above). When 255, the driver will |
| 295 | * not enable tagged queueing for that particular device. When positive |
| 296 | * (> 0) and (< 255) the values in the array are used for the queue_depth. |
| 297 | * Note that the maximum value for an entry is 254, but you're insane if |
| 298 | * you try to use that many commands on one device. |
| 299 | * |
| 300 | * In this example, the first line will disable tagged queueing for all |
| 301 | * the devices on the first probed aic7xxx adapter. |
| 302 | * |
| 303 | * The second line enables tagged queueing with 4 commands/LUN for IDs |
| 304 | * (1, 2-11, 13-15), disables tagged queueing for ID 12, and tells the |
| 305 | * driver to use its own algorithm for ID 1. |
| 306 | * |
| 307 | * The third line is the same as the first line. |
| 308 | * |
| 309 | * The fourth line disables tagged queueing for devices 0 and 3. It |
| 310 | * enables tagged queueing for the other IDs, with 16 commands/LUN |
| 311 | * for IDs 1 and 4, 127 commands/LUN for ID 8, and 4 commands/LUN for |
| 312 | * IDs 2, 5-7, and 9-15. |
| 313 | */ |
| 314 | |
| 315 | /* |
| 316 | * NOTE: The below structure is for reference only, the actual structure |
| 317 | * to modify in order to change things is found after this fake one. |
| 318 | * |
| 319 | adapter_tag_info_t aic7xxx_tag_info[] = |
| 320 | { |
| 321 | {DEFAULT_TAG_COMMANDS}, |
| 322 | {{4, 0, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 255, 4, 4, 4}}, |
| 323 | {DEFAULT_TAG_COMMANDS}, |
| 324 | {{255, 16, 4, 255, 16, 4, 4, 4, 127, 4, 4, 4, 4, 4, 4, 4}} |
| 325 | }; |
| 326 | */ |
| 327 | |
| 328 | static adapter_tag_info_t aic7xxx_tag_info[] = |
| 329 | { |
| 330 | {DEFAULT_TAG_COMMANDS}, |
| 331 | {DEFAULT_TAG_COMMANDS}, |
| 332 | {DEFAULT_TAG_COMMANDS}, |
| 333 | {DEFAULT_TAG_COMMANDS}, |
| 334 | {DEFAULT_TAG_COMMANDS}, |
| 335 | {DEFAULT_TAG_COMMANDS}, |
| 336 | {DEFAULT_TAG_COMMANDS}, |
| 337 | {DEFAULT_TAG_COMMANDS}, |
| 338 | {DEFAULT_TAG_COMMANDS}, |
| 339 | {DEFAULT_TAG_COMMANDS}, |
| 340 | {DEFAULT_TAG_COMMANDS}, |
| 341 | {DEFAULT_TAG_COMMANDS}, |
| 342 | {DEFAULT_TAG_COMMANDS}, |
| 343 | {DEFAULT_TAG_COMMANDS}, |
| 344 | {DEFAULT_TAG_COMMANDS}, |
| 345 | {DEFAULT_TAG_COMMANDS} |
| 346 | }; |
| 347 | |
| 348 | |
| 349 | /* |
| 350 | * Define an array of board names that can be indexed by aha_type. |
| 351 | * Don't forget to change this when changing the types! |
| 352 | */ |
| 353 | static const char *board_names[] = { |
| 354 | "AIC-7xxx Unknown", /* AIC_NONE */ |
| 355 | "Adaptec AIC-7810 Hardware RAID Controller", /* AIC_7810 */ |
| 356 | "Adaptec AIC-7770 SCSI host adapter", /* AIC_7770 */ |
| 357 | "Adaptec AHA-274X SCSI host adapter", /* AIC_7771 */ |
| 358 | "Adaptec AHA-284X SCSI host adapter", /* AIC_284x */ |
| 359 | "Adaptec AIC-7850 SCSI host adapter", /* AIC_7850 */ |
| 360 | "Adaptec AIC-7855 SCSI host adapter", /* AIC_7855 */ |
| 361 | "Adaptec AIC-7860 Ultra SCSI host adapter", /* AIC_7860 */ |
| 362 | "Adaptec AHA-2940A Ultra SCSI host adapter", /* AIC_7861 */ |
| 363 | "Adaptec AIC-7870 SCSI host adapter", /* AIC_7870 */ |
| 364 | "Adaptec AHA-294X SCSI host adapter", /* AIC_7871 */ |
| 365 | "Adaptec AHA-394X SCSI host adapter", /* AIC_7872 */ |
| 366 | "Adaptec AHA-398X SCSI host adapter", /* AIC_7873 */ |
| 367 | "Adaptec AHA-2944 SCSI host adapter", /* AIC_7874 */ |
| 368 | "Adaptec AIC-7880 Ultra SCSI host adapter", /* AIC_7880 */ |
| 369 | "Adaptec AHA-294X Ultra SCSI host adapter", /* AIC_7881 */ |
| 370 | "Adaptec AHA-394X Ultra SCSI host adapter", /* AIC_7882 */ |
| 371 | "Adaptec AHA-398X Ultra SCSI host adapter", /* AIC_7883 */ |
| 372 | "Adaptec AHA-2944 Ultra SCSI host adapter", /* AIC_7884 */ |
| 373 | "Adaptec AHA-2940UW Pro Ultra SCSI host adapter", /* AIC_7887 */ |
| 374 | "Adaptec AIC-7895 Ultra SCSI host adapter", /* AIC_7895 */ |
| 375 | "Adaptec AIC-7890/1 Ultra2 SCSI host adapter", /* AIC_7890 */ |
| 376 | "Adaptec AHA-293X Ultra2 SCSI host adapter", /* AIC_7890 */ |
| 377 | "Adaptec AHA-294X Ultra2 SCSI host adapter", /* AIC_7890 */ |
| 378 | "Adaptec AIC-7896/7 Ultra2 SCSI host adapter", /* AIC_7896 */ |
| 379 | "Adaptec AHA-394X Ultra2 SCSI host adapter", /* AIC_7897 */ |
| 380 | "Adaptec AHA-395X Ultra2 SCSI host adapter", /* AIC_7897 */ |
| 381 | "Adaptec PCMCIA SCSI controller", /* card bus stuff */ |
| 382 | "Adaptec AIC-7892 Ultra 160/m SCSI host adapter", /* AIC_7892 */ |
| 383 | "Adaptec AIC-7899 Ultra 160/m SCSI host adapter", /* AIC_7899 */ |
| 384 | }; |
| 385 | |
| 386 | /* |
| 387 | * There should be a specific return value for this in scsi.h, but |
| 388 | * it seems that most drivers ignore it. |
| 389 | */ |
| 390 | #define DID_UNDERFLOW DID_ERROR |
| 391 | |
| 392 | /* |
| 393 | * What we want to do is have the higher level scsi driver requeue |
| 394 | * the command to us. There is no specific driver status for this |
| 395 | * condition, but the higher level scsi driver will requeue the |
| 396 | * command on a DID_BUS_BUSY error. |
| 397 | * |
| 398 | * Upon further inspection and testing, it seems that DID_BUS_BUSY |
| 399 | * will *always* retry the command. We can get into an infinite loop |
| 400 | * if this happens when we really want some sort of counter that |
| 401 | * will automatically abort/reset the command after so many retries. |
| 402 | * Using DID_ERROR will do just that. (Made by a suggestion by |
| 403 | * Doug Ledford 8/1/96) |
| 404 | */ |
| 405 | #define DID_RETRY_COMMAND DID_ERROR |
| 406 | |
| 407 | #define HSCSIID 0x07 |
| 408 | #define SCSI_RESET 0x040 |
| 409 | |
| 410 | /* |
| 411 | * EISA/VL-bus stuff |
| 412 | */ |
| 413 | #define MINSLOT 1 |
| 414 | #define MAXSLOT 15 |
| 415 | #define SLOTBASE(x) ((x) << 12) |
| 416 | #define BASE_TO_SLOT(x) ((x) >> 12) |
| 417 | |
| 418 | /* |
| 419 | * Standard EISA Host ID regs (Offset from slot base) |
| 420 | */ |
| 421 | #define AHC_HID0 0x80 /* 0,1: msb of ID2, 2-7: ID1 */ |
| 422 | #define AHC_HID1 0x81 /* 0-4: ID3, 5-7: LSB ID2 */ |
| 423 | #define AHC_HID2 0x82 /* product */ |
| 424 | #define AHC_HID3 0x83 /* firmware revision */ |
| 425 | |
| 426 | /* |
| 427 | * AIC-7770 I/O range to reserve for a card |
| 428 | */ |
| 429 | #define MINREG 0xC00 |
| 430 | #define MAXREG 0xCFF |
| 431 | |
| 432 | #define INTDEF 0x5C /* Interrupt Definition Register */ |
| 433 | |
| 434 | /* |
| 435 | * AIC-78X0 PCI registers |
| 436 | */ |
| 437 | #define CLASS_PROGIF_REVID 0x08 |
| 438 | #define DEVREVID 0x000000FFul |
| 439 | #define PROGINFC 0x0000FF00ul |
| 440 | #define SUBCLASS 0x00FF0000ul |
| 441 | #define BASECLASS 0xFF000000ul |
| 442 | |
| 443 | #define CSIZE_LATTIME 0x0C |
| 444 | #define CACHESIZE 0x0000003Ful /* only 5 bits */ |
| 445 | #define LATTIME 0x0000FF00ul |
| 446 | |
| 447 | #define DEVCONFIG 0x40 |
| 448 | #define SCBSIZE32 0x00010000ul /* aic789X only */ |
| 449 | #define MPORTMODE 0x00000400ul /* aic7870 only */ |
| 450 | #define RAMPSM 0x00000200ul /* aic7870 only */ |
| 451 | #define RAMPSM_ULTRA2 0x00000004 |
| 452 | #define VOLSENSE 0x00000100ul |
| 453 | #define SCBRAMSEL 0x00000080ul |
| 454 | #define SCBRAMSEL_ULTRA2 0x00000008 |
| 455 | #define MRDCEN 0x00000040ul |
| 456 | #define EXTSCBTIME 0x00000020ul /* aic7870 only */ |
| 457 | #define EXTSCBPEN 0x00000010ul /* aic7870 only */ |
| 458 | #define BERREN 0x00000008ul |
| 459 | #define DACEN 0x00000004ul |
| 460 | #define STPWLEVEL 0x00000002ul |
| 461 | #define DIFACTNEGEN 0x00000001ul /* aic7870 only */ |
| 462 | |
| 463 | #define SCAMCTL 0x1a /* Ultra2 only */ |
| 464 | #define CCSCBBADDR 0xf0 /* aic7895/6/7 */ |
| 465 | |
| 466 | /* |
| 467 | * Define the different types of SEEPROMs on aic7xxx adapters |
| 468 | * and make it also represent the address size used in accessing |
| 469 | * its registers. The 93C46 chips have 1024 bits organized into |
| 470 | * 64 16-bit words, while the 93C56 chips have 2048 bits organized |
| 471 | * into 128 16-bit words. The C46 chips use 6 bits to address |
| 472 | * each word, while the C56 and C66 (4096 bits) use 8 bits to |
| 473 | * address each word. |
| 474 | */ |
| 475 | typedef enum {C46 = 6, C56_66 = 8} seeprom_chip_type; |
| 476 | |
| 477 | /* |
| 478 | * |
| 479 | * Define the format of the SEEPROM registers (16 bits). |
| 480 | * |
| 481 | */ |
| 482 | struct seeprom_config { |
| 483 | |
| 484 | /* |
| 485 | * SCSI ID Configuration Flags |
| 486 | */ |
| 487 | #define CFXFER 0x0007 /* synchronous transfer rate */ |
| 488 | #define CFSYNCH 0x0008 /* enable synchronous transfer */ |
| 489 | #define CFDISC 0x0010 /* enable disconnection */ |
| 490 | #define CFWIDEB 0x0020 /* wide bus device (wide card) */ |
| 491 | #define CFSYNCHISULTRA 0x0040 /* CFSYNC is an ultra offset */ |
| 492 | #define CFNEWULTRAFORMAT 0x0080 /* Use the Ultra2 SEEPROM format */ |
| 493 | #define CFSTART 0x0100 /* send start unit SCSI command */ |
| 494 | #define CFINCBIOS 0x0200 /* include in BIOS scan */ |
| 495 | #define CFRNFOUND 0x0400 /* report even if not found */ |
| 496 | #define CFMULTILUN 0x0800 /* probe mult luns in BIOS scan */ |
| 497 | #define CFWBCACHEYES 0x4000 /* Enable W-Behind Cache on drive */ |
| 498 | #define CFWBCACHENC 0xc000 /* Don't change W-Behind Cache */ |
| 499 | /* UNUSED 0x3000 */ |
| 500 | unsigned short device_flags[16]; /* words 0-15 */ |
| 501 | |
| 502 | /* |
| 503 | * BIOS Control Bits |
| 504 | */ |
| 505 | #define CFSUPREM 0x0001 /* support all removable drives */ |
| 506 | #define CFSUPREMB 0x0002 /* support removable drives for boot only */ |
| 507 | #define CFBIOSEN 0x0004 /* BIOS enabled */ |
| 508 | /* UNUSED 0x0008 */ |
| 509 | #define CFSM2DRV 0x0010 /* support more than two drives */ |
| 510 | #define CF284XEXTEND 0x0020 /* extended translation (284x cards) */ |
| 511 | /* UNUSED 0x0040 */ |
| 512 | #define CFEXTEND 0x0080 /* extended translation enabled */ |
| 513 | /* UNUSED 0xFF00 */ |
| 514 | unsigned short bios_control; /* word 16 */ |
| 515 | |
| 516 | /* |
| 517 | * Host Adapter Control Bits |
| 518 | */ |
| 519 | #define CFAUTOTERM 0x0001 /* Perform Auto termination */ |
| 520 | #define CFULTRAEN 0x0002 /* Ultra SCSI speed enable (Ultra cards) */ |
| 521 | #define CF284XSELTO 0x0003 /* Selection timeout (284x cards) */ |
| 522 | #define CF284XFIFO 0x000C /* FIFO Threshold (284x cards) */ |
| 523 | #define CFSTERM 0x0004 /* SCSI low byte termination */ |
| 524 | #define CFWSTERM 0x0008 /* SCSI high byte termination (wide card) */ |
| 525 | #define CFSPARITY 0x0010 /* SCSI parity */ |
| 526 | #define CF284XSTERM 0x0020 /* SCSI low byte termination (284x cards) */ |
| 527 | #define CFRESETB 0x0040 /* reset SCSI bus at boot */ |
| 528 | #define CFBPRIMARY 0x0100 /* Channel B primary on 7895 chipsets */ |
| 529 | #define CFSEAUTOTERM 0x0400 /* aic7890 Perform SE Auto Term */ |
| 530 | #define CFLVDSTERM 0x0800 /* aic7890 LVD Termination */ |
| 531 | /* UNUSED 0xF280 */ |
| 532 | unsigned short adapter_control; /* word 17 */ |
| 533 | |
| 534 | /* |
| 535 | * Bus Release, Host Adapter ID |
| 536 | */ |
| 537 | #define CFSCSIID 0x000F /* host adapter SCSI ID */ |
| 538 | /* UNUSED 0x00F0 */ |
| 539 | #define CFBRTIME 0xFF00 /* bus release time */ |
| 540 | unsigned short brtime_id; /* word 18 */ |
| 541 | |
| 542 | /* |
| 543 | * Maximum targets |
| 544 | */ |
| 545 | #define CFMAXTARG 0x00FF /* maximum targets */ |
| 546 | /* UNUSED 0xFF00 */ |
| 547 | unsigned short max_targets; /* word 19 */ |
| 548 | |
| 549 | unsigned short res_1[11]; /* words 20-30 */ |
| 550 | unsigned short checksum; /* word 31 */ |
| 551 | }; |
| 552 | |
| 553 | #define SELBUS_MASK 0x0a |
| 554 | #define SELNARROW 0x00 |
| 555 | #define SELBUSB 0x08 |
| 556 | #define SINGLE_BUS 0x00 |
| 557 | |
| 558 | #define SCB_TARGET(scb) \ |
| 559 | (((scb)->hscb->target_channel_lun & TID) >> 4) |
| 560 | #define SCB_LUN(scb) \ |
| 561 | ((scb)->hscb->target_channel_lun & LID) |
| 562 | #define SCB_IS_SCSIBUS_B(scb) \ |
| 563 | (((scb)->hscb->target_channel_lun & SELBUSB) != 0) |
| 564 | |
| 565 | /* |
| 566 | * If an error occurs during a data transfer phase, run the command |
| 567 | * to completion - it's easier that way - making a note of the error |
| 568 | * condition in this location. This then will modify a DID_OK status |
| 569 | * into an appropriate error for the higher-level SCSI code. |
| 570 | */ |
| 571 | #define aic7xxx_error(cmd) ((cmd)->SCp.Status) |
| 572 | |
| 573 | /* |
| 574 | * Keep track of the targets returned status. |
| 575 | */ |
| 576 | #define aic7xxx_status(cmd) ((cmd)->SCp.sent_command) |
| 577 | |
| 578 | /* |
| 579 | * The position of the SCSI commands scb within the scb array. |
| 580 | */ |
| 581 | #define aic7xxx_position(cmd) ((cmd)->SCp.have_data_in) |
| 582 | |
| 583 | /* |
| 584 | * The stored DMA mapping for single-buffer data transfers. |
| 585 | */ |
| 586 | #define aic7xxx_mapping(cmd) ((cmd)->SCp.phase) |
| 587 | |
| 588 | /* |
| 589 | * Get out private data area from a scsi cmd pointer |
| 590 | */ |
| 591 | #define AIC_DEV(cmd) ((struct aic_dev_data *)(cmd)->device->hostdata) |
| 592 | |
| 593 | /* |
| 594 | * So we can keep track of our host structs |
| 595 | */ |
| 596 | static struct aic7xxx_host *first_aic7xxx = NULL; |
| 597 | |
| 598 | /* |
| 599 | * As of Linux 2.1, the mid-level SCSI code uses virtual addresses |
| 600 | * in the scatter-gather lists. We need to convert the virtual |
| 601 | * addresses to physical addresses. |
| 602 | */ |
| 603 | struct hw_scatterlist { |
| 604 | unsigned int address; |
| 605 | unsigned int length; |
| 606 | }; |
| 607 | |
| 608 | /* |
| 609 | * Maximum number of SG segments these cards can support. |
| 610 | */ |
| 611 | #define AIC7XXX_MAX_SG 128 |
| 612 | |
| 613 | /* |
| 614 | * The maximum number of SCBs we could have for ANY type |
| 615 | * of card. DON'T FORGET TO CHANGE THE SCB MASK IN THE |
| 616 | * SEQUENCER CODE IF THIS IS MODIFIED! |
| 617 | */ |
| 618 | #define AIC7XXX_MAXSCB 255 |
| 619 | |
| 620 | |
| 621 | struct aic7xxx_hwscb { |
| 622 | /* ------------ Begin hardware supported fields ---------------- */ |
| 623 | /* 0*/ unsigned char control; |
| 624 | /* 1*/ unsigned char target_channel_lun; /* 4/1/3 bits */ |
| 625 | /* 2*/ unsigned char target_status; |
| 626 | /* 3*/ unsigned char SG_segment_count; |
| 627 | /* 4*/ unsigned int SG_list_pointer; |
| 628 | /* 8*/ unsigned char residual_SG_segment_count; |
| 629 | /* 9*/ unsigned char residual_data_count[3]; |
| 630 | /*12*/ unsigned int data_pointer; |
| 631 | /*16*/ unsigned int data_count; |
| 632 | /*20*/ unsigned int SCSI_cmd_pointer; |
| 633 | /*24*/ unsigned char SCSI_cmd_length; |
| 634 | /*25*/ unsigned char tag; /* Index into our kernel SCB array. |
| 635 | * Also used as the tag for tagged I/O |
| 636 | */ |
| 637 | #define SCB_PIO_TRANSFER_SIZE 26 /* amount we need to upload/download |
| 638 | * via PIO to initialize a transaction. |
| 639 | */ |
| 640 | /*26*/ unsigned char next; /* Used to thread SCBs awaiting selection |
| 641 | * or disconnected down in the sequencer. |
| 642 | */ |
| 643 | /*27*/ unsigned char prev; |
| 644 | /*28*/ unsigned int pad; /* |
| 645 | * Unused by the kernel, but we require |
| 646 | * the padding so that the array of |
| 647 | * hardware SCBs is aligned on 32 byte |
| 648 | * boundaries so the sequencer can index |
| 649 | */ |
| 650 | }; |
| 651 | |
| 652 | typedef enum { |
| 653 | SCB_FREE = 0x0000, |
| 654 | SCB_DTR_SCB = 0x0001, |
| 655 | SCB_WAITINGQ = 0x0002, |
| 656 | SCB_ACTIVE = 0x0004, |
| 657 | SCB_SENSE = 0x0008, |
| 658 | SCB_ABORT = 0x0010, |
| 659 | SCB_DEVICE_RESET = 0x0020, |
| 660 | SCB_RESET = 0x0040, |
| 661 | SCB_RECOVERY_SCB = 0x0080, |
| 662 | SCB_MSGOUT_PPR = 0x0100, |
| 663 | SCB_MSGOUT_SENT = 0x0200, |
| 664 | SCB_MSGOUT_SDTR = 0x0400, |
| 665 | SCB_MSGOUT_WDTR = 0x0800, |
| 666 | SCB_MSGOUT_BITS = SCB_MSGOUT_PPR | |
| 667 | SCB_MSGOUT_SENT | |
| 668 | SCB_MSGOUT_SDTR | |
| 669 | SCB_MSGOUT_WDTR, |
| 670 | SCB_QUEUED_ABORT = 0x1000, |
| 671 | SCB_QUEUED_FOR_DONE = 0x2000, |
| 672 | SCB_WAS_BUSY = 0x4000, |
| 673 | SCB_QUEUE_FULL = 0x8000 |
| 674 | } scb_flag_type; |
| 675 | |
| 676 | typedef enum { |
| 677 | AHC_FNONE = 0x00000000, |
| 678 | AHC_PAGESCBS = 0x00000001, |
| 679 | AHC_CHANNEL_B_PRIMARY = 0x00000002, |
| 680 | AHC_USEDEFAULTS = 0x00000004, |
| 681 | AHC_INDIRECT_PAGING = 0x00000008, |
| 682 | AHC_CHNLB = 0x00000020, |
| 683 | AHC_CHNLC = 0x00000040, |
| 684 | AHC_EXTEND_TRANS_A = 0x00000100, |
| 685 | AHC_EXTEND_TRANS_B = 0x00000200, |
| 686 | AHC_TERM_ENB_A = 0x00000400, |
| 687 | AHC_TERM_ENB_SE_LOW = 0x00000400, |
| 688 | AHC_TERM_ENB_B = 0x00000800, |
| 689 | AHC_TERM_ENB_SE_HIGH = 0x00000800, |
| 690 | AHC_HANDLING_REQINITS = 0x00001000, |
| 691 | AHC_TARGETMODE = 0x00002000, |
| 692 | AHC_NEWEEPROM_FMT = 0x00004000, |
| 693 | /* |
| 694 | * Here ends the FreeBSD defined flags and here begins the linux defined |
| 695 | * flags. NOTE: I did not preserve the old flag name during this change |
| 696 | * specifically to force me to evaluate what flags were being used properly |
| 697 | * and what flags weren't. This way, I could clean up the flag usage on |
| 698 | * a use by use basis. Doug Ledford |
| 699 | */ |
| 700 | AHC_MOTHERBOARD = 0x00020000, |
| 701 | AHC_NO_STPWEN = 0x00040000, |
| 702 | AHC_RESET_DELAY = 0x00080000, |
| 703 | AHC_A_SCANNED = 0x00100000, |
| 704 | AHC_B_SCANNED = 0x00200000, |
| 705 | AHC_MULTI_CHANNEL = 0x00400000, |
| 706 | AHC_BIOS_ENABLED = 0x00800000, |
| 707 | AHC_SEEPROM_FOUND = 0x01000000, |
| 708 | AHC_TERM_ENB_LVD = 0x02000000, |
| 709 | AHC_ABORT_PENDING = 0x04000000, |
| 710 | AHC_RESET_PENDING = 0x08000000, |
| 711 | #define AHC_IN_ISR_BIT 28 |
| 712 | AHC_IN_ISR = 0x10000000, |
| 713 | AHC_IN_ABORT = 0x20000000, |
| 714 | AHC_IN_RESET = 0x40000000, |
| 715 | AHC_EXTERNAL_SRAM = 0x80000000 |
| 716 | } ahc_flag_type; |
| 717 | |
| 718 | typedef enum { |
| 719 | AHC_NONE = 0x0000, |
| 720 | AHC_CHIPID_MASK = 0x00ff, |
| 721 | AHC_AIC7770 = 0x0001, |
| 722 | AHC_AIC7850 = 0x0002, |
| 723 | AHC_AIC7860 = 0x0003, |
| 724 | AHC_AIC7870 = 0x0004, |
| 725 | AHC_AIC7880 = 0x0005, |
| 726 | AHC_AIC7890 = 0x0006, |
| 727 | AHC_AIC7895 = 0x0007, |
| 728 | AHC_AIC7896 = 0x0008, |
| 729 | AHC_AIC7892 = 0x0009, |
| 730 | AHC_AIC7899 = 0x000a, |
| 731 | AHC_VL = 0x0100, |
| 732 | AHC_EISA = 0x0200, |
| 733 | AHC_PCI = 0x0400, |
| 734 | } ahc_chip; |
| 735 | |
| 736 | typedef enum { |
| 737 | AHC_FENONE = 0x0000, |
| 738 | AHC_ULTRA = 0x0001, |
| 739 | AHC_ULTRA2 = 0x0002, |
| 740 | AHC_WIDE = 0x0004, |
| 741 | AHC_TWIN = 0x0008, |
| 742 | AHC_MORE_SRAM = 0x0010, |
| 743 | AHC_CMD_CHAN = 0x0020, |
| 744 | AHC_QUEUE_REGS = 0x0040, |
| 745 | AHC_SG_PRELOAD = 0x0080, |
| 746 | AHC_SPIOCAP = 0x0100, |
| 747 | AHC_ULTRA3 = 0x0200, |
| 748 | AHC_NEW_AUTOTERM = 0x0400, |
| 749 | AHC_AIC7770_FE = AHC_FENONE, |
| 750 | AHC_AIC7850_FE = AHC_SPIOCAP, |
| 751 | AHC_AIC7860_FE = AHC_ULTRA|AHC_SPIOCAP, |
| 752 | AHC_AIC7870_FE = AHC_FENONE, |
| 753 | AHC_AIC7880_FE = AHC_ULTRA, |
| 754 | AHC_AIC7890_FE = AHC_MORE_SRAM|AHC_CMD_CHAN|AHC_ULTRA2| |
| 755 | AHC_QUEUE_REGS|AHC_SG_PRELOAD|AHC_NEW_AUTOTERM, |
| 756 | AHC_AIC7895_FE = AHC_MORE_SRAM|AHC_CMD_CHAN|AHC_ULTRA, |
| 757 | AHC_AIC7896_FE = AHC_AIC7890_FE, |
| 758 | AHC_AIC7892_FE = AHC_AIC7890_FE|AHC_ULTRA3, |
| 759 | AHC_AIC7899_FE = AHC_AIC7890_FE|AHC_ULTRA3, |
| 760 | } ahc_feature; |
| 761 | |
| 762 | #define SCB_DMA_ADDR(scb, addr) ((unsigned long)(addr) + (scb)->scb_dma->dma_offset) |
| 763 | |
| 764 | struct aic7xxx_scb_dma { |
| 765 | unsigned long dma_offset; /* Correction you have to add |
| 766 | * to virtual address to get |
| 767 | * dma handle in this region */ |
| 768 | dma_addr_t dma_address; /* DMA handle of the start, |
| 769 | * for unmap */ |
| 770 | unsigned int dma_len; /* DMA length */ |
| 771 | }; |
| 772 | |
| 773 | typedef enum { |
| 774 | AHC_BUG_NONE = 0x0000, |
| 775 | AHC_BUG_TMODE_WIDEODD = 0x0001, |
| 776 | AHC_BUG_AUTOFLUSH = 0x0002, |
| 777 | AHC_BUG_CACHETHEN = 0x0004, |
| 778 | AHC_BUG_CACHETHEN_DIS = 0x0008, |
| 779 | AHC_BUG_PCI_2_1_RETRY = 0x0010, |
| 780 | AHC_BUG_PCI_MWI = 0x0020, |
| 781 | AHC_BUG_SCBCHAN_UPLOAD = 0x0040, |
| 782 | } ahc_bugs; |
| 783 | |
| 784 | struct aic7xxx_scb { |
| 785 | struct aic7xxx_hwscb *hscb; /* corresponding hardware scb */ |
| 786 | Scsi_Cmnd *cmd; /* Scsi_Cmnd for this scb */ |
| 787 | struct aic7xxx_scb *q_next; /* next scb in queue */ |
| 788 | volatile scb_flag_type flags; /* current state of scb */ |
| 789 | struct hw_scatterlist *sg_list; /* SG list in adapter format */ |
| 790 | unsigned char tag_action; |
| 791 | unsigned char sg_count; |
| 792 | unsigned char *sense_cmd; /* |
| 793 | * Allocate 6 characters for |
| 794 | * sense command. |
| 795 | */ |
| 796 | unsigned char *cmnd; |
| 797 | unsigned int sg_length; /* We init this during buildscb so we |
| 798 | * don't have to calculate anything |
| 799 | * during underflow/overflow/stat code |
| 800 | */ |
| 801 | void *kmalloc_ptr; |
| 802 | struct aic7xxx_scb_dma *scb_dma; |
| 803 | }; |
| 804 | |
| 805 | /* |
| 806 | * Define a linked list of SCBs. |
| 807 | */ |
| 808 | typedef struct { |
| 809 | struct aic7xxx_scb *head; |
| 810 | struct aic7xxx_scb *tail; |
| 811 | } scb_queue_type; |
| 812 | |
| 813 | static struct { |
| 814 | unsigned char errno; |
| 815 | const char *errmesg; |
| 816 | } hard_error[] = { |
| 817 | { ILLHADDR, "Illegal Host Access" }, |
| 818 | { ILLSADDR, "Illegal Sequencer Address referenced" }, |
| 819 | { ILLOPCODE, "Illegal Opcode in sequencer program" }, |
| 820 | { SQPARERR, "Sequencer Ram Parity Error" }, |
| 821 | { DPARERR, "Data-Path Ram Parity Error" }, |
| 822 | { MPARERR, "Scratch Ram/SCB Array Ram Parity Error" }, |
| 823 | { PCIERRSTAT,"PCI Error detected" }, |
| 824 | { CIOPARERR, "CIOBUS Parity Error" } |
| 825 | }; |
| 826 | |
| 827 | static unsigned char |
| 828 | generic_sense[] = { REQUEST_SENSE, 0, 0, 0, 255, 0 }; |
| 829 | |
| 830 | typedef struct { |
| 831 | scb_queue_type free_scbs; /* |
| 832 | * SCBs assigned to free slot on |
| 833 | * card (no paging required) |
| 834 | */ |
| 835 | struct aic7xxx_scb *scb_array[AIC7XXX_MAXSCB]; |
| 836 | struct aic7xxx_hwscb *hscbs; |
| 837 | unsigned char numscbs; /* current number of scbs */ |
| 838 | unsigned char maxhscbs; /* hardware scbs */ |
| 839 | unsigned char maxscbs; /* max scbs including pageable scbs */ |
| 840 | dma_addr_t hscbs_dma; /* DMA handle to hscbs */ |
| 841 | unsigned int hscbs_dma_len; /* length of the above DMA area */ |
| 842 | void *hscb_kmalloc_ptr; |
| 843 | } scb_data_type; |
| 844 | |
| 845 | struct target_cmd { |
| 846 | unsigned char mesg_bytes[4]; |
| 847 | unsigned char command[28]; |
| 848 | }; |
| 849 | |
| 850 | #define AHC_TRANS_CUR 0x0001 |
| 851 | #define AHC_TRANS_ACTIVE 0x0002 |
| 852 | #define AHC_TRANS_GOAL 0x0004 |
| 853 | #define AHC_TRANS_USER 0x0008 |
| 854 | #define AHC_TRANS_QUITE 0x0010 |
| 855 | typedef struct { |
| 856 | unsigned char width; |
| 857 | unsigned char period; |
| 858 | unsigned char offset; |
| 859 | unsigned char options; |
| 860 | } transinfo_type; |
| 861 | |
| 862 | struct aic_dev_data { |
| 863 | volatile scb_queue_type delayed_scbs; |
| 864 | volatile unsigned short temp_q_depth; |
| 865 | unsigned short max_q_depth; |
| 866 | volatile unsigned char active_cmds; |
| 867 | /* |
| 868 | * Statistics Kept: |
| 869 | * |
| 870 | * Total Xfers (count for each command that has a data xfer), |
| 871 | * broken down by reads && writes. |
| 872 | * |
| 873 | * Further sorted into a few bins for keeping tabs on how many commands |
| 874 | * we get of various sizes. |
| 875 | * |
| 876 | */ |
| 877 | long w_total; /* total writes */ |
| 878 | long r_total; /* total reads */ |
| 879 | long barrier_total; /* total num of REQ_BARRIER commands */ |
| 880 | long ordered_total; /* How many REQ_BARRIER commands we |
| 881 | used ordered tags to satisfy */ |
| 882 | long w_bins[6]; /* binned write */ |
| 883 | long r_bins[6]; /* binned reads */ |
| 884 | transinfo_type cur; |
| 885 | transinfo_type goal; |
| 886 | #define BUS_DEVICE_RESET_PENDING 0x01 |
| 887 | #define DEVICE_RESET_DELAY 0x02 |
| 888 | #define DEVICE_PRINT_DTR 0x04 |
| 889 | #define DEVICE_WAS_BUSY 0x08 |
| 890 | #define DEVICE_DTR_SCANNED 0x10 |
| 891 | #define DEVICE_SCSI_3 0x20 |
| 892 | volatile unsigned char flags; |
| 893 | unsigned needppr:1; |
| 894 | unsigned needppr_copy:1; |
| 895 | unsigned needsdtr:1; |
| 896 | unsigned needsdtr_copy:1; |
| 897 | unsigned needwdtr:1; |
| 898 | unsigned needwdtr_copy:1; |
| 899 | unsigned dtr_pending:1; |
| 900 | struct scsi_device *SDptr; |
| 901 | struct list_head list; |
| 902 | }; |
| 903 | |
| 904 | /* |
| 905 | * Define a structure used for each host adapter. Note, in order to avoid |
| 906 | * problems with architectures I can't test on (because I don't have one, |
| 907 | * such as the Alpha based systems) which happen to give faults for |
| 908 | * non-aligned memory accesses, care was taken to align this structure |
| 909 | * in a way that gauranteed all accesses larger than 8 bits were aligned |
| 910 | * on the appropriate boundary. It's also organized to try and be more |
| 911 | * cache line efficient. Be careful when changing this lest you might hurt |
| 912 | * overall performance and bring down the wrath of the masses. |
| 913 | */ |
| 914 | struct aic7xxx_host { |
| 915 | /* |
| 916 | * This is the first 64 bytes in the host struct |
| 917 | */ |
| 918 | |
| 919 | /* |
| 920 | * We are grouping things here....first, items that get either read or |
| 921 | * written with nearly every interrupt |
| 922 | */ |
| 923 | volatile long flags; |
| 924 | ahc_feature features; /* chip features */ |
| 925 | unsigned long base; /* card base address */ |
| 926 | volatile unsigned char __iomem *maddr; /* memory mapped address */ |
| 927 | unsigned long isr_count; /* Interrupt count */ |
| 928 | unsigned long spurious_int; |
| 929 | scb_data_type *scb_data; |
| 930 | struct aic7xxx_cmd_queue { |
| 931 | Scsi_Cmnd *head; |
| 932 | Scsi_Cmnd *tail; |
| 933 | } completeq; |
| 934 | |
| 935 | /* |
| 936 | * Things read/written on nearly every entry into aic7xxx_queue() |
| 937 | */ |
| 938 | volatile scb_queue_type waiting_scbs; |
| 939 | unsigned char unpause; /* unpause value for HCNTRL */ |
| 940 | unsigned char pause; /* pause value for HCNTRL */ |
| 941 | volatile unsigned char qoutfifonext; |
| 942 | volatile unsigned char activescbs; /* active scbs */ |
| 943 | volatile unsigned char max_activescbs; |
| 944 | volatile unsigned char qinfifonext; |
| 945 | volatile unsigned char *untagged_scbs; |
| 946 | volatile unsigned char *qoutfifo; |
| 947 | volatile unsigned char *qinfifo; |
| 948 | |
| 949 | unsigned char dev_last_queue_full[MAX_TARGETS]; |
| 950 | unsigned char dev_last_queue_full_count[MAX_TARGETS]; |
| 951 | unsigned short ultraenb; /* Gets downloaded to card as a |
| 952 | bitmap */ |
| 953 | unsigned short discenable; /* Gets downloaded to card as a |
| 954 | bitmap */ |
| 955 | transinfo_type user[MAX_TARGETS]; |
| 956 | |
| 957 | unsigned char msg_buf[13]; /* The message for the target */ |
| 958 | unsigned char msg_type; |
| 959 | #define MSG_TYPE_NONE 0x00 |
| 960 | #define MSG_TYPE_INITIATOR_MSGOUT 0x01 |
| 961 | #define MSG_TYPE_INITIATOR_MSGIN 0x02 |
| 962 | unsigned char msg_len; /* Length of message */ |
| 963 | unsigned char msg_index; /* Index into msg_buf array */ |
| 964 | |
| 965 | |
| 966 | /* |
| 967 | * We put the less frequently used host structure items after the more |
| 968 | * frequently used items to try and ease the burden on the cache subsystem. |
| 969 | * These entries are not *commonly* accessed, whereas the preceding entries |
| 970 | * are accessed very often. |
| 971 | */ |
| 972 | |
| 973 | unsigned int irq; /* IRQ for this adapter */ |
| 974 | int instance; /* aic7xxx instance number */ |
| 975 | int scsi_id; /* host adapter SCSI ID */ |
| 976 | int scsi_id_b; /* channel B for twin adapters */ |
| 977 | unsigned int bios_address; |
| 978 | int board_name_index; |
| 979 | unsigned short bios_control; /* bios control - SEEPROM */ |
| 980 | unsigned short adapter_control; /* adapter control - SEEPROM */ |
| 981 | struct pci_dev *pdev; |
| 982 | unsigned char pci_bus; |
| 983 | unsigned char pci_device_fn; |
| 984 | struct seeprom_config sc; |
| 985 | unsigned short sc_type; |
| 986 | unsigned short sc_size; |
| 987 | struct aic7xxx_host *next; /* allow for multiple IRQs */ |
| 988 | struct Scsi_Host *host; /* pointer to scsi host */ |
| 989 | struct list_head aic_devs; /* all aic_dev structs on host */ |
| 990 | int host_no; /* SCSI host number */ |
| 991 | unsigned long mbase; /* I/O memory address */ |
| 992 | ahc_chip chip; /* chip type */ |
| 993 | ahc_bugs bugs; |
| 994 | dma_addr_t fifo_dma; /* DMA handle for fifo arrays */ |
| 995 | |
| 996 | }; |
| 997 | |
| 998 | /* |
| 999 | * Valid SCSIRATE values. (p. 3-17) |
| 1000 | * Provides a mapping of transfer periods in ns/4 to the proper value to |
| 1001 | * stick in the SCSIRATE reg to use that transfer rate. |
| 1002 | */ |
| 1003 | #define AHC_SYNCRATE_ULTRA3 0 |
| 1004 | #define AHC_SYNCRATE_ULTRA2 1 |
| 1005 | #define AHC_SYNCRATE_ULTRA 3 |
| 1006 | #define AHC_SYNCRATE_FAST 6 |
| 1007 | #define AHC_SYNCRATE_CRC 0x40 |
| 1008 | #define AHC_SYNCRATE_SE 0x10 |
| 1009 | static struct aic7xxx_syncrate { |
| 1010 | /* Rates in Ultra mode have bit 8 of sxfr set */ |
| 1011 | #define ULTRA_SXFR 0x100 |
| 1012 | int sxfr_ultra2; |
| 1013 | int sxfr; |
| 1014 | unsigned char period; |
| 1015 | const char *rate[2]; |
| 1016 | } aic7xxx_syncrates[] = { |
| 1017 | { 0x42, 0x000, 9, {"80.0", "160.0"} }, |
| 1018 | { 0x13, 0x000, 10, {"40.0", "80.0"} }, |
| 1019 | { 0x14, 0x000, 11, {"33.0", "66.6"} }, |
| 1020 | { 0x15, 0x100, 12, {"20.0", "40.0"} }, |
| 1021 | { 0x16, 0x110, 15, {"16.0", "32.0"} }, |
| 1022 | { 0x17, 0x120, 18, {"13.4", "26.8"} }, |
| 1023 | { 0x18, 0x000, 25, {"10.0", "20.0"} }, |
| 1024 | { 0x19, 0x010, 31, {"8.0", "16.0"} }, |
| 1025 | { 0x1a, 0x020, 37, {"6.67", "13.3"} }, |
| 1026 | { 0x1b, 0x030, 43, {"5.7", "11.4"} }, |
| 1027 | { 0x10, 0x040, 50, {"5.0", "10.0"} }, |
| 1028 | { 0x00, 0x050, 56, {"4.4", "8.8" } }, |
| 1029 | { 0x00, 0x060, 62, {"4.0", "8.0" } }, |
| 1030 | { 0x00, 0x070, 68, {"3.6", "7.2" } }, |
| 1031 | { 0x00, 0x000, 0, {NULL, NULL} }, |
| 1032 | }; |
| 1033 | |
| 1034 | #define CTL_OF_SCB(scb) (((scb->hscb)->target_channel_lun >> 3) & 0x1), \ |
| 1035 | (((scb->hscb)->target_channel_lun >> 4) & 0xf), \ |
| 1036 | ((scb->hscb)->target_channel_lun & 0x07) |
| 1037 | |
| 1038 | #define CTL_OF_CMD(cmd) ((cmd->device->channel) & 0x01), \ |
| 1039 | ((cmd->device->id) & 0x0f), \ |
| 1040 | ((cmd->device->lun) & 0x07) |
| 1041 | |
| 1042 | #define TARGET_INDEX(cmd) ((cmd)->device->id | ((cmd)->device->channel << 3)) |
| 1043 | |
| 1044 | /* |
| 1045 | * A nice little define to make doing our printks a little easier |
| 1046 | */ |
| 1047 | |
| 1048 | #define WARN_LEAD KERN_WARNING "(scsi%d:%d:%d:%d) " |
| 1049 | #define INFO_LEAD KERN_INFO "(scsi%d:%d:%d:%d) " |
| 1050 | |
| 1051 | /* |
| 1052 | * XXX - these options apply unilaterally to _all_ 274x/284x/294x |
| 1053 | * cards in the system. This should be fixed. Exceptions to this |
| 1054 | * rule are noted in the comments. |
| 1055 | */ |
| 1056 | |
| 1057 | /* |
| 1058 | * Use this as the default queue depth when setting tagged queueing on. |
| 1059 | */ |
| 1060 | static unsigned int aic7xxx_default_queue_depth = AIC7XXX_CMDS_PER_DEVICE; |
| 1061 | |
| 1062 | /* |
| 1063 | * Skip the scsi bus reset. Non 0 make us skip the reset at startup. This |
| 1064 | * has no effect on any later resets that might occur due to things like |
| 1065 | * SCSI bus timeouts. |
| 1066 | */ |
| 1067 | static unsigned int aic7xxx_no_reset = 0; |
| 1068 | /* |
| 1069 | * Certain PCI motherboards will scan PCI devices from highest to lowest, |
| 1070 | * others scan from lowest to highest, and they tend to do all kinds of |
| 1071 | * strange things when they come into contact with PCI bridge chips. The |
| 1072 | * net result of all this is that the PCI card that is actually used to boot |
| 1073 | * the machine is very hard to detect. Most motherboards go from lowest |
| 1074 | * PCI slot number to highest, and the first SCSI controller found is the |
| 1075 | * one you boot from. The only exceptions to this are when a controller |
| 1076 | * has its BIOS disabled. So, we by default sort all of our SCSI controllers |
| 1077 | * from lowest PCI slot number to highest PCI slot number. We also force |
| 1078 | * all controllers with their BIOS disabled to the end of the list. This |
| 1079 | * works on *almost* all computers. Where it doesn't work, we have this |
| 1080 | * option. Setting this option to non-0 will reverse the order of the sort |
| 1081 | * to highest first, then lowest, but will still leave cards with their BIOS |
| 1082 | * disabled at the very end. That should fix everyone up unless there are |
| 1083 | * really strange cirumstances. |
| 1084 | */ |
| 1085 | static int aic7xxx_reverse_scan = 0; |
| 1086 | /* |
| 1087 | * Should we force EXTENDED translation on a controller. |
| 1088 | * 0 == Use whatever is in the SEEPROM or default to off |
| 1089 | * 1 == Use whatever is in the SEEPROM or default to on |
| 1090 | */ |
| 1091 | static unsigned int aic7xxx_extended = 0; |
| 1092 | /* |
| 1093 | * The IRQ trigger method used on EISA controllers. Does not effect PCI cards. |
| 1094 | * -1 = Use detected settings. |
| 1095 | * 0 = Force Edge triggered mode. |
| 1096 | * 1 = Force Level triggered mode. |
| 1097 | */ |
| 1098 | static int aic7xxx_irq_trigger = -1; |
| 1099 | /* |
| 1100 | * This variable is used to override the termination settings on a controller. |
| 1101 | * This should not be used under normal conditions. However, in the case |
| 1102 | * that a controller does not have a readable SEEPROM (so that we can't |
| 1103 | * read the SEEPROM settings directly) and that a controller has a buggered |
| 1104 | * version of the cable detection logic, this can be used to force the |
| 1105 | * correct termination. It is preferable to use the manual termination |
| 1106 | * settings in the BIOS if possible, but some motherboard controllers store |
| 1107 | * those settings in a format we can't read. In other cases, auto term |
| 1108 | * should also work, but the chipset was put together with no auto term |
| 1109 | * logic (common on motherboard controllers). In those cases, we have |
| 1110 | * 32 bits here to work with. That's good for 8 controllers/channels. The |
| 1111 | * bits are organized as 4 bits per channel, with scsi0 getting the lowest |
| 1112 | * 4 bits in the int. A 1 in a bit position indicates the termination setting |
| 1113 | * that corresponds to that bit should be enabled, a 0 is disabled. |
| 1114 | * It looks something like this: |
| 1115 | * |
| 1116 | * 0x0f = 1111-Single Ended Low Byte Termination on/off |
| 1117 | * ||\-Single Ended High Byte Termination on/off |
| 1118 | * |\-LVD Low Byte Termination on/off |
| 1119 | * \-LVD High Byte Termination on/off |
| 1120 | * |
| 1121 | * For non-Ultra2 controllers, the upper 2 bits are not important. So, to |
| 1122 | * enable both high byte and low byte termination on scsi0, I would need to |
| 1123 | * make sure that the override_term variable was set to 0x03 (bits 0011). |
| 1124 | * To make sure that all termination is enabled on an Ultra2 controller at |
| 1125 | * scsi2 and only high byte termination on scsi1 and high and low byte |
| 1126 | * termination on scsi0, I would set override_term=0xf23 (bits 1111 0010 0011) |
| 1127 | * |
| 1128 | * For the most part, users should never have to use this, that's why I |
| 1129 | * left it fairly cryptic instead of easy to understand. If you need it, |
| 1130 | * most likely someone will be telling you what your's needs to be set to. |
| 1131 | */ |
| 1132 | static int aic7xxx_override_term = -1; |
| 1133 | /* |
| 1134 | * Certain motherboard chipset controllers tend to screw |
| 1135 | * up the polarity of the term enable output pin. Use this variable |
| 1136 | * to force the correct polarity for your system. This is a bitfield variable |
| 1137 | * similar to the previous one, but this one has one bit per channel instead |
| 1138 | * of four. |
| 1139 | * 0 = Force the setting to active low. |
| 1140 | * 1 = Force setting to active high. |
| 1141 | * Most Adaptec cards are active high, several motherboards are active low. |
| 1142 | * To force a 2940 card at SCSI 0 to active high and a motherboard 7895 |
| 1143 | * controller at scsi1 and scsi2 to active low, and a 2910 card at scsi3 |
| 1144 | * to active high, you would need to set stpwlev=0x9 (bits 1001). |
| 1145 | * |
| 1146 | * People shouldn't need to use this, but if you are experiencing lots of |
| 1147 | * SCSI timeout problems, this may help. There is one sure way to test what |
| 1148 | * this option needs to be. Using a boot floppy to boot the system, configure |
| 1149 | * your system to enable all SCSI termination (in the Adaptec SCSI BIOS) and |
| 1150 | * if needed then also pass a value to override_term to make sure that the |
| 1151 | * driver is enabling SCSI termination, then set this variable to either 0 |
| 1152 | * or 1. When the driver boots, make sure there are *NO* SCSI cables |
| 1153 | * connected to your controller. If it finds and inits the controller |
| 1154 | * without problem, then the setting you passed to stpwlev was correct. If |
| 1155 | * the driver goes into a reset loop and hangs the system, then you need the |
| 1156 | * other setting for this variable. If neither setting lets the machine |
| 1157 | * boot then you have definite termination problems that may not be fixable. |
| 1158 | */ |
| 1159 | static int aic7xxx_stpwlev = -1; |
| 1160 | /* |
| 1161 | * Set this to non-0 in order to force the driver to panic the kernel |
| 1162 | * and print out debugging info on a SCSI abort or reset cycle. |
| 1163 | */ |
| 1164 | static int aic7xxx_panic_on_abort = 0; |
| 1165 | /* |
| 1166 | * PCI bus parity checking of the Adaptec controllers. This is somewhat |
| 1167 | * dubious at best. To my knowledge, this option has never actually |
| 1168 | * solved a PCI parity problem, but on certain machines with broken PCI |
| 1169 | * chipset configurations, it can generate tons of false error messages. |
| 1170 | * It's included in the driver for completeness. |
| 1171 | * 0 = Shut off PCI parity check |
| 1172 | * -1 = Normal polarity pci parity checking |
| 1173 | * 1 = reverse polarity pci parity checking |
| 1174 | * |
| 1175 | * NOTE: you can't actually pass -1 on the lilo prompt. So, to set this |
| 1176 | * variable to -1 you would actually want to simply pass the variable |
| 1177 | * name without a number. That will invert the 0 which will result in |
| 1178 | * -1. |
| 1179 | */ |
| 1180 | static int aic7xxx_pci_parity = 0; |
| 1181 | /* |
| 1182 | * Set this to any non-0 value to cause us to dump the contents of all |
| 1183 | * the card's registers in a hex dump format tailored to each model of |
| 1184 | * controller. |
| 1185 | * |
| 1186 | * NOTE: THE CONTROLLER IS LEFT IN AN UNUSEABLE STATE BY THIS OPTION. |
| 1187 | * YOU CANNOT BOOT UP WITH THIS OPTION, IT IS FOR DEBUGGING PURPOSES |
| 1188 | * ONLY |
| 1189 | */ |
| 1190 | static int aic7xxx_dump_card = 0; |
| 1191 | /* |
| 1192 | * Set this to a non-0 value to make us dump out the 32 bit instruction |
| 1193 | * registers on the card after completing the sequencer download. This |
| 1194 | * allows the actual sequencer download to be verified. It is possible |
| 1195 | * to use this option and still boot up and run your system. This is |
| 1196 | * only intended for debugging purposes. |
| 1197 | */ |
| 1198 | static int aic7xxx_dump_sequencer = 0; |
| 1199 | /* |
| 1200 | * Certain newer motherboards have put new PCI based devices into the |
| 1201 | * IO spaces that used to typically be occupied by VLB or EISA cards. |
| 1202 | * This overlap can cause these newer motherboards to lock up when scanned |
| 1203 | * for older EISA and VLB devices. Setting this option to non-0 will |
| 1204 | * cause the driver to skip scanning for any VLB or EISA controllers and |
| 1205 | * only support the PCI controllers. NOTE: this means that if the kernel |
| 1206 | * os compiled with PCI support disabled, then setting this to non-0 |
| 1207 | * would result in never finding any devices :) |
| 1208 | */ |
| 1209 | static int aic7xxx_no_probe = 0; |
| 1210 | /* |
| 1211 | * On some machines, enabling the external SCB RAM isn't reliable yet. I |
| 1212 | * haven't had time to make test patches for things like changing the |
| 1213 | * timing mode on that external RAM either. Some of those changes may |
| 1214 | * fix the problem. Until then though, we default to external SCB RAM |
| 1215 | * off and give a command line option to enable it. |
| 1216 | */ |
| 1217 | static int aic7xxx_scbram = 0; |
| 1218 | /* |
| 1219 | * So that we can set how long each device is given as a selection timeout. |
| 1220 | * The table of values goes like this: |
| 1221 | * 0 - 256ms |
| 1222 | * 1 - 128ms |
| 1223 | * 2 - 64ms |
| 1224 | * 3 - 32ms |
| 1225 | * We default to 64ms because it's fast. Some old SCSI-I devices need a |
| 1226 | * longer time. The final value has to be left shifted by 3, hence 0x10 |
| 1227 | * is the final value. |
| 1228 | */ |
| 1229 | static int aic7xxx_seltime = 0x10; |
| 1230 | /* |
| 1231 | * So that insmod can find the variable and make it point to something |
| 1232 | */ |
| 1233 | #ifdef MODULE |
| 1234 | static char * aic7xxx = NULL; |
| 1235 | module_param(aic7xxx, charp, 0); |
| 1236 | #endif |
| 1237 | |
| 1238 | #define VERBOSE_NORMAL 0x0000 |
| 1239 | #define VERBOSE_NEGOTIATION 0x0001 |
| 1240 | #define VERBOSE_SEQINT 0x0002 |
| 1241 | #define VERBOSE_SCSIINT 0x0004 |
| 1242 | #define VERBOSE_PROBE 0x0008 |
| 1243 | #define VERBOSE_PROBE2 0x0010 |
| 1244 | #define VERBOSE_NEGOTIATION2 0x0020 |
| 1245 | #define VERBOSE_MINOR_ERROR 0x0040 |
| 1246 | #define VERBOSE_TRACING 0x0080 |
| 1247 | #define VERBOSE_ABORT 0x0f00 |
| 1248 | #define VERBOSE_ABORT_MID 0x0100 |
| 1249 | #define VERBOSE_ABORT_FIND 0x0200 |
| 1250 | #define VERBOSE_ABORT_PROCESS 0x0400 |
| 1251 | #define VERBOSE_ABORT_RETURN 0x0800 |
| 1252 | #define VERBOSE_RESET 0xf000 |
| 1253 | #define VERBOSE_RESET_MID 0x1000 |
| 1254 | #define VERBOSE_RESET_FIND 0x2000 |
| 1255 | #define VERBOSE_RESET_PROCESS 0x4000 |
| 1256 | #define VERBOSE_RESET_RETURN 0x8000 |
| 1257 | static int aic7xxx_verbose = VERBOSE_NORMAL | VERBOSE_NEGOTIATION | |
| 1258 | VERBOSE_PROBE; /* verbose messages */ |
| 1259 | |
| 1260 | |
| 1261 | /**************************************************************************** |
| 1262 | * |
| 1263 | * We're going to start putting in function declarations so that order of |
| 1264 | * functions is no longer important. As needed, they are added here. |
| 1265 | * |
| 1266 | ***************************************************************************/ |
| 1267 | |
| 1268 | static int aic7xxx_release(struct Scsi_Host *host); |
| 1269 | static void aic7xxx_set_syncrate(struct aic7xxx_host *p, |
| 1270 | struct aic7xxx_syncrate *syncrate, int target, int channel, |
| 1271 | unsigned int period, unsigned int offset, unsigned char options, |
| 1272 | unsigned int type, struct aic_dev_data *aic_dev); |
| 1273 | static void aic7xxx_set_width(struct aic7xxx_host *p, int target, int channel, |
| 1274 | int lun, unsigned int width, unsigned int type, |
| 1275 | struct aic_dev_data *aic_dev); |
| 1276 | static void aic7xxx_panic_abort(struct aic7xxx_host *p, Scsi_Cmnd *cmd); |
| 1277 | static void aic7xxx_print_card(struct aic7xxx_host *p); |
| 1278 | static void aic7xxx_print_scratch_ram(struct aic7xxx_host *p); |
| 1279 | static void aic7xxx_print_sequencer(struct aic7xxx_host *p, int downloaded); |
| 1280 | #ifdef AIC7XXX_VERBOSE_DEBUGGING |
| 1281 | static void aic7xxx_check_scbs(struct aic7xxx_host *p, char *buffer); |
| 1282 | #endif |
| 1283 | |
| 1284 | /**************************************************************************** |
| 1285 | * |
| 1286 | * These functions are now used. They happen to be wrapped in useless |
| 1287 | * inb/outb port read/writes around the real reads and writes because it |
| 1288 | * seems that certain very fast CPUs have a problem dealing with us when |
| 1289 | * going at full speed. |
| 1290 | * |
| 1291 | ***************************************************************************/ |
| 1292 | |
Arjan van de Ven | 858119e | 2006-01-14 13:20:43 -0800 | [diff] [blame] | 1293 | static unsigned char |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1294 | aic_inb(struct aic7xxx_host *p, long port) |
| 1295 | { |
| 1296 | #ifdef MMAPIO |
| 1297 | unsigned char x; |
| 1298 | if(p->maddr) |
| 1299 | { |
| 1300 | x = readb(p->maddr + port); |
| 1301 | } |
| 1302 | else |
| 1303 | { |
| 1304 | x = inb(p->base + port); |
| 1305 | } |
| 1306 | return(x); |
| 1307 | #else |
| 1308 | return(inb(p->base + port)); |
| 1309 | #endif |
| 1310 | } |
| 1311 | |
Arjan van de Ven | 858119e | 2006-01-14 13:20:43 -0800 | [diff] [blame] | 1312 | static void |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1313 | aic_outb(struct aic7xxx_host *p, unsigned char val, long port) |
| 1314 | { |
| 1315 | #ifdef MMAPIO |
| 1316 | if(p->maddr) |
| 1317 | { |
| 1318 | writeb(val, p->maddr + port); |
| 1319 | mb(); /* locked operation in order to force CPU ordering */ |
| 1320 | readb(p->maddr + HCNTRL); /* dummy read to flush the PCI write */ |
| 1321 | } |
| 1322 | else |
| 1323 | { |
| 1324 | outb(val, p->base + port); |
| 1325 | mb(); /* locked operation in order to force CPU ordering */ |
| 1326 | } |
| 1327 | #else |
| 1328 | outb(val, p->base + port); |
| 1329 | mb(); /* locked operation in order to force CPU ordering */ |
| 1330 | #endif |
| 1331 | } |
| 1332 | |
| 1333 | /*+F************************************************************************* |
| 1334 | * Function: |
| 1335 | * aic7xxx_setup |
| 1336 | * |
| 1337 | * Description: |
| 1338 | * Handle Linux boot parameters. This routine allows for assigning a value |
| 1339 | * to a parameter with a ':' between the parameter and the value. |
| 1340 | * ie. aic7xxx=unpause:0x0A,extended |
| 1341 | *-F*************************************************************************/ |
| 1342 | static int |
| 1343 | aic7xxx_setup(char *s) |
| 1344 | { |
| 1345 | int i, n; |
| 1346 | char *p; |
| 1347 | char *end; |
| 1348 | |
| 1349 | static struct { |
| 1350 | const char *name; |
| 1351 | unsigned int *flag; |
| 1352 | } options[] = { |
| 1353 | { "extended", &aic7xxx_extended }, |
| 1354 | { "no_reset", &aic7xxx_no_reset }, |
| 1355 | { "irq_trigger", &aic7xxx_irq_trigger }, |
| 1356 | { "verbose", &aic7xxx_verbose }, |
| 1357 | { "reverse_scan",&aic7xxx_reverse_scan }, |
| 1358 | { "override_term", &aic7xxx_override_term }, |
| 1359 | { "stpwlev", &aic7xxx_stpwlev }, |
| 1360 | { "no_probe", &aic7xxx_no_probe }, |
| 1361 | { "panic_on_abort", &aic7xxx_panic_on_abort }, |
| 1362 | { "pci_parity", &aic7xxx_pci_parity }, |
| 1363 | { "dump_card", &aic7xxx_dump_card }, |
| 1364 | { "dump_sequencer", &aic7xxx_dump_sequencer }, |
| 1365 | { "default_queue_depth", &aic7xxx_default_queue_depth }, |
| 1366 | { "scbram", &aic7xxx_scbram }, |
| 1367 | { "seltime", &aic7xxx_seltime }, |
| 1368 | { "tag_info", NULL } |
| 1369 | }; |
| 1370 | |
| 1371 | end = strchr(s, '\0'); |
| 1372 | |
| 1373 | while ((p = strsep(&s, ",.")) != NULL) |
| 1374 | { |
| 1375 | for (i = 0; i < ARRAY_SIZE(options); i++) |
| 1376 | { |
| 1377 | n = strlen(options[i].name); |
| 1378 | if (!strncmp(options[i].name, p, n)) |
| 1379 | { |
| 1380 | if (!strncmp(p, "tag_info", n)) |
| 1381 | { |
| 1382 | if (p[n] == ':') |
| 1383 | { |
| 1384 | char *base; |
| 1385 | char *tok, *tok_end, *tok_end2; |
| 1386 | char tok_list[] = { '.', ',', '{', '}', '\0' }; |
| 1387 | int i, instance = -1, device = -1; |
| 1388 | unsigned char done = FALSE; |
| 1389 | |
| 1390 | base = p; |
| 1391 | tok = base + n + 1; /* Forward us just past the ':' */ |
| 1392 | tok_end = strchr(tok, '\0'); |
| 1393 | if (tok_end < end) |
| 1394 | *tok_end = ','; |
| 1395 | while(!done) |
| 1396 | { |
| 1397 | switch(*tok) |
| 1398 | { |
| 1399 | case '{': |
| 1400 | if (instance == -1) |
| 1401 | instance = 0; |
| 1402 | else if (device == -1) |
| 1403 | device = 0; |
| 1404 | tok++; |
| 1405 | break; |
| 1406 | case '}': |
| 1407 | if (device != -1) |
| 1408 | device = -1; |
| 1409 | else if (instance != -1) |
| 1410 | instance = -1; |
| 1411 | tok++; |
| 1412 | break; |
| 1413 | case ',': |
| 1414 | case '.': |
| 1415 | if (instance == -1) |
| 1416 | done = TRUE; |
| 1417 | else if (device >= 0) |
| 1418 | device++; |
| 1419 | else if (instance >= 0) |
| 1420 | instance++; |
| 1421 | if ( (device >= MAX_TARGETS) || |
| 1422 | (instance >= ARRAY_SIZE(aic7xxx_tag_info)) ) |
| 1423 | done = TRUE; |
| 1424 | tok++; |
| 1425 | if (!done) |
| 1426 | { |
| 1427 | base = tok; |
| 1428 | } |
| 1429 | break; |
| 1430 | case '\0': |
| 1431 | done = TRUE; |
| 1432 | break; |
| 1433 | default: |
| 1434 | done = TRUE; |
| 1435 | tok_end = strchr(tok, '\0'); |
| 1436 | for(i=0; tok_list[i]; i++) |
| 1437 | { |
| 1438 | tok_end2 = strchr(tok, tok_list[i]); |
| 1439 | if ( (tok_end2) && (tok_end2 < tok_end) ) |
| 1440 | { |
| 1441 | tok_end = tok_end2; |
| 1442 | done = FALSE; |
| 1443 | } |
| 1444 | } |
| 1445 | if ( (instance >= 0) && (device >= 0) && |
| 1446 | (instance < ARRAY_SIZE(aic7xxx_tag_info)) && |
| 1447 | (device < MAX_TARGETS) ) |
| 1448 | aic7xxx_tag_info[instance].tag_commands[device] = |
| 1449 | simple_strtoul(tok, NULL, 0) & 0xff; |
| 1450 | tok = tok_end; |
| 1451 | break; |
| 1452 | } |
| 1453 | } |
| 1454 | while((p != base) && (p != NULL)) |
| 1455 | p = strsep(&s, ",."); |
| 1456 | } |
| 1457 | } |
| 1458 | else if (p[n] == ':') |
| 1459 | { |
| 1460 | *(options[i].flag) = simple_strtoul(p + n + 1, NULL, 0); |
| 1461 | if(!strncmp(p, "seltime", n)) |
| 1462 | { |
| 1463 | *(options[i].flag) = (*(options[i].flag) % 4) << 3; |
| 1464 | } |
| 1465 | } |
| 1466 | else if (!strncmp(p, "verbose", n)) |
| 1467 | { |
| 1468 | *(options[i].flag) = 0xff29; |
| 1469 | } |
| 1470 | else |
| 1471 | { |
| 1472 | *(options[i].flag) = ~(*(options[i].flag)); |
| 1473 | if(!strncmp(p, "seltime", n)) |
| 1474 | { |
| 1475 | *(options[i].flag) = (*(options[i].flag) % 4) << 3; |
| 1476 | } |
| 1477 | } |
| 1478 | } |
| 1479 | } |
| 1480 | } |
| 1481 | return 1; |
| 1482 | } |
| 1483 | |
| 1484 | __setup("aic7xxx=", aic7xxx_setup); |
| 1485 | |
| 1486 | /*+F************************************************************************* |
| 1487 | * Function: |
| 1488 | * pause_sequencer |
| 1489 | * |
| 1490 | * Description: |
| 1491 | * Pause the sequencer and wait for it to actually stop - this |
| 1492 | * is important since the sequencer can disable pausing for critical |
| 1493 | * sections. |
| 1494 | *-F*************************************************************************/ |
| 1495 | static void |
| 1496 | pause_sequencer(struct aic7xxx_host *p) |
| 1497 | { |
| 1498 | aic_outb(p, p->pause, HCNTRL); |
| 1499 | while ((aic_inb(p, HCNTRL) & PAUSE) == 0) |
| 1500 | { |
| 1501 | ; |
| 1502 | } |
| 1503 | if(p->features & AHC_ULTRA2) |
| 1504 | { |
| 1505 | aic_inb(p, CCSCBCTL); |
| 1506 | } |
| 1507 | } |
| 1508 | |
| 1509 | /*+F************************************************************************* |
| 1510 | * Function: |
| 1511 | * unpause_sequencer |
| 1512 | * |
| 1513 | * Description: |
| 1514 | * Unpause the sequencer. Unremarkable, yet done often enough to |
| 1515 | * warrant an easy way to do it. |
| 1516 | *-F*************************************************************************/ |
| 1517 | static void |
| 1518 | unpause_sequencer(struct aic7xxx_host *p, int unpause_always) |
| 1519 | { |
| 1520 | if (unpause_always || |
| 1521 | ( !(aic_inb(p, INTSTAT) & (SCSIINT | SEQINT | BRKADRINT)) && |
| 1522 | !(p->flags & AHC_HANDLING_REQINITS) ) ) |
| 1523 | { |
| 1524 | aic_outb(p, p->unpause, HCNTRL); |
| 1525 | } |
| 1526 | } |
| 1527 | |
| 1528 | /*+F************************************************************************* |
| 1529 | * Function: |
| 1530 | * restart_sequencer |
| 1531 | * |
| 1532 | * Description: |
| 1533 | * Restart the sequencer program from address zero. This assumes |
| 1534 | * that the sequencer is already paused. |
| 1535 | *-F*************************************************************************/ |
| 1536 | static void |
| 1537 | restart_sequencer(struct aic7xxx_host *p) |
| 1538 | { |
| 1539 | aic_outb(p, 0, SEQADDR0); |
| 1540 | aic_outb(p, 0, SEQADDR1); |
| 1541 | aic_outb(p, FASTMODE, SEQCTL); |
| 1542 | } |
| 1543 | |
| 1544 | /* |
| 1545 | * We include the aic7xxx_seq.c file here so that the other defines have |
| 1546 | * already been made, and so that it comes before the code that actually |
| 1547 | * downloads the instructions (since we don't typically use function |
| 1548 | * prototype, our code has to be ordered that way, it's a left-over from |
| 1549 | * the original driver days.....I should fix it some time DL). |
| 1550 | */ |
| 1551 | #include "aic7xxx_old/aic7xxx_seq.c" |
| 1552 | |
| 1553 | /*+F************************************************************************* |
| 1554 | * Function: |
| 1555 | * aic7xxx_check_patch |
| 1556 | * |
| 1557 | * Description: |
| 1558 | * See if the next patch to download should be downloaded. |
| 1559 | *-F*************************************************************************/ |
| 1560 | static int |
| 1561 | aic7xxx_check_patch(struct aic7xxx_host *p, |
| 1562 | struct sequencer_patch **start_patch, int start_instr, int *skip_addr) |
| 1563 | { |
| 1564 | struct sequencer_patch *cur_patch; |
| 1565 | struct sequencer_patch *last_patch; |
| 1566 | int num_patches; |
| 1567 | |
Tobias Klauser | 6391a11 | 2006-06-08 22:23:48 -0700 | [diff] [blame] | 1568 | num_patches = ARRAY_SIZE(sequencer_patches); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1569 | last_patch = &sequencer_patches[num_patches]; |
| 1570 | cur_patch = *start_patch; |
| 1571 | |
| 1572 | while ((cur_patch < last_patch) && (start_instr == cur_patch->begin)) |
| 1573 | { |
| 1574 | if (cur_patch->patch_func(p) == 0) |
| 1575 | { |
| 1576 | /* |
| 1577 | * Start rejecting code. |
| 1578 | */ |
| 1579 | *skip_addr = start_instr + cur_patch->skip_instr; |
| 1580 | cur_patch += cur_patch->skip_patch; |
| 1581 | } |
| 1582 | else |
| 1583 | { |
| 1584 | /* |
| 1585 | * Found an OK patch. Advance the patch pointer to the next patch |
| 1586 | * and wait for our instruction pointer to get here. |
| 1587 | */ |
| 1588 | cur_patch++; |
| 1589 | } |
| 1590 | } |
| 1591 | |
| 1592 | *start_patch = cur_patch; |
| 1593 | if (start_instr < *skip_addr) |
| 1594 | /* |
| 1595 | * Still skipping |
| 1596 | */ |
| 1597 | return (0); |
| 1598 | return(1); |
| 1599 | } |
| 1600 | |
| 1601 | |
| 1602 | /*+F************************************************************************* |
| 1603 | * Function: |
| 1604 | * aic7xxx_download_instr |
| 1605 | * |
| 1606 | * Description: |
| 1607 | * Find the next patch to download. |
| 1608 | *-F*************************************************************************/ |
| 1609 | static void |
| 1610 | aic7xxx_download_instr(struct aic7xxx_host *p, int instrptr, |
| 1611 | unsigned char *dconsts) |
| 1612 | { |
| 1613 | union ins_formats instr; |
| 1614 | struct ins_format1 *fmt1_ins; |
| 1615 | struct ins_format3 *fmt3_ins; |
| 1616 | unsigned char opcode; |
| 1617 | |
| 1618 | instr = *(union ins_formats*) &seqprog[instrptr * 4]; |
| 1619 | |
| 1620 | instr.integer = le32_to_cpu(instr.integer); |
| 1621 | |
| 1622 | fmt1_ins = &instr.format1; |
| 1623 | fmt3_ins = NULL; |
| 1624 | |
| 1625 | /* Pull the opcode */ |
| 1626 | opcode = instr.format1.opcode; |
| 1627 | switch (opcode) |
| 1628 | { |
| 1629 | case AIC_OP_JMP: |
| 1630 | case AIC_OP_JC: |
| 1631 | case AIC_OP_JNC: |
| 1632 | case AIC_OP_CALL: |
| 1633 | case AIC_OP_JNE: |
| 1634 | case AIC_OP_JNZ: |
| 1635 | case AIC_OP_JE: |
| 1636 | case AIC_OP_JZ: |
| 1637 | { |
| 1638 | struct sequencer_patch *cur_patch; |
| 1639 | int address_offset; |
| 1640 | unsigned int address; |
| 1641 | int skip_addr; |
| 1642 | int i; |
| 1643 | |
| 1644 | fmt3_ins = &instr.format3; |
| 1645 | address_offset = 0; |
| 1646 | address = fmt3_ins->address; |
| 1647 | cur_patch = sequencer_patches; |
| 1648 | skip_addr = 0; |
| 1649 | |
| 1650 | for (i = 0; i < address;) |
| 1651 | { |
| 1652 | aic7xxx_check_patch(p, &cur_patch, i, &skip_addr); |
| 1653 | if (skip_addr > i) |
| 1654 | { |
| 1655 | int end_addr; |
| 1656 | |
| 1657 | end_addr = min_t(int, address, skip_addr); |
| 1658 | address_offset += end_addr - i; |
| 1659 | i = skip_addr; |
| 1660 | } |
| 1661 | else |
| 1662 | { |
| 1663 | i++; |
| 1664 | } |
| 1665 | } |
| 1666 | address -= address_offset; |
| 1667 | fmt3_ins->address = address; |
| 1668 | /* Fall Through to the next code section */ |
| 1669 | } |
| 1670 | case AIC_OP_OR: |
| 1671 | case AIC_OP_AND: |
| 1672 | case AIC_OP_XOR: |
| 1673 | case AIC_OP_ADD: |
| 1674 | case AIC_OP_ADC: |
| 1675 | case AIC_OP_BMOV: |
| 1676 | if (fmt1_ins->parity != 0) |
| 1677 | { |
| 1678 | fmt1_ins->immediate = dconsts[fmt1_ins->immediate]; |
| 1679 | } |
| 1680 | fmt1_ins->parity = 0; |
| 1681 | /* Fall Through to the next code section */ |
| 1682 | case AIC_OP_ROL: |
| 1683 | if ((p->features & AHC_ULTRA2) != 0) |
| 1684 | { |
| 1685 | int i, count; |
| 1686 | |
| 1687 | /* Calculate odd parity for the instruction */ |
| 1688 | for ( i=0, count=0; i < 31; i++) |
| 1689 | { |
| 1690 | unsigned int mask; |
| 1691 | |
| 1692 | mask = 0x01 << i; |
| 1693 | if ((instr.integer & mask) != 0) |
| 1694 | count++; |
| 1695 | } |
| 1696 | if (!(count & 0x01)) |
| 1697 | instr.format1.parity = 1; |
| 1698 | } |
| 1699 | else |
| 1700 | { |
| 1701 | if (fmt3_ins != NULL) |
| 1702 | { |
| 1703 | instr.integer = fmt3_ins->immediate | |
| 1704 | (fmt3_ins->source << 8) | |
| 1705 | (fmt3_ins->address << 16) | |
| 1706 | (fmt3_ins->opcode << 25); |
| 1707 | } |
| 1708 | else |
| 1709 | { |
| 1710 | instr.integer = fmt1_ins->immediate | |
| 1711 | (fmt1_ins->source << 8) | |
| 1712 | (fmt1_ins->destination << 16) | |
| 1713 | (fmt1_ins->ret << 24) | |
| 1714 | (fmt1_ins->opcode << 25); |
| 1715 | } |
| 1716 | } |
| 1717 | aic_outb(p, (instr.integer & 0xff), SEQRAM); |
| 1718 | aic_outb(p, ((instr.integer >> 8) & 0xff), SEQRAM); |
| 1719 | aic_outb(p, ((instr.integer >> 16) & 0xff), SEQRAM); |
| 1720 | aic_outb(p, ((instr.integer >> 24) & 0xff), SEQRAM); |
| 1721 | udelay(10); |
| 1722 | break; |
| 1723 | |
| 1724 | default: |
| 1725 | panic("aic7xxx: Unknown opcode encountered in sequencer program."); |
| 1726 | break; |
| 1727 | } |
| 1728 | } |
| 1729 | |
| 1730 | |
| 1731 | /*+F************************************************************************* |
| 1732 | * Function: |
| 1733 | * aic7xxx_loadseq |
| 1734 | * |
| 1735 | * Description: |
| 1736 | * Load the sequencer code into the controller memory. |
| 1737 | *-F*************************************************************************/ |
| 1738 | static void |
| 1739 | aic7xxx_loadseq(struct aic7xxx_host *p) |
| 1740 | { |
| 1741 | struct sequencer_patch *cur_patch; |
| 1742 | int i; |
| 1743 | int downloaded; |
| 1744 | int skip_addr; |
| 1745 | unsigned char download_consts[4] = {0, 0, 0, 0}; |
| 1746 | |
| 1747 | if (aic7xxx_verbose & VERBOSE_PROBE) |
| 1748 | { |
| 1749 | printk(KERN_INFO "(scsi%d) Downloading sequencer code...", p->host_no); |
| 1750 | } |
| 1751 | #if 0 |
| 1752 | download_consts[TMODE_NUMCMDS] = p->num_targetcmds; |
| 1753 | #endif |
| 1754 | download_consts[TMODE_NUMCMDS] = 0; |
| 1755 | cur_patch = &sequencer_patches[0]; |
| 1756 | downloaded = 0; |
| 1757 | skip_addr = 0; |
| 1758 | |
| 1759 | aic_outb(p, PERRORDIS|LOADRAM|FAILDIS|FASTMODE, SEQCTL); |
| 1760 | aic_outb(p, 0, SEQADDR0); |
| 1761 | aic_outb(p, 0, SEQADDR1); |
| 1762 | |
| 1763 | for (i = 0; i < sizeof(seqprog) / 4; i++) |
| 1764 | { |
| 1765 | if (aic7xxx_check_patch(p, &cur_patch, i, &skip_addr) == 0) |
| 1766 | { |
| 1767 | /* Skip this instruction for this configuration. */ |
| 1768 | continue; |
| 1769 | } |
| 1770 | aic7xxx_download_instr(p, i, &download_consts[0]); |
| 1771 | downloaded++; |
| 1772 | } |
| 1773 | |
| 1774 | aic_outb(p, 0, SEQADDR0); |
| 1775 | aic_outb(p, 0, SEQADDR1); |
| 1776 | aic_outb(p, FASTMODE | FAILDIS, SEQCTL); |
| 1777 | unpause_sequencer(p, TRUE); |
| 1778 | mdelay(1); |
| 1779 | pause_sequencer(p); |
| 1780 | aic_outb(p, FASTMODE, SEQCTL); |
| 1781 | if (aic7xxx_verbose & VERBOSE_PROBE) |
| 1782 | { |
| 1783 | printk(" %d instructions downloaded\n", downloaded); |
| 1784 | } |
| 1785 | if (aic7xxx_dump_sequencer) |
| 1786 | aic7xxx_print_sequencer(p, downloaded); |
| 1787 | } |
| 1788 | |
| 1789 | /*+F************************************************************************* |
| 1790 | * Function: |
| 1791 | * aic7xxx_print_sequencer |
| 1792 | * |
| 1793 | * Description: |
| 1794 | * Print the contents of the sequencer memory to the screen. |
| 1795 | *-F*************************************************************************/ |
| 1796 | static void |
| 1797 | aic7xxx_print_sequencer(struct aic7xxx_host *p, int downloaded) |
| 1798 | { |
| 1799 | int i, k, temp; |
| 1800 | |
| 1801 | aic_outb(p, PERRORDIS|LOADRAM|FAILDIS|FASTMODE, SEQCTL); |
| 1802 | aic_outb(p, 0, SEQADDR0); |
| 1803 | aic_outb(p, 0, SEQADDR1); |
| 1804 | |
| 1805 | k = 0; |
| 1806 | for (i=0; i < downloaded; i++) |
| 1807 | { |
| 1808 | if ( k == 0 ) |
| 1809 | printk("%03x: ", i); |
| 1810 | temp = aic_inb(p, SEQRAM); |
| 1811 | temp |= (aic_inb(p, SEQRAM) << 8); |
| 1812 | temp |= (aic_inb(p, SEQRAM) << 16); |
| 1813 | temp |= (aic_inb(p, SEQRAM) << 24); |
| 1814 | printk("%08x", temp); |
| 1815 | if ( ++k == 8 ) |
| 1816 | { |
| 1817 | printk("\n"); |
| 1818 | k = 0; |
| 1819 | } |
| 1820 | else |
| 1821 | printk(" "); |
| 1822 | } |
| 1823 | aic_outb(p, 0, SEQADDR0); |
| 1824 | aic_outb(p, 0, SEQADDR1); |
| 1825 | aic_outb(p, FASTMODE | FAILDIS, SEQCTL); |
| 1826 | unpause_sequencer(p, TRUE); |
| 1827 | mdelay(1); |
| 1828 | pause_sequencer(p); |
| 1829 | aic_outb(p, FASTMODE, SEQCTL); |
| 1830 | printk("\n"); |
| 1831 | } |
| 1832 | |
| 1833 | /*+F************************************************************************* |
| 1834 | * Function: |
| 1835 | * aic7xxx_info |
| 1836 | * |
| 1837 | * Description: |
| 1838 | * Return a string describing the driver. |
| 1839 | *-F*************************************************************************/ |
| 1840 | static const char * |
| 1841 | aic7xxx_info(struct Scsi_Host *dooh) |
| 1842 | { |
| 1843 | static char buffer[256]; |
| 1844 | char *bp; |
| 1845 | struct aic7xxx_host *p; |
| 1846 | |
| 1847 | bp = &buffer[0]; |
| 1848 | p = (struct aic7xxx_host *)dooh->hostdata; |
| 1849 | memset(bp, 0, sizeof(buffer)); |
| 1850 | strcpy(bp, "Adaptec AHA274x/284x/294x (EISA/VLB/PCI-Fast SCSI) "); |
| 1851 | strcat(bp, AIC7XXX_C_VERSION); |
| 1852 | strcat(bp, "/"); |
| 1853 | strcat(bp, AIC7XXX_H_VERSION); |
| 1854 | strcat(bp, "\n"); |
| 1855 | strcat(bp, " <"); |
| 1856 | strcat(bp, board_names[p->board_name_index]); |
| 1857 | strcat(bp, ">"); |
| 1858 | |
| 1859 | return(bp); |
| 1860 | } |
| 1861 | |
| 1862 | /*+F************************************************************************* |
| 1863 | * Function: |
| 1864 | * aic7xxx_find_syncrate |
| 1865 | * |
| 1866 | * Description: |
| 1867 | * Look up the valid period to SCSIRATE conversion in our table |
| 1868 | *-F*************************************************************************/ |
| 1869 | static struct aic7xxx_syncrate * |
| 1870 | aic7xxx_find_syncrate(struct aic7xxx_host *p, unsigned int *period, |
| 1871 | unsigned int maxsync, unsigned char *options) |
| 1872 | { |
| 1873 | struct aic7xxx_syncrate *syncrate; |
| 1874 | int done = FALSE; |
| 1875 | |
| 1876 | switch(*options) |
| 1877 | { |
| 1878 | case MSG_EXT_PPR_OPTION_DT_CRC: |
| 1879 | case MSG_EXT_PPR_OPTION_DT_UNITS: |
| 1880 | if(!(p->features & AHC_ULTRA3)) |
| 1881 | { |
| 1882 | *options = 0; |
| 1883 | maxsync = max_t(unsigned int, maxsync, AHC_SYNCRATE_ULTRA2); |
| 1884 | } |
| 1885 | break; |
| 1886 | case MSG_EXT_PPR_OPTION_DT_CRC_QUICK: |
| 1887 | case MSG_EXT_PPR_OPTION_DT_UNITS_QUICK: |
| 1888 | if(!(p->features & AHC_ULTRA3)) |
| 1889 | { |
| 1890 | *options = 0; |
| 1891 | maxsync = max_t(unsigned int, maxsync, AHC_SYNCRATE_ULTRA2); |
| 1892 | } |
| 1893 | else |
| 1894 | { |
| 1895 | /* |
| 1896 | * we don't support the Quick Arbitration variants of dual edge |
| 1897 | * clocking. As it turns out, we want to send back the |
| 1898 | * same basic option, but without the QA attribute. |
| 1899 | * We know that we are responding because we would never set |
| 1900 | * these options ourself, we would only respond to them. |
| 1901 | */ |
| 1902 | switch(*options) |
| 1903 | { |
| 1904 | case MSG_EXT_PPR_OPTION_DT_CRC_QUICK: |
| 1905 | *options = MSG_EXT_PPR_OPTION_DT_CRC; |
| 1906 | break; |
| 1907 | case MSG_EXT_PPR_OPTION_DT_UNITS_QUICK: |
| 1908 | *options = MSG_EXT_PPR_OPTION_DT_UNITS; |
| 1909 | break; |
| 1910 | } |
| 1911 | } |
| 1912 | break; |
| 1913 | default: |
| 1914 | *options = 0; |
| 1915 | maxsync = max_t(unsigned int, maxsync, AHC_SYNCRATE_ULTRA2); |
| 1916 | break; |
| 1917 | } |
| 1918 | syncrate = &aic7xxx_syncrates[maxsync]; |
| 1919 | while ( (syncrate->rate[0] != NULL) && |
| 1920 | (!(p->features & AHC_ULTRA2) || syncrate->sxfr_ultra2) ) |
| 1921 | { |
| 1922 | if (*period <= syncrate->period) |
| 1923 | { |
| 1924 | switch(*options) |
| 1925 | { |
| 1926 | case MSG_EXT_PPR_OPTION_DT_CRC: |
| 1927 | case MSG_EXT_PPR_OPTION_DT_UNITS: |
| 1928 | if(!(syncrate->sxfr_ultra2 & AHC_SYNCRATE_CRC)) |
| 1929 | { |
| 1930 | done = TRUE; |
| 1931 | /* |
| 1932 | * oops, we went too low for the CRC/DualEdge signalling, so |
| 1933 | * clear the options byte |
| 1934 | */ |
| 1935 | *options = 0; |
| 1936 | /* |
| 1937 | * We'll be sending a reply to this packet to set the options |
| 1938 | * properly, so unilaterally set the period as well. |
| 1939 | */ |
| 1940 | *period = syncrate->period; |
| 1941 | } |
| 1942 | else |
| 1943 | { |
| 1944 | done = TRUE; |
| 1945 | if(syncrate == &aic7xxx_syncrates[maxsync]) |
| 1946 | { |
| 1947 | *period = syncrate->period; |
| 1948 | } |
| 1949 | } |
| 1950 | break; |
| 1951 | default: |
| 1952 | if(!(syncrate->sxfr_ultra2 & AHC_SYNCRATE_CRC)) |
| 1953 | { |
| 1954 | done = TRUE; |
| 1955 | if(syncrate == &aic7xxx_syncrates[maxsync]) |
| 1956 | { |
| 1957 | *period = syncrate->period; |
| 1958 | } |
| 1959 | } |
| 1960 | break; |
| 1961 | } |
| 1962 | if(done) |
| 1963 | { |
| 1964 | break; |
| 1965 | } |
| 1966 | } |
| 1967 | syncrate++; |
| 1968 | } |
| 1969 | if ( (*period == 0) || (syncrate->rate[0] == NULL) || |
| 1970 | ((p->features & AHC_ULTRA2) && (syncrate->sxfr_ultra2 == 0)) ) |
| 1971 | { |
| 1972 | /* |
| 1973 | * Use async transfers for this target |
| 1974 | */ |
| 1975 | *options = 0; |
| 1976 | *period = 255; |
| 1977 | syncrate = NULL; |
| 1978 | } |
| 1979 | return (syncrate); |
| 1980 | } |
| 1981 | |
| 1982 | |
| 1983 | /*+F************************************************************************* |
| 1984 | * Function: |
| 1985 | * aic7xxx_find_period |
| 1986 | * |
| 1987 | * Description: |
| 1988 | * Look up the valid SCSIRATE to period conversion in our table |
| 1989 | *-F*************************************************************************/ |
| 1990 | static unsigned int |
| 1991 | aic7xxx_find_period(struct aic7xxx_host *p, unsigned int scsirate, |
| 1992 | unsigned int maxsync) |
| 1993 | { |
| 1994 | struct aic7xxx_syncrate *syncrate; |
| 1995 | |
| 1996 | if (p->features & AHC_ULTRA2) |
| 1997 | { |
| 1998 | scsirate &= SXFR_ULTRA2; |
| 1999 | } |
| 2000 | else |
| 2001 | { |
| 2002 | scsirate &= SXFR; |
| 2003 | } |
| 2004 | |
| 2005 | syncrate = &aic7xxx_syncrates[maxsync]; |
| 2006 | while (syncrate->rate[0] != NULL) |
| 2007 | { |
| 2008 | if (p->features & AHC_ULTRA2) |
| 2009 | { |
| 2010 | if (syncrate->sxfr_ultra2 == 0) |
| 2011 | break; |
| 2012 | else if (scsirate == syncrate->sxfr_ultra2) |
| 2013 | return (syncrate->period); |
| 2014 | else if (scsirate == (syncrate->sxfr_ultra2 & ~AHC_SYNCRATE_CRC)) |
| 2015 | return (syncrate->period); |
| 2016 | } |
| 2017 | else if (scsirate == (syncrate->sxfr & ~ULTRA_SXFR)) |
| 2018 | { |
| 2019 | return (syncrate->period); |
| 2020 | } |
| 2021 | syncrate++; |
| 2022 | } |
| 2023 | return (0); /* async */ |
| 2024 | } |
| 2025 | |
| 2026 | /*+F************************************************************************* |
| 2027 | * Function: |
| 2028 | * aic7xxx_validate_offset |
| 2029 | * |
| 2030 | * Description: |
| 2031 | * Set a valid offset value for a particular card in use and transfer |
| 2032 | * settings in use. |
| 2033 | *-F*************************************************************************/ |
| 2034 | static void |
| 2035 | aic7xxx_validate_offset(struct aic7xxx_host *p, |
| 2036 | struct aic7xxx_syncrate *syncrate, unsigned int *offset, int wide) |
| 2037 | { |
| 2038 | unsigned int maxoffset; |
| 2039 | |
| 2040 | /* Limit offset to what the card (and device) can do */ |
| 2041 | if (syncrate == NULL) |
| 2042 | { |
| 2043 | maxoffset = 0; |
| 2044 | } |
| 2045 | else if (p->features & AHC_ULTRA2) |
| 2046 | { |
| 2047 | maxoffset = MAX_OFFSET_ULTRA2; |
| 2048 | } |
| 2049 | else |
| 2050 | { |
| 2051 | if (wide) |
| 2052 | maxoffset = MAX_OFFSET_16BIT; |
| 2053 | else |
| 2054 | maxoffset = MAX_OFFSET_8BIT; |
| 2055 | } |
| 2056 | *offset = min(*offset, maxoffset); |
| 2057 | } |
| 2058 | |
| 2059 | /*+F************************************************************************* |
| 2060 | * Function: |
| 2061 | * aic7xxx_set_syncrate |
| 2062 | * |
| 2063 | * Description: |
| 2064 | * Set the actual syncrate down in the card and in our host structs |
| 2065 | *-F*************************************************************************/ |
| 2066 | static void |
| 2067 | aic7xxx_set_syncrate(struct aic7xxx_host *p, struct aic7xxx_syncrate *syncrate, |
| 2068 | int target, int channel, unsigned int period, unsigned int offset, |
| 2069 | unsigned char options, unsigned int type, struct aic_dev_data *aic_dev) |
| 2070 | { |
| 2071 | unsigned char tindex; |
| 2072 | unsigned short target_mask; |
| 2073 | unsigned char lun, old_options; |
| 2074 | unsigned int old_period, old_offset; |
| 2075 | |
| 2076 | tindex = target | (channel << 3); |
| 2077 | target_mask = 0x01 << tindex; |
| 2078 | lun = aic_inb(p, SCB_TCL) & 0x07; |
| 2079 | |
| 2080 | if (syncrate == NULL) |
| 2081 | { |
| 2082 | period = 0; |
| 2083 | offset = 0; |
| 2084 | } |
| 2085 | |
| 2086 | old_period = aic_dev->cur.period; |
| 2087 | old_offset = aic_dev->cur.offset; |
| 2088 | old_options = aic_dev->cur.options; |
| 2089 | |
| 2090 | |
| 2091 | if (type & AHC_TRANS_CUR) |
| 2092 | { |
| 2093 | unsigned int scsirate; |
| 2094 | |
| 2095 | scsirate = aic_inb(p, TARG_SCSIRATE + tindex); |
| 2096 | if (p->features & AHC_ULTRA2) |
| 2097 | { |
| 2098 | scsirate &= ~SXFR_ULTRA2; |
| 2099 | if (syncrate != NULL) |
| 2100 | { |
| 2101 | switch(options) |
| 2102 | { |
| 2103 | case MSG_EXT_PPR_OPTION_DT_UNITS: |
| 2104 | /* |
| 2105 | * mask off the CRC bit in the xfer settings |
| 2106 | */ |
| 2107 | scsirate |= (syncrate->sxfr_ultra2 & ~AHC_SYNCRATE_CRC); |
| 2108 | break; |
| 2109 | default: |
| 2110 | scsirate |= syncrate->sxfr_ultra2; |
| 2111 | break; |
| 2112 | } |
| 2113 | } |
| 2114 | if (type & AHC_TRANS_ACTIVE) |
| 2115 | { |
| 2116 | aic_outb(p, offset, SCSIOFFSET); |
| 2117 | } |
| 2118 | aic_outb(p, offset, TARG_OFFSET + tindex); |
| 2119 | } |
| 2120 | else /* Not an Ultra2 controller */ |
| 2121 | { |
| 2122 | scsirate &= ~(SXFR|SOFS); |
| 2123 | p->ultraenb &= ~target_mask; |
| 2124 | if (syncrate != NULL) |
| 2125 | { |
| 2126 | if (syncrate->sxfr & ULTRA_SXFR) |
| 2127 | { |
| 2128 | p->ultraenb |= target_mask; |
| 2129 | } |
| 2130 | scsirate |= (syncrate->sxfr & SXFR); |
| 2131 | scsirate |= (offset & SOFS); |
| 2132 | } |
| 2133 | if (type & AHC_TRANS_ACTIVE) |
| 2134 | { |
| 2135 | unsigned char sxfrctl0; |
| 2136 | |
| 2137 | sxfrctl0 = aic_inb(p, SXFRCTL0); |
| 2138 | sxfrctl0 &= ~FAST20; |
| 2139 | if (p->ultraenb & target_mask) |
| 2140 | sxfrctl0 |= FAST20; |
| 2141 | aic_outb(p, sxfrctl0, SXFRCTL0); |
| 2142 | } |
| 2143 | aic_outb(p, p->ultraenb & 0xff, ULTRA_ENB); |
| 2144 | aic_outb(p, (p->ultraenb >> 8) & 0xff, ULTRA_ENB + 1 ); |
| 2145 | } |
| 2146 | if (type & AHC_TRANS_ACTIVE) |
| 2147 | { |
| 2148 | aic_outb(p, scsirate, SCSIRATE); |
| 2149 | } |
| 2150 | aic_outb(p, scsirate, TARG_SCSIRATE + tindex); |
| 2151 | aic_dev->cur.period = period; |
| 2152 | aic_dev->cur.offset = offset; |
| 2153 | aic_dev->cur.options = options; |
| 2154 | if ( !(type & AHC_TRANS_QUITE) && |
| 2155 | (aic7xxx_verbose & VERBOSE_NEGOTIATION) && |
| 2156 | (aic_dev->flags & DEVICE_PRINT_DTR) ) |
| 2157 | { |
| 2158 | if (offset) |
| 2159 | { |
| 2160 | int rate_mod = (scsirate & WIDEXFER) ? 1 : 0; |
| 2161 | |
| 2162 | printk(INFO_LEAD "Synchronous at %s Mbyte/sec, " |
| 2163 | "offset %d.\n", p->host_no, channel, target, lun, |
| 2164 | syncrate->rate[rate_mod], offset); |
| 2165 | } |
| 2166 | else |
| 2167 | { |
| 2168 | printk(INFO_LEAD "Using asynchronous transfers.\n", |
| 2169 | p->host_no, channel, target, lun); |
| 2170 | } |
| 2171 | aic_dev->flags &= ~DEVICE_PRINT_DTR; |
| 2172 | } |
| 2173 | } |
| 2174 | |
| 2175 | if (type & AHC_TRANS_GOAL) |
| 2176 | { |
| 2177 | aic_dev->goal.period = period; |
| 2178 | aic_dev->goal.offset = offset; |
| 2179 | aic_dev->goal.options = options; |
| 2180 | } |
| 2181 | |
| 2182 | if (type & AHC_TRANS_USER) |
| 2183 | { |
| 2184 | p->user[tindex].period = period; |
| 2185 | p->user[tindex].offset = offset; |
| 2186 | p->user[tindex].options = options; |
| 2187 | } |
| 2188 | } |
| 2189 | |
| 2190 | /*+F************************************************************************* |
| 2191 | * Function: |
| 2192 | * aic7xxx_set_width |
| 2193 | * |
| 2194 | * Description: |
| 2195 | * Set the actual width down in the card and in our host structs |
| 2196 | *-F*************************************************************************/ |
| 2197 | static void |
| 2198 | aic7xxx_set_width(struct aic7xxx_host *p, int target, int channel, int lun, |
| 2199 | unsigned int width, unsigned int type, struct aic_dev_data *aic_dev) |
| 2200 | { |
| 2201 | unsigned char tindex; |
| 2202 | unsigned short target_mask; |
| 2203 | unsigned int old_width; |
| 2204 | |
| 2205 | tindex = target | (channel << 3); |
| 2206 | target_mask = 1 << tindex; |
| 2207 | |
| 2208 | old_width = aic_dev->cur.width; |
| 2209 | |
| 2210 | if (type & AHC_TRANS_CUR) |
| 2211 | { |
| 2212 | unsigned char scsirate; |
| 2213 | |
| 2214 | scsirate = aic_inb(p, TARG_SCSIRATE + tindex); |
| 2215 | |
| 2216 | scsirate &= ~WIDEXFER; |
| 2217 | if (width == MSG_EXT_WDTR_BUS_16_BIT) |
| 2218 | scsirate |= WIDEXFER; |
| 2219 | |
| 2220 | aic_outb(p, scsirate, TARG_SCSIRATE + tindex); |
| 2221 | |
| 2222 | if (type & AHC_TRANS_ACTIVE) |
| 2223 | aic_outb(p, scsirate, SCSIRATE); |
| 2224 | |
| 2225 | aic_dev->cur.width = width; |
| 2226 | |
| 2227 | if ( !(type & AHC_TRANS_QUITE) && |
| 2228 | (aic7xxx_verbose & VERBOSE_NEGOTIATION2) && |
| 2229 | (aic_dev->flags & DEVICE_PRINT_DTR) ) |
| 2230 | { |
| 2231 | printk(INFO_LEAD "Using %s transfers\n", p->host_no, channel, target, |
| 2232 | lun, (scsirate & WIDEXFER) ? "Wide(16bit)" : "Narrow(8bit)" ); |
| 2233 | } |
| 2234 | } |
| 2235 | |
| 2236 | if (type & AHC_TRANS_GOAL) |
| 2237 | aic_dev->goal.width = width; |
| 2238 | if (type & AHC_TRANS_USER) |
| 2239 | p->user[tindex].width = width; |
| 2240 | |
| 2241 | if (aic_dev->goal.offset) |
| 2242 | { |
| 2243 | if (p->features & AHC_ULTRA2) |
| 2244 | { |
| 2245 | aic_dev->goal.offset = MAX_OFFSET_ULTRA2; |
| 2246 | } |
| 2247 | else if (width == MSG_EXT_WDTR_BUS_16_BIT) |
| 2248 | { |
| 2249 | aic_dev->goal.offset = MAX_OFFSET_16BIT; |
| 2250 | } |
| 2251 | else |
| 2252 | { |
| 2253 | aic_dev->goal.offset = MAX_OFFSET_8BIT; |
| 2254 | } |
| 2255 | } |
| 2256 | } |
| 2257 | |
| 2258 | /*+F************************************************************************* |
| 2259 | * Function: |
| 2260 | * scbq_init |
| 2261 | * |
| 2262 | * Description: |
| 2263 | * SCB queue initialization. |
| 2264 | * |
| 2265 | *-F*************************************************************************/ |
| 2266 | static void |
| 2267 | scbq_init(volatile scb_queue_type *queue) |
| 2268 | { |
| 2269 | queue->head = NULL; |
| 2270 | queue->tail = NULL; |
| 2271 | } |
| 2272 | |
| 2273 | /*+F************************************************************************* |
| 2274 | * Function: |
| 2275 | * scbq_insert_head |
| 2276 | * |
| 2277 | * Description: |
| 2278 | * Add an SCB to the head of the list. |
| 2279 | * |
| 2280 | *-F*************************************************************************/ |
| 2281 | static inline void |
| 2282 | scbq_insert_head(volatile scb_queue_type *queue, struct aic7xxx_scb *scb) |
| 2283 | { |
| 2284 | scb->q_next = queue->head; |
| 2285 | queue->head = scb; |
| 2286 | if (queue->tail == NULL) /* If list was empty, update tail. */ |
| 2287 | queue->tail = queue->head; |
| 2288 | } |
| 2289 | |
| 2290 | /*+F************************************************************************* |
| 2291 | * Function: |
| 2292 | * scbq_remove_head |
| 2293 | * |
| 2294 | * Description: |
| 2295 | * Remove an SCB from the head of the list. |
| 2296 | * |
| 2297 | *-F*************************************************************************/ |
| 2298 | static inline struct aic7xxx_scb * |
| 2299 | scbq_remove_head(volatile scb_queue_type *queue) |
| 2300 | { |
| 2301 | struct aic7xxx_scb * scbp; |
| 2302 | |
| 2303 | scbp = queue->head; |
| 2304 | if (queue->head != NULL) |
| 2305 | queue->head = queue->head->q_next; |
| 2306 | if (queue->head == NULL) /* If list is now empty, update tail. */ |
| 2307 | queue->tail = NULL; |
| 2308 | return(scbp); |
| 2309 | } |
| 2310 | |
| 2311 | /*+F************************************************************************* |
| 2312 | * Function: |
| 2313 | * scbq_remove |
| 2314 | * |
| 2315 | * Description: |
| 2316 | * Removes an SCB from the list. |
| 2317 | * |
| 2318 | *-F*************************************************************************/ |
| 2319 | static inline void |
| 2320 | scbq_remove(volatile scb_queue_type *queue, struct aic7xxx_scb *scb) |
| 2321 | { |
| 2322 | if (queue->head == scb) |
| 2323 | { |
| 2324 | /* At beginning of queue, remove from head. */ |
| 2325 | scbq_remove_head(queue); |
| 2326 | } |
| 2327 | else |
| 2328 | { |
| 2329 | struct aic7xxx_scb *curscb = queue->head; |
| 2330 | |
| 2331 | /* |
| 2332 | * Search until the next scb is the one we're looking for, or |
| 2333 | * we run out of queue. |
| 2334 | */ |
| 2335 | while ((curscb != NULL) && (curscb->q_next != scb)) |
| 2336 | { |
| 2337 | curscb = curscb->q_next; |
| 2338 | } |
| 2339 | if (curscb != NULL) |
| 2340 | { |
| 2341 | /* Found it. */ |
| 2342 | curscb->q_next = scb->q_next; |
| 2343 | if (scb->q_next == NULL) |
| 2344 | { |
| 2345 | /* Update the tail when removing the tail. */ |
| 2346 | queue->tail = curscb; |
| 2347 | } |
| 2348 | } |
| 2349 | } |
| 2350 | } |
| 2351 | |
| 2352 | /*+F************************************************************************* |
| 2353 | * Function: |
| 2354 | * scbq_insert_tail |
| 2355 | * |
| 2356 | * Description: |
| 2357 | * Add an SCB at the tail of the list. |
| 2358 | * |
| 2359 | *-F*************************************************************************/ |
| 2360 | static inline void |
| 2361 | scbq_insert_tail(volatile scb_queue_type *queue, struct aic7xxx_scb *scb) |
| 2362 | { |
| 2363 | scb->q_next = NULL; |
| 2364 | if (queue->tail != NULL) /* Add the scb at the end of the list. */ |
| 2365 | queue->tail->q_next = scb; |
| 2366 | queue->tail = scb; /* Update the tail. */ |
| 2367 | if (queue->head == NULL) /* If list was empty, update head. */ |
| 2368 | queue->head = queue->tail; |
| 2369 | } |
| 2370 | |
| 2371 | /*+F************************************************************************* |
| 2372 | * Function: |
| 2373 | * aic7xxx_match_scb |
| 2374 | * |
| 2375 | * Description: |
| 2376 | * Checks to see if an scb matches the target/channel as specified. |
| 2377 | * If target is ALL_TARGETS (-1), then we're looking for any device |
| 2378 | * on the specified channel; this happens when a channel is going |
| 2379 | * to be reset and all devices on that channel must be aborted. |
| 2380 | *-F*************************************************************************/ |
| 2381 | static int |
| 2382 | aic7xxx_match_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb, |
| 2383 | int target, int channel, int lun, unsigned char tag) |
| 2384 | { |
| 2385 | int targ = (scb->hscb->target_channel_lun >> 4) & 0x0F; |
| 2386 | int chan = (scb->hscb->target_channel_lun >> 3) & 0x01; |
| 2387 | int slun = scb->hscb->target_channel_lun & 0x07; |
| 2388 | int match; |
| 2389 | |
| 2390 | match = ((chan == channel) || (channel == ALL_CHANNELS)); |
| 2391 | if (match != 0) |
| 2392 | match = ((targ == target) || (target == ALL_TARGETS)); |
| 2393 | if (match != 0) |
| 2394 | match = ((lun == slun) || (lun == ALL_LUNS)); |
| 2395 | if (match != 0) |
| 2396 | match = ((tag == scb->hscb->tag) || (tag == SCB_LIST_NULL)); |
| 2397 | |
| 2398 | return (match); |
| 2399 | } |
| 2400 | |
| 2401 | /*+F************************************************************************* |
| 2402 | * Function: |
| 2403 | * aic7xxx_add_curscb_to_free_list |
| 2404 | * |
| 2405 | * Description: |
| 2406 | * Adds the current scb (in SCBPTR) to the list of free SCBs. |
| 2407 | *-F*************************************************************************/ |
| 2408 | static void |
| 2409 | aic7xxx_add_curscb_to_free_list(struct aic7xxx_host *p) |
| 2410 | { |
| 2411 | /* |
| 2412 | * Invalidate the tag so that aic7xxx_find_scb doesn't think |
| 2413 | * it's active |
| 2414 | */ |
| 2415 | aic_outb(p, SCB_LIST_NULL, SCB_TAG); |
| 2416 | aic_outb(p, 0, SCB_CONTROL); |
| 2417 | |
| 2418 | aic_outb(p, aic_inb(p, FREE_SCBH), SCB_NEXT); |
| 2419 | aic_outb(p, aic_inb(p, SCBPTR), FREE_SCBH); |
| 2420 | } |
| 2421 | |
| 2422 | /*+F************************************************************************* |
| 2423 | * Function: |
| 2424 | * aic7xxx_rem_scb_from_disc_list |
| 2425 | * |
| 2426 | * Description: |
| 2427 | * Removes the current SCB from the disconnected list and adds it |
| 2428 | * to the free list. |
| 2429 | *-F*************************************************************************/ |
| 2430 | static unsigned char |
| 2431 | aic7xxx_rem_scb_from_disc_list(struct aic7xxx_host *p, unsigned char scbptr, |
| 2432 | unsigned char prev) |
| 2433 | { |
| 2434 | unsigned char next; |
| 2435 | |
| 2436 | aic_outb(p, scbptr, SCBPTR); |
| 2437 | next = aic_inb(p, SCB_NEXT); |
| 2438 | aic7xxx_add_curscb_to_free_list(p); |
| 2439 | |
| 2440 | if (prev != SCB_LIST_NULL) |
| 2441 | { |
| 2442 | aic_outb(p, prev, SCBPTR); |
| 2443 | aic_outb(p, next, SCB_NEXT); |
| 2444 | } |
| 2445 | else |
| 2446 | { |
| 2447 | aic_outb(p, next, DISCONNECTED_SCBH); |
| 2448 | } |
| 2449 | |
| 2450 | return next; |
| 2451 | } |
| 2452 | |
| 2453 | /*+F************************************************************************* |
| 2454 | * Function: |
| 2455 | * aic7xxx_busy_target |
| 2456 | * |
| 2457 | * Description: |
| 2458 | * Set the specified target busy. |
| 2459 | *-F*************************************************************************/ |
| 2460 | static inline void |
| 2461 | aic7xxx_busy_target(struct aic7xxx_host *p, struct aic7xxx_scb *scb) |
| 2462 | { |
| 2463 | p->untagged_scbs[scb->hscb->target_channel_lun] = scb->hscb->tag; |
| 2464 | } |
| 2465 | |
| 2466 | /*+F************************************************************************* |
| 2467 | * Function: |
| 2468 | * aic7xxx_index_busy_target |
| 2469 | * |
| 2470 | * Description: |
| 2471 | * Returns the index of the busy target, and optionally sets the |
| 2472 | * target inactive. |
| 2473 | *-F*************************************************************************/ |
| 2474 | static inline unsigned char |
| 2475 | aic7xxx_index_busy_target(struct aic7xxx_host *p, unsigned char tcl, |
| 2476 | int unbusy) |
| 2477 | { |
| 2478 | unsigned char busy_scbid; |
| 2479 | |
| 2480 | busy_scbid = p->untagged_scbs[tcl]; |
| 2481 | if (unbusy) |
| 2482 | { |
| 2483 | p->untagged_scbs[tcl] = SCB_LIST_NULL; |
| 2484 | } |
| 2485 | return (busy_scbid); |
| 2486 | } |
| 2487 | |
| 2488 | /*+F************************************************************************* |
| 2489 | * Function: |
| 2490 | * aic7xxx_find_scb |
| 2491 | * |
| 2492 | * Description: |
| 2493 | * Look through the SCB array of the card and attempt to find the |
| 2494 | * hardware SCB that corresponds to the passed in SCB. Return |
| 2495 | * SCB_LIST_NULL if unsuccessful. This routine assumes that the |
| 2496 | * card is already paused. |
| 2497 | *-F*************************************************************************/ |
| 2498 | static unsigned char |
| 2499 | aic7xxx_find_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb) |
| 2500 | { |
| 2501 | unsigned char saved_scbptr; |
| 2502 | unsigned char curindex; |
| 2503 | |
| 2504 | saved_scbptr = aic_inb(p, SCBPTR); |
| 2505 | curindex = 0; |
| 2506 | for (curindex = 0; curindex < p->scb_data->maxhscbs; curindex++) |
| 2507 | { |
| 2508 | aic_outb(p, curindex, SCBPTR); |
| 2509 | if (aic_inb(p, SCB_TAG) == scb->hscb->tag) |
| 2510 | { |
| 2511 | break; |
| 2512 | } |
| 2513 | } |
| 2514 | aic_outb(p, saved_scbptr, SCBPTR); |
| 2515 | if (curindex >= p->scb_data->maxhscbs) |
| 2516 | { |
| 2517 | curindex = SCB_LIST_NULL; |
| 2518 | } |
| 2519 | |
| 2520 | return (curindex); |
| 2521 | } |
| 2522 | |
| 2523 | /*+F************************************************************************* |
| 2524 | * Function: |
| 2525 | * aic7xxx_allocate_scb |
| 2526 | * |
| 2527 | * Description: |
| 2528 | * Get an SCB from the free list or by allocating a new one. |
| 2529 | *-F*************************************************************************/ |
| 2530 | static int |
| 2531 | aic7xxx_allocate_scb(struct aic7xxx_host *p) |
| 2532 | { |
| 2533 | struct aic7xxx_scb *scbp = NULL; |
| 2534 | int scb_size = (sizeof (struct hw_scatterlist) * AIC7XXX_MAX_SG) + 12 + 6; |
| 2535 | int i; |
| 2536 | int step = PAGE_SIZE / 1024; |
| 2537 | unsigned long scb_count = 0; |
| 2538 | struct hw_scatterlist *hsgp; |
| 2539 | struct aic7xxx_scb *scb_ap; |
| 2540 | struct aic7xxx_scb_dma *scb_dma; |
| 2541 | unsigned char *bufs; |
| 2542 | |
| 2543 | if (p->scb_data->numscbs < p->scb_data->maxscbs) |
| 2544 | { |
| 2545 | /* |
| 2546 | * Calculate the optimal number of SCBs to allocate. |
| 2547 | * |
| 2548 | * NOTE: This formula works because the sizeof(sg_array) is always |
| 2549 | * 1024. Therefore, scb_size * i would always be > PAGE_SIZE * |
| 2550 | * (i/step). The (i-1) allows the left hand side of the equation |
| 2551 | * to grow into the right hand side to a point of near perfect |
| 2552 | * efficiency since scb_size * (i -1) is growing slightly faster |
| 2553 | * than the right hand side. If the number of SG array elements |
| 2554 | * is changed, this function may not be near so efficient any more. |
| 2555 | * |
| 2556 | * Since the DMA'able buffers are now allocated in a separate |
| 2557 | * chunk this algorithm has been modified to match. The '12' |
| 2558 | * and '6' factors in scb_size are for the DMA'able command byte |
| 2559 | * and sensebuffers respectively. -DaveM |
| 2560 | */ |
| 2561 | for ( i=step;; i *= 2 ) |
| 2562 | { |
| 2563 | if ( (scb_size * (i-1)) >= ( (PAGE_SIZE * (i/step)) - 64 ) ) |
| 2564 | { |
| 2565 | i /= 2; |
| 2566 | break; |
| 2567 | } |
| 2568 | } |
| 2569 | scb_count = min( (i-1), p->scb_data->maxscbs - p->scb_data->numscbs); |
| 2570 | scb_ap = (struct aic7xxx_scb *)kmalloc(sizeof (struct aic7xxx_scb) * scb_count |
| 2571 | + sizeof(struct aic7xxx_scb_dma), GFP_ATOMIC); |
| 2572 | if (scb_ap == NULL) |
| 2573 | return(0); |
| 2574 | scb_dma = (struct aic7xxx_scb_dma *)&scb_ap[scb_count]; |
| 2575 | hsgp = (struct hw_scatterlist *) |
| 2576 | pci_alloc_consistent(p->pdev, scb_size * scb_count, |
| 2577 | &scb_dma->dma_address); |
| 2578 | if (hsgp == NULL) |
| 2579 | { |
| 2580 | kfree(scb_ap); |
| 2581 | return(0); |
| 2582 | } |
| 2583 | bufs = (unsigned char *)&hsgp[scb_count * AIC7XXX_MAX_SG]; |
| 2584 | #ifdef AIC7XXX_VERBOSE_DEBUGGING |
| 2585 | if (aic7xxx_verbose > 0xffff) |
| 2586 | { |
| 2587 | if (p->scb_data->numscbs == 0) |
| 2588 | printk(INFO_LEAD "Allocating initial %ld SCB structures.\n", |
| 2589 | p->host_no, -1, -1, -1, scb_count); |
| 2590 | else |
| 2591 | printk(INFO_LEAD "Allocating %ld additional SCB structures.\n", |
| 2592 | p->host_no, -1, -1, -1, scb_count); |
| 2593 | } |
| 2594 | #endif |
| 2595 | memset(scb_ap, 0, sizeof (struct aic7xxx_scb) * scb_count); |
| 2596 | scb_dma->dma_offset = (unsigned long)scb_dma->dma_address |
| 2597 | - (unsigned long)hsgp; |
| 2598 | scb_dma->dma_len = scb_size * scb_count; |
| 2599 | for (i=0; i < scb_count; i++) |
| 2600 | { |
| 2601 | scbp = &scb_ap[i]; |
| 2602 | scbp->hscb = &p->scb_data->hscbs[p->scb_data->numscbs]; |
| 2603 | scbp->sg_list = &hsgp[i * AIC7XXX_MAX_SG]; |
| 2604 | scbp->sense_cmd = bufs; |
| 2605 | scbp->cmnd = bufs + 6; |
| 2606 | bufs += 12 + 6; |
| 2607 | scbp->scb_dma = scb_dma; |
| 2608 | memset(scbp->hscb, 0, sizeof(struct aic7xxx_hwscb)); |
| 2609 | scbp->hscb->tag = p->scb_data->numscbs; |
| 2610 | /* |
| 2611 | * Place in the scb array; never is removed |
| 2612 | */ |
| 2613 | p->scb_data->scb_array[p->scb_data->numscbs++] = scbp; |
| 2614 | scbq_insert_tail(&p->scb_data->free_scbs, scbp); |
| 2615 | } |
| 2616 | scbp->kmalloc_ptr = scb_ap; |
| 2617 | } |
| 2618 | return(scb_count); |
| 2619 | } |
| 2620 | |
| 2621 | /*+F************************************************************************* |
| 2622 | * Function: |
| 2623 | * aic7xxx_queue_cmd_complete |
| 2624 | * |
| 2625 | * Description: |
| 2626 | * Due to race conditions present in the SCSI subsystem, it is easier |
| 2627 | * to queue completed commands, then call scsi_done() on them when |
| 2628 | * we're finished. This function queues the completed commands. |
| 2629 | *-F*************************************************************************/ |
| 2630 | static void |
| 2631 | aic7xxx_queue_cmd_complete(struct aic7xxx_host *p, Scsi_Cmnd *cmd) |
| 2632 | { |
| 2633 | aic7xxx_position(cmd) = SCB_LIST_NULL; |
| 2634 | cmd->host_scribble = (char *)p->completeq.head; |
| 2635 | p->completeq.head = cmd; |
| 2636 | } |
| 2637 | |
| 2638 | /*+F************************************************************************* |
| 2639 | * Function: |
| 2640 | * aic7xxx_done_cmds_complete |
| 2641 | * |
| 2642 | * Description: |
| 2643 | * Process the completed command queue. |
| 2644 | *-F*************************************************************************/ |
| 2645 | static void |
| 2646 | aic7xxx_done_cmds_complete(struct aic7xxx_host *p) |
| 2647 | { |
| 2648 | Scsi_Cmnd *cmd; |
| 2649 | |
| 2650 | while (p->completeq.head != NULL) |
| 2651 | { |
| 2652 | cmd = p->completeq.head; |
| 2653 | p->completeq.head = (Scsi_Cmnd *)cmd->host_scribble; |
| 2654 | cmd->host_scribble = NULL; |
| 2655 | cmd->scsi_done(cmd); |
| 2656 | } |
| 2657 | } |
| 2658 | |
| 2659 | /*+F************************************************************************* |
| 2660 | * Function: |
| 2661 | * aic7xxx_free_scb |
| 2662 | * |
| 2663 | * Description: |
| 2664 | * Free the scb and insert into the free scb list. |
| 2665 | *-F*************************************************************************/ |
| 2666 | static void |
| 2667 | aic7xxx_free_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb) |
| 2668 | { |
| 2669 | |
| 2670 | scb->flags = SCB_FREE; |
| 2671 | scb->cmd = NULL; |
| 2672 | scb->sg_count = 0; |
| 2673 | scb->sg_length = 0; |
| 2674 | scb->tag_action = 0; |
| 2675 | scb->hscb->control = 0; |
| 2676 | scb->hscb->target_status = 0; |
| 2677 | scb->hscb->target_channel_lun = SCB_LIST_NULL; |
| 2678 | |
| 2679 | scbq_insert_head(&p->scb_data->free_scbs, scb); |
| 2680 | } |
| 2681 | |
| 2682 | /*+F************************************************************************* |
| 2683 | * Function: |
| 2684 | * aic7xxx_done |
| 2685 | * |
| 2686 | * Description: |
| 2687 | * Calls the higher level scsi done function and frees the scb. |
| 2688 | *-F*************************************************************************/ |
| 2689 | static void |
| 2690 | aic7xxx_done(struct aic7xxx_host *p, struct aic7xxx_scb *scb) |
| 2691 | { |
| 2692 | Scsi_Cmnd *cmd = scb->cmd; |
| 2693 | struct aic_dev_data *aic_dev = cmd->device->hostdata; |
| 2694 | int tindex = TARGET_INDEX(cmd); |
| 2695 | struct aic7xxx_scb *scbp; |
| 2696 | unsigned char queue_depth; |
| 2697 | |
| 2698 | if (cmd->use_sg > 1) |
| 2699 | { |
| 2700 | struct scatterlist *sg; |
| 2701 | |
| 2702 | sg = (struct scatterlist *)cmd->request_buffer; |
| be7db05 | 2005-04-17 15:26:13 -0500 | [diff] [blame] | 2703 | pci_unmap_sg(p->pdev, sg, cmd->use_sg, cmd->sc_data_direction); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2704 | } |
| 2705 | else if (cmd->request_bufflen) |
| 2706 | pci_unmap_single(p->pdev, aic7xxx_mapping(cmd), |
| 2707 | cmd->request_bufflen, |
| be7db05 | 2005-04-17 15:26:13 -0500 | [diff] [blame] | 2708 | cmd->sc_data_direction); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2709 | if (scb->flags & SCB_SENSE) |
| 2710 | { |
| 2711 | pci_unmap_single(p->pdev, |
| 2712 | le32_to_cpu(scb->sg_list[0].address), |
| 2713 | sizeof(cmd->sense_buffer), |
| 2714 | PCI_DMA_FROMDEVICE); |
| 2715 | } |
| 2716 | if (scb->flags & SCB_RECOVERY_SCB) |
| 2717 | { |
| 2718 | p->flags &= ~AHC_ABORT_PENDING; |
| 2719 | } |
| 2720 | if (scb->flags & (SCB_RESET|SCB_ABORT)) |
| 2721 | { |
| 2722 | cmd->result |= (DID_RESET << 16); |
| 2723 | } |
| 2724 | |
| 2725 | if ((scb->flags & SCB_MSGOUT_BITS) != 0) |
| 2726 | { |
| 2727 | unsigned short mask; |
| 2728 | int message_error = FALSE; |
| 2729 | |
| 2730 | mask = 0x01 << tindex; |
| 2731 | |
| 2732 | /* |
| 2733 | * Check to see if we get an invalid message or a message error |
| 2734 | * after failing to negotiate a wide or sync transfer message. |
| 2735 | */ |
| 2736 | if ((scb->flags & SCB_SENSE) && |
| 2737 | ((scb->cmd->sense_buffer[12] == 0x43) || /* INVALID_MESSAGE */ |
| 2738 | (scb->cmd->sense_buffer[12] == 0x49))) /* MESSAGE_ERROR */ |
| 2739 | { |
| 2740 | message_error = TRUE; |
| 2741 | } |
| 2742 | |
| 2743 | if (scb->flags & SCB_MSGOUT_WDTR) |
| 2744 | { |
| 2745 | if (message_error) |
| 2746 | { |
| 2747 | if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) && |
| 2748 | (aic_dev->flags & DEVICE_PRINT_DTR) ) |
| 2749 | { |
| 2750 | printk(INFO_LEAD "Device failed to complete Wide Negotiation " |
| 2751 | "processing and\n", p->host_no, CTL_OF_SCB(scb)); |
| 2752 | printk(INFO_LEAD "returned a sense error code for invalid message, " |
| 2753 | "disabling future\n", p->host_no, CTL_OF_SCB(scb)); |
| 2754 | printk(INFO_LEAD "Wide negotiation to this device.\n", p->host_no, |
| 2755 | CTL_OF_SCB(scb)); |
| 2756 | } |
| 2757 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 0; |
| 2758 | } |
| 2759 | } |
| 2760 | if (scb->flags & SCB_MSGOUT_SDTR) |
| 2761 | { |
| 2762 | if (message_error) |
| 2763 | { |
| 2764 | if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) && |
| 2765 | (aic_dev->flags & DEVICE_PRINT_DTR) ) |
| 2766 | { |
| 2767 | printk(INFO_LEAD "Device failed to complete Sync Negotiation " |
| 2768 | "processing and\n", p->host_no, CTL_OF_SCB(scb)); |
| 2769 | printk(INFO_LEAD "returned a sense error code for invalid message, " |
| 2770 | "disabling future\n", p->host_no, CTL_OF_SCB(scb)); |
| 2771 | printk(INFO_LEAD "Sync negotiation to this device.\n", p->host_no, |
| 2772 | CTL_OF_SCB(scb)); |
| 2773 | aic_dev->flags &= ~DEVICE_PRINT_DTR; |
| 2774 | } |
| 2775 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 0; |
| 2776 | } |
| 2777 | } |
| 2778 | if (scb->flags & SCB_MSGOUT_PPR) |
| 2779 | { |
| 2780 | if(message_error) |
| 2781 | { |
| 2782 | if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) && |
| 2783 | (aic_dev->flags & DEVICE_PRINT_DTR) ) |
| 2784 | { |
| 2785 | printk(INFO_LEAD "Device failed to complete Parallel Protocol " |
| 2786 | "Request processing and\n", p->host_no, CTL_OF_SCB(scb)); |
| 2787 | printk(INFO_LEAD "returned a sense error code for invalid message, " |
| 2788 | "disabling future\n", p->host_no, CTL_OF_SCB(scb)); |
| 2789 | printk(INFO_LEAD "Parallel Protocol Request negotiation to this " |
| 2790 | "device.\n", p->host_no, CTL_OF_SCB(scb)); |
| 2791 | } |
| 2792 | /* |
| 2793 | * Disable PPR negotiation and revert back to WDTR and SDTR setup |
| 2794 | */ |
| 2795 | aic_dev->needppr = aic_dev->needppr_copy = 0; |
| 2796 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 1; |
| 2797 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 1; |
| 2798 | } |
| 2799 | } |
| 2800 | } |
| 2801 | |
| 2802 | queue_depth = aic_dev->temp_q_depth; |
| 2803 | if (queue_depth >= aic_dev->active_cmds) |
| 2804 | { |
| 2805 | scbp = scbq_remove_head(&aic_dev->delayed_scbs); |
| 2806 | if (scbp) |
| 2807 | { |
| 2808 | if (queue_depth == 1) |
| 2809 | { |
| 2810 | /* |
| 2811 | * Give extra preference to untagged devices, such as CD-R devices |
| 2812 | * This makes it more likely that a drive *won't* stuff up while |
| 2813 | * waiting on data at a critical time, such as CD-R writing and |
| 2814 | * audio CD ripping operations. Should also benefit tape drives. |
| 2815 | */ |
| 2816 | scbq_insert_head(&p->waiting_scbs, scbp); |
| 2817 | } |
| 2818 | else |
| 2819 | { |
| 2820 | scbq_insert_tail(&p->waiting_scbs, scbp); |
| 2821 | } |
| 2822 | #ifdef AIC7XXX_VERBOSE_DEBUGGING |
| 2823 | if (aic7xxx_verbose > 0xffff) |
| 2824 | printk(INFO_LEAD "Moving SCB from delayed to waiting queue.\n", |
| 2825 | p->host_no, CTL_OF_SCB(scbp)); |
| 2826 | #endif |
| 2827 | if (queue_depth > aic_dev->active_cmds) |
| 2828 | { |
| 2829 | scbp = scbq_remove_head(&aic_dev->delayed_scbs); |
| 2830 | if (scbp) |
| 2831 | scbq_insert_tail(&p->waiting_scbs, scbp); |
| 2832 | } |
| 2833 | } |
| 2834 | } |
| 2835 | if (!(scb->tag_action)) |
| 2836 | { |
| 2837 | aic7xxx_index_busy_target(p, scb->hscb->target_channel_lun, |
| 2838 | /* unbusy */ TRUE); |
| 2839 | if (cmd->device->simple_tags) |
| 2840 | { |
| 2841 | aic_dev->temp_q_depth = aic_dev->max_q_depth; |
| 2842 | } |
| 2843 | } |
| 2844 | if(scb->flags & SCB_DTR_SCB) |
| 2845 | { |
| 2846 | aic_dev->dtr_pending = 0; |
| 2847 | } |
| 2848 | aic_dev->active_cmds--; |
| 2849 | p->activescbs--; |
| 2850 | |
| 2851 | if ((scb->sg_length >= 512) && (((cmd->result >> 16) & 0xf) == DID_OK)) |
| 2852 | { |
| 2853 | long *ptr; |
| 2854 | int x, i; |
| 2855 | |
| 2856 | |
| 2857 | if (rq_data_dir(cmd->request) == WRITE) |
| 2858 | { |
| 2859 | aic_dev->w_total++; |
| 2860 | ptr = aic_dev->w_bins; |
| 2861 | } |
| 2862 | else |
| 2863 | { |
| 2864 | aic_dev->r_total++; |
| 2865 | ptr = aic_dev->r_bins; |
| 2866 | } |
| 2867 | if(cmd->device->simple_tags && cmd->request->flags & REQ_HARDBARRIER) |
| 2868 | { |
| 2869 | aic_dev->barrier_total++; |
| 2870 | if(scb->tag_action == MSG_ORDERED_Q_TAG) |
| 2871 | aic_dev->ordered_total++; |
| 2872 | } |
| 2873 | x = scb->sg_length; |
| 2874 | x >>= 10; |
| 2875 | for(i=0; i<6; i++) |
| 2876 | { |
| 2877 | x >>= 2; |
| 2878 | if(!x) { |
| 2879 | ptr[i]++; |
| 2880 | break; |
| 2881 | } |
| 2882 | } |
| 2883 | if(i == 6 && x) |
| 2884 | ptr[5]++; |
| 2885 | } |
| 2886 | aic7xxx_free_scb(p, scb); |
| 2887 | aic7xxx_queue_cmd_complete(p, cmd); |
| 2888 | |
| 2889 | } |
| 2890 | |
| 2891 | /*+F************************************************************************* |
| 2892 | * Function: |
| 2893 | * aic7xxx_run_done_queue |
| 2894 | * |
| 2895 | * Description: |
| 2896 | * Calls the aic7xxx_done() for the Scsi_Cmnd of each scb in the |
| 2897 | * aborted list, and adds each scb to the free list. If complete |
| 2898 | * is TRUE, we also process the commands complete list. |
| 2899 | *-F*************************************************************************/ |
| 2900 | static void |
| 2901 | aic7xxx_run_done_queue(struct aic7xxx_host *p, /*complete*/ int complete) |
| 2902 | { |
| 2903 | struct aic7xxx_scb *scb; |
| 2904 | int i, found = 0; |
| 2905 | |
| 2906 | for (i = 0; i < p->scb_data->numscbs; i++) |
| 2907 | { |
| 2908 | scb = p->scb_data->scb_array[i]; |
| 2909 | if (scb->flags & SCB_QUEUED_FOR_DONE) |
| 2910 | { |
| 2911 | if (scb->flags & SCB_QUEUE_FULL) |
| 2912 | { |
| 2913 | scb->cmd->result = QUEUE_FULL << 1; |
| 2914 | } |
| 2915 | else |
| 2916 | { |
| 2917 | if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS)) |
| 2918 | printk(INFO_LEAD "Aborting scb %d\n", |
| 2919 | p->host_no, CTL_OF_SCB(scb), scb->hscb->tag); |
| 2920 | /* |
| 2921 | * Clear any residual information since the normal aic7xxx_done() path |
| 2922 | * doesn't touch the residuals. |
| 2923 | */ |
| 2924 | scb->hscb->residual_SG_segment_count = 0; |
| 2925 | scb->hscb->residual_data_count[0] = 0; |
| 2926 | scb->hscb->residual_data_count[1] = 0; |
| 2927 | scb->hscb->residual_data_count[2] = 0; |
| 2928 | } |
| 2929 | found++; |
| 2930 | aic7xxx_done(p, scb); |
| 2931 | } |
| 2932 | } |
| 2933 | if (aic7xxx_verbose & (VERBOSE_ABORT_RETURN | VERBOSE_RESET_RETURN)) |
| 2934 | { |
| 2935 | printk(INFO_LEAD "%d commands found and queued for " |
| 2936 | "completion.\n", p->host_no, -1, -1, -1, found); |
| 2937 | } |
| 2938 | if (complete) |
| 2939 | { |
| 2940 | aic7xxx_done_cmds_complete(p); |
| 2941 | } |
| 2942 | } |
| 2943 | |
| 2944 | /*+F************************************************************************* |
| 2945 | * Function: |
| 2946 | * aic7xxx_abort_waiting_scb |
| 2947 | * |
| 2948 | * Description: |
| 2949 | * Manipulate the waiting for selection list and return the |
| 2950 | * scb that follows the one that we remove. |
| 2951 | *-F*************************************************************************/ |
| 2952 | static unsigned char |
| 2953 | aic7xxx_abort_waiting_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb, |
| 2954 | unsigned char scbpos, unsigned char prev) |
| 2955 | { |
| 2956 | unsigned char curscb, next; |
| 2957 | |
| 2958 | /* |
| 2959 | * Select the SCB we want to abort and pull the next pointer out of it. |
| 2960 | */ |
| 2961 | curscb = aic_inb(p, SCBPTR); |
| 2962 | aic_outb(p, scbpos, SCBPTR); |
| 2963 | next = aic_inb(p, SCB_NEXT); |
| 2964 | |
| 2965 | aic7xxx_add_curscb_to_free_list(p); |
| 2966 | |
| 2967 | /* |
| 2968 | * Update the waiting list |
| 2969 | */ |
| 2970 | if (prev == SCB_LIST_NULL) |
| 2971 | { |
| 2972 | /* |
| 2973 | * First in the list |
| 2974 | */ |
| 2975 | aic_outb(p, next, WAITING_SCBH); |
| 2976 | } |
| 2977 | else |
| 2978 | { |
| 2979 | /* |
| 2980 | * Select the scb that pointed to us and update its next pointer. |
| 2981 | */ |
| 2982 | aic_outb(p, prev, SCBPTR); |
| 2983 | aic_outb(p, next, SCB_NEXT); |
| 2984 | } |
| 2985 | /* |
| 2986 | * Point us back at the original scb position and inform the SCSI |
| 2987 | * system that the command has been aborted. |
| 2988 | */ |
| 2989 | aic_outb(p, curscb, SCBPTR); |
| 2990 | return (next); |
| 2991 | } |
| 2992 | |
| 2993 | /*+F************************************************************************* |
| 2994 | * Function: |
| 2995 | * aic7xxx_search_qinfifo |
| 2996 | * |
| 2997 | * Description: |
| 2998 | * Search the queue-in FIFO for matching SCBs and conditionally |
| 2999 | * requeue. Returns the number of matching SCBs. |
| 3000 | *-F*************************************************************************/ |
| 3001 | static int |
| 3002 | aic7xxx_search_qinfifo(struct aic7xxx_host *p, int target, int channel, |
| 3003 | int lun, unsigned char tag, int flags, int requeue, |
| 3004 | volatile scb_queue_type *queue) |
| 3005 | { |
| 3006 | int found; |
| 3007 | unsigned char qinpos, qintail; |
| 3008 | struct aic7xxx_scb *scbp; |
| 3009 | |
| 3010 | found = 0; |
| 3011 | qinpos = aic_inb(p, QINPOS); |
| 3012 | qintail = p->qinfifonext; |
| 3013 | |
| 3014 | p->qinfifonext = qinpos; |
| 3015 | |
| 3016 | while (qinpos != qintail) |
| 3017 | { |
| 3018 | scbp = p->scb_data->scb_array[p->qinfifo[qinpos++]]; |
| 3019 | if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag)) |
| 3020 | { |
| 3021 | /* |
| 3022 | * We found an scb that needs to be removed. |
| 3023 | */ |
| 3024 | if (requeue && (queue != NULL)) |
| 3025 | { |
| 3026 | if (scbp->flags & SCB_WAITINGQ) |
| 3027 | { |
| 3028 | scbq_remove(queue, scbp); |
| 3029 | scbq_remove(&p->waiting_scbs, scbp); |
| 3030 | scbq_remove(&AIC_DEV(scbp->cmd)->delayed_scbs, scbp); |
| 3031 | AIC_DEV(scbp->cmd)->active_cmds++; |
| 3032 | p->activescbs++; |
| 3033 | } |
| 3034 | scbq_insert_tail(queue, scbp); |
| 3035 | AIC_DEV(scbp->cmd)->active_cmds--; |
| 3036 | p->activescbs--; |
| 3037 | scbp->flags |= SCB_WAITINGQ; |
| 3038 | if ( !(scbp->tag_action & TAG_ENB) ) |
| 3039 | { |
| 3040 | aic7xxx_index_busy_target(p, scbp->hscb->target_channel_lun, |
| 3041 | TRUE); |
| 3042 | } |
| 3043 | } |
| 3044 | else if (requeue) |
| 3045 | { |
| 3046 | p->qinfifo[p->qinfifonext++] = scbp->hscb->tag; |
| 3047 | } |
| 3048 | else |
| 3049 | { |
| 3050 | /* |
| 3051 | * Preserve any SCB_RECOVERY_SCB flags on this scb then set the |
| 3052 | * flags we were called with, presumeably so aic7xxx_run_done_queue |
| 3053 | * can find this scb |
| 3054 | */ |
| 3055 | scbp->flags = flags | (scbp->flags & SCB_RECOVERY_SCB); |
| 3056 | if (aic7xxx_index_busy_target(p, scbp->hscb->target_channel_lun, |
| 3057 | FALSE) == scbp->hscb->tag) |
| 3058 | { |
| 3059 | aic7xxx_index_busy_target(p, scbp->hscb->target_channel_lun, |
| 3060 | TRUE); |
| 3061 | } |
| 3062 | } |
| 3063 | found++; |
| 3064 | } |
| 3065 | else |
| 3066 | { |
| 3067 | p->qinfifo[p->qinfifonext++] = scbp->hscb->tag; |
| 3068 | } |
| 3069 | } |
| 3070 | /* |
| 3071 | * Now that we've done the work, clear out any left over commands in the |
| 3072 | * qinfifo and update the KERNEL_QINPOS down on the card. |
| 3073 | * |
| 3074 | * NOTE: This routine expect the sequencer to already be paused when |
| 3075 | * it is run....make sure it's that way! |
| 3076 | */ |
| 3077 | qinpos = p->qinfifonext; |
| 3078 | while(qinpos != qintail) |
| 3079 | { |
| 3080 | p->qinfifo[qinpos++] = SCB_LIST_NULL; |
| 3081 | } |
| 3082 | if (p->features & AHC_QUEUE_REGS) |
| 3083 | aic_outb(p, p->qinfifonext, HNSCB_QOFF); |
| 3084 | else |
| 3085 | aic_outb(p, p->qinfifonext, KERNEL_QINPOS); |
| 3086 | |
| 3087 | return (found); |
| 3088 | } |
| 3089 | |
| 3090 | /*+F************************************************************************* |
| 3091 | * Function: |
| 3092 | * aic7xxx_scb_on_qoutfifo |
| 3093 | * |
| 3094 | * Description: |
| 3095 | * Is the scb that was passed to us currently on the qoutfifo? |
| 3096 | *-F*************************************************************************/ |
| 3097 | static int |
| 3098 | aic7xxx_scb_on_qoutfifo(struct aic7xxx_host *p, struct aic7xxx_scb *scb) |
| 3099 | { |
| 3100 | int i=0; |
| 3101 | |
| 3102 | while(p->qoutfifo[(p->qoutfifonext + i) & 0xff ] != SCB_LIST_NULL) |
| 3103 | { |
| 3104 | if(p->qoutfifo[(p->qoutfifonext + i) & 0xff ] == scb->hscb->tag) |
| 3105 | return TRUE; |
| 3106 | else |
| 3107 | i++; |
| 3108 | } |
| 3109 | return FALSE; |
| 3110 | } |
| 3111 | |
| 3112 | |
| 3113 | /*+F************************************************************************* |
| 3114 | * Function: |
| 3115 | * aic7xxx_reset_device |
| 3116 | * |
| 3117 | * Description: |
| 3118 | * The device at the given target/channel has been reset. Abort |
| 3119 | * all active and queued scbs for that target/channel. This function |
| 3120 | * need not worry about linked next pointers because if was a MSG_ABORT_TAG |
| 3121 | * then we had a tagged command (no linked next), if it was MSG_ABORT or |
| 3122 | * MSG_BUS_DEV_RESET then the device won't know about any commands any more |
| 3123 | * and no busy commands will exist, and if it was a bus reset, then nothing |
| 3124 | * knows about any linked next commands any more. In all cases, we don't |
| 3125 | * need to worry about the linked next or busy scb, we just need to clear |
| 3126 | * them. |
| 3127 | *-F*************************************************************************/ |
| 3128 | static void |
| 3129 | aic7xxx_reset_device(struct aic7xxx_host *p, int target, int channel, |
| 3130 | int lun, unsigned char tag) |
| 3131 | { |
| 3132 | struct aic7xxx_scb *scbp, *prev_scbp; |
| 3133 | struct scsi_device *sd; |
| 3134 | unsigned char active_scb, tcl, scb_tag; |
| 3135 | int i = 0, init_lists = FALSE; |
| 3136 | struct aic_dev_data *aic_dev; |
| 3137 | |
| 3138 | /* |
| 3139 | * Restore this when we're done |
| 3140 | */ |
| 3141 | active_scb = aic_inb(p, SCBPTR); |
| 3142 | scb_tag = aic_inb(p, SCB_TAG); |
| 3143 | |
| 3144 | if (aic7xxx_verbose & (VERBOSE_RESET_PROCESS | VERBOSE_ABORT_PROCESS)) |
| 3145 | { |
| 3146 | printk(INFO_LEAD "Reset device, hardware_scb %d,\n", |
| 3147 | p->host_no, channel, target, lun, active_scb); |
| 3148 | printk(INFO_LEAD "Current scb %d, SEQADDR 0x%x, LASTPHASE " |
| 3149 | "0x%x\n", |
| 3150 | p->host_no, channel, target, lun, scb_tag, |
| 3151 | aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8), |
| 3152 | aic_inb(p, LASTPHASE)); |
| 3153 | printk(INFO_LEAD "SG_CACHEPTR 0x%x, SG_COUNT %d, SCSISIGI 0x%x\n", |
| 3154 | p->host_no, channel, target, lun, |
| 3155 | (p->features & AHC_ULTRA2) ? aic_inb(p, SG_CACHEPTR) : 0, |
| 3156 | aic_inb(p, SG_COUNT), aic_inb(p, SCSISIGI)); |
| 3157 | printk(INFO_LEAD "SSTAT0 0x%x, SSTAT1 0x%x, SSTAT2 0x%x\n", |
| 3158 | p->host_no, channel, target, lun, aic_inb(p, SSTAT0), |
| 3159 | aic_inb(p, SSTAT1), aic_inb(p, SSTAT2)); |
| 3160 | } |
| 3161 | |
| 3162 | /* |
| 3163 | * Deal with the busy target and linked next issues. |
| 3164 | */ |
| 3165 | list_for_each_entry(aic_dev, &p->aic_devs, list) |
| 3166 | { |
| 3167 | if (aic7xxx_verbose & (VERBOSE_RESET_PROCESS | VERBOSE_ABORT_PROCESS)) |
| 3168 | printk(INFO_LEAD "processing aic_dev %p\n", p->host_no, channel, target, |
| 3169 | lun, aic_dev); |
| 3170 | sd = aic_dev->SDptr; |
| 3171 | |
| 3172 | if((target != ALL_TARGETS && target != sd->id) || |
| 3173 | (channel != ALL_CHANNELS && channel != sd->channel)) |
| 3174 | continue; |
| 3175 | if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS)) |
| 3176 | printk(INFO_LEAD "Cleaning up status information " |
| 3177 | "and delayed_scbs.\n", p->host_no, sd->channel, sd->id, sd->lun); |
| 3178 | aic_dev->flags &= ~BUS_DEVICE_RESET_PENDING; |
| 3179 | if ( tag == SCB_LIST_NULL ) |
| 3180 | { |
| 3181 | aic_dev->dtr_pending = 0; |
| 3182 | aic_dev->needppr = aic_dev->needppr_copy; |
| 3183 | aic_dev->needsdtr = aic_dev->needsdtr_copy; |
| 3184 | aic_dev->needwdtr = aic_dev->needwdtr_copy; |
| 3185 | aic_dev->flags = DEVICE_PRINT_DTR; |
| 3186 | aic_dev->temp_q_depth = aic_dev->max_q_depth; |
| 3187 | } |
| 3188 | tcl = (sd->id << 4) | (sd->channel << 3) | sd->lun; |
| 3189 | if ( (aic7xxx_index_busy_target(p, tcl, FALSE) == tag) || |
| 3190 | (tag == SCB_LIST_NULL) ) |
| 3191 | aic7xxx_index_busy_target(p, tcl, /* unbusy */ TRUE); |
| 3192 | prev_scbp = NULL; |
| 3193 | scbp = aic_dev->delayed_scbs.head; |
| 3194 | while (scbp != NULL) |
| 3195 | { |
| 3196 | prev_scbp = scbp; |
| 3197 | scbp = scbp->q_next; |
| 3198 | if (aic7xxx_match_scb(p, prev_scbp, target, channel, lun, tag)) |
| 3199 | { |
| 3200 | scbq_remove(&aic_dev->delayed_scbs, prev_scbp); |
| 3201 | if (prev_scbp->flags & SCB_WAITINGQ) |
| 3202 | { |
| 3203 | aic_dev->active_cmds++; |
| 3204 | p->activescbs++; |
| 3205 | } |
| 3206 | prev_scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ); |
| 3207 | prev_scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE; |
| 3208 | } |
| 3209 | } |
| 3210 | } |
| 3211 | |
| 3212 | if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS)) |
| 3213 | printk(INFO_LEAD "Cleaning QINFIFO.\n", p->host_no, channel, target, lun ); |
| 3214 | aic7xxx_search_qinfifo(p, target, channel, lun, tag, |
| 3215 | SCB_RESET | SCB_QUEUED_FOR_DONE, /* requeue */ FALSE, NULL); |
| 3216 | |
| 3217 | /* |
| 3218 | * Search the waiting_scbs queue for matches, this catches any SCB_QUEUED |
| 3219 | * ABORT/RESET commands. |
| 3220 | */ |
| 3221 | if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS)) |
| 3222 | printk(INFO_LEAD "Cleaning waiting_scbs.\n", p->host_no, channel, |
| 3223 | target, lun ); |
| 3224 | { |
| 3225 | struct aic7xxx_scb *scbp, *prev_scbp; |
| 3226 | |
| 3227 | prev_scbp = NULL; |
| 3228 | scbp = p->waiting_scbs.head; |
| 3229 | while (scbp != NULL) |
| 3230 | { |
| 3231 | prev_scbp = scbp; |
| 3232 | scbp = scbp->q_next; |
| 3233 | if (aic7xxx_match_scb(p, prev_scbp, target, channel, lun, tag)) |
| 3234 | { |
| 3235 | scbq_remove(&p->waiting_scbs, prev_scbp); |
| 3236 | if (prev_scbp->flags & SCB_WAITINGQ) |
| 3237 | { |
| 3238 | AIC_DEV(prev_scbp->cmd)->active_cmds++; |
| 3239 | p->activescbs++; |
| 3240 | } |
| 3241 | prev_scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ); |
| 3242 | prev_scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE; |
| 3243 | } |
| 3244 | } |
| 3245 | } |
| 3246 | |
| 3247 | |
| 3248 | /* |
| 3249 | * Search waiting for selection list. |
| 3250 | */ |
| 3251 | if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS)) |
| 3252 | printk(INFO_LEAD "Cleaning waiting for selection " |
| 3253 | "list.\n", p->host_no, channel, target, lun); |
| 3254 | { |
| 3255 | unsigned char next, prev, scb_index; |
| 3256 | |
| 3257 | next = aic_inb(p, WAITING_SCBH); /* Start at head of list. */ |
| 3258 | prev = SCB_LIST_NULL; |
| 3259 | while (next != SCB_LIST_NULL) |
| 3260 | { |
| 3261 | aic_outb(p, next, SCBPTR); |
| 3262 | scb_index = aic_inb(p, SCB_TAG); |
| 3263 | if (scb_index >= p->scb_data->numscbs) |
| 3264 | { |
| 3265 | /* |
| 3266 | * No aic7xxx_verbose check here.....we want to see this since it |
| 3267 | * means either the kernel driver or the sequencer screwed things up |
| 3268 | */ |
| 3269 | printk(WARN_LEAD "Waiting List inconsistency; SCB index=%d, " |
| 3270 | "numscbs=%d\n", p->host_no, channel, target, lun, scb_index, |
| 3271 | p->scb_data->numscbs); |
| 3272 | next = aic_inb(p, SCB_NEXT); |
| 3273 | aic7xxx_add_curscb_to_free_list(p); |
| 3274 | } |
| 3275 | else |
| 3276 | { |
| 3277 | scbp = p->scb_data->scb_array[scb_index]; |
| 3278 | if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag)) |
| 3279 | { |
| 3280 | next = aic7xxx_abort_waiting_scb(p, scbp, next, prev); |
| 3281 | if (scbp->flags & SCB_WAITINGQ) |
| 3282 | { |
| 3283 | AIC_DEV(scbp->cmd)->active_cmds++; |
| 3284 | p->activescbs++; |
| 3285 | } |
| 3286 | scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ); |
| 3287 | scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE; |
| 3288 | if (prev == SCB_LIST_NULL) |
| 3289 | { |
| 3290 | /* |
| 3291 | * This is either the first scb on the waiting list, or we |
| 3292 | * have already yanked the first and haven't left any behind. |
| 3293 | * Either way, we need to turn off the selection hardware if |
| 3294 | * it isn't already off. |
| 3295 | */ |
| 3296 | aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ); |
| 3297 | aic_outb(p, CLRSELTIMEO, CLRSINT1); |
| 3298 | } |
| 3299 | } |
| 3300 | else |
| 3301 | { |
| 3302 | prev = next; |
| 3303 | next = aic_inb(p, SCB_NEXT); |
| 3304 | } |
| 3305 | } |
| 3306 | } |
| 3307 | } |
| 3308 | |
| 3309 | /* |
| 3310 | * Go through disconnected list and remove any entries we have queued |
| 3311 | * for completion, zeroing their control byte too. |
| 3312 | */ |
| 3313 | if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS)) |
| 3314 | printk(INFO_LEAD "Cleaning disconnected scbs " |
| 3315 | "list.\n", p->host_no, channel, target, lun); |
| 3316 | if (p->flags & AHC_PAGESCBS) |
| 3317 | { |
| 3318 | unsigned char next, prev, scb_index; |
| 3319 | |
| 3320 | next = aic_inb(p, DISCONNECTED_SCBH); |
| 3321 | prev = SCB_LIST_NULL; |
| 3322 | while (next != SCB_LIST_NULL) |
| 3323 | { |
| 3324 | aic_outb(p, next, SCBPTR); |
| 3325 | scb_index = aic_inb(p, SCB_TAG); |
| 3326 | if (scb_index > p->scb_data->numscbs) |
| 3327 | { |
| 3328 | printk(WARN_LEAD "Disconnected List inconsistency; SCB index=%d, " |
| 3329 | "numscbs=%d\n", p->host_no, channel, target, lun, scb_index, |
| 3330 | p->scb_data->numscbs); |
| 3331 | next = aic7xxx_rem_scb_from_disc_list(p, next, prev); |
| 3332 | } |
| 3333 | else |
| 3334 | { |
| 3335 | scbp = p->scb_data->scb_array[scb_index]; |
| 3336 | if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag)) |
| 3337 | { |
| 3338 | next = aic7xxx_rem_scb_from_disc_list(p, next, prev); |
| 3339 | if (scbp->flags & SCB_WAITINGQ) |
| 3340 | { |
| 3341 | AIC_DEV(scbp->cmd)->active_cmds++; |
| 3342 | p->activescbs++; |
| 3343 | } |
| 3344 | scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ); |
| 3345 | scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE; |
| 3346 | scbp->hscb->control = 0; |
| 3347 | } |
| 3348 | else |
| 3349 | { |
| 3350 | prev = next; |
| 3351 | next = aic_inb(p, SCB_NEXT); |
| 3352 | } |
| 3353 | } |
| 3354 | } |
| 3355 | } |
| 3356 | |
| 3357 | /* |
| 3358 | * Walk the free list making sure no entries on the free list have |
| 3359 | * a valid SCB_TAG value or SCB_CONTROL byte. |
| 3360 | */ |
| 3361 | if (p->flags & AHC_PAGESCBS) |
| 3362 | { |
| 3363 | unsigned char next; |
| 3364 | |
| 3365 | next = aic_inb(p, FREE_SCBH); |
| 3366 | while (next != SCB_LIST_NULL) |
| 3367 | { |
| 3368 | aic_outb(p, next, SCBPTR); |
| 3369 | if (aic_inb(p, SCB_TAG) < p->scb_data->numscbs) |
| 3370 | { |
| 3371 | printk(WARN_LEAD "Free list inconsistency!.\n", p->host_no, channel, |
| 3372 | target, lun); |
| 3373 | init_lists = TRUE; |
| 3374 | next = SCB_LIST_NULL; |
| 3375 | } |
| 3376 | else |
| 3377 | { |
| 3378 | aic_outb(p, SCB_LIST_NULL, SCB_TAG); |
| 3379 | aic_outb(p, 0, SCB_CONTROL); |
| 3380 | next = aic_inb(p, SCB_NEXT); |
| 3381 | } |
| 3382 | } |
| 3383 | } |
| 3384 | |
| 3385 | /* |
| 3386 | * Go through the hardware SCB array looking for commands that |
| 3387 | * were active but not on any list. |
| 3388 | */ |
| 3389 | if (init_lists) |
| 3390 | { |
| 3391 | aic_outb(p, SCB_LIST_NULL, FREE_SCBH); |
| 3392 | aic_outb(p, SCB_LIST_NULL, WAITING_SCBH); |
| 3393 | aic_outb(p, SCB_LIST_NULL, DISCONNECTED_SCBH); |
| 3394 | } |
| 3395 | for (i = p->scb_data->maxhscbs - 1; i >= 0; i--) |
| 3396 | { |
| 3397 | unsigned char scbid; |
| 3398 | |
| 3399 | aic_outb(p, i, SCBPTR); |
| 3400 | if (init_lists) |
| 3401 | { |
| 3402 | aic_outb(p, SCB_LIST_NULL, SCB_TAG); |
| 3403 | aic_outb(p, SCB_LIST_NULL, SCB_NEXT); |
| 3404 | aic_outb(p, 0, SCB_CONTROL); |
| 3405 | aic7xxx_add_curscb_to_free_list(p); |
| 3406 | } |
| 3407 | else |
| 3408 | { |
| 3409 | scbid = aic_inb(p, SCB_TAG); |
| 3410 | if (scbid < p->scb_data->numscbs) |
| 3411 | { |
| 3412 | scbp = p->scb_data->scb_array[scbid]; |
| 3413 | if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag)) |
| 3414 | { |
| 3415 | aic_outb(p, 0, SCB_CONTROL); |
| 3416 | aic_outb(p, SCB_LIST_NULL, SCB_TAG); |
| 3417 | aic7xxx_add_curscb_to_free_list(p); |
| 3418 | } |
| 3419 | } |
| 3420 | } |
| 3421 | } |
| 3422 | |
| 3423 | /* |
| 3424 | * Go through the entire SCB array now and look for commands for |
| 3425 | * for this target that are stillactive. These are other (most likely |
| 3426 | * tagged) commands that were disconnected when the reset occurred. |
| 3427 | * Any commands we find here we know this about, it wasn't on any queue, |
| 3428 | * it wasn't in the qinfifo, it wasn't in the disconnected or waiting |
| 3429 | * lists, so it really must have been a paged out SCB. In that case, |
| 3430 | * we shouldn't need to bother with updating any counters, just mark |
| 3431 | * the correct flags and go on. |
| 3432 | */ |
| 3433 | for (i = 0; i < p->scb_data->numscbs; i++) |
| 3434 | { |
| 3435 | scbp = p->scb_data->scb_array[i]; |
| 3436 | if ((scbp->flags & SCB_ACTIVE) && |
| 3437 | aic7xxx_match_scb(p, scbp, target, channel, lun, tag) && |
| 3438 | !aic7xxx_scb_on_qoutfifo(p, scbp)) |
| 3439 | { |
| 3440 | if (scbp->flags & SCB_WAITINGQ) |
| 3441 | { |
| 3442 | scbq_remove(&p->waiting_scbs, scbp); |
| 3443 | scbq_remove(&AIC_DEV(scbp->cmd)->delayed_scbs, scbp); |
| 3444 | AIC_DEV(scbp->cmd)->active_cmds++; |
| 3445 | p->activescbs++; |
| 3446 | } |
| 3447 | scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE; |
| 3448 | scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ); |
| 3449 | } |
| 3450 | } |
| 3451 | |
| 3452 | aic_outb(p, active_scb, SCBPTR); |
| 3453 | } |
| 3454 | |
| 3455 | |
| 3456 | /*+F************************************************************************* |
| 3457 | * Function: |
| 3458 | * aic7xxx_clear_intstat |
| 3459 | * |
| 3460 | * Description: |
| 3461 | * Clears the interrupt status. |
| 3462 | *-F*************************************************************************/ |
| 3463 | static void |
| 3464 | aic7xxx_clear_intstat(struct aic7xxx_host *p) |
| 3465 | { |
| 3466 | /* Clear any interrupt conditions this may have caused. */ |
| 3467 | aic_outb(p, CLRSELDO | CLRSELDI | CLRSELINGO, CLRSINT0); |
| 3468 | aic_outb(p, CLRSELTIMEO | CLRATNO | CLRSCSIRSTI | CLRBUSFREE | CLRSCSIPERR | |
| 3469 | CLRPHASECHG | CLRREQINIT, CLRSINT1); |
| 3470 | aic_outb(p, CLRSCSIINT | CLRSEQINT | CLRBRKADRINT | CLRPARERR, CLRINT); |
| 3471 | } |
| 3472 | |
| 3473 | /*+F************************************************************************* |
| 3474 | * Function: |
| 3475 | * aic7xxx_reset_current_bus |
| 3476 | * |
| 3477 | * Description: |
| 3478 | * Reset the current SCSI bus. |
| 3479 | *-F*************************************************************************/ |
| 3480 | static void |
| 3481 | aic7xxx_reset_current_bus(struct aic7xxx_host *p) |
| 3482 | { |
| 3483 | |
| 3484 | /* Disable reset interrupts. */ |
| 3485 | aic_outb(p, aic_inb(p, SIMODE1) & ~ENSCSIRST, SIMODE1); |
| 3486 | |
| 3487 | /* Turn off the bus' current operations, after all, we shouldn't have any |
| 3488 | * valid commands left to cause a RSELI and SELO once we've tossed the |
| 3489 | * bus away with this reset, so we might as well shut down the sequencer |
| 3490 | * until the bus is restarted as oppossed to saving the current settings |
| 3491 | * and restoring them (which makes no sense to me). */ |
| 3492 | |
| 3493 | /* Turn on the bus reset. */ |
| 3494 | aic_outb(p, aic_inb(p, SCSISEQ) | SCSIRSTO, SCSISEQ); |
| 3495 | while ( (aic_inb(p, SCSISEQ) & SCSIRSTO) == 0) |
| 3496 | mdelay(5); |
| 3497 | |
| 3498 | /* |
| 3499 | * Some of the new Ultra2 chipsets need a longer delay after a chip |
| 3500 | * reset than just the init setup creates, so we have to delay here |
| 3501 | * before we go into a reset in order to make the chips happy. |
| 3502 | */ |
| 3503 | if (p->features & AHC_ULTRA2) |
| 3504 | mdelay(250); |
| 3505 | else |
| 3506 | mdelay(50); |
| 3507 | |
| 3508 | /* Turn off the bus reset. */ |
| 3509 | aic_outb(p, 0, SCSISEQ); |
| 3510 | mdelay(10); |
| 3511 | |
| 3512 | aic7xxx_clear_intstat(p); |
| 3513 | /* Re-enable reset interrupts. */ |
| 3514 | aic_outb(p, aic_inb(p, SIMODE1) | ENSCSIRST, SIMODE1); |
| 3515 | |
| 3516 | } |
| 3517 | |
| 3518 | /*+F************************************************************************* |
| 3519 | * Function: |
| 3520 | * aic7xxx_reset_channel |
| 3521 | * |
| 3522 | * Description: |
| 3523 | * Reset the channel. |
| 3524 | *-F*************************************************************************/ |
| 3525 | static void |
| 3526 | aic7xxx_reset_channel(struct aic7xxx_host *p, int channel, int initiate_reset) |
| 3527 | { |
| 3528 | unsigned long offset_min, offset_max; |
| 3529 | unsigned char sblkctl; |
| 3530 | int cur_channel; |
| 3531 | |
| 3532 | if (aic7xxx_verbose & VERBOSE_RESET_PROCESS) |
| 3533 | printk(INFO_LEAD "Reset channel called, %s initiate reset.\n", |
| 3534 | p->host_no, channel, -1, -1, (initiate_reset==TRUE) ? "will" : "won't" ); |
| 3535 | |
| 3536 | |
| 3537 | if (channel == 1) |
| 3538 | { |
| 3539 | offset_min = 8; |
| 3540 | offset_max = 16; |
| 3541 | } |
| 3542 | else |
| 3543 | { |
| 3544 | if (p->features & AHC_TWIN) |
| 3545 | { |
| 3546 | /* Channel A */ |
| 3547 | offset_min = 0; |
| 3548 | offset_max = 8; |
| 3549 | } |
| 3550 | else |
| 3551 | { |
| 3552 | offset_min = 0; |
| 3553 | if (p->features & AHC_WIDE) |
| 3554 | { |
| 3555 | offset_max = 16; |
| 3556 | } |
| 3557 | else |
| 3558 | { |
| 3559 | offset_max = 8; |
| 3560 | } |
| 3561 | } |
| 3562 | } |
| 3563 | |
| 3564 | while (offset_min < offset_max) |
| 3565 | { |
| 3566 | /* |
| 3567 | * Revert to async/narrow transfers until we renegotiate. |
| 3568 | */ |
| 3569 | aic_outb(p, 0, TARG_SCSIRATE + offset_min); |
| 3570 | if (p->features & AHC_ULTRA2) |
| 3571 | { |
| 3572 | aic_outb(p, 0, TARG_OFFSET + offset_min); |
| 3573 | } |
| 3574 | offset_min++; |
| 3575 | } |
| 3576 | |
| 3577 | /* |
| 3578 | * Reset the bus and unpause/restart the controller |
| 3579 | */ |
| 3580 | sblkctl = aic_inb(p, SBLKCTL); |
| 3581 | if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 ) |
| 3582 | cur_channel = (sblkctl & SELBUSB) >> 3; |
| 3583 | else |
| 3584 | cur_channel = 0; |
| 3585 | if ( (cur_channel != channel) && (p->features & AHC_TWIN) ) |
| 3586 | { |
| 3587 | /* |
| 3588 | * Case 1: Command for another bus is active |
| 3589 | */ |
| 3590 | if (aic7xxx_verbose & VERBOSE_RESET_PROCESS) |
| 3591 | printk(INFO_LEAD "Stealthily resetting idle channel.\n", p->host_no, |
| 3592 | channel, -1, -1); |
| 3593 | /* |
| 3594 | * Stealthily reset the other bus without upsetting the current bus. |
| 3595 | */ |
| 3596 | aic_outb(p, sblkctl ^ SELBUSB, SBLKCTL); |
| 3597 | aic_outb(p, aic_inb(p, SIMODE1) & ~ENBUSFREE, SIMODE1); |
| 3598 | if (initiate_reset) |
| 3599 | { |
| 3600 | aic7xxx_reset_current_bus(p); |
| 3601 | } |
| 3602 | aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP), SCSISEQ); |
| 3603 | aic7xxx_clear_intstat(p); |
| 3604 | aic_outb(p, sblkctl, SBLKCTL); |
| 3605 | } |
| 3606 | else |
| 3607 | { |
| 3608 | /* |
| 3609 | * Case 2: A command from this bus is active or we're idle. |
| 3610 | */ |
| 3611 | if (aic7xxx_verbose & VERBOSE_RESET_PROCESS) |
| 3612 | printk(INFO_LEAD "Resetting currently active channel.\n", p->host_no, |
| 3613 | channel, -1, -1); |
| 3614 | aic_outb(p, aic_inb(p, SIMODE1) & ~(ENBUSFREE|ENREQINIT), |
| 3615 | SIMODE1); |
| 3616 | p->flags &= ~AHC_HANDLING_REQINITS; |
| 3617 | p->msg_type = MSG_TYPE_NONE; |
| 3618 | p->msg_len = 0; |
| 3619 | if (initiate_reset) |
| 3620 | { |
| 3621 | aic7xxx_reset_current_bus(p); |
| 3622 | } |
| 3623 | aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP), SCSISEQ); |
| 3624 | aic7xxx_clear_intstat(p); |
| 3625 | } |
| 3626 | if (aic7xxx_verbose & VERBOSE_RESET_RETURN) |
| 3627 | printk(INFO_LEAD "Channel reset\n", p->host_no, channel, -1, -1); |
| 3628 | /* |
| 3629 | * Clean up all the state information for the pending transactions |
| 3630 | * on this bus. |
| 3631 | */ |
| 3632 | aic7xxx_reset_device(p, ALL_TARGETS, channel, ALL_LUNS, SCB_LIST_NULL); |
| 3633 | |
| 3634 | if ( !(p->features & AHC_TWIN) ) |
| 3635 | { |
| 3636 | restart_sequencer(p); |
| 3637 | } |
| 3638 | |
| 3639 | return; |
| 3640 | } |
| 3641 | |
| 3642 | /*+F************************************************************************* |
| 3643 | * Function: |
| 3644 | * aic7xxx_run_waiting_queues |
| 3645 | * |
| 3646 | * Description: |
| 3647 | * Scan the awaiting_scbs queue downloading and starting as many |
| 3648 | * scbs as we can. |
| 3649 | *-F*************************************************************************/ |
| 3650 | static void |
| 3651 | aic7xxx_run_waiting_queues(struct aic7xxx_host *p) |
| 3652 | { |
| 3653 | struct aic7xxx_scb *scb; |
| 3654 | struct aic_dev_data *aic_dev; |
| 3655 | int sent; |
| 3656 | |
| 3657 | |
| 3658 | if (p->waiting_scbs.head == NULL) |
| 3659 | return; |
| 3660 | |
| 3661 | sent = 0; |
| 3662 | |
| 3663 | /* |
| 3664 | * First handle SCBs that are waiting but have been assigned a slot. |
| 3665 | */ |
| 3666 | while ((scb = scbq_remove_head(&p->waiting_scbs)) != NULL) |
| 3667 | { |
| 3668 | aic_dev = scb->cmd->device->hostdata; |
| 3669 | if ( !scb->tag_action ) |
| 3670 | { |
| 3671 | aic_dev->temp_q_depth = 1; |
| 3672 | } |
| 3673 | if ( aic_dev->active_cmds >= aic_dev->temp_q_depth) |
| 3674 | { |
| 3675 | scbq_insert_tail(&aic_dev->delayed_scbs, scb); |
| 3676 | } |
| 3677 | else |
| 3678 | { |
| 3679 | scb->flags &= ~SCB_WAITINGQ; |
| 3680 | aic_dev->active_cmds++; |
| 3681 | p->activescbs++; |
| 3682 | if ( !(scb->tag_action) ) |
| 3683 | { |
| 3684 | aic7xxx_busy_target(p, scb); |
| 3685 | } |
| 3686 | p->qinfifo[p->qinfifonext++] = scb->hscb->tag; |
| 3687 | sent++; |
| 3688 | } |
| 3689 | } |
| 3690 | if (sent) |
| 3691 | { |
| 3692 | if (p->features & AHC_QUEUE_REGS) |
| 3693 | aic_outb(p, p->qinfifonext, HNSCB_QOFF); |
| 3694 | else |
| 3695 | { |
| 3696 | pause_sequencer(p); |
| 3697 | aic_outb(p, p->qinfifonext, KERNEL_QINPOS); |
| 3698 | unpause_sequencer(p, FALSE); |
| 3699 | } |
| 3700 | if (p->activescbs > p->max_activescbs) |
| 3701 | p->max_activescbs = p->activescbs; |
| 3702 | } |
| 3703 | } |
| 3704 | |
| 3705 | #ifdef CONFIG_PCI |
| 3706 | |
| 3707 | #define DPE 0x80 |
| 3708 | #define SSE 0x40 |
| 3709 | #define RMA 0x20 |
| 3710 | #define RTA 0x10 |
| 3711 | #define STA 0x08 |
| 3712 | #define DPR 0x01 |
| 3713 | |
| 3714 | /*+F************************************************************************* |
| 3715 | * Function: |
| 3716 | * aic7xxx_pci_intr |
| 3717 | * |
| 3718 | * Description: |
| 3719 | * Check the scsi card for PCI errors and clear the interrupt |
| 3720 | * |
| 3721 | * NOTE: If you don't have this function and a 2940 card encounters |
| 3722 | * a PCI error condition, the machine will end up locked as the |
| 3723 | * interrupt handler gets slammed with non-stop PCI error interrupts |
| 3724 | *-F*************************************************************************/ |
| 3725 | static void |
| 3726 | aic7xxx_pci_intr(struct aic7xxx_host *p) |
| 3727 | { |
| 3728 | unsigned char status1; |
| 3729 | |
| 3730 | pci_read_config_byte(p->pdev, PCI_STATUS + 1, &status1); |
| 3731 | |
| 3732 | if ( (status1 & DPE) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) ) |
| 3733 | printk(WARN_LEAD "Data Parity Error during PCI address or PCI write" |
| 3734 | "phase.\n", p->host_no, -1, -1, -1); |
| 3735 | if ( (status1 & SSE) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) ) |
| 3736 | printk(WARN_LEAD "Signal System Error Detected\n", p->host_no, |
| 3737 | -1, -1, -1); |
| 3738 | if ( (status1 & RMA) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) ) |
| 3739 | printk(WARN_LEAD "Received a PCI Master Abort\n", p->host_no, |
| 3740 | -1, -1, -1); |
| 3741 | if ( (status1 & RTA) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) ) |
| 3742 | printk(WARN_LEAD "Received a PCI Target Abort\n", p->host_no, |
| 3743 | -1, -1, -1); |
| 3744 | if ( (status1 & STA) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) ) |
| 3745 | printk(WARN_LEAD "Signaled a PCI Target Abort\n", p->host_no, |
| 3746 | -1, -1, -1); |
| 3747 | if ( (status1 & DPR) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) ) |
| 3748 | printk(WARN_LEAD "Data Parity Error has been reported via PCI pin " |
| 3749 | "PERR#\n", p->host_no, -1, -1, -1); |
| 3750 | |
| 3751 | pci_write_config_byte(p->pdev, PCI_STATUS + 1, status1); |
| 3752 | if (status1 & (DPR|RMA|RTA)) |
| 3753 | aic_outb(p, CLRPARERR, CLRINT); |
| 3754 | |
| 3755 | if ( (aic7xxx_panic_on_abort) && (p->spurious_int > 500) ) |
| 3756 | aic7xxx_panic_abort(p, NULL); |
| 3757 | |
| 3758 | } |
| 3759 | #endif /* CONFIG_PCI */ |
| 3760 | |
| 3761 | /*+F************************************************************************* |
| 3762 | * Function: |
| 3763 | * aic7xxx_construct_ppr |
| 3764 | * |
| 3765 | * Description: |
| 3766 | * Build up a Parallel Protocol Request message for use with SCSI-3 |
| 3767 | * devices. |
| 3768 | *-F*************************************************************************/ |
| 3769 | static void |
| 3770 | aic7xxx_construct_ppr(struct aic7xxx_host *p, struct aic7xxx_scb *scb) |
| 3771 | { |
| 3772 | p->msg_buf[p->msg_index++] = MSG_EXTENDED; |
| 3773 | p->msg_buf[p->msg_index++] = MSG_EXT_PPR_LEN; |
| 3774 | p->msg_buf[p->msg_index++] = MSG_EXT_PPR; |
| 3775 | p->msg_buf[p->msg_index++] = AIC_DEV(scb->cmd)->goal.period; |
| 3776 | p->msg_buf[p->msg_index++] = 0; |
| 3777 | p->msg_buf[p->msg_index++] = AIC_DEV(scb->cmd)->goal.offset; |
| 3778 | p->msg_buf[p->msg_index++] = AIC_DEV(scb->cmd)->goal.width; |
| 3779 | p->msg_buf[p->msg_index++] = AIC_DEV(scb->cmd)->goal.options; |
| 3780 | p->msg_len += 8; |
| 3781 | } |
| 3782 | |
| 3783 | /*+F************************************************************************* |
| 3784 | * Function: |
| 3785 | * aic7xxx_construct_sdtr |
| 3786 | * |
| 3787 | * Description: |
| 3788 | * Constucts a synchronous data transfer message in the message |
| 3789 | * buffer on the sequencer. |
| 3790 | *-F*************************************************************************/ |
| 3791 | static void |
| 3792 | aic7xxx_construct_sdtr(struct aic7xxx_host *p, unsigned char period, |
| 3793 | unsigned char offset) |
| 3794 | { |
| 3795 | p->msg_buf[p->msg_index++] = MSG_EXTENDED; |
| 3796 | p->msg_buf[p->msg_index++] = MSG_EXT_SDTR_LEN; |
| 3797 | p->msg_buf[p->msg_index++] = MSG_EXT_SDTR; |
| 3798 | p->msg_buf[p->msg_index++] = period; |
| 3799 | p->msg_buf[p->msg_index++] = offset; |
| 3800 | p->msg_len += 5; |
| 3801 | } |
| 3802 | |
| 3803 | /*+F************************************************************************* |
| 3804 | * Function: |
| 3805 | * aic7xxx_construct_wdtr |
| 3806 | * |
| 3807 | * Description: |
| 3808 | * Constucts a wide data transfer message in the message buffer |
| 3809 | * on the sequencer. |
| 3810 | *-F*************************************************************************/ |
| 3811 | static void |
| 3812 | aic7xxx_construct_wdtr(struct aic7xxx_host *p, unsigned char bus_width) |
| 3813 | { |
| 3814 | p->msg_buf[p->msg_index++] = MSG_EXTENDED; |
| 3815 | p->msg_buf[p->msg_index++] = MSG_EXT_WDTR_LEN; |
| 3816 | p->msg_buf[p->msg_index++] = MSG_EXT_WDTR; |
| 3817 | p->msg_buf[p->msg_index++] = bus_width; |
| 3818 | p->msg_len += 4; |
| 3819 | } |
| 3820 | |
| 3821 | /*+F************************************************************************* |
| 3822 | * Function: |
| 3823 | * aic7xxx_calc_residual |
| 3824 | * |
| 3825 | * Description: |
| 3826 | * Calculate the residual data not yet transferred. |
| 3827 | *-F*************************************************************************/ |
| 3828 | static void |
| 3829 | aic7xxx_calculate_residual (struct aic7xxx_host *p, struct aic7xxx_scb *scb) |
| 3830 | { |
| 3831 | struct aic7xxx_hwscb *hscb; |
| 3832 | Scsi_Cmnd *cmd; |
| 3833 | int actual, i; |
| 3834 | |
| 3835 | cmd = scb->cmd; |
| 3836 | hscb = scb->hscb; |
| 3837 | |
| 3838 | /* |
| 3839 | * Don't destroy valid residual information with |
| 3840 | * residual coming from a check sense operation. |
| 3841 | */ |
| 3842 | if (((scb->hscb->control & DISCONNECTED) == 0) && |
| 3843 | (scb->flags & SCB_SENSE) == 0) |
| 3844 | { |
| 3845 | /* |
| 3846 | * We had an underflow. At this time, there's only |
| 3847 | * one other driver that bothers to check for this, |
| 3848 | * and cmd->underflow seems to be set rather half- |
| 3849 | * heartedly in the higher-level SCSI code. |
| 3850 | */ |
| 3851 | actual = scb->sg_length; |
| 3852 | for (i=1; i < hscb->residual_SG_segment_count; i++) |
| 3853 | { |
| 3854 | actual -= scb->sg_list[scb->sg_count - i].length; |
| 3855 | } |
| 3856 | actual -= (hscb->residual_data_count[2] << 16) | |
| 3857 | (hscb->residual_data_count[1] << 8) | |
| 3858 | hscb->residual_data_count[0]; |
| 3859 | |
| 3860 | if (actual < cmd->underflow) |
| 3861 | { |
| 3862 | if (aic7xxx_verbose & VERBOSE_MINOR_ERROR) |
| 3863 | { |
| 3864 | printk(INFO_LEAD "Underflow - Wanted %u, %s %u, residual SG " |
| 3865 | "count %d.\n", p->host_no, CTL_OF_SCB(scb), cmd->underflow, |
| 3866 | (rq_data_dir(cmd->request) == WRITE) ? "wrote" : "read", actual, |
| 3867 | hscb->residual_SG_segment_count); |
| 3868 | printk(INFO_LEAD "status 0x%x.\n", p->host_no, CTL_OF_SCB(scb), |
| 3869 | hscb->target_status); |
| 3870 | } |
| 3871 | /* |
| 3872 | * In 2.4, only send back the residual information, don't flag this |
| 3873 | * as an error. Before 2.4 we had to flag this as an error because |
| 3874 | * the mid layer didn't check residual data counts to see if the |
| 3875 | * command needs retried. |
| 3876 | */ |
| 3877 | cmd->resid = scb->sg_length - actual; |
| 3878 | aic7xxx_status(cmd) = hscb->target_status; |
| 3879 | } |
| 3880 | } |
| 3881 | |
| 3882 | /* |
| 3883 | * Clean out the residual information in the SCB for the |
| 3884 | * next consumer. |
| 3885 | */ |
| 3886 | hscb->residual_data_count[2] = 0; |
| 3887 | hscb->residual_data_count[1] = 0; |
| 3888 | hscb->residual_data_count[0] = 0; |
| 3889 | hscb->residual_SG_segment_count = 0; |
| 3890 | } |
| 3891 | |
| 3892 | /*+F************************************************************************* |
| 3893 | * Function: |
| 3894 | * aic7xxx_handle_device_reset |
| 3895 | * |
| 3896 | * Description: |
| 3897 | * Interrupt handler for sequencer interrupts (SEQINT). |
| 3898 | *-F*************************************************************************/ |
| 3899 | static void |
| 3900 | aic7xxx_handle_device_reset(struct aic7xxx_host *p, int target, int channel) |
| 3901 | { |
| 3902 | unsigned char tindex = target; |
| 3903 | |
| 3904 | tindex |= ((channel & 0x01) << 3); |
| 3905 | |
| 3906 | /* |
| 3907 | * Go back to async/narrow transfers and renegotiate. |
| 3908 | */ |
| 3909 | aic_outb(p, 0, TARG_SCSIRATE + tindex); |
| 3910 | if (p->features & AHC_ULTRA2) |
| 3911 | aic_outb(p, 0, TARG_OFFSET + tindex); |
| 3912 | aic7xxx_reset_device(p, target, channel, ALL_LUNS, SCB_LIST_NULL); |
| 3913 | if (aic7xxx_verbose & VERBOSE_RESET_PROCESS) |
| 3914 | printk(INFO_LEAD "Bus Device Reset delivered.\n", p->host_no, channel, |
| 3915 | target, -1); |
| 3916 | aic7xxx_run_done_queue(p, /*complete*/ TRUE); |
| 3917 | } |
| 3918 | |
| 3919 | /*+F************************************************************************* |
| 3920 | * Function: |
| 3921 | * aic7xxx_handle_seqint |
| 3922 | * |
| 3923 | * Description: |
| 3924 | * Interrupt handler for sequencer interrupts (SEQINT). |
| 3925 | *-F*************************************************************************/ |
| 3926 | static void |
| 3927 | aic7xxx_handle_seqint(struct aic7xxx_host *p, unsigned char intstat) |
| 3928 | { |
| 3929 | struct aic7xxx_scb *scb; |
| 3930 | struct aic_dev_data *aic_dev; |
| 3931 | unsigned short target_mask; |
| 3932 | unsigned char target, lun, tindex; |
| 3933 | unsigned char queue_flag = FALSE; |
| 3934 | char channel; |
| 3935 | int result; |
| 3936 | |
| 3937 | target = ((aic_inb(p, SAVED_TCL) >> 4) & 0x0f); |
| 3938 | if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 ) |
| 3939 | channel = (aic_inb(p, SBLKCTL) & SELBUSB) >> 3; |
| 3940 | else |
| 3941 | channel = 0; |
| 3942 | tindex = target + (channel << 3); |
| 3943 | lun = aic_inb(p, SAVED_TCL) & 0x07; |
| 3944 | target_mask = (0x01 << tindex); |
| 3945 | |
| 3946 | /* |
| 3947 | * Go ahead and clear the SEQINT now, that avoids any interrupt race |
| 3948 | * conditions later on in case we enable some other interrupt. |
| 3949 | */ |
| 3950 | aic_outb(p, CLRSEQINT, CLRINT); |
| 3951 | switch (intstat & SEQINT_MASK) |
| 3952 | { |
| 3953 | case NO_MATCH: |
| 3954 | { |
| 3955 | aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP), |
| 3956 | SCSISEQ); |
| 3957 | printk(WARN_LEAD "No active SCB for reconnecting target - Issuing " |
| 3958 | "BUS DEVICE RESET.\n", p->host_no, channel, target, lun); |
| 3959 | printk(WARN_LEAD " SAVED_TCL=0x%x, ARG_1=0x%x, SEQADDR=0x%x\n", |
| 3960 | p->host_no, channel, target, lun, |
| 3961 | aic_inb(p, SAVED_TCL), aic_inb(p, ARG_1), |
| 3962 | (aic_inb(p, SEQADDR1) << 8) | aic_inb(p, SEQADDR0)); |
| 3963 | if (aic7xxx_panic_on_abort) |
| 3964 | aic7xxx_panic_abort(p, NULL); |
| 3965 | } |
| 3966 | break; |
| 3967 | |
| 3968 | case SEND_REJECT: |
| 3969 | { |
| 3970 | if (aic7xxx_verbose & VERBOSE_MINOR_ERROR) |
| 3971 | printk(INFO_LEAD "Rejecting unknown message (0x%x) received from " |
| 3972 | "target, SEQ_FLAGS=0x%x\n", p->host_no, channel, target, lun, |
| 3973 | aic_inb(p, ACCUM), aic_inb(p, SEQ_FLAGS)); |
| 3974 | } |
| 3975 | break; |
| 3976 | |
| 3977 | case NO_IDENT: |
| 3978 | { |
| 3979 | /* |
| 3980 | * The reconnecting target either did not send an identify |
| 3981 | * message, or did, but we didn't find an SCB to match and |
| 3982 | * before it could respond to our ATN/abort, it hit a dataphase. |
| 3983 | * The only safe thing to do is to blow it away with a bus |
| 3984 | * reset. |
| 3985 | */ |
| 3986 | if (aic7xxx_verbose & (VERBOSE_SEQINT | VERBOSE_RESET_MID)) |
| 3987 | printk(INFO_LEAD "Target did not send an IDENTIFY message; " |
| 3988 | "LASTPHASE 0x%x, SAVED_TCL 0x%x\n", p->host_no, channel, target, |
| 3989 | lun, aic_inb(p, LASTPHASE), aic_inb(p, SAVED_TCL)); |
| 3990 | |
| 3991 | aic7xxx_reset_channel(p, channel, /*initiate reset*/ TRUE); |
| 3992 | aic7xxx_run_done_queue(p, TRUE); |
| 3993 | |
| 3994 | } |
| 3995 | break; |
| 3996 | |
| 3997 | case BAD_PHASE: |
| 3998 | if (aic_inb(p, LASTPHASE) == P_BUSFREE) |
| 3999 | { |
| 4000 | if (aic7xxx_verbose & VERBOSE_SEQINT) |
| 4001 | printk(INFO_LEAD "Missed busfree.\n", p->host_no, channel, |
| 4002 | target, lun); |
| 4003 | restart_sequencer(p); |
| 4004 | } |
| 4005 | else |
| 4006 | { |
| 4007 | if (aic7xxx_verbose & VERBOSE_SEQINT) |
| 4008 | printk(INFO_LEAD "Unknown scsi bus phase, continuing\n", p->host_no, |
| 4009 | channel, target, lun); |
| 4010 | } |
| 4011 | break; |
| 4012 | |
| 4013 | case EXTENDED_MSG: |
| 4014 | { |
| 4015 | p->msg_type = MSG_TYPE_INITIATOR_MSGIN; |
| 4016 | p->msg_len = 0; |
| 4017 | p->msg_index = 0; |
| 4018 | |
| 4019 | #ifdef AIC7XXX_VERBOSE_DEBUGGING |
| 4020 | if (aic7xxx_verbose > 0xffff) |
| 4021 | printk(INFO_LEAD "Enabling REQINITs for MSG_IN\n", p->host_no, |
| 4022 | channel, target, lun); |
| 4023 | #endif |
| 4024 | |
| 4025 | /* |
| 4026 | * To actually receive the message, simply turn on |
| 4027 | * REQINIT interrupts and let our interrupt handler |
| 4028 | * do the rest (REQINIT should already be true). |
| 4029 | */ |
| 4030 | p->flags |= AHC_HANDLING_REQINITS; |
| 4031 | aic_outb(p, aic_inb(p, SIMODE1) | ENREQINIT, SIMODE1); |
| 4032 | |
| 4033 | /* |
| 4034 | * We don't want the sequencer unpaused yet so we return early |
| 4035 | */ |
| 4036 | return; |
| 4037 | } |
| 4038 | |
| 4039 | case REJECT_MSG: |
| 4040 | { |
| 4041 | /* |
| 4042 | * What we care about here is if we had an outstanding SDTR |
| 4043 | * or WDTR message for this target. If we did, this is a |
| 4044 | * signal that the target is refusing negotiation. |
| 4045 | */ |
| 4046 | unsigned char scb_index; |
| 4047 | unsigned char last_msg; |
| 4048 | |
| 4049 | scb_index = aic_inb(p, SCB_TAG); |
| 4050 | scb = p->scb_data->scb_array[scb_index]; |
| 4051 | aic_dev = AIC_DEV(scb->cmd); |
| 4052 | last_msg = aic_inb(p, LAST_MSG); |
| 4053 | |
| 4054 | if ( (last_msg == MSG_IDENTIFYFLAG) && |
| 4055 | (scb->tag_action) && |
| 4056 | !(scb->flags & SCB_MSGOUT_BITS) ) |
| 4057 | { |
| 4058 | if (scb->tag_action == MSG_ORDERED_Q_TAG) |
| 4059 | { |
| 4060 | /* |
| 4061 | * OK...the device seems able to accept tagged commands, but |
| 4062 | * not ordered tag commands, only simple tag commands. So, we |
| 4063 | * disable ordered tag commands and go on with life just like |
| 4064 | * normal. |
| 4065 | */ |
| 4066 | scsi_adjust_queue_depth(scb->cmd->device, MSG_SIMPLE_TAG, |
| 4067 | scb->cmd->device->queue_depth); |
| 4068 | scb->tag_action = MSG_SIMPLE_Q_TAG; |
| 4069 | scb->hscb->control &= ~SCB_TAG_TYPE; |
| 4070 | scb->hscb->control |= MSG_SIMPLE_Q_TAG; |
| 4071 | aic_outb(p, scb->hscb->control, SCB_CONTROL); |
| 4072 | /* |
| 4073 | * OK..we set the tag type to simple tag command, now we re-assert |
| 4074 | * ATNO and hope this will take us into the identify phase again |
| 4075 | * so we can resend the tag type and info to the device. |
| 4076 | */ |
| 4077 | aic_outb(p, MSG_IDENTIFYFLAG, MSG_OUT); |
| 4078 | aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO); |
| 4079 | } |
| 4080 | else if (scb->tag_action == MSG_SIMPLE_Q_TAG) |
| 4081 | { |
| 4082 | unsigned char i; |
| 4083 | struct aic7xxx_scb *scbp; |
| 4084 | int old_verbose; |
| 4085 | /* |
| 4086 | * Hmmmm....the device is flaking out on tagged commands. |
| 4087 | */ |
| 4088 | scsi_adjust_queue_depth(scb->cmd->device, 0 /* untagged */, |
| 4089 | p->host->cmd_per_lun); |
| 4090 | aic_dev->max_q_depth = aic_dev->temp_q_depth = 1; |
| 4091 | /* |
| 4092 | * We set this command up as a bus device reset. However, we have |
| 4093 | * to clear the tag type as it's causing us problems. We shouldnt |
| 4094 | * have to worry about any other commands being active, since if |
| 4095 | * the device is refusing tagged commands, this should be the |
| 4096 | * first tagged command sent to the device, however, we do have |
| 4097 | * to worry about any other tagged commands that may already be |
| 4098 | * in the qinfifo. The easiest way to do this, is to issue a BDR, |
| 4099 | * send all the commands back to the mid level code, then let them |
| 4100 | * come back and get rebuilt as untagged commands. |
| 4101 | */ |
| 4102 | scb->tag_action = 0; |
| 4103 | scb->hscb->control &= ~(TAG_ENB | SCB_TAG_TYPE); |
| 4104 | aic_outb(p, scb->hscb->control, SCB_CONTROL); |
| 4105 | |
| 4106 | old_verbose = aic7xxx_verbose; |
| 4107 | aic7xxx_verbose &= ~(VERBOSE_RESET|VERBOSE_ABORT); |
| 4108 | for (i=0; i < p->scb_data->numscbs; i++) |
| 4109 | { |
| 4110 | scbp = p->scb_data->scb_array[i]; |
| 4111 | if ((scbp->flags & SCB_ACTIVE) && (scbp != scb)) |
| 4112 | { |
| 4113 | if (aic7xxx_match_scb(p, scbp, target, channel, lun, i)) |
| 4114 | { |
| 4115 | aic7xxx_reset_device(p, target, channel, lun, i); |
| 4116 | } |
| 4117 | } |
| 4118 | } |
| 4119 | aic7xxx_run_done_queue(p, TRUE); |
| 4120 | aic7xxx_verbose = old_verbose; |
| 4121 | /* |
| 4122 | * Wait until after the for loop to set the busy index since |
| 4123 | * aic7xxx_reset_device will clear the busy index during its |
| 4124 | * operation. |
| 4125 | */ |
| 4126 | aic7xxx_busy_target(p, scb); |
| 4127 | printk(INFO_LEAD "Device is refusing tagged commands, using " |
| 4128 | "untagged I/O.\n", p->host_no, channel, target, lun); |
| 4129 | aic_outb(p, MSG_IDENTIFYFLAG, MSG_OUT); |
| 4130 | aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO); |
| 4131 | } |
| 4132 | } |
| 4133 | else if (scb->flags & SCB_MSGOUT_PPR) |
| 4134 | { |
| 4135 | /* |
| 4136 | * As per the draft specs, any device capable of supporting any of |
| 4137 | * the option values other than 0 are not allowed to reject the |
| 4138 | * PPR message. Instead, they must negotiate out what they do |
| 4139 | * support instead of rejecting our offering or else they cause |
| 4140 | * a parity error during msg_out phase to signal that they don't |
| 4141 | * like our settings. |
| 4142 | */ |
| 4143 | aic_dev->needppr = aic_dev->needppr_copy = 0; |
| 4144 | aic7xxx_set_width(p, target, channel, lun, MSG_EXT_WDTR_BUS_8_BIT, |
| 4145 | (AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE), aic_dev); |
| 4146 | aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0, |
| 4147 | AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE, |
| 4148 | aic_dev); |
| 4149 | aic_dev->goal.options = aic_dev->dtr_pending = 0; |
| 4150 | scb->flags &= ~SCB_MSGOUT_BITS; |
| 4151 | if(aic7xxx_verbose & VERBOSE_NEGOTIATION2) |
| 4152 | { |
| 4153 | printk(INFO_LEAD "Device is rejecting PPR messages, falling " |
| 4154 | "back.\n", p->host_no, channel, target, lun); |
| 4155 | } |
| 4156 | if ( aic_dev->goal.width ) |
| 4157 | { |
| 4158 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 1; |
| 4159 | aic_dev->dtr_pending = 1; |
| 4160 | scb->flags |= SCB_MSGOUT_WDTR; |
| 4161 | } |
| 4162 | if ( aic_dev->goal.offset ) |
| 4163 | { |
| 4164 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 1; |
| 4165 | if( !aic_dev->dtr_pending ) |
| 4166 | { |
| 4167 | aic_dev->dtr_pending = 1; |
| 4168 | scb->flags |= SCB_MSGOUT_SDTR; |
| 4169 | } |
| 4170 | } |
| 4171 | if ( aic_dev->dtr_pending ) |
| 4172 | { |
| 4173 | aic_outb(p, HOST_MSG, MSG_OUT); |
| 4174 | aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO); |
| 4175 | } |
| 4176 | } |
| 4177 | else if (scb->flags & SCB_MSGOUT_WDTR) |
| 4178 | { |
| 4179 | /* |
| 4180 | * note 8bit xfers and clear flag |
| 4181 | */ |
| 4182 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 0; |
| 4183 | scb->flags &= ~SCB_MSGOUT_BITS; |
| 4184 | aic7xxx_set_width(p, target, channel, lun, MSG_EXT_WDTR_BUS_8_BIT, |
| 4185 | (AHC_TRANS_ACTIVE|AHC_TRANS_GOAL|AHC_TRANS_CUR), aic_dev); |
| 4186 | aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0, |
| 4187 | AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE, |
| 4188 | aic_dev); |
| 4189 | if(aic7xxx_verbose & VERBOSE_NEGOTIATION2) |
| 4190 | { |
| 4191 | printk(INFO_LEAD "Device is rejecting WDTR messages, using " |
| 4192 | "narrow transfers.\n", p->host_no, channel, target, lun); |
| 4193 | } |
| 4194 | aic_dev->needsdtr = aic_dev->needsdtr_copy; |
| 4195 | } |
| 4196 | else if (scb->flags & SCB_MSGOUT_SDTR) |
| 4197 | { |
| 4198 | /* |
| 4199 | * note asynch xfers and clear flag |
| 4200 | */ |
| 4201 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 0; |
| 4202 | scb->flags &= ~SCB_MSGOUT_BITS; |
| 4203 | aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0, |
| 4204 | (AHC_TRANS_CUR|AHC_TRANS_ACTIVE|AHC_TRANS_GOAL), aic_dev); |
| 4205 | if(aic7xxx_verbose & VERBOSE_NEGOTIATION2) |
| 4206 | { |
| 4207 | printk(INFO_LEAD "Device is rejecting SDTR messages, using " |
| 4208 | "async transfers.\n", p->host_no, channel, target, lun); |
| 4209 | } |
| 4210 | } |
| 4211 | else if (aic7xxx_verbose & VERBOSE_SEQINT) |
| 4212 | { |
| 4213 | /* |
| 4214 | * Otherwise, we ignore it. |
| 4215 | */ |
| 4216 | printk(INFO_LEAD "Received MESSAGE_REJECT for unknown cause. " |
| 4217 | "Ignoring.\n", p->host_no, channel, target, lun); |
| 4218 | } |
| 4219 | } |
| 4220 | break; |
| 4221 | |
| 4222 | case BAD_STATUS: |
| 4223 | { |
| 4224 | unsigned char scb_index; |
| 4225 | struct aic7xxx_hwscb *hscb; |
| 4226 | Scsi_Cmnd *cmd; |
| 4227 | |
| 4228 | /* The sequencer will notify us when a command has an error that |
| 4229 | * would be of interest to the kernel. This allows us to leave |
| 4230 | * the sequencer running in the common case of command completes |
| 4231 | * without error. The sequencer will have DMA'd the SCB back |
| 4232 | * up to us, so we can reference the drivers SCB array. |
| 4233 | * |
| 4234 | * Set the default return value to 0 indicating not to send |
| 4235 | * sense. The sense code will change this if needed and this |
| 4236 | * reduces code duplication. |
| 4237 | */ |
| 4238 | aic_outb(p, 0, RETURN_1); |
| 4239 | scb_index = aic_inb(p, SCB_TAG); |
| 4240 | if (scb_index > p->scb_data->numscbs) |
| 4241 | { |
| 4242 | printk(WARN_LEAD "Invalid SCB during SEQINT 0x%02x, SCB_TAG %d.\n", |
| 4243 | p->host_no, channel, target, lun, intstat, scb_index); |
| 4244 | break; |
| 4245 | } |
| 4246 | scb = p->scb_data->scb_array[scb_index]; |
| 4247 | hscb = scb->hscb; |
| 4248 | |
| 4249 | if (!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL)) |
| 4250 | { |
| 4251 | printk(WARN_LEAD "Invalid SCB during SEQINT 0x%x, scb %d, flags 0x%x," |
| 4252 | " cmd 0x%lx.\n", p->host_no, channel, target, lun, intstat, |
| 4253 | scb_index, scb->flags, (unsigned long) scb->cmd); |
| 4254 | } |
| 4255 | else |
| 4256 | { |
| 4257 | cmd = scb->cmd; |
| 4258 | aic_dev = AIC_DEV(scb->cmd); |
| 4259 | hscb->target_status = aic_inb(p, SCB_TARGET_STATUS); |
| 4260 | aic7xxx_status(cmd) = hscb->target_status; |
| 4261 | |
| 4262 | cmd->result = hscb->target_status; |
| 4263 | |
| 4264 | switch (status_byte(hscb->target_status)) |
| 4265 | { |
| 4266 | case GOOD: |
| 4267 | if (aic7xxx_verbose & VERBOSE_SEQINT) |
| 4268 | printk(INFO_LEAD "Interrupted for status of GOOD???\n", |
| 4269 | p->host_no, CTL_OF_SCB(scb)); |
| 4270 | break; |
| 4271 | |
| 4272 | case COMMAND_TERMINATED: |
| 4273 | case CHECK_CONDITION: |
| 4274 | if ( !(scb->flags & SCB_SENSE) ) |
| 4275 | { |
| 4276 | /* |
| 4277 | * Send a sense command to the requesting target. |
| 4278 | * XXX - revisit this and get rid of the memcopys. |
| 4279 | */ |
| 4280 | memcpy(scb->sense_cmd, &generic_sense[0], |
| 4281 | sizeof(generic_sense)); |
| 4282 | |
| 4283 | scb->sense_cmd[1] = (cmd->device->lun << 5); |
| 4284 | scb->sense_cmd[4] = sizeof(cmd->sense_buffer); |
| 4285 | |
| 4286 | scb->sg_list[0].length = |
| 4287 | cpu_to_le32(sizeof(cmd->sense_buffer)); |
| 4288 | scb->sg_list[0].address = |
| 4289 | cpu_to_le32(pci_map_single(p->pdev, cmd->sense_buffer, |
| 4290 | sizeof(cmd->sense_buffer), |
| 4291 | PCI_DMA_FROMDEVICE)); |
| 4292 | |
| 4293 | /* |
| 4294 | * XXX - We should allow disconnection, but can't as it |
| 4295 | * might allow overlapped tagged commands. |
| 4296 | */ |
| 4297 | /* hscb->control &= DISCENB; */ |
| 4298 | hscb->control = 0; |
| 4299 | hscb->target_status = 0; |
| 4300 | hscb->SG_list_pointer = |
| 4301 | cpu_to_le32(SCB_DMA_ADDR(scb, scb->sg_list)); |
| 4302 | hscb->SCSI_cmd_pointer = |
| 4303 | cpu_to_le32(SCB_DMA_ADDR(scb, scb->sense_cmd)); |
| 4304 | hscb->data_count = scb->sg_list[0].length; |
| 4305 | hscb->data_pointer = scb->sg_list[0].address; |
| 4306 | hscb->SCSI_cmd_length = COMMAND_SIZE(scb->sense_cmd[0]); |
| 4307 | hscb->residual_SG_segment_count = 0; |
| 4308 | hscb->residual_data_count[0] = 0; |
| 4309 | hscb->residual_data_count[1] = 0; |
| 4310 | hscb->residual_data_count[2] = 0; |
| 4311 | |
| 4312 | scb->sg_count = hscb->SG_segment_count = 1; |
| 4313 | scb->sg_length = sizeof(cmd->sense_buffer); |
| 4314 | scb->tag_action = 0; |
| 4315 | scb->flags |= SCB_SENSE; |
| 4316 | /* |
| 4317 | * Ensure the target is busy since this will be an |
| 4318 | * an untagged request. |
| 4319 | */ |
| 4320 | #ifdef AIC7XXX_VERBOSE_DEBUGGING |
| 4321 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) |
| 4322 | { |
| 4323 | if (scb->flags & SCB_MSGOUT_BITS) |
| 4324 | printk(INFO_LEAD "Requesting SENSE with %s\n", p->host_no, |
| 4325 | CTL_OF_SCB(scb), (scb->flags & SCB_MSGOUT_SDTR) ? |
| 4326 | "SDTR" : "WDTR"); |
| 4327 | else |
| 4328 | printk(INFO_LEAD "Requesting SENSE, no MSG\n", p->host_no, |
| 4329 | CTL_OF_SCB(scb)); |
| 4330 | } |
| 4331 | #endif |
| 4332 | aic7xxx_busy_target(p, scb); |
| 4333 | aic_outb(p, SEND_SENSE, RETURN_1); |
| 4334 | aic7xxx_error(cmd) = DID_OK; |
| 4335 | break; |
| 4336 | } /* first time sense, no errors */ |
| 4337 | printk(INFO_LEAD "CHECK_CONDITION on REQUEST_SENSE, returning " |
| 4338 | "an error.\n", p->host_no, CTL_OF_SCB(scb)); |
| 4339 | aic7xxx_error(cmd) = DID_ERROR; |
| 4340 | scb->flags &= ~SCB_SENSE; |
| 4341 | break; |
| 4342 | |
| 4343 | case QUEUE_FULL: |
| 4344 | queue_flag = TRUE; /* Mark that this is a QUEUE_FULL and */ |
| 4345 | case BUSY: /* drop through to here */ |
| 4346 | { |
| 4347 | struct aic7xxx_scb *next_scbp, *prev_scbp; |
| 4348 | unsigned char active_hscb, next_hscb, prev_hscb, scb_index; |
| 4349 | /* |
| 4350 | * We have to look three places for queued commands: |
| 4351 | * 1: p->waiting_scbs queue |
| 4352 | * 2: QINFIFO |
| 4353 | * 3: WAITING_SCBS list on card (for commands that are started |
| 4354 | * but haven't yet made it to the device) |
| 4355 | * |
| 4356 | * Of special note here is that commands on 2 or 3 above will |
| 4357 | * have already been marked as active, while commands on 1 will |
| 4358 | * not. The aic7xxx_done() function will want to unmark them |
| 4359 | * from active, so any commands we pull off of 1 need to |
| 4360 | * up the active count. |
| 4361 | */ |
| 4362 | next_scbp = p->waiting_scbs.head; |
| 4363 | while ( next_scbp != NULL ) |
| 4364 | { |
| 4365 | prev_scbp = next_scbp; |
| 4366 | next_scbp = next_scbp->q_next; |
| 4367 | if ( aic7xxx_match_scb(p, prev_scbp, target, channel, lun, |
| 4368 | SCB_LIST_NULL) ) |
| 4369 | { |
| 4370 | scbq_remove(&p->waiting_scbs, prev_scbp); |
| 4371 | scb->flags = SCB_QUEUED_FOR_DONE | SCB_QUEUE_FULL; |
| 4372 | p->activescbs++; |
| 4373 | aic_dev->active_cmds++; |
| 4374 | } |
| 4375 | } |
| 4376 | aic7xxx_search_qinfifo(p, target, channel, lun, |
| 4377 | SCB_LIST_NULL, SCB_QUEUED_FOR_DONE | SCB_QUEUE_FULL, |
| 4378 | FALSE, NULL); |
| 4379 | next_scbp = NULL; |
| 4380 | active_hscb = aic_inb(p, SCBPTR); |
| 4381 | prev_hscb = next_hscb = scb_index = SCB_LIST_NULL; |
| 4382 | next_hscb = aic_inb(p, WAITING_SCBH); |
| 4383 | while (next_hscb != SCB_LIST_NULL) |
| 4384 | { |
| 4385 | aic_outb(p, next_hscb, SCBPTR); |
| 4386 | scb_index = aic_inb(p, SCB_TAG); |
| 4387 | if (scb_index < p->scb_data->numscbs) |
| 4388 | { |
| 4389 | next_scbp = p->scb_data->scb_array[scb_index]; |
| 4390 | if (aic7xxx_match_scb(p, next_scbp, target, channel, lun, |
| 4391 | SCB_LIST_NULL) ) |
| 4392 | { |
| 4393 | next_scbp->flags = SCB_QUEUED_FOR_DONE | SCB_QUEUE_FULL; |
| 4394 | next_hscb = aic_inb(p, SCB_NEXT); |
| 4395 | aic_outb(p, 0, SCB_CONTROL); |
| 4396 | aic_outb(p, SCB_LIST_NULL, SCB_TAG); |
| 4397 | aic7xxx_add_curscb_to_free_list(p); |
| 4398 | if (prev_hscb == SCB_LIST_NULL) |
| 4399 | { |
| 4400 | /* We were first on the list, |
| 4401 | * so we kill the selection |
| 4402 | * hardware. Let the sequencer |
| 4403 | * re-init the hardware itself |
| 4404 | */ |
| 4405 | aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ); |
| 4406 | aic_outb(p, CLRSELTIMEO, CLRSINT1); |
| 4407 | aic_outb(p, next_hscb, WAITING_SCBH); |
| 4408 | } |
| 4409 | else |
| 4410 | { |
| 4411 | aic_outb(p, prev_hscb, SCBPTR); |
| 4412 | aic_outb(p, next_hscb, SCB_NEXT); |
| 4413 | } |
| 4414 | } |
| 4415 | else |
| 4416 | { |
| 4417 | prev_hscb = next_hscb; |
| 4418 | next_hscb = aic_inb(p, SCB_NEXT); |
| 4419 | } |
| 4420 | } /* scb_index >= p->scb_data->numscbs */ |
| 4421 | } |
| 4422 | aic_outb(p, active_hscb, SCBPTR); |
| 4423 | aic7xxx_run_done_queue(p, FALSE); |
| 4424 | |
| 4425 | #ifdef AIC7XXX_VERBOSE_DEBUGGING |
| 4426 | if( (aic7xxx_verbose & VERBOSE_MINOR_ERROR) || |
| 4427 | (aic7xxx_verbose > 0xffff) ) |
| 4428 | { |
| 4429 | if (queue_flag) |
| 4430 | printk(INFO_LEAD "Queue full received; queue depth %d, " |
| 4431 | "active %d\n", p->host_no, CTL_OF_SCB(scb), |
| 4432 | aic_dev->max_q_depth, aic_dev->active_cmds); |
| 4433 | else |
| 4434 | printk(INFO_LEAD "Target busy\n", p->host_no, CTL_OF_SCB(scb)); |
| 4435 | } |
| 4436 | #endif |
| 4437 | if (queue_flag) |
| 4438 | { |
| 4439 | int diff; |
| 4440 | result = scsi_track_queue_full(cmd->device, |
| 4441 | aic_dev->active_cmds); |
| 4442 | if ( result < 0 ) |
| 4443 | { |
| 4444 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) |
| 4445 | printk(INFO_LEAD "Tagged Command Queueing disabled.\n", |
| 4446 | p->host_no, CTL_OF_SCB(scb)); |
| 4447 | diff = aic_dev->max_q_depth - p->host->cmd_per_lun; |
| 4448 | aic_dev->temp_q_depth = 1; |
| 4449 | aic_dev->max_q_depth = 1; |
| 4450 | } |
| 4451 | else if ( result > 0 ) |
| 4452 | { |
| 4453 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) |
| 4454 | printk(INFO_LEAD "Queue depth reduced to %d\n", p->host_no, |
| 4455 | CTL_OF_SCB(scb), result); |
| 4456 | diff = aic_dev->max_q_depth - result; |
| 4457 | aic_dev->max_q_depth = result; |
| 4458 | /* temp_q_depth could have been dropped to 1 for an untagged |
| 4459 | * command that might be coming up */ |
| 4460 | if(aic_dev->temp_q_depth > result) |
| 4461 | aic_dev->temp_q_depth = result; |
| 4462 | } |
| 4463 | /* We should free up the no unused SCB entries. But, that's |
| 4464 | * a difficult thing to do because we use a direct indexed |
| 4465 | * array, so we can't just take any entries and free them, |
| 4466 | * we *have* to free the ones at the end of the array, and |
| 4467 | * they very well could be in use right now, which means |
| 4468 | * in order to do this right, we have to add a delayed |
| 4469 | * freeing mechanism tied into the scb_free() code area. |
| 4470 | * We'll add that later. |
| 4471 | */ |
| 4472 | } |
| 4473 | break; |
| 4474 | } |
| 4475 | |
| 4476 | default: |
| 4477 | if (aic7xxx_verbose & VERBOSE_SEQINT) |
| 4478 | printk(INFO_LEAD "Unexpected target status 0x%x.\n", p->host_no, |
| 4479 | CTL_OF_SCB(scb), scb->hscb->target_status); |
| 4480 | if (!aic7xxx_error(cmd)) |
| 4481 | { |
| 4482 | aic7xxx_error(cmd) = DID_RETRY_COMMAND; |
| 4483 | } |
| 4484 | break; |
| 4485 | } /* end switch */ |
| 4486 | } /* end else of */ |
| 4487 | } |
| 4488 | break; |
| 4489 | |
| 4490 | case AWAITING_MSG: |
| 4491 | { |
| 4492 | unsigned char scb_index, msg_out; |
| 4493 | |
| 4494 | scb_index = aic_inb(p, SCB_TAG); |
| 4495 | msg_out = aic_inb(p, MSG_OUT); |
| 4496 | scb = p->scb_data->scb_array[scb_index]; |
| 4497 | aic_dev = AIC_DEV(scb->cmd); |
| 4498 | p->msg_index = p->msg_len = 0; |
| 4499 | /* |
| 4500 | * This SCB had a MK_MESSAGE set in its control byte informing |
| 4501 | * the sequencer that we wanted to send a special message to |
| 4502 | * this target. |
| 4503 | */ |
| 4504 | |
| 4505 | if ( !(scb->flags & SCB_DEVICE_RESET) && |
| 4506 | (msg_out == MSG_IDENTIFYFLAG) && |
| 4507 | (scb->hscb->control & TAG_ENB) ) |
| 4508 | { |
| 4509 | p->msg_buf[p->msg_index++] = scb->tag_action; |
| 4510 | p->msg_buf[p->msg_index++] = scb->hscb->tag; |
| 4511 | p->msg_len += 2; |
| 4512 | } |
| 4513 | |
| 4514 | if (scb->flags & SCB_DEVICE_RESET) |
| 4515 | { |
| 4516 | p->msg_buf[p->msg_index++] = MSG_BUS_DEV_RESET; |
| 4517 | p->msg_len++; |
| 4518 | if (aic7xxx_verbose & VERBOSE_RESET_PROCESS) |
| 4519 | printk(INFO_LEAD "Bus device reset mailed.\n", |
| 4520 | p->host_no, CTL_OF_SCB(scb)); |
| 4521 | } |
| 4522 | else if (scb->flags & SCB_ABORT) |
| 4523 | { |
| 4524 | if (scb->tag_action) |
| 4525 | { |
| 4526 | p->msg_buf[p->msg_index++] = MSG_ABORT_TAG; |
| 4527 | } |
| 4528 | else |
| 4529 | { |
| 4530 | p->msg_buf[p->msg_index++] = MSG_ABORT; |
| 4531 | } |
| 4532 | p->msg_len++; |
| 4533 | if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS) |
| 4534 | printk(INFO_LEAD "Abort message mailed.\n", p->host_no, |
| 4535 | CTL_OF_SCB(scb)); |
| 4536 | } |
| 4537 | else if (scb->flags & SCB_MSGOUT_PPR) |
| 4538 | { |
| 4539 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) |
| 4540 | { |
| 4541 | printk(INFO_LEAD "Sending PPR (%d/%d/%d/%d) message.\n", |
| 4542 | p->host_no, CTL_OF_SCB(scb), |
| 4543 | aic_dev->goal.period, |
| 4544 | aic_dev->goal.offset, |
| 4545 | aic_dev->goal.width, |
| 4546 | aic_dev->goal.options); |
| 4547 | } |
| 4548 | aic7xxx_construct_ppr(p, scb); |
| 4549 | } |
| 4550 | else if (scb->flags & SCB_MSGOUT_WDTR) |
| 4551 | { |
| 4552 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) |
| 4553 | { |
| 4554 | printk(INFO_LEAD "Sending WDTR message.\n", p->host_no, |
| 4555 | CTL_OF_SCB(scb)); |
| 4556 | } |
| 4557 | aic7xxx_construct_wdtr(p, aic_dev->goal.width); |
| 4558 | } |
| 4559 | else if (scb->flags & SCB_MSGOUT_SDTR) |
| 4560 | { |
| 4561 | unsigned int max_sync, period; |
| 4562 | unsigned char options = 0; |
| 4563 | /* |
| 4564 | * Now that the device is selected, use the bits in SBLKCTL and |
| 4565 | * SSTAT2 to determine the max sync rate for this device. |
| 4566 | */ |
| 4567 | if (p->features & AHC_ULTRA2) |
| 4568 | { |
| 4569 | if ( (aic_inb(p, SBLKCTL) & ENAB40) && |
| 4570 | !(aic_inb(p, SSTAT2) & EXP_ACTIVE) ) |
| 4571 | { |
| 4572 | max_sync = AHC_SYNCRATE_ULTRA2; |
| 4573 | } |
| 4574 | else |
| 4575 | { |
| 4576 | max_sync = AHC_SYNCRATE_ULTRA; |
| 4577 | } |
| 4578 | } |
| 4579 | else if (p->features & AHC_ULTRA) |
| 4580 | { |
| 4581 | max_sync = AHC_SYNCRATE_ULTRA; |
| 4582 | } |
| 4583 | else |
| 4584 | { |
| 4585 | max_sync = AHC_SYNCRATE_FAST; |
| 4586 | } |
| 4587 | period = aic_dev->goal.period; |
| 4588 | aic7xxx_find_syncrate(p, &period, max_sync, &options); |
| 4589 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) |
| 4590 | { |
| 4591 | printk(INFO_LEAD "Sending SDTR %d/%d message.\n", p->host_no, |
| 4592 | CTL_OF_SCB(scb), period, |
| 4593 | aic_dev->goal.offset); |
| 4594 | } |
| 4595 | aic7xxx_construct_sdtr(p, period, aic_dev->goal.offset); |
| 4596 | } |
| 4597 | else |
| 4598 | { |
| 4599 | panic("aic7xxx: AWAITING_MSG for an SCB that does " |
| 4600 | "not have a waiting message.\n"); |
| 4601 | } |
| 4602 | /* |
| 4603 | * We've set everything up to send our message, now to actually do |
| 4604 | * so we need to enable reqinit interrupts and let the interrupt |
| 4605 | * handler do the rest. We don't want to unpause the sequencer yet |
| 4606 | * though so we'll return early. We also have to make sure that |
| 4607 | * we clear the SEQINT *BEFORE* we set the REQINIT handler active |
| 4608 | * or else it's possible on VLB cards to lose the first REQINIT |
| 4609 | * interrupt. Edge triggered EISA cards could also lose this |
| 4610 | * interrupt, although PCI and level triggered cards should not |
| 4611 | * have this problem since they continually interrupt the kernel |
| 4612 | * until we take care of the situation. |
| 4613 | */ |
| 4614 | scb->flags |= SCB_MSGOUT_SENT; |
| 4615 | p->msg_index = 0; |
| 4616 | p->msg_type = MSG_TYPE_INITIATOR_MSGOUT; |
| 4617 | p->flags |= AHC_HANDLING_REQINITS; |
| 4618 | aic_outb(p, aic_inb(p, SIMODE1) | ENREQINIT, SIMODE1); |
| 4619 | return; |
| 4620 | } |
| 4621 | break; |
| 4622 | |
| 4623 | case DATA_OVERRUN: |
| 4624 | { |
| 4625 | unsigned char scb_index = aic_inb(p, SCB_TAG); |
| 4626 | unsigned char lastphase = aic_inb(p, LASTPHASE); |
| 4627 | unsigned int i; |
| 4628 | |
| 4629 | scb = (p->scb_data->scb_array[scb_index]); |
| 4630 | /* |
| 4631 | * XXX - What do we really want to do on an overrun? The |
| 4632 | * mid-level SCSI code should handle this, but for now, |
| 4633 | * we'll just indicate that the command should retried. |
| 4634 | * If we retrieved sense info on this target, then the |
| 4635 | * base SENSE info should have been saved prior to the |
| 4636 | * overrun error. In that case, we return DID_OK and let |
| 4637 | * the mid level code pick up on the sense info. Otherwise |
| 4638 | * we return DID_ERROR so the command will get retried. |
| 4639 | */ |
| 4640 | if ( !(scb->flags & SCB_SENSE) ) |
| 4641 | { |
| 4642 | printk(WARN_LEAD "Data overrun detected in %s phase, tag %d;\n", |
| 4643 | p->host_no, CTL_OF_SCB(scb), |
| 4644 | (lastphase == P_DATAIN) ? "Data-In" : "Data-Out", scb->hscb->tag); |
| 4645 | printk(KERN_WARNING " %s seen Data Phase. Length=%d, NumSGs=%d.\n", |
| 4646 | (aic_inb(p, SEQ_FLAGS) & DPHASE) ? "Have" : "Haven't", |
| 4647 | scb->sg_length, scb->sg_count); |
| 4648 | printk(KERN_WARNING " Raw SCSI Command: 0x"); |
| 4649 | for (i = 0; i < scb->hscb->SCSI_cmd_length; i++) |
| 4650 | { |
| 4651 | printk("%02x ", scb->cmd->cmnd[i]); |
| 4652 | } |
| 4653 | printk("\n"); |
| 4654 | if(aic7xxx_verbose > 0xffff) |
| 4655 | { |
| 4656 | for (i = 0; i < scb->sg_count; i++) |
| 4657 | { |
| 4658 | printk(KERN_WARNING " sg[%d] - Addr 0x%x : Length %d\n", |
| 4659 | i, |
| 4660 | le32_to_cpu(scb->sg_list[i].address), |
| 4661 | le32_to_cpu(scb->sg_list[i].length) ); |
| 4662 | } |
| 4663 | } |
| 4664 | aic7xxx_error(scb->cmd) = DID_ERROR; |
| 4665 | } |
| 4666 | else |
| 4667 | printk(INFO_LEAD "Data Overrun during SEND_SENSE operation.\n", |
| 4668 | p->host_no, CTL_OF_SCB(scb)); |
| 4669 | } |
| 4670 | break; |
| 4671 | |
| 4672 | case WIDE_RESIDUE: |
| 4673 | { |
| 4674 | unsigned char resid_sgcnt, index; |
| 4675 | unsigned char scb_index = aic_inb(p, SCB_TAG); |
| 4676 | unsigned int cur_addr, resid_dcnt; |
| 4677 | unsigned int native_addr, native_length, sg_addr; |
| 4678 | int i; |
| 4679 | |
| 4680 | if(scb_index > p->scb_data->numscbs) |
| 4681 | { |
| 4682 | printk(WARN_LEAD "invalid scb_index during WIDE_RESIDUE.\n", |
| 4683 | p->host_no, -1, -1, -1); |
| 4684 | /* |
| 4685 | * XXX: Add error handling here |
| 4686 | */ |
| 4687 | break; |
| 4688 | } |
| 4689 | scb = p->scb_data->scb_array[scb_index]; |
| 4690 | if(!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL)) |
| 4691 | { |
| 4692 | printk(WARN_LEAD "invalid scb during WIDE_RESIDUE flags:0x%x " |
| 4693 | "scb->cmd:0x%lx\n", p->host_no, CTL_OF_SCB(scb), |
| 4694 | scb->flags, (unsigned long)scb->cmd); |
| 4695 | break; |
| 4696 | } |
| 4697 | if(aic7xxx_verbose & VERBOSE_MINOR_ERROR) |
| 4698 | printk(INFO_LEAD "Got WIDE_RESIDUE message, patching up data " |
| 4699 | "pointer.\n", p->host_no, CTL_OF_SCB(scb)); |
| 4700 | |
| 4701 | /* |
| 4702 | * We have a valid scb to use on this WIDE_RESIDUE message, so |
| 4703 | * we need to walk the sg list looking for this particular sg |
| 4704 | * segment, then see if we happen to be at the very beginning of |
| 4705 | * the segment. If we are, then we have to back things up to |
| 4706 | * the previous segment. If not, then we simply need to remove |
| 4707 | * one byte from this segments address and add one to the byte |
| 4708 | * count. |
| 4709 | */ |
| 4710 | cur_addr = aic_inb(p, SHADDR) | (aic_inb(p, SHADDR + 1) << 8) | |
| 4711 | (aic_inb(p, SHADDR + 2) << 16) | (aic_inb(p, SHADDR + 3) << 24); |
| 4712 | sg_addr = aic_inb(p, SG_COUNT + 1) | (aic_inb(p, SG_COUNT + 2) << 8) | |
| 4713 | (aic_inb(p, SG_COUNT + 3) << 16) | (aic_inb(p, SG_COUNT + 4) << 24); |
| 4714 | resid_sgcnt = aic_inb(p, SCB_RESID_SGCNT); |
| 4715 | resid_dcnt = aic_inb(p, SCB_RESID_DCNT) | |
| 4716 | (aic_inb(p, SCB_RESID_DCNT + 1) << 8) | |
| 4717 | (aic_inb(p, SCB_RESID_DCNT + 2) << 16); |
| 4718 | index = scb->sg_count - ((resid_sgcnt) ? resid_sgcnt : 1); |
| 4719 | native_addr = le32_to_cpu(scb->sg_list[index].address); |
| 4720 | native_length = le32_to_cpu(scb->sg_list[index].length); |
| 4721 | /* |
| 4722 | * If resid_dcnt == native_length, then we just loaded this SG |
| 4723 | * segment and we need to back it up one... |
| 4724 | */ |
| 4725 | if(resid_dcnt == native_length) |
| 4726 | { |
| 4727 | if(index == 0) |
| 4728 | { |
| 4729 | /* |
| 4730 | * Oops, this isn't right, we can't back up to before the |
| 4731 | * beginning. This must be a bogus message, ignore it. |
| 4732 | */ |
| 4733 | break; |
| 4734 | } |
| 4735 | resid_dcnt = 1; |
| 4736 | resid_sgcnt += 1; |
| 4737 | native_addr = le32_to_cpu(scb->sg_list[index - 1].address); |
| 4738 | native_length = le32_to_cpu(scb->sg_list[index - 1].length); |
| 4739 | cur_addr = native_addr + (native_length - 1); |
| 4740 | sg_addr -= sizeof(struct hw_scatterlist); |
| 4741 | } |
| 4742 | else |
| 4743 | { |
| 4744 | /* |
| 4745 | * resid_dcnt != native_length, so we are in the middle of a SG |
| 4746 | * element. Back it up one byte and leave the rest alone. |
| 4747 | */ |
| 4748 | resid_dcnt += 1; |
| 4749 | cur_addr -= 1; |
| 4750 | } |
| 4751 | |
| 4752 | /* |
| 4753 | * Output the new addresses and counts to the right places on the |
| 4754 | * card. |
| 4755 | */ |
| 4756 | aic_outb(p, resid_sgcnt, SG_COUNT); |
| 4757 | aic_outb(p, resid_sgcnt, SCB_RESID_SGCNT); |
| 4758 | aic_outb(p, sg_addr & 0xff, SG_COUNT + 1); |
| 4759 | aic_outb(p, (sg_addr >> 8) & 0xff, SG_COUNT + 2); |
| 4760 | aic_outb(p, (sg_addr >> 16) & 0xff, SG_COUNT + 3); |
| 4761 | aic_outb(p, (sg_addr >> 24) & 0xff, SG_COUNT + 4); |
| 4762 | aic_outb(p, resid_dcnt & 0xff, SCB_RESID_DCNT); |
| 4763 | aic_outb(p, (resid_dcnt >> 8) & 0xff, SCB_RESID_DCNT + 1); |
| 4764 | aic_outb(p, (resid_dcnt >> 16) & 0xff, SCB_RESID_DCNT + 2); |
| 4765 | |
| 4766 | /* |
| 4767 | * The sequencer actually wants to find the new address |
| 4768 | * in the SHADDR register set. On the Ultra2 and later controllers |
| 4769 | * this register set is readonly. In order to get the right number |
| 4770 | * into the register, you actually have to enter it in HADDR and then |
| 4771 | * use the PRELOADEN bit of DFCNTRL to drop it through from the |
| 4772 | * HADDR register to the SHADDR register. On non-Ultra2 controllers, |
| 4773 | * we simply write it direct. |
| 4774 | */ |
| 4775 | if(p->features & AHC_ULTRA2) |
| 4776 | { |
| 4777 | /* |
| 4778 | * We might as well be accurate and drop both the resid_dcnt and |
| 4779 | * cur_addr into HCNT and HADDR and have both of them drop |
| 4780 | * through to the shadow layer together. |
| 4781 | */ |
| 4782 | aic_outb(p, resid_dcnt & 0xff, HCNT); |
| 4783 | aic_outb(p, (resid_dcnt >> 8) & 0xff, HCNT + 1); |
| 4784 | aic_outb(p, (resid_dcnt >> 16) & 0xff, HCNT + 2); |
| 4785 | aic_outb(p, cur_addr & 0xff, HADDR); |
| 4786 | aic_outb(p, (cur_addr >> 8) & 0xff, HADDR + 1); |
| 4787 | aic_outb(p, (cur_addr >> 16) & 0xff, HADDR + 2); |
| 4788 | aic_outb(p, (cur_addr >> 24) & 0xff, HADDR + 3); |
| 4789 | aic_outb(p, aic_inb(p, DMAPARAMS) | PRELOADEN, DFCNTRL); |
| 4790 | udelay(1); |
| 4791 | aic_outb(p, aic_inb(p, DMAPARAMS) & ~(SCSIEN|HDMAEN), DFCNTRL); |
| 4792 | i=0; |
| 4793 | while(((aic_inb(p, DFCNTRL) & (SCSIEN|HDMAEN)) != 0) && (i++ < 1000)) |
| 4794 | { |
| 4795 | udelay(1); |
| 4796 | } |
| 4797 | } |
| 4798 | else |
| 4799 | { |
| 4800 | aic_outb(p, cur_addr & 0xff, SHADDR); |
| 4801 | aic_outb(p, (cur_addr >> 8) & 0xff, SHADDR + 1); |
| 4802 | aic_outb(p, (cur_addr >> 16) & 0xff, SHADDR + 2); |
| 4803 | aic_outb(p, (cur_addr >> 24) & 0xff, SHADDR + 3); |
| 4804 | } |
| 4805 | } |
| 4806 | break; |
| 4807 | |
| 4808 | case SEQ_SG_FIXUP: |
| 4809 | { |
| 4810 | unsigned char scb_index, tmp; |
| 4811 | int sg_addr, sg_length; |
| 4812 | |
| 4813 | scb_index = aic_inb(p, SCB_TAG); |
| 4814 | |
| 4815 | if(scb_index > p->scb_data->numscbs) |
| 4816 | { |
| 4817 | printk(WARN_LEAD "invalid scb_index during SEQ_SG_FIXUP.\n", |
| 4818 | p->host_no, -1, -1, -1); |
| 4819 | printk(INFO_LEAD "SCSISIGI 0x%x, SEQADDR 0x%x, SSTAT0 0x%x, SSTAT1 " |
| 4820 | "0x%x\n", p->host_no, -1, -1, -1, |
| 4821 | aic_inb(p, SCSISIGI), |
| 4822 | aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8), |
| 4823 | aic_inb(p, SSTAT0), aic_inb(p, SSTAT1)); |
| 4824 | printk(INFO_LEAD "SG_CACHEPTR 0x%x, SSTAT2 0x%x, STCNT 0x%x\n", |
| 4825 | p->host_no, -1, -1, -1, aic_inb(p, SG_CACHEPTR), |
| 4826 | aic_inb(p, SSTAT2), aic_inb(p, STCNT + 2) << 16 | |
| 4827 | aic_inb(p, STCNT + 1) << 8 | aic_inb(p, STCNT)); |
| 4828 | /* |
| 4829 | * XXX: Add error handling here |
| 4830 | */ |
| 4831 | break; |
| 4832 | } |
| 4833 | scb = p->scb_data->scb_array[scb_index]; |
| 4834 | if(!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL)) |
| 4835 | { |
| 4836 | printk(WARN_LEAD "invalid scb during SEQ_SG_FIXUP flags:0x%x " |
| 4837 | "scb->cmd:0x%p\n", p->host_no, CTL_OF_SCB(scb), |
| 4838 | scb->flags, scb->cmd); |
| 4839 | printk(INFO_LEAD "SCSISIGI 0x%x, SEQADDR 0x%x, SSTAT0 0x%x, SSTAT1 " |
| 4840 | "0x%x\n", p->host_no, CTL_OF_SCB(scb), |
| 4841 | aic_inb(p, SCSISIGI), |
| 4842 | aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8), |
| 4843 | aic_inb(p, SSTAT0), aic_inb(p, SSTAT1)); |
| 4844 | printk(INFO_LEAD "SG_CACHEPTR 0x%x, SSTAT2 0x%x, STCNT 0x%x\n", |
| 4845 | p->host_no, CTL_OF_SCB(scb), aic_inb(p, SG_CACHEPTR), |
| 4846 | aic_inb(p, SSTAT2), aic_inb(p, STCNT + 2) << 16 | |
| 4847 | aic_inb(p, STCNT + 1) << 8 | aic_inb(p, STCNT)); |
| 4848 | break; |
| 4849 | } |
| 4850 | if(aic7xxx_verbose & VERBOSE_MINOR_ERROR) |
| 4851 | printk(INFO_LEAD "Fixing up SG address for sequencer.\n", p->host_no, |
| 4852 | CTL_OF_SCB(scb)); |
| 4853 | /* |
| 4854 | * Advance the SG pointer to the next element in the list |
| 4855 | */ |
| 4856 | tmp = aic_inb(p, SG_NEXT); |
| 4857 | tmp += SG_SIZEOF; |
| 4858 | aic_outb(p, tmp, SG_NEXT); |
| 4859 | if( tmp < SG_SIZEOF ) |
| 4860 | aic_outb(p, aic_inb(p, SG_NEXT + 1) + 1, SG_NEXT + 1); |
| 4861 | tmp = aic_inb(p, SG_COUNT) - 1; |
| 4862 | aic_outb(p, tmp, SG_COUNT); |
| 4863 | sg_addr = le32_to_cpu(scb->sg_list[scb->sg_count - tmp].address); |
| 4864 | sg_length = le32_to_cpu(scb->sg_list[scb->sg_count - tmp].length); |
| 4865 | /* |
| 4866 | * Now stuff the element we just advanced past down onto the |
| 4867 | * card so it can be stored in the residual area. |
| 4868 | */ |
| 4869 | aic_outb(p, sg_addr & 0xff, HADDR); |
| 4870 | aic_outb(p, (sg_addr >> 8) & 0xff, HADDR + 1); |
| 4871 | aic_outb(p, (sg_addr >> 16) & 0xff, HADDR + 2); |
| 4872 | aic_outb(p, (sg_addr >> 24) & 0xff, HADDR + 3); |
| 4873 | aic_outb(p, sg_length & 0xff, HCNT); |
| 4874 | aic_outb(p, (sg_length >> 8) & 0xff, HCNT + 1); |
| 4875 | aic_outb(p, (sg_length >> 16) & 0xff, HCNT + 2); |
| 4876 | aic_outb(p, (tmp << 2) | ((tmp == 1) ? LAST_SEG : 0), SG_CACHEPTR); |
| 4877 | aic_outb(p, aic_inb(p, DMAPARAMS), DFCNTRL); |
| 4878 | while(aic_inb(p, SSTAT0) & SDONE) udelay(1); |
| 4879 | while(aic_inb(p, DFCNTRL) & (HDMAEN|SCSIEN)) aic_outb(p, 0, DFCNTRL); |
| 4880 | } |
| 4881 | break; |
| 4882 | |
| 4883 | #ifdef AIC7XXX_NOT_YET |
| 4884 | case TRACEPOINT2: |
| 4885 | { |
| 4886 | printk(INFO_LEAD "Tracepoint #2 reached.\n", p->host_no, |
| 4887 | channel, target, lun); |
| 4888 | } |
| 4889 | break; |
| 4890 | |
| 4891 | /* XXX Fill these in later */ |
| 4892 | case MSG_BUFFER_BUSY: |
| 4893 | printk("aic7xxx: Message buffer busy.\n"); |
| 4894 | break; |
| 4895 | case MSGIN_PHASEMIS: |
| 4896 | printk("aic7xxx: Message-in phasemis.\n"); |
| 4897 | break; |
| 4898 | #endif |
| 4899 | |
| 4900 | default: /* unknown */ |
| 4901 | printk(WARN_LEAD "Unknown SEQINT, INTSTAT 0x%x, SCSISIGI 0x%x.\n", |
| 4902 | p->host_no, channel, target, lun, intstat, |
| 4903 | aic_inb(p, SCSISIGI)); |
| 4904 | break; |
| 4905 | } |
| 4906 | |
| 4907 | /* |
| 4908 | * Clear the sequencer interrupt and unpause the sequencer. |
| 4909 | */ |
| 4910 | unpause_sequencer(p, /* unpause always */ TRUE); |
| 4911 | } |
| 4912 | |
| 4913 | /*+F************************************************************************* |
| 4914 | * Function: |
| 4915 | * aic7xxx_parse_msg |
| 4916 | * |
| 4917 | * Description: |
| 4918 | * Parses incoming messages into actions on behalf of |
| 4919 | * aic7xxx_handle_reqinit |
| 4920 | *_F*************************************************************************/ |
| 4921 | static int |
| 4922 | aic7xxx_parse_msg(struct aic7xxx_host *p, struct aic7xxx_scb *scb) |
| 4923 | { |
| 4924 | int reject, reply, done; |
| 4925 | unsigned char target_scsirate, tindex; |
| 4926 | unsigned short target_mask; |
| 4927 | unsigned char target, channel, lun; |
| 4928 | unsigned char bus_width, new_bus_width; |
| 4929 | unsigned char trans_options, new_trans_options; |
| 4930 | unsigned int period, new_period, offset, new_offset, maxsync; |
| 4931 | struct aic7xxx_syncrate *syncrate; |
| 4932 | struct aic_dev_data *aic_dev; |
| 4933 | |
| 4934 | target = scb->cmd->device->id; |
| 4935 | channel = scb->cmd->device->channel; |
| 4936 | lun = scb->cmd->device->lun; |
| 4937 | reply = reject = done = FALSE; |
| 4938 | tindex = TARGET_INDEX(scb->cmd); |
| 4939 | aic_dev = AIC_DEV(scb->cmd); |
| 4940 | target_scsirate = aic_inb(p, TARG_SCSIRATE + tindex); |
| 4941 | target_mask = (0x01 << tindex); |
| 4942 | |
| 4943 | /* |
| 4944 | * Parse as much of the message as is available, |
| 4945 | * rejecting it if we don't support it. When |
| 4946 | * the entire message is available and has been |
| 4947 | * handled, return TRUE indicating that we have |
| 4948 | * parsed an entire message. |
| 4949 | */ |
| 4950 | |
| 4951 | if (p->msg_buf[0] != MSG_EXTENDED) |
| 4952 | { |
| 4953 | reject = TRUE; |
| 4954 | } |
| 4955 | |
| 4956 | /* |
| 4957 | * Even if we are an Ultra3 card, don't allow Ultra3 sync rates when |
| 4958 | * using the SDTR messages. We need the PPR messages to enable the |
| 4959 | * higher speeds that include things like Dual Edge clocking. |
| 4960 | */ |
| 4961 | if (p->features & AHC_ULTRA2) |
| 4962 | { |
| 4963 | if ( (aic_inb(p, SBLKCTL) & ENAB40) && |
| 4964 | !(aic_inb(p, SSTAT2) & EXP_ACTIVE) ) |
| 4965 | { |
| 4966 | if (p->features & AHC_ULTRA3) |
| 4967 | maxsync = AHC_SYNCRATE_ULTRA3; |
| 4968 | else |
| 4969 | maxsync = AHC_SYNCRATE_ULTRA2; |
| 4970 | } |
| 4971 | else |
| 4972 | { |
| 4973 | maxsync = AHC_SYNCRATE_ULTRA; |
| 4974 | } |
| 4975 | } |
| 4976 | else if (p->features & AHC_ULTRA) |
| 4977 | { |
| 4978 | maxsync = AHC_SYNCRATE_ULTRA; |
| 4979 | } |
| 4980 | else |
| 4981 | { |
| 4982 | maxsync = AHC_SYNCRATE_FAST; |
| 4983 | } |
| 4984 | |
| 4985 | /* |
| 4986 | * Just accept the length byte outright and perform |
| 4987 | * more checking once we know the message type. |
| 4988 | */ |
| 4989 | |
| 4990 | if ( !reject && (p->msg_len > 2) ) |
| 4991 | { |
| 4992 | switch(p->msg_buf[2]) |
| 4993 | { |
| 4994 | case MSG_EXT_SDTR: |
| 4995 | { |
| 4996 | |
| 4997 | if (p->msg_buf[1] != MSG_EXT_SDTR_LEN) |
| 4998 | { |
| 4999 | reject = TRUE; |
| 5000 | break; |
| 5001 | } |
| 5002 | |
| 5003 | if (p->msg_len < (MSG_EXT_SDTR_LEN + 2)) |
| 5004 | { |
| 5005 | break; |
| 5006 | } |
| 5007 | |
| 5008 | period = new_period = p->msg_buf[3]; |
| 5009 | offset = new_offset = p->msg_buf[4]; |
| 5010 | trans_options = new_trans_options = 0; |
| 5011 | bus_width = new_bus_width = target_scsirate & WIDEXFER; |
| 5012 | |
| 5013 | /* |
| 5014 | * If our current max syncrate is in the Ultra3 range, bump it back |
| 5015 | * down to Ultra2 since we can't negotiate DT transfers using SDTR |
| 5016 | */ |
| 5017 | if(maxsync == AHC_SYNCRATE_ULTRA3) |
| 5018 | maxsync = AHC_SYNCRATE_ULTRA2; |
| 5019 | |
| 5020 | /* |
| 5021 | * We might have a device that is starting negotiation with us |
| 5022 | * before we can start up negotiation with it....be prepared to |
| 5023 | * have a device ask for a higher speed then we want to give it |
| 5024 | * in that case |
| 5025 | */ |
| 5026 | if ( (scb->flags & (SCB_MSGOUT_SENT|SCB_MSGOUT_SDTR)) != |
| 5027 | (SCB_MSGOUT_SENT|SCB_MSGOUT_SDTR) ) |
| 5028 | { |
| 5029 | if (!(aic_dev->flags & DEVICE_DTR_SCANNED)) |
| 5030 | { |
| 5031 | /* |
| 5032 | * We shouldn't get here unless this is a narrow drive, wide |
| 5033 | * devices should trigger this same section of code in the WDTR |
| 5034 | * handler first instead. |
| 5035 | */ |
| 5036 | aic_dev->goal.width = MSG_EXT_WDTR_BUS_8_BIT; |
| 5037 | aic_dev->goal.options = 0; |
| 5038 | if(p->user[tindex].offset) |
| 5039 | { |
| 5040 | aic_dev->needsdtr_copy = 1; |
| 5041 | aic_dev->goal.period = max_t(unsigned char, 10,p->user[tindex].period); |
| 5042 | if(p->features & AHC_ULTRA2) |
| 5043 | { |
| 5044 | aic_dev->goal.offset = MAX_OFFSET_ULTRA2; |
| 5045 | } |
| 5046 | else |
| 5047 | { |
| 5048 | aic_dev->goal.offset = MAX_OFFSET_8BIT; |
| 5049 | } |
| 5050 | } |
| 5051 | else |
| 5052 | { |
| 5053 | aic_dev->needsdtr_copy = 0; |
| 5054 | aic_dev->goal.period = 255; |
| 5055 | aic_dev->goal.offset = 0; |
| 5056 | } |
| 5057 | aic_dev->flags |= DEVICE_DTR_SCANNED | DEVICE_PRINT_DTR; |
| 5058 | } |
| 5059 | else if (aic_dev->needsdtr_copy == 0) |
| 5060 | { |
| 5061 | /* |
| 5062 | * This is a preemptive message from the target, we've already |
| 5063 | * scanned this target and set our options for it, and we |
| 5064 | * don't need a SDTR with this target (for whatever reason), |
| 5065 | * so reject this incoming SDTR |
| 5066 | */ |
| 5067 | reject = TRUE; |
| 5068 | break; |
| 5069 | } |
| 5070 | |
| 5071 | /* The device is sending this message first and we have to reply */ |
| 5072 | reply = TRUE; |
| 5073 | |
| 5074 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) |
| 5075 | { |
| 5076 | printk(INFO_LEAD "Received pre-emptive SDTR message from " |
| 5077 | "target.\n", p->host_no, CTL_OF_SCB(scb)); |
| 5078 | } |
| 5079 | /* |
| 5080 | * Validate the values the device passed to us against our SEEPROM |
| 5081 | * settings. We don't have to do this if we aren't replying since |
| 5082 | * the device isn't allowed to send values greater than the ones |
| 5083 | * we first sent to it. |
| 5084 | */ |
| 5085 | new_period = max_t(unsigned int, period, aic_dev->goal.period); |
| 5086 | new_offset = min_t(unsigned int, offset, aic_dev->goal.offset); |
| 5087 | } |
| 5088 | |
| 5089 | /* |
| 5090 | * Use our new_period, new_offset, bus_width, and card options |
| 5091 | * to determine the actual syncrate settings |
| 5092 | */ |
| 5093 | syncrate = aic7xxx_find_syncrate(p, &new_period, maxsync, |
| 5094 | &trans_options); |
| 5095 | aic7xxx_validate_offset(p, syncrate, &new_offset, bus_width); |
| 5096 | |
| 5097 | /* |
| 5098 | * Did we drop to async? If so, send a reply regardless of whether |
| 5099 | * or not we initiated this negotiation. |
| 5100 | */ |
| 5101 | if ((new_offset == 0) && (new_offset != offset)) |
| 5102 | { |
| 5103 | aic_dev->needsdtr_copy = 0; |
| 5104 | reply = TRUE; |
| 5105 | } |
| 5106 | |
| 5107 | /* |
| 5108 | * Did we start this, if not, or if we went too low and had to |
| 5109 | * go async, then send an SDTR back to the target |
| 5110 | */ |
| 5111 | if(reply) |
| 5112 | { |
| 5113 | /* when sending a reply, make sure that the goal settings are |
| 5114 | * updated along with current and active since the code that |
| 5115 | * will actually build the message for the sequencer uses the |
| 5116 | * goal settings as its guidelines. |
| 5117 | */ |
| 5118 | aic7xxx_set_syncrate(p, syncrate, target, channel, new_period, |
| 5119 | new_offset, trans_options, |
| 5120 | AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR, |
| 5121 | aic_dev); |
| 5122 | scb->flags &= ~SCB_MSGOUT_BITS; |
| 5123 | scb->flags |= SCB_MSGOUT_SDTR; |
| 5124 | aic_outb(p, HOST_MSG, MSG_OUT); |
| 5125 | aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO); |
| 5126 | } |
| 5127 | else |
| 5128 | { |
| 5129 | aic7xxx_set_syncrate(p, syncrate, target, channel, new_period, |
| 5130 | new_offset, trans_options, |
| 5131 | AHC_TRANS_ACTIVE|AHC_TRANS_CUR, aic_dev); |
| 5132 | aic_dev->needsdtr = 0; |
| 5133 | } |
| 5134 | done = TRUE; |
| 5135 | break; |
| 5136 | } |
| 5137 | case MSG_EXT_WDTR: |
| 5138 | { |
| 5139 | |
| 5140 | if (p->msg_buf[1] != MSG_EXT_WDTR_LEN) |
| 5141 | { |
| 5142 | reject = TRUE; |
| 5143 | break; |
| 5144 | } |
| 5145 | |
| 5146 | if (p->msg_len < (MSG_EXT_WDTR_LEN + 2)) |
| 5147 | { |
| 5148 | break; |
| 5149 | } |
| 5150 | |
| 5151 | bus_width = new_bus_width = p->msg_buf[3]; |
| 5152 | |
| 5153 | if ( (scb->flags & (SCB_MSGOUT_SENT|SCB_MSGOUT_WDTR)) == |
| 5154 | (SCB_MSGOUT_SENT|SCB_MSGOUT_WDTR) ) |
| 5155 | { |
| 5156 | switch(bus_width) |
| 5157 | { |
| 5158 | default: |
| 5159 | { |
| 5160 | reject = TRUE; |
| 5161 | if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) && |
| 5162 | ((aic_dev->flags & DEVICE_PRINT_DTR) || |
| 5163 | (aic7xxx_verbose > 0xffff)) ) |
| 5164 | { |
| 5165 | printk(INFO_LEAD "Requesting %d bit transfers, rejecting.\n", |
| 5166 | p->host_no, CTL_OF_SCB(scb), 8 * (0x01 << bus_width)); |
| 5167 | } |
| 5168 | } /* We fall through on purpose */ |
| 5169 | case MSG_EXT_WDTR_BUS_8_BIT: |
| 5170 | { |
| 5171 | aic_dev->goal.width = MSG_EXT_WDTR_BUS_8_BIT; |
| 5172 | aic_dev->needwdtr_copy &= ~target_mask; |
| 5173 | break; |
| 5174 | } |
| 5175 | case MSG_EXT_WDTR_BUS_16_BIT: |
| 5176 | { |
| 5177 | break; |
| 5178 | } |
| 5179 | } |
| 5180 | aic_dev->needwdtr = 0; |
| 5181 | aic7xxx_set_width(p, target, channel, lun, new_bus_width, |
| 5182 | AHC_TRANS_ACTIVE|AHC_TRANS_CUR, aic_dev); |
| 5183 | } |
| 5184 | else |
| 5185 | { |
| 5186 | if ( !(aic_dev->flags & DEVICE_DTR_SCANNED) ) |
| 5187 | { |
| 5188 | /* |
| 5189 | * Well, we now know the WDTR and SYNC caps of this device since |
| 5190 | * it contacted us first, mark it as such and copy the user stuff |
| 5191 | * over to the goal stuff. |
| 5192 | */ |
| 5193 | if( (p->features & AHC_WIDE) && p->user[tindex].width ) |
| 5194 | { |
| 5195 | aic_dev->goal.width = MSG_EXT_WDTR_BUS_16_BIT; |
| 5196 | aic_dev->needwdtr_copy = 1; |
| 5197 | } |
| 5198 | |
| 5199 | /* |
| 5200 | * Devices that support DT transfers don't start WDTR requests |
| 5201 | */ |
| 5202 | aic_dev->goal.options = 0; |
| 5203 | |
| 5204 | if(p->user[tindex].offset) |
| 5205 | { |
| 5206 | aic_dev->needsdtr_copy = 1; |
| 5207 | aic_dev->goal.period = max_t(unsigned char, 10, p->user[tindex].period); |
| 5208 | if(p->features & AHC_ULTRA2) |
| 5209 | { |
| 5210 | aic_dev->goal.offset = MAX_OFFSET_ULTRA2; |
| 5211 | } |
| 5212 | else if( aic_dev->goal.width ) |
| 5213 | { |
| 5214 | aic_dev->goal.offset = MAX_OFFSET_16BIT; |
| 5215 | } |
| 5216 | else |
| 5217 | { |
| 5218 | aic_dev->goal.offset = MAX_OFFSET_8BIT; |
| 5219 | } |
| 5220 | } else { |
| 5221 | aic_dev->needsdtr_copy = 0; |
| 5222 | aic_dev->goal.period = 255; |
| 5223 | aic_dev->goal.offset = 0; |
| 5224 | } |
| 5225 | |
| 5226 | aic_dev->flags |= DEVICE_DTR_SCANNED | DEVICE_PRINT_DTR; |
| 5227 | } |
| 5228 | else if (aic_dev->needwdtr_copy == 0) |
| 5229 | { |
| 5230 | /* |
| 5231 | * This is a preemptive message from the target, we've already |
| 5232 | * scanned this target and set our options for it, and we |
| 5233 | * don't need a WDTR with this target (for whatever reason), |
| 5234 | * so reject this incoming WDTR |
| 5235 | */ |
| 5236 | reject = TRUE; |
| 5237 | break; |
| 5238 | } |
| 5239 | |
| 5240 | /* The device is sending this message first and we have to reply */ |
| 5241 | reply = TRUE; |
| 5242 | |
| 5243 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) |
| 5244 | { |
| 5245 | printk(INFO_LEAD "Received pre-emptive WDTR message from " |
| 5246 | "target.\n", p->host_no, CTL_OF_SCB(scb)); |
| 5247 | } |
| 5248 | switch(bus_width) |
| 5249 | { |
| 5250 | case MSG_EXT_WDTR_BUS_16_BIT: |
| 5251 | { |
| 5252 | if ( (p->features & AHC_WIDE) && |
| 5253 | (aic_dev->goal.width == MSG_EXT_WDTR_BUS_16_BIT) ) |
| 5254 | { |
| 5255 | new_bus_width = MSG_EXT_WDTR_BUS_16_BIT; |
| 5256 | break; |
| 5257 | } |
| 5258 | } /* Fall through if we aren't a wide card */ |
| 5259 | default: |
| 5260 | case MSG_EXT_WDTR_BUS_8_BIT: |
| 5261 | { |
| 5262 | aic_dev->needwdtr_copy = 0; |
| 5263 | new_bus_width = MSG_EXT_WDTR_BUS_8_BIT; |
| 5264 | break; |
| 5265 | } |
| 5266 | } |
| 5267 | scb->flags &= ~SCB_MSGOUT_BITS; |
| 5268 | scb->flags |= SCB_MSGOUT_WDTR; |
| 5269 | aic_dev->needwdtr = 0; |
| 5270 | if(aic_dev->dtr_pending == 0) |
| 5271 | { |
| 5272 | /* there is no other command with SCB_DTR_SCB already set that will |
| 5273 | * trigger the release of the dtr_pending bit. Both set the bit |
| 5274 | * and set scb->flags |= SCB_DTR_SCB |
| 5275 | */ |
| 5276 | aic_dev->dtr_pending = 1; |
| 5277 | scb->flags |= SCB_DTR_SCB; |
| 5278 | } |
| 5279 | aic_outb(p, HOST_MSG, MSG_OUT); |
| 5280 | aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO); |
| 5281 | /* when sending a reply, make sure that the goal settings are |
| 5282 | * updated along with current and active since the code that |
| 5283 | * will actually build the message for the sequencer uses the |
| 5284 | * goal settings as its guidelines. |
| 5285 | */ |
| 5286 | aic7xxx_set_width(p, target, channel, lun, new_bus_width, |
| 5287 | AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR, |
| 5288 | aic_dev); |
| 5289 | } |
| 5290 | |
| 5291 | /* |
| 5292 | * By virtue of the SCSI spec, a WDTR message negates any existing |
| 5293 | * SDTR negotiations. So, even if needsdtr isn't marked for this |
| 5294 | * device, we still have to do a new SDTR message if the device |
| 5295 | * supports SDTR at all. Therefore, we check needsdtr_copy instead |
| 5296 | * of needstr. |
| 5297 | */ |
| 5298 | aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0, |
| 5299 | AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE, |
| 5300 | aic_dev); |
| 5301 | aic_dev->needsdtr = aic_dev->needsdtr_copy; |
| 5302 | done = TRUE; |
| 5303 | break; |
| 5304 | } |
| 5305 | case MSG_EXT_PPR: |
| 5306 | { |
| 5307 | |
| 5308 | if (p->msg_buf[1] != MSG_EXT_PPR_LEN) |
| 5309 | { |
| 5310 | reject = TRUE; |
| 5311 | break; |
| 5312 | } |
| 5313 | |
| 5314 | if (p->msg_len < (MSG_EXT_PPR_LEN + 2)) |
| 5315 | { |
| 5316 | break; |
| 5317 | } |
| 5318 | |
| 5319 | period = new_period = p->msg_buf[3]; |
| 5320 | offset = new_offset = p->msg_buf[5]; |
| 5321 | bus_width = new_bus_width = p->msg_buf[6]; |
| 5322 | trans_options = new_trans_options = p->msg_buf[7] & 0xf; |
| 5323 | |
| 5324 | if(aic7xxx_verbose & VERBOSE_NEGOTIATION2) |
| 5325 | { |
| 5326 | printk(INFO_LEAD "Parsing PPR message (%d/%d/%d/%d)\n", |
| 5327 | p->host_no, CTL_OF_SCB(scb), period, offset, bus_width, |
| 5328 | trans_options); |
| 5329 | } |
| 5330 | |
| 5331 | /* |
| 5332 | * We might have a device that is starting negotiation with us |
| 5333 | * before we can start up negotiation with it....be prepared to |
| 5334 | * have a device ask for a higher speed then we want to give it |
| 5335 | * in that case |
| 5336 | */ |
| 5337 | if ( (scb->flags & (SCB_MSGOUT_SENT|SCB_MSGOUT_PPR)) != |
| 5338 | (SCB_MSGOUT_SENT|SCB_MSGOUT_PPR) ) |
| 5339 | { |
| 5340 | /* Have we scanned the device yet? */ |
| 5341 | if (!(aic_dev->flags & DEVICE_DTR_SCANNED)) |
| 5342 | { |
| 5343 | /* The device is electing to use PPR messages, so we will too until |
| 5344 | * we know better */ |
| 5345 | aic_dev->needppr = aic_dev->needppr_copy = 1; |
| 5346 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 0; |
| 5347 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 0; |
| 5348 | |
| 5349 | /* We know the device is SCSI-3 compliant due to PPR */ |
| 5350 | aic_dev->flags |= DEVICE_SCSI_3; |
| 5351 | |
| 5352 | /* |
| 5353 | * Not only is the device starting this up, but it also hasn't |
| 5354 | * been scanned yet, so this would likely be our TUR or our |
| 5355 | * INQUIRY command at scan time, so we need to use the |
| 5356 | * settings from the SEEPROM if they existed. Of course, even |
| 5357 | * if we didn't find a SEEPROM, we stuffed default values into |
| 5358 | * the user settings anyway, so use those in all cases. |
| 5359 | */ |
| 5360 | aic_dev->goal.width = p->user[tindex].width; |
| 5361 | if(p->user[tindex].offset) |
| 5362 | { |
| 5363 | aic_dev->goal.period = p->user[tindex].period; |
| 5364 | aic_dev->goal.options = p->user[tindex].options; |
| 5365 | if(p->features & AHC_ULTRA2) |
| 5366 | { |
| 5367 | aic_dev->goal.offset = MAX_OFFSET_ULTRA2; |
| 5368 | } |
| 5369 | else if( aic_dev->goal.width && |
| 5370 | (bus_width == MSG_EXT_WDTR_BUS_16_BIT) && |
| 5371 | p->features & AHC_WIDE ) |
| 5372 | { |
| 5373 | aic_dev->goal.offset = MAX_OFFSET_16BIT; |
| 5374 | } |
| 5375 | else |
| 5376 | { |
| 5377 | aic_dev->goal.offset = MAX_OFFSET_8BIT; |
| 5378 | } |
| 5379 | } |
| 5380 | else |
| 5381 | { |
| 5382 | aic_dev->goal.period = 255; |
| 5383 | aic_dev->goal.offset = 0; |
| 5384 | aic_dev->goal.options = 0; |
| 5385 | } |
| 5386 | aic_dev->flags |= DEVICE_DTR_SCANNED | DEVICE_PRINT_DTR; |
| 5387 | } |
| 5388 | else if (aic_dev->needppr_copy == 0) |
| 5389 | { |
| 5390 | /* |
| 5391 | * This is a preemptive message from the target, we've already |
| 5392 | * scanned this target and set our options for it, and we |
| 5393 | * don't need a PPR with this target (for whatever reason), |
| 5394 | * so reject this incoming PPR |
| 5395 | */ |
| 5396 | reject = TRUE; |
| 5397 | break; |
| 5398 | } |
| 5399 | |
| 5400 | /* The device is sending this message first and we have to reply */ |
| 5401 | reply = TRUE; |
| 5402 | |
| 5403 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) |
| 5404 | { |
| 5405 | printk(INFO_LEAD "Received pre-emptive PPR message from " |
| 5406 | "target.\n", p->host_no, CTL_OF_SCB(scb)); |
| 5407 | } |
| 5408 | |
| 5409 | } |
| 5410 | |
| 5411 | switch(bus_width) |
| 5412 | { |
| 5413 | case MSG_EXT_WDTR_BUS_16_BIT: |
| 5414 | { |
| 5415 | if ( (aic_dev->goal.width == MSG_EXT_WDTR_BUS_16_BIT) && |
| 5416 | p->features & AHC_WIDE) |
| 5417 | { |
| 5418 | break; |
| 5419 | } |
| 5420 | } |
| 5421 | default: |
| 5422 | { |
| 5423 | if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) && |
| 5424 | ((aic_dev->flags & DEVICE_PRINT_DTR) || |
| 5425 | (aic7xxx_verbose > 0xffff)) ) |
| 5426 | { |
| 5427 | reply = TRUE; |
| 5428 | printk(INFO_LEAD "Requesting %d bit transfers, rejecting.\n", |
| 5429 | p->host_no, CTL_OF_SCB(scb), 8 * (0x01 << bus_width)); |
| 5430 | } |
| 5431 | } /* We fall through on purpose */ |
| 5432 | case MSG_EXT_WDTR_BUS_8_BIT: |
| 5433 | { |
| 5434 | /* |
| 5435 | * According to the spec, if we aren't wide, we also can't be |
| 5436 | * Dual Edge so clear the options byte |
| 5437 | */ |
| 5438 | new_trans_options = 0; |
| 5439 | new_bus_width = MSG_EXT_WDTR_BUS_8_BIT; |
| 5440 | break; |
| 5441 | } |
| 5442 | } |
| 5443 | |
| 5444 | if(reply) |
| 5445 | { |
| 5446 | /* when sending a reply, make sure that the goal settings are |
| 5447 | * updated along with current and active since the code that |
| 5448 | * will actually build the message for the sequencer uses the |
| 5449 | * goal settings as its guidelines. |
| 5450 | */ |
| 5451 | aic7xxx_set_width(p, target, channel, lun, new_bus_width, |
| 5452 | AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR, |
| 5453 | aic_dev); |
| 5454 | syncrate = aic7xxx_find_syncrate(p, &new_period, maxsync, |
| 5455 | &new_trans_options); |
| 5456 | aic7xxx_validate_offset(p, syncrate, &new_offset, new_bus_width); |
| 5457 | aic7xxx_set_syncrate(p, syncrate, target, channel, new_period, |
| 5458 | new_offset, new_trans_options, |
| 5459 | AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR, |
| 5460 | aic_dev); |
| 5461 | } |
| 5462 | else |
| 5463 | { |
| 5464 | aic7xxx_set_width(p, target, channel, lun, new_bus_width, |
| 5465 | AHC_TRANS_ACTIVE|AHC_TRANS_CUR, aic_dev); |
| 5466 | syncrate = aic7xxx_find_syncrate(p, &new_period, maxsync, |
| 5467 | &new_trans_options); |
| 5468 | aic7xxx_validate_offset(p, syncrate, &new_offset, new_bus_width); |
| 5469 | aic7xxx_set_syncrate(p, syncrate, target, channel, new_period, |
| 5470 | new_offset, new_trans_options, |
| 5471 | AHC_TRANS_ACTIVE|AHC_TRANS_CUR, aic_dev); |
| 5472 | } |
| 5473 | |
| 5474 | /* |
| 5475 | * As it turns out, if we don't *have* to have PPR messages, then |
| 5476 | * configure ourselves not to use them since that makes some |
| 5477 | * external drive chassis work (those chassis can't parse PPR |
| 5478 | * messages and they mangle the SCSI bus until you send a WDTR |
| 5479 | * and SDTR that they can understand). |
| 5480 | */ |
| 5481 | if(new_trans_options == 0) |
| 5482 | { |
| 5483 | aic_dev->needppr = aic_dev->needppr_copy = 0; |
| 5484 | if(new_offset) |
| 5485 | { |
| 5486 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 1; |
| 5487 | } |
| 5488 | if (new_bus_width) |
| 5489 | { |
| 5490 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 1; |
| 5491 | } |
| 5492 | } |
| 5493 | |
| 5494 | if((new_offset == 0) && (offset != 0)) |
| 5495 | { |
| 5496 | /* |
| 5497 | * Oops, the syncrate went to low for this card and we fell off |
| 5498 | * to async (should never happen with a device that uses PPR |
| 5499 | * messages, but have to be complete) |
| 5500 | */ |
| 5501 | reply = TRUE; |
| 5502 | } |
| 5503 | |
| 5504 | if(reply) |
| 5505 | { |
| 5506 | scb->flags &= ~SCB_MSGOUT_BITS; |
| 5507 | scb->flags |= SCB_MSGOUT_PPR; |
| 5508 | aic_outb(p, HOST_MSG, MSG_OUT); |
| 5509 | aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO); |
| 5510 | } |
| 5511 | else |
| 5512 | { |
| 5513 | aic_dev->needppr = 0; |
| 5514 | } |
| 5515 | done = TRUE; |
| 5516 | break; |
| 5517 | } |
| 5518 | default: |
| 5519 | { |
| 5520 | reject = TRUE; |
| 5521 | break; |
| 5522 | } |
| 5523 | } /* end of switch(p->msg_type) */ |
| 5524 | } /* end of if (!reject && (p->msg_len > 2)) */ |
| 5525 | |
| 5526 | if (!reply && reject) |
| 5527 | { |
| 5528 | aic_outb(p, MSG_MESSAGE_REJECT, MSG_OUT); |
| 5529 | aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO); |
| 5530 | done = TRUE; |
| 5531 | } |
| 5532 | return(done); |
| 5533 | } |
| 5534 | |
| 5535 | |
| 5536 | /*+F************************************************************************* |
| 5537 | * Function: |
| 5538 | * aic7xxx_handle_reqinit |
| 5539 | * |
| 5540 | * Description: |
| 5541 | * Interrupt handler for REQINIT interrupts (used to transfer messages to |
| 5542 | * and from devices). |
| 5543 | *_F*************************************************************************/ |
| 5544 | static void |
| 5545 | aic7xxx_handle_reqinit(struct aic7xxx_host *p, struct aic7xxx_scb *scb) |
| 5546 | { |
| 5547 | unsigned char lastbyte; |
| 5548 | unsigned char phasemis; |
| 5549 | int done = FALSE; |
| 5550 | |
| 5551 | switch(p->msg_type) |
| 5552 | { |
| 5553 | case MSG_TYPE_INITIATOR_MSGOUT: |
| 5554 | { |
| 5555 | if (p->msg_len == 0) |
| 5556 | panic("aic7xxx: REQINIT with no active message!\n"); |
| 5557 | |
| 5558 | lastbyte = (p->msg_index == (p->msg_len - 1)); |
| 5559 | phasemis = ( aic_inb(p, SCSISIGI) & PHASE_MASK) != P_MESGOUT; |
| 5560 | |
| 5561 | if (lastbyte || phasemis) |
| 5562 | { |
| 5563 | /* Time to end the message */ |
| 5564 | p->msg_len = 0; |
| 5565 | p->msg_type = MSG_TYPE_NONE; |
| 5566 | /* |
| 5567 | * NOTE-TO-MYSELF: If you clear the REQINIT after you |
| 5568 | * disable REQINITs, then cases of REJECT_MSG stop working |
| 5569 | * and hang the bus |
| 5570 | */ |
| 5571 | aic_outb(p, aic_inb(p, SIMODE1) & ~ENREQINIT, SIMODE1); |
| 5572 | aic_outb(p, CLRSCSIINT, CLRINT); |
| 5573 | p->flags &= ~AHC_HANDLING_REQINITS; |
| 5574 | |
| 5575 | if (phasemis == 0) |
| 5576 | { |
| 5577 | aic_outb(p, p->msg_buf[p->msg_index], SINDEX); |
| 5578 | aic_outb(p, 0, RETURN_1); |
| 5579 | #ifdef AIC7XXX_VERBOSE_DEBUGGING |
| 5580 | if (aic7xxx_verbose > 0xffff) |
| 5581 | printk(INFO_LEAD "Completed sending of REQINIT message.\n", |
| 5582 | p->host_no, CTL_OF_SCB(scb)); |
| 5583 | #endif |
| 5584 | } |
| 5585 | else |
| 5586 | { |
| 5587 | aic_outb(p, MSGOUT_PHASEMIS, RETURN_1); |
| 5588 | #ifdef AIC7XXX_VERBOSE_DEBUGGING |
| 5589 | if (aic7xxx_verbose > 0xffff) |
| 5590 | printk(INFO_LEAD "PHASEMIS while sending REQINIT message.\n", |
| 5591 | p->host_no, CTL_OF_SCB(scb)); |
| 5592 | #endif |
| 5593 | } |
| 5594 | unpause_sequencer(p, TRUE); |
| 5595 | } |
| 5596 | else |
| 5597 | { |
| 5598 | /* |
| 5599 | * Present the byte on the bus (clearing REQINIT) but don't |
| 5600 | * unpause the sequencer. |
| 5601 | */ |
| 5602 | aic_outb(p, CLRREQINIT, CLRSINT1); |
| 5603 | aic_outb(p, CLRSCSIINT, CLRINT); |
| 5604 | aic_outb(p, p->msg_buf[p->msg_index++], SCSIDATL); |
| 5605 | } |
| 5606 | break; |
| 5607 | } |
| 5608 | case MSG_TYPE_INITIATOR_MSGIN: |
| 5609 | { |
| 5610 | phasemis = ( aic_inb(p, SCSISIGI) & PHASE_MASK ) != P_MESGIN; |
| 5611 | |
| 5612 | if (phasemis == 0) |
| 5613 | { |
| 5614 | p->msg_len++; |
| 5615 | /* Pull the byte in without acking it */ |
| 5616 | p->msg_buf[p->msg_index] = aic_inb(p, SCSIBUSL); |
| 5617 | done = aic7xxx_parse_msg(p, scb); |
| 5618 | /* Ack the byte */ |
| 5619 | aic_outb(p, CLRREQINIT, CLRSINT1); |
| 5620 | aic_outb(p, CLRSCSIINT, CLRINT); |
| 5621 | aic_inb(p, SCSIDATL); |
| 5622 | p->msg_index++; |
| 5623 | } |
| 5624 | if (phasemis || done) |
| 5625 | { |
| 5626 | #ifdef AIC7XXX_VERBOSE_DEBUGGING |
| 5627 | if (aic7xxx_verbose > 0xffff) |
| 5628 | { |
| 5629 | if (phasemis) |
| 5630 | printk(INFO_LEAD "PHASEMIS while receiving REQINIT message.\n", |
| 5631 | p->host_no, CTL_OF_SCB(scb)); |
| 5632 | else |
| 5633 | printk(INFO_LEAD "Completed receipt of REQINIT message.\n", |
| 5634 | p->host_no, CTL_OF_SCB(scb)); |
| 5635 | } |
| 5636 | #endif |
| 5637 | /* Time to end our message session */ |
| 5638 | p->msg_len = 0; |
| 5639 | p->msg_type = MSG_TYPE_NONE; |
| 5640 | aic_outb(p, aic_inb(p, SIMODE1) & ~ENREQINIT, SIMODE1); |
| 5641 | aic_outb(p, CLRSCSIINT, CLRINT); |
| 5642 | p->flags &= ~AHC_HANDLING_REQINITS; |
| 5643 | unpause_sequencer(p, TRUE); |
| 5644 | } |
| 5645 | break; |
| 5646 | } |
| 5647 | default: |
| 5648 | { |
| 5649 | panic("aic7xxx: Unknown REQINIT message type.\n"); |
| 5650 | break; |
| 5651 | } |
| 5652 | } /* End of switch(p->msg_type) */ |
| 5653 | } |
| 5654 | |
| 5655 | /*+F************************************************************************* |
| 5656 | * Function: |
| 5657 | * aic7xxx_handle_scsiint |
| 5658 | * |
| 5659 | * Description: |
| 5660 | * Interrupt handler for SCSI interrupts (SCSIINT). |
| 5661 | *-F*************************************************************************/ |
| 5662 | static void |
| 5663 | aic7xxx_handle_scsiint(struct aic7xxx_host *p, unsigned char intstat) |
| 5664 | { |
| 5665 | unsigned char scb_index; |
| 5666 | unsigned char status; |
| 5667 | struct aic7xxx_scb *scb; |
| 5668 | struct aic_dev_data *aic_dev; |
| 5669 | |
| 5670 | scb_index = aic_inb(p, SCB_TAG); |
| 5671 | status = aic_inb(p, SSTAT1); |
| 5672 | |
| 5673 | if (scb_index < p->scb_data->numscbs) |
| 5674 | { |
| 5675 | scb = p->scb_data->scb_array[scb_index]; |
| 5676 | if ((scb->flags & SCB_ACTIVE) == 0) |
| 5677 | { |
| 5678 | scb = NULL; |
| 5679 | } |
| 5680 | } |
| 5681 | else |
| 5682 | { |
| 5683 | scb = NULL; |
| 5684 | } |
| 5685 | |
| 5686 | |
| 5687 | if ((status & SCSIRSTI) != 0) |
| 5688 | { |
| 5689 | int channel; |
| 5690 | |
| 5691 | if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 ) |
| 5692 | channel = (aic_inb(p, SBLKCTL) & SELBUSB) >> 3; |
| 5693 | else |
| 5694 | channel = 0; |
| 5695 | |
| 5696 | if (aic7xxx_verbose & VERBOSE_RESET) |
| 5697 | printk(WARN_LEAD "Someone else reset the channel!!\n", |
| 5698 | p->host_no, channel, -1, -1); |
| 5699 | if (aic7xxx_panic_on_abort) |
| 5700 | aic7xxx_panic_abort(p, NULL); |
| 5701 | /* |
| 5702 | * Go through and abort all commands for the channel, but do not |
| 5703 | * reset the channel again. |
| 5704 | */ |
| 5705 | aic7xxx_reset_channel(p, channel, /* Initiate Reset */ FALSE); |
| 5706 | aic7xxx_run_done_queue(p, TRUE); |
| 5707 | scb = NULL; |
| 5708 | } |
| 5709 | else if ( ((status & BUSFREE) != 0) && ((status & SELTO) == 0) ) |
| 5710 | { |
| 5711 | /* |
| 5712 | * First look at what phase we were last in. If it's message-out, |
| 5713 | * chances are pretty good that the bus free was in response to |
| 5714 | * one of our abort requests. |
| 5715 | */ |
| 5716 | unsigned char lastphase = aic_inb(p, LASTPHASE); |
| 5717 | unsigned char saved_tcl = aic_inb(p, SAVED_TCL); |
| 5718 | unsigned char target = (saved_tcl >> 4) & 0x0F; |
| 5719 | int channel; |
| 5720 | int printerror = TRUE; |
| 5721 | |
| 5722 | if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 ) |
| 5723 | channel = (aic_inb(p, SBLKCTL) & SELBUSB) >> 3; |
| 5724 | else |
| 5725 | channel = 0; |
| 5726 | |
| 5727 | aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP), |
| 5728 | SCSISEQ); |
| 5729 | if (lastphase == P_MESGOUT) |
| 5730 | { |
| 5731 | unsigned char message; |
| 5732 | |
| 5733 | message = aic_inb(p, SINDEX); |
| 5734 | |
| 5735 | if ((message == MSG_ABORT) || (message == MSG_ABORT_TAG)) |
| 5736 | { |
| 5737 | if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS) |
| 5738 | printk(INFO_LEAD "SCB %d abort delivered.\n", p->host_no, |
| 5739 | CTL_OF_SCB(scb), scb->hscb->tag); |
| 5740 | aic7xxx_reset_device(p, target, channel, ALL_LUNS, |
| 5741 | (message == MSG_ABORT) ? SCB_LIST_NULL : scb->hscb->tag ); |
| 5742 | aic7xxx_run_done_queue(p, TRUE); |
| 5743 | scb = NULL; |
| 5744 | printerror = 0; |
| 5745 | } |
| 5746 | else if (message == MSG_BUS_DEV_RESET) |
| 5747 | { |
| 5748 | aic7xxx_handle_device_reset(p, target, channel); |
| 5749 | scb = NULL; |
| 5750 | printerror = 0; |
| 5751 | } |
| 5752 | } |
| 5753 | if ( (scb != NULL) && (scb->flags & SCB_DTR_SCB) ) |
| 5754 | { |
| 5755 | /* |
| 5756 | * Hmmm...error during a negotiation command. Either we have a |
| 5757 | * borken bus, or the device doesn't like our negotiation message. |
| 5758 | * Since we check the INQUIRY data of a device before sending it |
| 5759 | * negotiation messages, assume the bus is borken for whatever |
| 5760 | * reason. Complete the command. |
| 5761 | */ |
| 5762 | printerror = 0; |
| 5763 | aic7xxx_reset_device(p, target, channel, ALL_LUNS, scb->hscb->tag); |
| 5764 | aic7xxx_run_done_queue(p, TRUE); |
| 5765 | scb = NULL; |
| 5766 | } |
| 5767 | if (printerror != 0) |
| 5768 | { |
| 5769 | if (scb != NULL) |
| 5770 | { |
| 5771 | unsigned char tag; |
| 5772 | |
| 5773 | if ((scb->hscb->control & TAG_ENB) != 0) |
| 5774 | { |
| 5775 | tag = scb->hscb->tag; |
| 5776 | } |
| 5777 | else |
| 5778 | { |
| 5779 | tag = SCB_LIST_NULL; |
| 5780 | } |
| 5781 | aic7xxx_reset_device(p, target, channel, ALL_LUNS, tag); |
| 5782 | aic7xxx_run_done_queue(p, TRUE); |
| 5783 | } |
| 5784 | else |
| 5785 | { |
| 5786 | aic7xxx_reset_device(p, target, channel, ALL_LUNS, SCB_LIST_NULL); |
| 5787 | aic7xxx_run_done_queue(p, TRUE); |
| 5788 | } |
| 5789 | printk(INFO_LEAD "Unexpected busfree, LASTPHASE = 0x%x, " |
| 5790 | "SEQADDR = 0x%x\n", p->host_no, channel, target, -1, lastphase, |
| 5791 | (aic_inb(p, SEQADDR1) << 8) | aic_inb(p, SEQADDR0)); |
| 5792 | scb = NULL; |
| 5793 | } |
| 5794 | aic_outb(p, MSG_NOOP, MSG_OUT); |
| 5795 | aic_outb(p, aic_inb(p, SIMODE1) & ~(ENBUSFREE|ENREQINIT), |
| 5796 | SIMODE1); |
| 5797 | p->flags &= ~AHC_HANDLING_REQINITS; |
| 5798 | aic_outb(p, CLRBUSFREE, CLRSINT1); |
| 5799 | aic_outb(p, CLRSCSIINT, CLRINT); |
| 5800 | restart_sequencer(p); |
| 5801 | unpause_sequencer(p, TRUE); |
| 5802 | } |
| 5803 | else if ((status & SELTO) != 0) |
| 5804 | { |
| 5805 | unsigned char scbptr; |
| 5806 | unsigned char nextscb; |
| 5807 | Scsi_Cmnd *cmd; |
| 5808 | |
| 5809 | scbptr = aic_inb(p, WAITING_SCBH); |
| 5810 | if (scbptr > p->scb_data->maxhscbs) |
| 5811 | { |
| 5812 | /* |
| 5813 | * I'm still trying to track down exactly how this happens, but until |
| 5814 | * I find it, this code will make sure we aren't passing bogus values |
| 5815 | * into the SCBPTR register, even if that register will just wrap |
| 5816 | * things around, we still don't like having out of range variables. |
| 5817 | * |
| 5818 | * NOTE: Don't check the aic7xxx_verbose variable, I want this message |
| 5819 | * to always be displayed. |
| 5820 | */ |
| 5821 | printk(INFO_LEAD "Invalid WAITING_SCBH value %d, improvising.\n", |
| 5822 | p->host_no, -1, -1, -1, scbptr); |
| 5823 | if (p->scb_data->maxhscbs > 4) |
| 5824 | scbptr &= (p->scb_data->maxhscbs - 1); |
| 5825 | else |
| 5826 | scbptr &= 0x03; |
| 5827 | } |
| 5828 | aic_outb(p, scbptr, SCBPTR); |
| 5829 | scb_index = aic_inb(p, SCB_TAG); |
| 5830 | |
| 5831 | scb = NULL; |
| 5832 | if (scb_index < p->scb_data->numscbs) |
| 5833 | { |
| 5834 | scb = p->scb_data->scb_array[scb_index]; |
| 5835 | if ((scb->flags & SCB_ACTIVE) == 0) |
| 5836 | { |
| 5837 | scb = NULL; |
| 5838 | } |
| 5839 | } |
| 5840 | if (scb == NULL) |
| 5841 | { |
| 5842 | printk(WARN_LEAD "Referenced SCB %d not valid during SELTO.\n", |
| 5843 | p->host_no, -1, -1, -1, scb_index); |
| 5844 | printk(KERN_WARNING " SCSISEQ = 0x%x SEQADDR = 0x%x SSTAT0 = 0x%x " |
| 5845 | "SSTAT1 = 0x%x\n", aic_inb(p, SCSISEQ), |
| 5846 | aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8), |
| 5847 | aic_inb(p, SSTAT0), aic_inb(p, SSTAT1)); |
| 5848 | if (aic7xxx_panic_on_abort) |
| 5849 | aic7xxx_panic_abort(p, NULL); |
| 5850 | } |
| 5851 | else |
| 5852 | { |
| 5853 | cmd = scb->cmd; |
| 5854 | cmd->result = (DID_TIME_OUT << 16); |
| 5855 | |
| 5856 | /* |
| 5857 | * Clear out this hardware SCB |
| 5858 | */ |
| 5859 | aic_outb(p, 0, SCB_CONTROL); |
| 5860 | |
| 5861 | /* |
| 5862 | * Clear out a few values in the card that are in an undetermined |
| 5863 | * state. |
| 5864 | */ |
| 5865 | aic_outb(p, MSG_NOOP, MSG_OUT); |
| 5866 | |
| 5867 | /* |
| 5868 | * Shift the waiting for selection queue forward |
| 5869 | */ |
| 5870 | nextscb = aic_inb(p, SCB_NEXT); |
| 5871 | aic_outb(p, nextscb, WAITING_SCBH); |
| 5872 | |
| 5873 | /* |
| 5874 | * Put this SCB back on the free list. |
| 5875 | */ |
| 5876 | aic7xxx_add_curscb_to_free_list(p); |
| 5877 | #ifdef AIC7XXX_VERBOSE_DEBUGGING |
| 5878 | if (aic7xxx_verbose > 0xffff) |
| 5879 | printk(INFO_LEAD "Selection Timeout.\n", p->host_no, CTL_OF_SCB(scb)); |
| 5880 | #endif |
| 5881 | if (scb->flags & SCB_QUEUED_ABORT) |
| 5882 | { |
| 5883 | /* |
| 5884 | * We know that this particular SCB had to be the queued abort since |
| 5885 | * the disconnected SCB would have gotten a reconnect instead. |
| 5886 | * What we need to do then is to let the command timeout again so |
| 5887 | * we get a reset since this abort just failed. |
| 5888 | */ |
| 5889 | cmd->result = 0; |
| 5890 | scb = NULL; |
| 5891 | } |
| 5892 | } |
| 5893 | /* |
| 5894 | * Keep the sequencer from trying to restart any selections |
| 5895 | */ |
| 5896 | aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ); |
| 5897 | /* |
| 5898 | * Make sure the data bits on the bus are released |
| 5899 | * Don't do this on 7770 chipsets, it makes them give us |
| 5900 | * a BRKADDRINT and kills the card. |
| 5901 | */ |
| 5902 | if( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI ) |
| 5903 | aic_outb(p, 0, SCSIBUSL); |
| 5904 | |
| 5905 | /* |
| 5906 | * Delay for the selection timeout delay period then stop the selection |
| 5907 | */ |
| 5908 | udelay(301); |
| 5909 | aic_outb(p, CLRSELINGO, CLRSINT0); |
| 5910 | /* |
| 5911 | * Clear out all the interrupt status bits |
| 5912 | */ |
| 5913 | aic_outb(p, aic_inb(p, SIMODE1) & ~(ENREQINIT|ENBUSFREE), SIMODE1); |
| 5914 | p->flags &= ~AHC_HANDLING_REQINITS; |
| 5915 | aic_outb(p, CLRSELTIMEO | CLRBUSFREE, CLRSINT1); |
| 5916 | aic_outb(p, CLRSCSIINT, CLRINT); |
| 5917 | /* |
| 5918 | * Restarting the sequencer will stop the selection and make sure devices |
| 5919 | * are allowed to reselect in. |
| 5920 | */ |
| 5921 | restart_sequencer(p); |
| 5922 | unpause_sequencer(p, TRUE); |
| 5923 | } |
| 5924 | else if (scb == NULL) |
| 5925 | { |
| 5926 | printk(WARN_LEAD "aic7xxx_isr - referenced scb not valid " |
| 5927 | "during scsiint 0x%x scb(%d)\n" |
| 5928 | " SIMODE0 0x%x, SIMODE1 0x%x, SSTAT0 0x%x, SEQADDR 0x%x\n", |
| 5929 | p->host_no, -1, -1, -1, status, scb_index, aic_inb(p, SIMODE0), |
| 5930 | aic_inb(p, SIMODE1), aic_inb(p, SSTAT0), |
| 5931 | (aic_inb(p, SEQADDR1) << 8) | aic_inb(p, SEQADDR0)); |
| 5932 | /* |
| 5933 | * Turn off the interrupt and set status to zero, so that it |
| 5934 | * falls through the rest of the SCSIINT code. |
| 5935 | */ |
| 5936 | aic_outb(p, status, CLRSINT1); |
| 5937 | aic_outb(p, CLRSCSIINT, CLRINT); |
| 5938 | unpause_sequencer(p, /* unpause always */ TRUE); |
| 5939 | scb = NULL; |
| 5940 | } |
| 5941 | else if (status & SCSIPERR) |
| 5942 | { |
| 5943 | /* |
| 5944 | * Determine the bus phase and queue an appropriate message. |
| 5945 | */ |
| 5946 | char *phase; |
| 5947 | Scsi_Cmnd *cmd; |
| 5948 | unsigned char mesg_out = MSG_NOOP; |
| 5949 | unsigned char lastphase = aic_inb(p, LASTPHASE); |
| 5950 | unsigned char sstat2 = aic_inb(p, SSTAT2); |
| 5951 | |
| 5952 | cmd = scb->cmd; |
| 5953 | switch (lastphase) |
| 5954 | { |
| 5955 | case P_DATAOUT: |
| 5956 | phase = "Data-Out"; |
| 5957 | break; |
| 5958 | case P_DATAIN: |
| 5959 | phase = "Data-In"; |
| 5960 | mesg_out = MSG_INITIATOR_DET_ERR; |
| 5961 | break; |
| 5962 | case P_COMMAND: |
| 5963 | phase = "Command"; |
| 5964 | break; |
| 5965 | case P_MESGOUT: |
| 5966 | phase = "Message-Out"; |
| 5967 | break; |
| 5968 | case P_STATUS: |
| 5969 | phase = "Status"; |
| 5970 | mesg_out = MSG_INITIATOR_DET_ERR; |
| 5971 | break; |
| 5972 | case P_MESGIN: |
| 5973 | phase = "Message-In"; |
| 5974 | mesg_out = MSG_PARITY_ERROR; |
| 5975 | break; |
| 5976 | default: |
| 5977 | phase = "unknown"; |
| 5978 | break; |
| 5979 | } |
| 5980 | |
| 5981 | /* |
| 5982 | * A parity error has occurred during a data |
| 5983 | * transfer phase. Flag it and continue. |
| 5984 | */ |
| 5985 | if( (p->features & AHC_ULTRA3) && |
| 5986 | (aic_inb(p, SCSIRATE) & AHC_SYNCRATE_CRC) && |
| 5987 | (lastphase == P_DATAIN) ) |
| 5988 | { |
| 5989 | printk(WARN_LEAD "CRC error during %s phase.\n", |
| 5990 | p->host_no, CTL_OF_SCB(scb), phase); |
| 5991 | if(sstat2 & CRCVALERR) |
| 5992 | { |
| 5993 | printk(WARN_LEAD " CRC error in intermediate CRC packet.\n", |
| 5994 | p->host_no, CTL_OF_SCB(scb)); |
| 5995 | } |
| 5996 | if(sstat2 & CRCENDERR) |
| 5997 | { |
| 5998 | printk(WARN_LEAD " CRC error in ending CRC packet.\n", |
| 5999 | p->host_no, CTL_OF_SCB(scb)); |
| 6000 | } |
| 6001 | if(sstat2 & CRCREQERR) |
| 6002 | { |
| 6003 | printk(WARN_LEAD " Target incorrectly requested a CRC packet.\n", |
| 6004 | p->host_no, CTL_OF_SCB(scb)); |
| 6005 | } |
| 6006 | if(sstat2 & DUAL_EDGE_ERROR) |
| 6007 | { |
| 6008 | printk(WARN_LEAD " Dual Edge transmission error.\n", |
| 6009 | p->host_no, CTL_OF_SCB(scb)); |
| 6010 | } |
| 6011 | } |
| 6012 | else if( (lastphase == P_MESGOUT) && |
| 6013 | (scb->flags & SCB_MSGOUT_PPR) ) |
| 6014 | { |
| 6015 | /* |
| 6016 | * As per the draft specs, any device capable of supporting any of |
| 6017 | * the option values other than 0 are not allowed to reject the |
| 6018 | * PPR message. Instead, they must negotiate out what they do |
| 6019 | * support instead of rejecting our offering or else they cause |
| 6020 | * a parity error during msg_out phase to signal that they don't |
| 6021 | * like our settings. |
| 6022 | */ |
| 6023 | aic_dev = AIC_DEV(scb->cmd); |
| 6024 | aic_dev->needppr = aic_dev->needppr_copy = 0; |
| 6025 | aic7xxx_set_width(p, scb->cmd->device->id, scb->cmd->device->channel, scb->cmd->device->lun, |
| 6026 | MSG_EXT_WDTR_BUS_8_BIT, |
| 6027 | (AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE), |
| 6028 | aic_dev); |
| 6029 | aic7xxx_set_syncrate(p, NULL, scb->cmd->device->id, scb->cmd->device->channel, 0, 0, |
| 6030 | 0, AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE, |
| 6031 | aic_dev); |
| 6032 | aic_dev->goal.options = 0; |
| 6033 | scb->flags &= ~SCB_MSGOUT_BITS; |
| 6034 | if(aic7xxx_verbose & VERBOSE_NEGOTIATION2) |
| 6035 | { |
| 6036 | printk(INFO_LEAD "parity error during PPR message, reverting " |
| 6037 | "to WDTR/SDTR\n", p->host_no, CTL_OF_SCB(scb)); |
| 6038 | } |
| 6039 | if ( aic_dev->goal.width ) |
| 6040 | { |
| 6041 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 1; |
| 6042 | } |
| 6043 | if ( aic_dev->goal.offset ) |
| 6044 | { |
| 6045 | if( aic_dev->goal.period <= 9 ) |
| 6046 | { |
| 6047 | aic_dev->goal.period = 10; |
| 6048 | } |
| 6049 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 1; |
| 6050 | } |
| 6051 | scb = NULL; |
| 6052 | } |
| 6053 | |
| 6054 | /* |
| 6055 | * We've set the hardware to assert ATN if we get a parity |
| 6056 | * error on "in" phases, so all we need to do is stuff the |
| 6057 | * message buffer with the appropriate message. "In" phases |
| 6058 | * have set mesg_out to something other than MSG_NOP. |
| 6059 | */ |
| 6060 | if (mesg_out != MSG_NOOP) |
| 6061 | { |
| 6062 | aic_outb(p, mesg_out, MSG_OUT); |
| 6063 | aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO); |
| 6064 | scb = NULL; |
| 6065 | } |
| 6066 | aic_outb(p, CLRSCSIPERR, CLRSINT1); |
| 6067 | aic_outb(p, CLRSCSIINT, CLRINT); |
| 6068 | unpause_sequencer(p, /* unpause_always */ TRUE); |
| 6069 | } |
| 6070 | else if ( (status & REQINIT) && |
| 6071 | (p->flags & AHC_HANDLING_REQINITS) ) |
| 6072 | { |
| 6073 | #ifdef AIC7XXX_VERBOSE_DEBUGGING |
| 6074 | if (aic7xxx_verbose > 0xffff) |
| 6075 | printk(INFO_LEAD "Handling REQINIT, SSTAT1=0x%x.\n", p->host_no, |
| 6076 | CTL_OF_SCB(scb), aic_inb(p, SSTAT1)); |
| 6077 | #endif |
| 6078 | aic7xxx_handle_reqinit(p, scb); |
| 6079 | return; |
| 6080 | } |
| 6081 | else |
| 6082 | { |
| 6083 | /* |
| 6084 | * We don't know what's going on. Turn off the |
| 6085 | * interrupt source and try to continue. |
| 6086 | */ |
| 6087 | if (aic7xxx_verbose & VERBOSE_SCSIINT) |
| 6088 | printk(INFO_LEAD "Unknown SCSIINT status, SSTAT1(0x%x).\n", |
| 6089 | p->host_no, -1, -1, -1, status); |
| 6090 | aic_outb(p, status, CLRSINT1); |
| 6091 | aic_outb(p, CLRSCSIINT, CLRINT); |
| 6092 | unpause_sequencer(p, /* unpause always */ TRUE); |
| 6093 | scb = NULL; |
| 6094 | } |
| 6095 | if (scb != NULL) |
| 6096 | { |
| 6097 | aic7xxx_done(p, scb); |
| 6098 | } |
| 6099 | } |
| 6100 | |
| 6101 | #ifdef AIC7XXX_VERBOSE_DEBUGGING |
| 6102 | static void |
| 6103 | aic7xxx_check_scbs(struct aic7xxx_host *p, char *buffer) |
| 6104 | { |
| 6105 | unsigned char saved_scbptr, free_scbh, dis_scbh, wait_scbh, temp; |
| 6106 | int i, bogus, lost; |
| 6107 | static unsigned char scb_status[AIC7XXX_MAXSCB]; |
| 6108 | |
| 6109 | #define SCB_NO_LIST 0 |
| 6110 | #define SCB_FREE_LIST 1 |
| 6111 | #define SCB_WAITING_LIST 2 |
| 6112 | #define SCB_DISCONNECTED_LIST 4 |
| 6113 | #define SCB_CURRENTLY_ACTIVE 8 |
| 6114 | |
| 6115 | /* |
| 6116 | * Note, these checks will fail on a regular basis once the machine moves |
| 6117 | * beyond the bus scan phase. The problem is race conditions concerning |
| 6118 | * the scbs and where they are linked in. When you have 30 or so commands |
| 6119 | * outstanding on the bus, and run this twice with every interrupt, the |
| 6120 | * chances get pretty good that you'll catch the sequencer with an SCB |
| 6121 | * only partially linked in. Therefore, once we pass the scan phase |
| 6122 | * of the bus, we really should disable this function. |
| 6123 | */ |
| 6124 | bogus = FALSE; |
| 6125 | memset(&scb_status[0], 0, sizeof(scb_status)); |
| 6126 | pause_sequencer(p); |
| 6127 | saved_scbptr = aic_inb(p, SCBPTR); |
| 6128 | if (saved_scbptr >= p->scb_data->maxhscbs) |
| 6129 | { |
| 6130 | printk("Bogus SCBPTR %d\n", saved_scbptr); |
| 6131 | bogus = TRUE; |
| 6132 | } |
| 6133 | scb_status[saved_scbptr] = SCB_CURRENTLY_ACTIVE; |
| 6134 | free_scbh = aic_inb(p, FREE_SCBH); |
| 6135 | if ( (free_scbh != SCB_LIST_NULL) && |
| 6136 | (free_scbh >= p->scb_data->maxhscbs) ) |
| 6137 | { |
| 6138 | printk("Bogus FREE_SCBH %d\n", free_scbh); |
| 6139 | bogus = TRUE; |
| 6140 | } |
| 6141 | else |
| 6142 | { |
| 6143 | temp = free_scbh; |
| 6144 | while( (temp != SCB_LIST_NULL) && (temp < p->scb_data->maxhscbs) ) |
| 6145 | { |
| 6146 | if(scb_status[temp] & 0x07) |
| 6147 | { |
| 6148 | printk("HSCB %d on multiple lists, status 0x%02x", temp, |
| 6149 | scb_status[temp] | SCB_FREE_LIST); |
| 6150 | bogus = TRUE; |
| 6151 | } |
| 6152 | scb_status[temp] |= SCB_FREE_LIST; |
| 6153 | aic_outb(p, temp, SCBPTR); |
| 6154 | temp = aic_inb(p, SCB_NEXT); |
| 6155 | } |
| 6156 | } |
| 6157 | |
| 6158 | dis_scbh = aic_inb(p, DISCONNECTED_SCBH); |
| 6159 | if ( (dis_scbh != SCB_LIST_NULL) && |
| 6160 | (dis_scbh >= p->scb_data->maxhscbs) ) |
| 6161 | { |
| 6162 | printk("Bogus DISCONNECTED_SCBH %d\n", dis_scbh); |
| 6163 | bogus = TRUE; |
| 6164 | } |
| 6165 | else |
| 6166 | { |
| 6167 | temp = dis_scbh; |
| 6168 | while( (temp != SCB_LIST_NULL) && (temp < p->scb_data->maxhscbs) ) |
| 6169 | { |
| 6170 | if(scb_status[temp] & 0x07) |
| 6171 | { |
| 6172 | printk("HSCB %d on multiple lists, status 0x%02x", temp, |
| 6173 | scb_status[temp] | SCB_DISCONNECTED_LIST); |
| 6174 | bogus = TRUE; |
| 6175 | } |
| 6176 | scb_status[temp] |= SCB_DISCONNECTED_LIST; |
| 6177 | aic_outb(p, temp, SCBPTR); |
| 6178 | temp = aic_inb(p, SCB_NEXT); |
| 6179 | } |
| 6180 | } |
| 6181 | |
| 6182 | wait_scbh = aic_inb(p, WAITING_SCBH); |
| 6183 | if ( (wait_scbh != SCB_LIST_NULL) && |
| 6184 | (wait_scbh >= p->scb_data->maxhscbs) ) |
| 6185 | { |
| 6186 | printk("Bogus WAITING_SCBH %d\n", wait_scbh); |
| 6187 | bogus = TRUE; |
| 6188 | } |
| 6189 | else |
| 6190 | { |
| 6191 | temp = wait_scbh; |
| 6192 | while( (temp != SCB_LIST_NULL) && (temp < p->scb_data->maxhscbs) ) |
| 6193 | { |
| 6194 | if(scb_status[temp] & 0x07) |
| 6195 | { |
| 6196 | printk("HSCB %d on multiple lists, status 0x%02x", temp, |
| 6197 | scb_status[temp] | SCB_WAITING_LIST); |
| 6198 | bogus = TRUE; |
| 6199 | } |
| 6200 | scb_status[temp] |= SCB_WAITING_LIST; |
| 6201 | aic_outb(p, temp, SCBPTR); |
| 6202 | temp = aic_inb(p, SCB_NEXT); |
| 6203 | } |
| 6204 | } |
| 6205 | |
| 6206 | lost=0; |
| 6207 | for(i=0; i < p->scb_data->maxhscbs; i++) |
| 6208 | { |
| 6209 | aic_outb(p, i, SCBPTR); |
| 6210 | temp = aic_inb(p, SCB_NEXT); |
| 6211 | if ( ((temp != SCB_LIST_NULL) && |
| 6212 | (temp >= p->scb_data->maxhscbs)) ) |
| 6213 | { |
| 6214 | printk("HSCB %d bad, SCB_NEXT invalid(%d).\n", i, temp); |
| 6215 | bogus = TRUE; |
| 6216 | } |
| 6217 | if ( temp == i ) |
| 6218 | { |
| 6219 | printk("HSCB %d bad, SCB_NEXT points to self.\n", i); |
| 6220 | bogus = TRUE; |
| 6221 | } |
| 6222 | if (scb_status[i] == 0) |
| 6223 | lost++; |
| 6224 | if (lost > 1) |
| 6225 | { |
| 6226 | printk("Too many lost scbs.\n"); |
| 6227 | bogus=TRUE; |
| 6228 | } |
| 6229 | } |
| 6230 | aic_outb(p, saved_scbptr, SCBPTR); |
| 6231 | unpause_sequencer(p, FALSE); |
| 6232 | if (bogus) |
| 6233 | { |
| 6234 | printk("Bogus parameters found in card SCB array structures.\n"); |
| 6235 | printk("%s\n", buffer); |
| 6236 | aic7xxx_panic_abort(p, NULL); |
| 6237 | } |
| 6238 | return; |
| 6239 | } |
| 6240 | #endif |
| 6241 | |
| 6242 | |
| 6243 | /*+F************************************************************************* |
| 6244 | * Function: |
| 6245 | * aic7xxx_handle_command_completion_intr |
| 6246 | * |
| 6247 | * Description: |
| 6248 | * SCSI command completion interrupt handler. |
| 6249 | *-F*************************************************************************/ |
| 6250 | static void |
| 6251 | aic7xxx_handle_command_completion_intr(struct aic7xxx_host *p) |
| 6252 | { |
| 6253 | struct aic7xxx_scb *scb = NULL; |
| 6254 | struct aic_dev_data *aic_dev; |
| 6255 | Scsi_Cmnd *cmd; |
| 6256 | unsigned char scb_index, tindex; |
| 6257 | |
| 6258 | #ifdef AIC7XXX_VERBOSE_DEBUGGING |
| 6259 | if( (p->isr_count < 16) && (aic7xxx_verbose > 0xffff) ) |
| 6260 | printk(INFO_LEAD "Command Complete Int.\n", p->host_no, -1, -1, -1); |
| 6261 | #endif |
| 6262 | |
| 6263 | /* |
| 6264 | * Read the INTSTAT location after clearing the CMDINT bit. This forces |
| 6265 | * any posted PCI writes to flush to memory. Gerard Roudier suggested |
| 6266 | * this fix to the possible race of clearing the CMDINT bit but not |
| 6267 | * having all command bytes flushed onto the qoutfifo. |
| 6268 | */ |
| 6269 | aic_outb(p, CLRCMDINT, CLRINT); |
| 6270 | aic_inb(p, INTSTAT); |
| 6271 | /* |
| 6272 | * The sequencer will continue running when it |
| 6273 | * issues this interrupt. There may be >1 commands |
| 6274 | * finished, so loop until we've processed them all. |
| 6275 | */ |
| 6276 | |
| 6277 | while (p->qoutfifo[p->qoutfifonext] != SCB_LIST_NULL) |
| 6278 | { |
| 6279 | scb_index = p->qoutfifo[p->qoutfifonext]; |
| 6280 | p->qoutfifo[p->qoutfifonext++] = SCB_LIST_NULL; |
| 6281 | if ( scb_index >= p->scb_data->numscbs ) |
| 6282 | { |
| 6283 | printk(WARN_LEAD "CMDCMPLT with invalid SCB index %d\n", p->host_no, |
| 6284 | -1, -1, -1, scb_index); |
| 6285 | continue; |
| 6286 | } |
| 6287 | scb = p->scb_data->scb_array[scb_index]; |
| 6288 | if (!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL)) |
| 6289 | { |
| 6290 | printk(WARN_LEAD "CMDCMPLT without command for SCB %d, SCB flags " |
| 6291 | "0x%x, cmd 0x%lx\n", p->host_no, -1, -1, -1, scb_index, scb->flags, |
| 6292 | (unsigned long) scb->cmd); |
| 6293 | continue; |
| 6294 | } |
| 6295 | tindex = TARGET_INDEX(scb->cmd); |
| 6296 | aic_dev = AIC_DEV(scb->cmd); |
| 6297 | if (scb->flags & SCB_QUEUED_ABORT) |
| 6298 | { |
| 6299 | pause_sequencer(p); |
| 6300 | if ( ((aic_inb(p, LASTPHASE) & PHASE_MASK) != P_BUSFREE) && |
| 6301 | (aic_inb(p, SCB_TAG) == scb->hscb->tag) ) |
| 6302 | { |
| 6303 | unpause_sequencer(p, FALSE); |
| 6304 | continue; |
| 6305 | } |
| 6306 | aic7xxx_reset_device(p, scb->cmd->device->id, scb->cmd->device->channel, |
| 6307 | scb->cmd->device->lun, scb->hscb->tag); |
| 6308 | scb->flags &= ~(SCB_QUEUED_FOR_DONE | SCB_RESET | SCB_ABORT | |
| 6309 | SCB_QUEUED_ABORT); |
| 6310 | unpause_sequencer(p, FALSE); |
| 6311 | } |
| 6312 | else if (scb->flags & SCB_ABORT) |
| 6313 | { |
| 6314 | /* |
| 6315 | * We started to abort this, but it completed on us, let it |
| 6316 | * through as successful |
| 6317 | */ |
| 6318 | scb->flags &= ~(SCB_ABORT|SCB_RESET); |
| 6319 | } |
| 6320 | else if (scb->flags & SCB_SENSE) |
| 6321 | { |
| 6322 | char *buffer = &scb->cmd->sense_buffer[0]; |
| 6323 | |
| 6324 | if (buffer[12] == 0x47 || buffer[12] == 0x54) |
| 6325 | { |
| 6326 | /* |
| 6327 | * Signal that we need to re-negotiate things. |
| 6328 | */ |
| 6329 | aic_dev->needppr = aic_dev->needppr_copy; |
| 6330 | aic_dev->needsdtr = aic_dev->needsdtr_copy; |
| 6331 | aic_dev->needwdtr = aic_dev->needwdtr_copy; |
| 6332 | } |
| 6333 | } |
| 6334 | cmd = scb->cmd; |
| 6335 | if (scb->hscb->residual_SG_segment_count != 0) |
| 6336 | { |
| 6337 | aic7xxx_calculate_residual(p, scb); |
| 6338 | } |
| 6339 | cmd->result |= (aic7xxx_error(cmd) << 16); |
| 6340 | aic7xxx_done(p, scb); |
| 6341 | } |
| 6342 | } |
| 6343 | |
| 6344 | /*+F************************************************************************* |
| 6345 | * Function: |
| 6346 | * aic7xxx_isr |
| 6347 | * |
| 6348 | * Description: |
| 6349 | * SCSI controller interrupt handler. |
| 6350 | *-F*************************************************************************/ |
| 6351 | static void |
| 6352 | aic7xxx_isr(int irq, void *dev_id, struct pt_regs *regs) |
| 6353 | { |
| 6354 | struct aic7xxx_host *p; |
| 6355 | unsigned char intstat; |
| 6356 | |
| 6357 | p = (struct aic7xxx_host *)dev_id; |
| 6358 | |
| 6359 | /* |
| 6360 | * Just a few sanity checks. Make sure that we have an int pending. |
| 6361 | * Also, if PCI, then we are going to check for a PCI bus error status |
| 6362 | * should we get too many spurious interrupts. |
| 6363 | */ |
| 6364 | if (!((intstat = aic_inb(p, INTSTAT)) & INT_PEND)) |
| 6365 | { |
| 6366 | #ifdef CONFIG_PCI |
| 6367 | if ( (p->chip & AHC_PCI) && (p->spurious_int > 500) && |
| 6368 | !(p->flags & AHC_HANDLING_REQINITS) ) |
| 6369 | { |
| 6370 | if ( aic_inb(p, ERROR) & PCIERRSTAT ) |
| 6371 | { |
| 6372 | aic7xxx_pci_intr(p); |
| 6373 | } |
| 6374 | p->spurious_int = 0; |
| 6375 | } |
| 6376 | else if ( !(p->flags & AHC_HANDLING_REQINITS) ) |
| 6377 | { |
| 6378 | p->spurious_int++; |
| 6379 | } |
| 6380 | #endif |
| 6381 | return; |
| 6382 | } |
| 6383 | |
| 6384 | p->spurious_int = 0; |
| 6385 | |
| 6386 | /* |
| 6387 | * Keep track of interrupts for /proc/scsi |
| 6388 | */ |
| 6389 | p->isr_count++; |
| 6390 | |
| 6391 | #ifdef AIC7XXX_VERBOSE_DEBUGGING |
| 6392 | if ( (p->isr_count < 16) && (aic7xxx_verbose > 0xffff) && |
| 6393 | (aic7xxx_panic_on_abort) && (p->flags & AHC_PAGESCBS) ) |
| 6394 | aic7xxx_check_scbs(p, "Bogus settings at start of interrupt."); |
| 6395 | #endif |
| 6396 | |
| 6397 | /* |
| 6398 | * Handle all the interrupt sources - especially for SCSI |
| 6399 | * interrupts, we won't get a second chance at them. |
| 6400 | */ |
| 6401 | if (intstat & CMDCMPLT) |
| 6402 | { |
| 6403 | aic7xxx_handle_command_completion_intr(p); |
| 6404 | } |
| 6405 | |
| 6406 | if (intstat & BRKADRINT) |
| 6407 | { |
| 6408 | int i; |
| 6409 | unsigned char errno = aic_inb(p, ERROR); |
| 6410 | |
| 6411 | printk(KERN_ERR "(scsi%d) BRKADRINT error(0x%x):\n", p->host_no, errno); |
| 6412 | for (i = 0; i < ARRAY_SIZE(hard_error); i++) |
| 6413 | { |
| 6414 | if (errno & hard_error[i].errno) |
| 6415 | { |
| 6416 | printk(KERN_ERR " %s\n", hard_error[i].errmesg); |
| 6417 | } |
| 6418 | } |
| 6419 | printk(KERN_ERR "(scsi%d) SEQADDR=0x%x\n", p->host_no, |
| 6420 | (((aic_inb(p, SEQADDR1) << 8) & 0x100) | aic_inb(p, SEQADDR0))); |
| 6421 | if (aic7xxx_panic_on_abort) |
| 6422 | aic7xxx_panic_abort(p, NULL); |
| 6423 | #ifdef CONFIG_PCI |
| 6424 | if (errno & PCIERRSTAT) |
| 6425 | aic7xxx_pci_intr(p); |
| 6426 | #endif |
| 6427 | if (errno & (SQPARERR | ILLOPCODE | ILLSADDR)) |
| 6428 | { |
| 6429 | panic("aic7xxx: unrecoverable BRKADRINT.\n"); |
| 6430 | } |
| 6431 | if (errno & ILLHADDR) |
| 6432 | { |
| 6433 | printk(KERN_ERR "(scsi%d) BUG! Driver accessed chip without first " |
| 6434 | "pausing controller!\n", p->host_no); |
| 6435 | } |
| 6436 | #ifdef AIC7XXX_VERBOSE_DEBUGGING |
| 6437 | if (errno & DPARERR) |
| 6438 | { |
| 6439 | if (aic_inb(p, DMAPARAMS) & DIRECTION) |
| 6440 | printk("(scsi%d) while DMAing SCB from host to card.\n", p->host_no); |
| 6441 | else |
| 6442 | printk("(scsi%d) while DMAing SCB from card to host.\n", p->host_no); |
| 6443 | } |
| 6444 | #endif |
| 6445 | aic_outb(p, CLRPARERR | CLRBRKADRINT, CLRINT); |
| 6446 | unpause_sequencer(p, FALSE); |
| 6447 | } |
| 6448 | |
| 6449 | if (intstat & SEQINT) |
| 6450 | { |
| 6451 | /* |
| 6452 | * Read the CCSCBCTL register to work around a bug in the Ultra2 cards |
| 6453 | */ |
| 6454 | if(p->features & AHC_ULTRA2) |
| 6455 | { |
| 6456 | aic_inb(p, CCSCBCTL); |
| 6457 | } |
| 6458 | aic7xxx_handle_seqint(p, intstat); |
| 6459 | } |
| 6460 | |
| 6461 | if (intstat & SCSIINT) |
| 6462 | { |
| 6463 | aic7xxx_handle_scsiint(p, intstat); |
| 6464 | } |
| 6465 | |
| 6466 | #ifdef AIC7XXX_VERBOSE_DEBUGGING |
| 6467 | if ( (p->isr_count < 16) && (aic7xxx_verbose > 0xffff) && |
| 6468 | (aic7xxx_panic_on_abort) && (p->flags & AHC_PAGESCBS) ) |
| 6469 | aic7xxx_check_scbs(p, "Bogus settings at end of interrupt."); |
| 6470 | #endif |
| 6471 | |
| 6472 | } |
| 6473 | |
| 6474 | /*+F************************************************************************* |
| 6475 | * Function: |
| 6476 | * do_aic7xxx_isr |
| 6477 | * |
| 6478 | * Description: |
| 6479 | * This is a gross hack to solve a problem in linux kernels 2.1.85 and |
| 6480 | * above. Please, children, do not try this at home, and if you ever see |
| 6481 | * anything like it, please inform the Gross Hack Police immediately |
| 6482 | *-F*************************************************************************/ |
| 6483 | static irqreturn_t |
| 6484 | do_aic7xxx_isr(int irq, void *dev_id, struct pt_regs *regs) |
| 6485 | { |
| 6486 | unsigned long cpu_flags; |
| 6487 | struct aic7xxx_host *p; |
| 6488 | |
| 6489 | p = (struct aic7xxx_host *)dev_id; |
| 6490 | if(!p) |
| 6491 | return IRQ_NONE; |
| 6492 | spin_lock_irqsave(p->host->host_lock, cpu_flags); |
| 6493 | p->flags |= AHC_IN_ISR; |
| 6494 | do |
| 6495 | { |
| 6496 | aic7xxx_isr(irq, dev_id, regs); |
| 6497 | } while ( (aic_inb(p, INTSTAT) & INT_PEND) ); |
| 6498 | aic7xxx_done_cmds_complete(p); |
| 6499 | aic7xxx_run_waiting_queues(p); |
| 6500 | p->flags &= ~AHC_IN_ISR; |
| 6501 | spin_unlock_irqrestore(p->host->host_lock, cpu_flags); |
| 6502 | |
| 6503 | return IRQ_HANDLED; |
| 6504 | } |
| 6505 | |
| 6506 | /*+F************************************************************************* |
| 6507 | * Function: |
| 6508 | * aic7xxx_init_transinfo |
| 6509 | * |
| 6510 | * Description: |
| 6511 | * Set up the initial aic_dev values from the BIOS settings and from |
| 6512 | * INQUIRY results |
| 6513 | *-F*************************************************************************/ |
| 6514 | static void |
| 6515 | aic7xxx_init_transinfo(struct aic7xxx_host *p, struct aic_dev_data *aic_dev) |
| 6516 | { |
Christoph Hellwig | f64a181 | 2005-10-31 18:32:08 +0100 | [diff] [blame] | 6517 | struct scsi_device *sdpnt = aic_dev->SDptr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6518 | unsigned char tindex; |
| 6519 | |
| 6520 | tindex = sdpnt->id | (sdpnt->channel << 3); |
| 6521 | if (!(aic_dev->flags & DEVICE_DTR_SCANNED)) |
| 6522 | { |
| 6523 | aic_dev->flags |= DEVICE_DTR_SCANNED; |
| 6524 | |
| 6525 | if ( sdpnt->wdtr && (p->features & AHC_WIDE) ) |
| 6526 | { |
| 6527 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 1; |
| 6528 | aic_dev->goal.width = p->user[tindex].width; |
| 6529 | } |
| 6530 | else |
| 6531 | { |
| 6532 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 0; |
| 6533 | pause_sequencer(p); |
| 6534 | aic7xxx_set_width(p, sdpnt->id, sdpnt->channel, sdpnt->lun, |
| 6535 | MSG_EXT_WDTR_BUS_8_BIT, (AHC_TRANS_ACTIVE | |
| 6536 | AHC_TRANS_GOAL | |
| 6537 | AHC_TRANS_CUR), aic_dev ); |
| 6538 | unpause_sequencer(p, FALSE); |
| 6539 | } |
| 6540 | if ( sdpnt->sdtr && p->user[tindex].offset ) |
| 6541 | { |
| 6542 | aic_dev->goal.period = p->user[tindex].period; |
| 6543 | aic_dev->goal.options = p->user[tindex].options; |
| 6544 | if (p->features & AHC_ULTRA2) |
| 6545 | aic_dev->goal.offset = MAX_OFFSET_ULTRA2; |
| 6546 | else if (aic_dev->goal.width == MSG_EXT_WDTR_BUS_16_BIT) |
| 6547 | aic_dev->goal.offset = MAX_OFFSET_16BIT; |
| 6548 | else |
| 6549 | aic_dev->goal.offset = MAX_OFFSET_8BIT; |
| 6550 | if ( sdpnt->ppr && p->user[tindex].period <= 9 && |
| 6551 | p->user[tindex].options ) |
| 6552 | { |
| 6553 | aic_dev->needppr = aic_dev->needppr_copy = 1; |
| 6554 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 0; |
| 6555 | aic_dev->needwdtr = aic_dev->needwdtr_copy = 0; |
| 6556 | aic_dev->flags |= DEVICE_SCSI_3; |
| 6557 | } |
| 6558 | else |
| 6559 | { |
| 6560 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 1; |
| 6561 | aic_dev->goal.period = max_t(unsigned char, 10, aic_dev->goal.period); |
| 6562 | aic_dev->goal.options = 0; |
| 6563 | } |
| 6564 | } |
| 6565 | else |
| 6566 | { |
| 6567 | aic_dev->needsdtr = aic_dev->needsdtr_copy = 0; |
| 6568 | aic_dev->goal.period = 255; |
| 6569 | aic_dev->goal.offset = 0; |
| 6570 | aic_dev->goal.options = 0; |
| 6571 | } |
| 6572 | aic_dev->flags |= DEVICE_PRINT_DTR; |
| 6573 | } |
| 6574 | } |
| 6575 | |
| 6576 | /*+F************************************************************************* |
| 6577 | * Function: |
| 6578 | * aic7xxx_slave_alloc |
| 6579 | * |
| 6580 | * Description: |
| 6581 | * Set up the initial aic_dev struct pointers |
| 6582 | *-F*************************************************************************/ |
| 6583 | static int |
Christoph Hellwig | f64a181 | 2005-10-31 18:32:08 +0100 | [diff] [blame] | 6584 | aic7xxx_slave_alloc(struct scsi_device *SDptr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6585 | { |
| 6586 | struct aic7xxx_host *p = (struct aic7xxx_host *)SDptr->host->hostdata; |
| 6587 | struct aic_dev_data *aic_dev; |
| 6588 | |
| 6589 | aic_dev = kmalloc(sizeof(struct aic_dev_data), GFP_ATOMIC | GFP_KERNEL); |
| 6590 | if(!aic_dev) |
| 6591 | return 1; |
| 6592 | /* |
| 6593 | * Check to see if channel was scanned. |
| 6594 | */ |
| 6595 | |
| 6596 | if (!(p->flags & AHC_A_SCANNED) && (SDptr->channel == 0)) |
| 6597 | { |
| 6598 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 6599 | printk(INFO_LEAD "Scanning channel for devices.\n", |
| 6600 | p->host_no, 0, -1, -1); |
| 6601 | p->flags |= AHC_A_SCANNED; |
| 6602 | } |
| 6603 | else |
| 6604 | { |
| 6605 | if (!(p->flags & AHC_B_SCANNED) && (SDptr->channel == 1)) |
| 6606 | { |
| 6607 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 6608 | printk(INFO_LEAD "Scanning channel for devices.\n", |
| 6609 | p->host_no, 1, -1, -1); |
| 6610 | p->flags |= AHC_B_SCANNED; |
| 6611 | } |
| 6612 | } |
| 6613 | |
| 6614 | memset(aic_dev, 0, sizeof(struct aic_dev_data)); |
| 6615 | SDptr->hostdata = aic_dev; |
| 6616 | aic_dev->SDptr = SDptr; |
| 6617 | aic_dev->max_q_depth = 1; |
| 6618 | aic_dev->temp_q_depth = 1; |
| 6619 | scbq_init(&aic_dev->delayed_scbs); |
| 6620 | INIT_LIST_HEAD(&aic_dev->list); |
| 6621 | list_add_tail(&aic_dev->list, &p->aic_devs); |
| 6622 | return 0; |
| 6623 | } |
| 6624 | |
| 6625 | /*+F************************************************************************* |
| 6626 | * Function: |
| 6627 | * aic7xxx_device_queue_depth |
| 6628 | * |
| 6629 | * Description: |
| 6630 | * Determines the queue depth for a given device. There are two ways |
| 6631 | * a queue depth can be obtained for a tagged queueing device. One |
| 6632 | * way is the default queue depth which is determined by whether |
| 6633 | * aic7xxx_default_queue_depth. The other is by the aic7xxx_tag_info |
| 6634 | * array. |
| 6635 | * |
| 6636 | * If tagged queueing isn't supported on the device, then we set the |
| 6637 | * depth to p->host->hostt->cmd_per_lun for internal driver queueing. |
| 6638 | * as the default queue depth. Otherwise, we use either 4 or 8 as the |
| 6639 | * default queue depth (dependent on the number of hardware SCBs). |
| 6640 | * The other way we determine queue depth is through the use of the |
| 6641 | * aic7xxx_tag_info array which is enabled by defining |
| 6642 | * AIC7XXX_TAGGED_QUEUEING_BY_DEVICE. This array can be initialized |
| 6643 | * with queue depths for individual devices. It also allows tagged |
| 6644 | * queueing to be [en|dis]abled for a specific adapter. |
| 6645 | *-F*************************************************************************/ |
| 6646 | static void |
Christoph Hellwig | f64a181 | 2005-10-31 18:32:08 +0100 | [diff] [blame] | 6647 | aic7xxx_device_queue_depth(struct aic7xxx_host *p, struct scsi_device *device) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6648 | { |
| 6649 | int tag_enabled = FALSE; |
| 6650 | struct aic_dev_data *aic_dev = device->hostdata; |
| 6651 | unsigned char tindex; |
| 6652 | |
| 6653 | tindex = device->id | (device->channel << 3); |
| 6654 | |
| 6655 | if (device->simple_tags) |
| 6656 | return; // We've already enabled this device |
| 6657 | |
| 6658 | if (device->tagged_supported) |
| 6659 | { |
| 6660 | tag_enabled = TRUE; |
| 6661 | |
| 6662 | if (!(p->discenable & (1 << tindex))) |
| 6663 | { |
| 6664 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) |
| 6665 | printk(INFO_LEAD "Disconnection disabled, unable to " |
| 6666 | "enable tagged queueing.\n", |
| 6667 | p->host_no, device->channel, device->id, device->lun); |
| 6668 | tag_enabled = FALSE; |
| 6669 | } |
| 6670 | else |
| 6671 | { |
| 6672 | if (p->instance >= ARRAY_SIZE(aic7xxx_tag_info)) |
| 6673 | { |
| 6674 | static int print_warning = TRUE; |
| 6675 | if(print_warning) |
| 6676 | { |
| 6677 | printk(KERN_INFO "aic7xxx: WARNING, insufficient tag_info instances for" |
| 6678 | " installed controllers.\n"); |
| 6679 | printk(KERN_INFO "aic7xxx: Please update the aic7xxx_tag_info array in" |
| 6680 | " the aic7xxx.c source file.\n"); |
| 6681 | print_warning = FALSE; |
| 6682 | } |
| 6683 | aic_dev->max_q_depth = aic_dev->temp_q_depth = |
| 6684 | aic7xxx_default_queue_depth; |
| 6685 | } |
| 6686 | else |
| 6687 | { |
| 6688 | |
| 6689 | if (aic7xxx_tag_info[p->instance].tag_commands[tindex] == 255) |
| 6690 | { |
| 6691 | tag_enabled = FALSE; |
| 6692 | } |
| 6693 | else if (aic7xxx_tag_info[p->instance].tag_commands[tindex] == 0) |
| 6694 | { |
| 6695 | aic_dev->max_q_depth = aic_dev->temp_q_depth = |
| 6696 | aic7xxx_default_queue_depth; |
| 6697 | } |
| 6698 | else |
| 6699 | { |
| 6700 | aic_dev->max_q_depth = aic_dev->temp_q_depth = |
| 6701 | aic7xxx_tag_info[p->instance].tag_commands[tindex]; |
| 6702 | } |
| 6703 | } |
| 6704 | } |
| 6705 | } |
| 6706 | if (tag_enabled) |
| 6707 | { |
| 6708 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) |
| 6709 | { |
| 6710 | printk(INFO_LEAD "Tagged queuing enabled, queue depth %d.\n", |
| 6711 | p->host_no, device->channel, device->id, |
| 6712 | device->lun, aic_dev->max_q_depth); |
| 6713 | } |
| 6714 | scsi_adjust_queue_depth(device, MSG_ORDERED_TAG, aic_dev->max_q_depth); |
| 6715 | } |
| 6716 | else |
| 6717 | { |
| 6718 | if (aic7xxx_verbose & VERBOSE_NEGOTIATION2) |
| 6719 | { |
| 6720 | printk(INFO_LEAD "Tagged queuing disabled, queue depth %d.\n", |
| 6721 | p->host_no, device->channel, device->id, |
| 6722 | device->lun, device->host->cmd_per_lun); |
| 6723 | } |
| 6724 | scsi_adjust_queue_depth(device, 0, device->host->cmd_per_lun); |
| 6725 | } |
| 6726 | return; |
| 6727 | } |
| 6728 | |
| 6729 | /*+F************************************************************************* |
| 6730 | * Function: |
| 6731 | * aic7xxx_slave_destroy |
| 6732 | * |
| 6733 | * Description: |
| 6734 | * prepare for this device to go away |
| 6735 | *-F*************************************************************************/ |
| 6736 | static void |
Christoph Hellwig | f64a181 | 2005-10-31 18:32:08 +0100 | [diff] [blame] | 6737 | aic7xxx_slave_destroy(struct scsi_device *SDptr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6738 | { |
| 6739 | struct aic_dev_data *aic_dev = SDptr->hostdata; |
| 6740 | |
| 6741 | list_del(&aic_dev->list); |
| 6742 | SDptr->hostdata = NULL; |
| 6743 | kfree(aic_dev); |
| 6744 | return; |
| 6745 | } |
| 6746 | |
| 6747 | /*+F************************************************************************* |
| 6748 | * Function: |
| 6749 | * aic7xxx_slave_configure |
| 6750 | * |
| 6751 | * Description: |
| 6752 | * Configure the device we are attaching to the controller. This is |
| 6753 | * where we get to do things like scan the INQUIRY data, set queue |
| 6754 | * depths, allocate command structs, etc. |
| 6755 | *-F*************************************************************************/ |
| 6756 | static int |
Christoph Hellwig | f64a181 | 2005-10-31 18:32:08 +0100 | [diff] [blame] | 6757 | aic7xxx_slave_configure(struct scsi_device *SDptr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6758 | { |
| 6759 | struct aic7xxx_host *p = (struct aic7xxx_host *) SDptr->host->hostdata; |
| 6760 | struct aic_dev_data *aic_dev; |
| 6761 | int scbnum; |
| 6762 | |
| 6763 | aic_dev = (struct aic_dev_data *)SDptr->hostdata; |
| 6764 | |
| 6765 | aic7xxx_init_transinfo(p, aic_dev); |
| 6766 | aic7xxx_device_queue_depth(p, SDptr); |
| 6767 | if(list_empty(&aic_dev->list)) |
| 6768 | list_add_tail(&aic_dev->list, &p->aic_devs); |
| 6769 | |
| 6770 | scbnum = 0; |
| 6771 | list_for_each_entry(aic_dev, &p->aic_devs, list) { |
| 6772 | scbnum += aic_dev->max_q_depth; |
| 6773 | } |
| 6774 | while (scbnum > p->scb_data->numscbs) |
| 6775 | { |
| 6776 | /* |
| 6777 | * Pre-allocate the needed SCBs to get around the possibility of having |
| 6778 | * to allocate some when memory is more or less exhausted and we need |
| 6779 | * the SCB in order to perform a swap operation (possible deadlock) |
| 6780 | */ |
| 6781 | if ( aic7xxx_allocate_scb(p) == 0 ) |
| 6782 | break; |
| 6783 | } |
| 6784 | |
| 6785 | |
| 6786 | return(0); |
| 6787 | } |
| 6788 | |
| 6789 | /*+F************************************************************************* |
| 6790 | * Function: |
| 6791 | * aic7xxx_probe |
| 6792 | * |
| 6793 | * Description: |
| 6794 | * Probing for EISA boards: it looks like the first two bytes |
| 6795 | * are a manufacturer code - three characters, five bits each: |
| 6796 | * |
| 6797 | * BYTE 0 BYTE 1 BYTE 2 BYTE 3 |
| 6798 | * ?1111122 22233333 PPPPPPPP RRRRRRRR |
| 6799 | * |
| 6800 | * The characters are baselined off ASCII '@', so add that value |
| 6801 | * to each to get the real ASCII code for it. The next two bytes |
| 6802 | * appear to be a product and revision number, probably vendor- |
| 6803 | * specific. This is what is being searched for at each port, |
| 6804 | * and what should probably correspond to the ID= field in the |
| 6805 | * ECU's .cfg file for the card - if your card is not detected, |
| 6806 | * make sure your signature is listed in the array. |
| 6807 | * |
| 6808 | * The fourth byte's lowest bit seems to be an enabled/disabled |
| 6809 | * flag (rest of the bits are reserved?). |
| 6810 | * |
| 6811 | * NOTE: This function is only needed on Intel and Alpha platforms, |
| 6812 | * the other platforms we support don't have EISA/VLB busses. So, |
| 6813 | * we #ifdef this entire function to avoid compiler warnings about |
| 6814 | * an unused function. |
| 6815 | *-F*************************************************************************/ |
| 6816 | #if defined(__i386__) || defined(__alpha__) |
| 6817 | static int |
| 6818 | aic7xxx_probe(int slot, int base, ahc_flag_type *flags) |
| 6819 | { |
| 6820 | int i; |
| 6821 | unsigned char buf[4]; |
| 6822 | |
| 6823 | static struct { |
| 6824 | int n; |
| 6825 | unsigned char signature[sizeof(buf)]; |
| 6826 | ahc_chip type; |
| 6827 | int bios_disabled; |
| 6828 | } AIC7xxx[] = { |
| 6829 | { 4, { 0x04, 0x90, 0x77, 0x70 }, |
| 6830 | AHC_AIC7770|AHC_EISA, FALSE }, /* mb 7770 */ |
| 6831 | { 4, { 0x04, 0x90, 0x77, 0x71 }, |
| 6832 | AHC_AIC7770|AHC_EISA, FALSE }, /* host adapter 274x */ |
| 6833 | { 4, { 0x04, 0x90, 0x77, 0x56 }, |
| 6834 | AHC_AIC7770|AHC_VL, FALSE }, /* 284x BIOS enabled */ |
| 6835 | { 4, { 0x04, 0x90, 0x77, 0x57 }, |
| 6836 | AHC_AIC7770|AHC_VL, TRUE } /* 284x BIOS disabled */ |
| 6837 | }; |
| 6838 | |
| 6839 | /* |
| 6840 | * The VL-bus cards need to be primed by |
| 6841 | * writing before a signature check. |
| 6842 | */ |
| 6843 | for (i = 0; i < sizeof(buf); i++) |
| 6844 | { |
| 6845 | outb(0x80 + i, base); |
| 6846 | buf[i] = inb(base + i); |
| 6847 | } |
| 6848 | |
| 6849 | for (i = 0; i < ARRAY_SIZE(AIC7xxx); i++) |
| 6850 | { |
| 6851 | /* |
| 6852 | * Signature match on enabled card? |
| 6853 | */ |
| 6854 | if (!memcmp(buf, AIC7xxx[i].signature, AIC7xxx[i].n)) |
| 6855 | { |
| 6856 | if (inb(base + 4) & 1) |
| 6857 | { |
| 6858 | if (AIC7xxx[i].bios_disabled) |
| 6859 | { |
| 6860 | *flags |= AHC_USEDEFAULTS; |
| 6861 | } |
| 6862 | else |
| 6863 | { |
| 6864 | *flags |= AHC_BIOS_ENABLED; |
| 6865 | } |
| 6866 | return (i); |
| 6867 | } |
| 6868 | |
| 6869 | printk("aic7xxx: <Adaptec 7770 SCSI Host Adapter> " |
| 6870 | "disabled at slot %d, ignored.\n", slot); |
| 6871 | } |
| 6872 | } |
| 6873 | |
| 6874 | return (-1); |
| 6875 | } |
| 6876 | #endif /* (__i386__) || (__alpha__) */ |
| 6877 | |
| 6878 | |
| 6879 | /*+F************************************************************************* |
| 6880 | * Function: |
| 6881 | * read_2840_seeprom |
| 6882 | * |
| 6883 | * Description: |
| 6884 | * Reads the 2840 serial EEPROM and returns 1 if successful and 0 if |
| 6885 | * not successful. |
| 6886 | * |
| 6887 | * See read_seeprom (for the 2940) for the instruction set of the 93C46 |
| 6888 | * chip. |
| 6889 | * |
| 6890 | * The 2840 interface to the 93C46 serial EEPROM is through the |
| 6891 | * STATUS_2840 and SEECTL_2840 registers. The CS_2840, CK_2840, and |
| 6892 | * DO_2840 bits of the SEECTL_2840 register are connected to the chip |
| 6893 | * select, clock, and data out lines respectively of the serial EEPROM. |
| 6894 | * The DI_2840 bit of the STATUS_2840 is connected to the data in line |
| 6895 | * of the serial EEPROM. The EEPROM_TF bit of STATUS_2840 register is |
| 6896 | * useful in that it gives us an 800 nsec timer. After a read from the |
| 6897 | * SEECTL_2840 register the timing flag is cleared and goes high 800 nsec |
| 6898 | * later. |
| 6899 | *-F*************************************************************************/ |
| 6900 | static int |
| 6901 | read_284x_seeprom(struct aic7xxx_host *p, struct seeprom_config *sc) |
| 6902 | { |
| 6903 | int i = 0, k = 0; |
| 6904 | unsigned char temp; |
| 6905 | unsigned short checksum = 0; |
| 6906 | unsigned short *seeprom = (unsigned short *) sc; |
| 6907 | struct seeprom_cmd { |
| 6908 | unsigned char len; |
| 6909 | unsigned char bits[3]; |
| 6910 | }; |
| 6911 | struct seeprom_cmd seeprom_read = {3, {1, 1, 0}}; |
| 6912 | |
| 6913 | #define CLOCK_PULSE(p) \ |
| 6914 | while ((aic_inb(p, STATUS_2840) & EEPROM_TF) == 0) \ |
| 6915 | { \ |
| 6916 | ; /* Do nothing */ \ |
| 6917 | } \ |
| 6918 | (void) aic_inb(p, SEECTL_2840); |
| 6919 | |
| 6920 | /* |
| 6921 | * Read the first 32 registers of the seeprom. For the 2840, |
| 6922 | * the 93C46 SEEPROM is a 1024-bit device with 64 16-bit registers |
| 6923 | * but only the first 32 are used by Adaptec BIOS. The loop |
| 6924 | * will range from 0 to 31. |
| 6925 | */ |
| 6926 | for (k = 0; k < (sizeof(*sc) / 2); k++) |
| 6927 | { |
| 6928 | /* |
| 6929 | * Send chip select for one clock cycle. |
| 6930 | */ |
| 6931 | aic_outb(p, CK_2840 | CS_2840, SEECTL_2840); |
| 6932 | CLOCK_PULSE(p); |
| 6933 | |
| 6934 | /* |
| 6935 | * Now we're ready to send the read command followed by the |
| 6936 | * address of the 16-bit register we want to read. |
| 6937 | */ |
| 6938 | for (i = 0; i < seeprom_read.len; i++) |
| 6939 | { |
| 6940 | temp = CS_2840 | seeprom_read.bits[i]; |
| 6941 | aic_outb(p, temp, SEECTL_2840); |
| 6942 | CLOCK_PULSE(p); |
| 6943 | temp = temp ^ CK_2840; |
| 6944 | aic_outb(p, temp, SEECTL_2840); |
| 6945 | CLOCK_PULSE(p); |
| 6946 | } |
| 6947 | /* |
| 6948 | * Send the 6 bit address (MSB first, LSB last). |
| 6949 | */ |
| 6950 | for (i = 5; i >= 0; i--) |
| 6951 | { |
| 6952 | temp = k; |
| 6953 | temp = (temp >> i) & 1; /* Mask out all but lower bit. */ |
| 6954 | temp = CS_2840 | temp; |
| 6955 | aic_outb(p, temp, SEECTL_2840); |
| 6956 | CLOCK_PULSE(p); |
| 6957 | temp = temp ^ CK_2840; |
| 6958 | aic_outb(p, temp, SEECTL_2840); |
| 6959 | CLOCK_PULSE(p); |
| 6960 | } |
| 6961 | |
| 6962 | /* |
| 6963 | * Now read the 16 bit register. An initial 0 precedes the |
| 6964 | * register contents which begins with bit 15 (MSB) and ends |
| 6965 | * with bit 0 (LSB). The initial 0 will be shifted off the |
| 6966 | * top of our word as we let the loop run from 0 to 16. |
| 6967 | */ |
| 6968 | for (i = 0; i <= 16; i++) |
| 6969 | { |
| 6970 | temp = CS_2840; |
| 6971 | aic_outb(p, temp, SEECTL_2840); |
| 6972 | CLOCK_PULSE(p); |
| 6973 | temp = temp ^ CK_2840; |
| 6974 | seeprom[k] = (seeprom[k] << 1) | (aic_inb(p, STATUS_2840) & DI_2840); |
| 6975 | aic_outb(p, temp, SEECTL_2840); |
| 6976 | CLOCK_PULSE(p); |
| 6977 | } |
| 6978 | /* |
| 6979 | * The serial EEPROM has a checksum in the last word. Keep a |
| 6980 | * running checksum for all words read except for the last |
| 6981 | * word. We'll verify the checksum after all words have been |
| 6982 | * read. |
| 6983 | */ |
| 6984 | if (k < (sizeof(*sc) / 2) - 1) |
| 6985 | { |
| 6986 | checksum = checksum + seeprom[k]; |
| 6987 | } |
| 6988 | |
| 6989 | /* |
| 6990 | * Reset the chip select for the next command cycle. |
| 6991 | */ |
| 6992 | aic_outb(p, 0, SEECTL_2840); |
| 6993 | CLOCK_PULSE(p); |
| 6994 | aic_outb(p, CK_2840, SEECTL_2840); |
| 6995 | CLOCK_PULSE(p); |
| 6996 | aic_outb(p, 0, SEECTL_2840); |
| 6997 | CLOCK_PULSE(p); |
| 6998 | } |
| 6999 | |
| 7000 | #if 0 |
| 7001 | printk("Computed checksum 0x%x, checksum read 0x%x\n", checksum, sc->checksum); |
| 7002 | printk("Serial EEPROM:"); |
| 7003 | for (k = 0; k < (sizeof(*sc) / 2); k++) |
| 7004 | { |
| 7005 | if (((k % 8) == 0) && (k != 0)) |
| 7006 | { |
| 7007 | printk("\n "); |
| 7008 | } |
| 7009 | printk(" 0x%x", seeprom[k]); |
| 7010 | } |
| 7011 | printk("\n"); |
| 7012 | #endif |
| 7013 | |
| 7014 | if (checksum != sc->checksum) |
| 7015 | { |
| 7016 | printk("aic7xxx: SEEPROM checksum error, ignoring SEEPROM settings.\n"); |
| 7017 | return (0); |
| 7018 | } |
| 7019 | |
| 7020 | return (1); |
| 7021 | #undef CLOCK_PULSE |
| 7022 | } |
| 7023 | |
| 7024 | #define CLOCK_PULSE(p) \ |
| 7025 | do { \ |
| 7026 | int limit = 0; \ |
| 7027 | do { \ |
| 7028 | mb(); \ |
| 7029 | pause_sequencer(p); /* This is just to generate some PCI */ \ |
| 7030 | /* traffic so the PCI read is flushed */ \ |
| 7031 | /* it shouldn't be needed, but some */ \ |
| 7032 | /* chipsets do indeed appear to need */ \ |
| 7033 | /* something to force PCI reads to get */ \ |
| 7034 | /* flushed */ \ |
| 7035 | udelay(1); /* Do nothing */ \ |
| 7036 | } while (((aic_inb(p, SEECTL) & SEERDY) == 0) && (++limit < 1000)); \ |
| 7037 | } while(0) |
| 7038 | |
| 7039 | /*+F************************************************************************* |
| 7040 | * Function: |
| 7041 | * acquire_seeprom |
| 7042 | * |
| 7043 | * Description: |
| 7044 | * Acquires access to the memory port on PCI controllers. |
| 7045 | *-F*************************************************************************/ |
| 7046 | static int |
| 7047 | acquire_seeprom(struct aic7xxx_host *p) |
| 7048 | { |
| 7049 | |
| 7050 | /* |
| 7051 | * Request access of the memory port. When access is |
| 7052 | * granted, SEERDY will go high. We use a 1 second |
| 7053 | * timeout which should be near 1 second more than |
| 7054 | * is needed. Reason: after the 7870 chip reset, there |
| 7055 | * should be no contention. |
| 7056 | */ |
| 7057 | aic_outb(p, SEEMS, SEECTL); |
| 7058 | CLOCK_PULSE(p); |
| 7059 | if ((aic_inb(p, SEECTL) & SEERDY) == 0) |
| 7060 | { |
| 7061 | aic_outb(p, 0, SEECTL); |
| 7062 | return (0); |
| 7063 | } |
| 7064 | return (1); |
| 7065 | } |
| 7066 | |
| 7067 | /*+F************************************************************************* |
| 7068 | * Function: |
| 7069 | * release_seeprom |
| 7070 | * |
| 7071 | * Description: |
| 7072 | * Releases access to the memory port on PCI controllers. |
| 7073 | *-F*************************************************************************/ |
| 7074 | static void |
| 7075 | release_seeprom(struct aic7xxx_host *p) |
| 7076 | { |
| 7077 | /* |
| 7078 | * Make sure the SEEPROM is ready before we release it. |
| 7079 | */ |
| 7080 | CLOCK_PULSE(p); |
| 7081 | aic_outb(p, 0, SEECTL); |
| 7082 | } |
| 7083 | |
| 7084 | /*+F************************************************************************* |
| 7085 | * Function: |
| 7086 | * read_seeprom |
| 7087 | * |
| 7088 | * Description: |
| 7089 | * Reads the serial EEPROM and returns 1 if successful and 0 if |
| 7090 | * not successful. |
| 7091 | * |
| 7092 | * The instruction set of the 93C46/56/66 chips is as follows: |
| 7093 | * |
| 7094 | * Start OP |
| 7095 | * Function Bit Code Address Data Description |
| 7096 | * ------------------------------------------------------------------- |
| 7097 | * READ 1 10 A5 - A0 Reads data stored in memory, |
| 7098 | * starting at specified address |
| 7099 | * EWEN 1 00 11XXXX Write enable must precede |
| 7100 | * all programming modes |
| 7101 | * ERASE 1 11 A5 - A0 Erase register A5A4A3A2A1A0 |
| 7102 | * WRITE 1 01 A5 - A0 D15 - D0 Writes register |
| 7103 | * ERAL 1 00 10XXXX Erase all registers |
| 7104 | * WRAL 1 00 01XXXX D15 - D0 Writes to all registers |
| 7105 | * EWDS 1 00 00XXXX Disables all programming |
| 7106 | * instructions |
| 7107 | * *Note: A value of X for address is a don't care condition. |
| 7108 | * *Note: The 93C56 and 93C66 have 8 address bits. |
| 7109 | * |
| 7110 | * |
| 7111 | * The 93C46 has a four wire interface: clock, chip select, data in, and |
| 7112 | * data out. In order to perform one of the above functions, you need |
| 7113 | * to enable the chip select for a clock period (typically a minimum of |
| 7114 | * 1 usec, with the clock high and low a minimum of 750 and 250 nsec |
| 7115 | * respectively. While the chip select remains high, you can clock in |
| 7116 | * the instructions (above) starting with the start bit, followed by the |
| 7117 | * OP code, Address, and Data (if needed). For the READ instruction, the |
| 7118 | * requested 16-bit register contents is read from the data out line but |
| 7119 | * is preceded by an initial zero (leading 0, followed by 16-bits, MSB |
| 7120 | * first). The clock cycling from low to high initiates the next data |
| 7121 | * bit to be sent from the chip. |
| 7122 | * |
| 7123 | * The 78xx interface to the 93C46 serial EEPROM is through the SEECTL |
| 7124 | * register. After successful arbitration for the memory port, the |
| 7125 | * SEECS bit of the SEECTL register is connected to the chip select. |
| 7126 | * The SEECK, SEEDO, and SEEDI are connected to the clock, data out, |
| 7127 | * and data in lines respectively. The SEERDY bit of SEECTL is useful |
| 7128 | * in that it gives us an 800 nsec timer. After a write to the SEECTL |
| 7129 | * register, the SEERDY goes high 800 nsec later. The one exception |
| 7130 | * to this is when we first request access to the memory port. The |
| 7131 | * SEERDY goes high to signify that access has been granted and, for |
| 7132 | * this case, has no implied timing. |
| 7133 | *-F*************************************************************************/ |
| 7134 | static int |
| 7135 | read_seeprom(struct aic7xxx_host *p, int offset, |
| 7136 | unsigned short *scarray, unsigned int len, seeprom_chip_type chip) |
| 7137 | { |
| 7138 | int i = 0, k; |
| 7139 | unsigned char temp; |
| 7140 | unsigned short checksum = 0; |
| 7141 | struct seeprom_cmd { |
| 7142 | unsigned char len; |
| 7143 | unsigned char bits[3]; |
| 7144 | }; |
| 7145 | struct seeprom_cmd seeprom_read = {3, {1, 1, 0}}; |
| 7146 | |
| 7147 | /* |
| 7148 | * Request access of the memory port. |
| 7149 | */ |
| 7150 | if (acquire_seeprom(p) == 0) |
| 7151 | { |
| 7152 | return (0); |
| 7153 | } |
| 7154 | |
| 7155 | /* |
| 7156 | * Read 'len' registers of the seeprom. For the 7870, the 93C46 |
| 7157 | * SEEPROM is a 1024-bit device with 64 16-bit registers but only |
| 7158 | * the first 32 are used by Adaptec BIOS. Some adapters use the |
| 7159 | * 93C56 SEEPROM which is a 2048-bit device. The loop will range |
| 7160 | * from 0 to 'len' - 1. |
| 7161 | */ |
| 7162 | for (k = 0; k < len; k++) |
| 7163 | { |
| 7164 | /* |
| 7165 | * Send chip select for one clock cycle. |
| 7166 | */ |
| 7167 | aic_outb(p, SEEMS | SEECK | SEECS, SEECTL); |
| 7168 | CLOCK_PULSE(p); |
| 7169 | |
| 7170 | /* |
| 7171 | * Now we're ready to send the read command followed by the |
| 7172 | * address of the 16-bit register we want to read. |
| 7173 | */ |
| 7174 | for (i = 0; i < seeprom_read.len; i++) |
| 7175 | { |
| 7176 | temp = SEEMS | SEECS | (seeprom_read.bits[i] << 1); |
| 7177 | aic_outb(p, temp, SEECTL); |
| 7178 | CLOCK_PULSE(p); |
| 7179 | temp = temp ^ SEECK; |
| 7180 | aic_outb(p, temp, SEECTL); |
| 7181 | CLOCK_PULSE(p); |
| 7182 | } |
| 7183 | /* |
| 7184 | * Send the 6 or 8 bit address (MSB first, LSB last). |
| 7185 | */ |
| 7186 | for (i = ((int) chip - 1); i >= 0; i--) |
| 7187 | { |
| 7188 | temp = k + offset; |
| 7189 | temp = (temp >> i) & 1; /* Mask out all but lower bit. */ |
| 7190 | temp = SEEMS | SEECS | (temp << 1); |
| 7191 | aic_outb(p, temp, SEECTL); |
| 7192 | CLOCK_PULSE(p); |
| 7193 | temp = temp ^ SEECK; |
| 7194 | aic_outb(p, temp, SEECTL); |
| 7195 | CLOCK_PULSE(p); |
| 7196 | } |
| 7197 | |
| 7198 | /* |
| 7199 | * Now read the 16 bit register. An initial 0 precedes the |
| 7200 | * register contents which begins with bit 15 (MSB) and ends |
| 7201 | * with bit 0 (LSB). The initial 0 will be shifted off the |
| 7202 | * top of our word as we let the loop run from 0 to 16. |
| 7203 | */ |
| 7204 | for (i = 0; i <= 16; i++) |
| 7205 | { |
| 7206 | temp = SEEMS | SEECS; |
| 7207 | aic_outb(p, temp, SEECTL); |
| 7208 | CLOCK_PULSE(p); |
| 7209 | temp = temp ^ SEECK; |
| 7210 | scarray[k] = (scarray[k] << 1) | (aic_inb(p, SEECTL) & SEEDI); |
| 7211 | aic_outb(p, temp, SEECTL); |
| 7212 | CLOCK_PULSE(p); |
| 7213 | } |
| 7214 | |
| 7215 | /* |
| 7216 | * The serial EEPROM should have a checksum in the last word. |
| 7217 | * Keep a running checksum for all words read except for the |
| 7218 | * last word. We'll verify the checksum after all words have |
| 7219 | * been read. |
| 7220 | */ |
| 7221 | if (k < (len - 1)) |
| 7222 | { |
| 7223 | checksum = checksum + scarray[k]; |
| 7224 | } |
| 7225 | |
| 7226 | /* |
| 7227 | * Reset the chip select for the next command cycle. |
| 7228 | */ |
| 7229 | aic_outb(p, SEEMS, SEECTL); |
| 7230 | CLOCK_PULSE(p); |
| 7231 | aic_outb(p, SEEMS | SEECK, SEECTL); |
| 7232 | CLOCK_PULSE(p); |
| 7233 | aic_outb(p, SEEMS, SEECTL); |
| 7234 | CLOCK_PULSE(p); |
| 7235 | } |
| 7236 | |
| 7237 | /* |
| 7238 | * Release access to the memory port and the serial EEPROM. |
| 7239 | */ |
| 7240 | release_seeprom(p); |
| 7241 | |
| 7242 | #if 0 |
| 7243 | printk("Computed checksum 0x%x, checksum read 0x%x\n", |
| 7244 | checksum, scarray[len - 1]); |
| 7245 | printk("Serial EEPROM:"); |
| 7246 | for (k = 0; k < len; k++) |
| 7247 | { |
| 7248 | if (((k % 8) == 0) && (k != 0)) |
| 7249 | { |
| 7250 | printk("\n "); |
| 7251 | } |
| 7252 | printk(" 0x%x", scarray[k]); |
| 7253 | } |
| 7254 | printk("\n"); |
| 7255 | #endif |
| 7256 | if ( (checksum != scarray[len - 1]) || (checksum == 0) ) |
| 7257 | { |
| 7258 | return (0); |
| 7259 | } |
| 7260 | |
| 7261 | return (1); |
| 7262 | } |
| 7263 | |
| 7264 | /*+F************************************************************************* |
| 7265 | * Function: |
| 7266 | * read_brdctl |
| 7267 | * |
| 7268 | * Description: |
| 7269 | * Reads the BRDCTL register. |
| 7270 | *-F*************************************************************************/ |
| 7271 | static unsigned char |
| 7272 | read_brdctl(struct aic7xxx_host *p) |
| 7273 | { |
| 7274 | unsigned char brdctl, value; |
| 7275 | |
| 7276 | /* |
| 7277 | * Make sure the SEEPROM is ready before we access it |
| 7278 | */ |
| 7279 | CLOCK_PULSE(p); |
| 7280 | if (p->features & AHC_ULTRA2) |
| 7281 | { |
| 7282 | brdctl = BRDRW_ULTRA2; |
| 7283 | aic_outb(p, brdctl, BRDCTL); |
| 7284 | CLOCK_PULSE(p); |
| 7285 | value = aic_inb(p, BRDCTL); |
| 7286 | CLOCK_PULSE(p); |
| 7287 | return(value); |
| 7288 | } |
| 7289 | brdctl = BRDRW; |
| 7290 | if ( !((p->chip & AHC_CHIPID_MASK) == AHC_AIC7895) || |
| 7291 | (p->flags & AHC_CHNLB) ) |
| 7292 | { |
| 7293 | brdctl |= BRDCS; |
| 7294 | } |
| 7295 | aic_outb(p, brdctl, BRDCTL); |
| 7296 | CLOCK_PULSE(p); |
| 7297 | value = aic_inb(p, BRDCTL); |
| 7298 | CLOCK_PULSE(p); |
| 7299 | aic_outb(p, 0, BRDCTL); |
| 7300 | CLOCK_PULSE(p); |
| 7301 | return (value); |
| 7302 | } |
| 7303 | |
| 7304 | /*+F************************************************************************* |
| 7305 | * Function: |
| 7306 | * write_brdctl |
| 7307 | * |
| 7308 | * Description: |
| 7309 | * Writes a value to the BRDCTL register. |
| 7310 | *-F*************************************************************************/ |
| 7311 | static void |
| 7312 | write_brdctl(struct aic7xxx_host *p, unsigned char value) |
| 7313 | { |
| 7314 | unsigned char brdctl; |
| 7315 | |
| 7316 | /* |
| 7317 | * Make sure the SEEPROM is ready before we access it |
| 7318 | */ |
| 7319 | CLOCK_PULSE(p); |
| 7320 | if (p->features & AHC_ULTRA2) |
| 7321 | { |
| 7322 | brdctl = value; |
| 7323 | aic_outb(p, brdctl, BRDCTL); |
| 7324 | CLOCK_PULSE(p); |
| 7325 | brdctl |= BRDSTB_ULTRA2; |
| 7326 | aic_outb(p, brdctl, BRDCTL); |
| 7327 | CLOCK_PULSE(p); |
| 7328 | brdctl &= ~BRDSTB_ULTRA2; |
| 7329 | aic_outb(p, brdctl, BRDCTL); |
| 7330 | CLOCK_PULSE(p); |
| 7331 | read_brdctl(p); |
| 7332 | CLOCK_PULSE(p); |
| 7333 | } |
| 7334 | else |
| 7335 | { |
| 7336 | brdctl = BRDSTB; |
| 7337 | if ( !((p->chip & AHC_CHIPID_MASK) == AHC_AIC7895) || |
| 7338 | (p->flags & AHC_CHNLB) ) |
| 7339 | { |
| 7340 | brdctl |= BRDCS; |
| 7341 | } |
| 7342 | brdctl = BRDSTB | BRDCS; |
| 7343 | aic_outb(p, brdctl, BRDCTL); |
| 7344 | CLOCK_PULSE(p); |
| 7345 | brdctl |= value; |
| 7346 | aic_outb(p, brdctl, BRDCTL); |
| 7347 | CLOCK_PULSE(p); |
| 7348 | brdctl &= ~BRDSTB; |
| 7349 | aic_outb(p, brdctl, BRDCTL); |
| 7350 | CLOCK_PULSE(p); |
| 7351 | brdctl &= ~BRDCS; |
| 7352 | aic_outb(p, brdctl, BRDCTL); |
| 7353 | CLOCK_PULSE(p); |
| 7354 | } |
| 7355 | } |
| 7356 | |
| 7357 | /*+F************************************************************************* |
| 7358 | * Function: |
| 7359 | * aic785x_cable_detect |
| 7360 | * |
| 7361 | * Description: |
| 7362 | * Detect the cables that are present on aic785x class controller chips |
| 7363 | *-F*************************************************************************/ |
| 7364 | static void |
| 7365 | aic785x_cable_detect(struct aic7xxx_host *p, int *int_50, |
| 7366 | int *ext_present, int *eeprom) |
| 7367 | { |
| 7368 | unsigned char brdctl; |
| 7369 | |
| 7370 | aic_outb(p, BRDRW | BRDCS, BRDCTL); |
| 7371 | CLOCK_PULSE(p); |
| 7372 | aic_outb(p, 0, BRDCTL); |
| 7373 | CLOCK_PULSE(p); |
| 7374 | brdctl = aic_inb(p, BRDCTL); |
| 7375 | CLOCK_PULSE(p); |
| 7376 | *int_50 = !(brdctl & BRDDAT5); |
| 7377 | *ext_present = !(brdctl & BRDDAT6); |
| 7378 | *eeprom = (aic_inb(p, SPIOCAP) & EEPROM); |
| 7379 | } |
| 7380 | |
| 7381 | #undef CLOCK_PULSE |
| 7382 | |
| 7383 | /*+F************************************************************************* |
| 7384 | * Function: |
| 7385 | * aic2940_uwpro_cable_detect |
| 7386 | * |
| 7387 | * Description: |
| 7388 | * Detect the cables that are present on the 2940-UWPro cards |
| 7389 | * |
| 7390 | * NOTE: This function assumes the SEEPROM will have already been acquired |
| 7391 | * prior to invocation of this function. |
| 7392 | *-F*************************************************************************/ |
| 7393 | static void |
| 7394 | aic2940_uwpro_wide_cable_detect(struct aic7xxx_host *p, int *int_68, |
| 7395 | int *ext_68, int *eeprom) |
| 7396 | { |
| 7397 | unsigned char brdctl; |
| 7398 | |
| 7399 | /* |
| 7400 | * First read the status of our cables. Set the rom bank to |
| 7401 | * 0 since the bank setting serves as a multiplexor for the |
| 7402 | * cable detection logic. BRDDAT5 controls the bank switch. |
| 7403 | */ |
| 7404 | write_brdctl(p, 0); |
| 7405 | |
| 7406 | /* |
| 7407 | * Now we read the state of the internal 68 connector. BRDDAT6 |
| 7408 | * is don't care, BRDDAT7 is internal 68. The cable is |
| 7409 | * present if the bit is 0 |
| 7410 | */ |
| 7411 | brdctl = read_brdctl(p); |
| 7412 | *int_68 = !(brdctl & BRDDAT7); |
| 7413 | |
| 7414 | /* |
| 7415 | * Set the bank bit in brdctl and then read the external cable state |
| 7416 | * and the EEPROM status |
| 7417 | */ |
| 7418 | write_brdctl(p, BRDDAT5); |
| 7419 | brdctl = read_brdctl(p); |
| 7420 | |
| 7421 | *ext_68 = !(brdctl & BRDDAT6); |
| 7422 | *eeprom = !(brdctl & BRDDAT7); |
| 7423 | |
| 7424 | /* |
| 7425 | * We're done, the calling function will release the SEEPROM for us |
| 7426 | */ |
| 7427 | } |
| 7428 | |
| 7429 | /*+F************************************************************************* |
| 7430 | * Function: |
| 7431 | * aic787x_cable_detect |
| 7432 | * |
| 7433 | * Description: |
| 7434 | * Detect the cables that are present on aic787x class controller chips |
| 7435 | * |
| 7436 | * NOTE: This function assumes the SEEPROM will have already been acquired |
| 7437 | * prior to invocation of this function. |
| 7438 | *-F*************************************************************************/ |
| 7439 | static void |
| 7440 | aic787x_cable_detect(struct aic7xxx_host *p, int *int_50, int *int_68, |
| 7441 | int *ext_present, int *eeprom) |
| 7442 | { |
| 7443 | unsigned char brdctl; |
| 7444 | |
| 7445 | /* |
| 7446 | * First read the status of our cables. Set the rom bank to |
| 7447 | * 0 since the bank setting serves as a multiplexor for the |
| 7448 | * cable detection logic. BRDDAT5 controls the bank switch. |
| 7449 | */ |
| 7450 | write_brdctl(p, 0); |
| 7451 | |
| 7452 | /* |
| 7453 | * Now we read the state of the two internal connectors. BRDDAT6 |
| 7454 | * is internal 50, BRDDAT7 is internal 68. For each, the cable is |
| 7455 | * present if the bit is 0 |
| 7456 | */ |
| 7457 | brdctl = read_brdctl(p); |
| 7458 | *int_50 = !(brdctl & BRDDAT6); |
| 7459 | *int_68 = !(brdctl & BRDDAT7); |
| 7460 | |
| 7461 | /* |
| 7462 | * Set the bank bit in brdctl and then read the external cable state |
| 7463 | * and the EEPROM status |
| 7464 | */ |
| 7465 | write_brdctl(p, BRDDAT5); |
| 7466 | brdctl = read_brdctl(p); |
| 7467 | |
| 7468 | *ext_present = !(brdctl & BRDDAT6); |
| 7469 | *eeprom = !(brdctl & BRDDAT7); |
| 7470 | |
| 7471 | /* |
| 7472 | * We're done, the calling function will release the SEEPROM for us |
| 7473 | */ |
| 7474 | } |
| 7475 | |
| 7476 | /*+F************************************************************************* |
| 7477 | * Function: |
| 7478 | * aic787x_ultra2_term_detect |
| 7479 | * |
| 7480 | * Description: |
| 7481 | * Detect the termination settings present on ultra2 class controllers |
| 7482 | * |
| 7483 | * NOTE: This function assumes the SEEPROM will have already been acquired |
| 7484 | * prior to invocation of this function. |
| 7485 | *-F*************************************************************************/ |
| 7486 | static void |
| 7487 | aic7xxx_ultra2_term_detect(struct aic7xxx_host *p, int *enableSE_low, |
| 7488 | int *enableSE_high, int *enableLVD_low, |
| 7489 | int *enableLVD_high, int *eprom_present) |
| 7490 | { |
| 7491 | unsigned char brdctl; |
| 7492 | |
| 7493 | brdctl = read_brdctl(p); |
| 7494 | |
| 7495 | *eprom_present = (brdctl & BRDDAT7); |
| 7496 | *enableSE_high = (brdctl & BRDDAT6); |
| 7497 | *enableSE_low = (brdctl & BRDDAT5); |
| 7498 | *enableLVD_high = (brdctl & BRDDAT4); |
| 7499 | *enableLVD_low = (brdctl & BRDDAT3); |
| 7500 | } |
| 7501 | |
| 7502 | /*+F************************************************************************* |
| 7503 | * Function: |
| 7504 | * configure_termination |
| 7505 | * |
| 7506 | * Description: |
| 7507 | * Configures the termination settings on PCI adapters that have |
| 7508 | * SEEPROMs available. |
| 7509 | *-F*************************************************************************/ |
| 7510 | static void |
| 7511 | configure_termination(struct aic7xxx_host *p) |
| 7512 | { |
| 7513 | int internal50_present = 0; |
| 7514 | int internal68_present = 0; |
| 7515 | int external_present = 0; |
| 7516 | int eprom_present = 0; |
| 7517 | int enableSE_low = 0; |
| 7518 | int enableSE_high = 0; |
| 7519 | int enableLVD_low = 0; |
| 7520 | int enableLVD_high = 0; |
| 7521 | unsigned char brddat = 0; |
| 7522 | unsigned char max_target = 0; |
| 7523 | unsigned char sxfrctl1 = aic_inb(p, SXFRCTL1); |
| 7524 | |
| 7525 | if (acquire_seeprom(p)) |
| 7526 | { |
| 7527 | if (p->features & (AHC_WIDE|AHC_TWIN)) |
| 7528 | max_target = 16; |
| 7529 | else |
| 7530 | max_target = 8; |
| 7531 | aic_outb(p, SEEMS | SEECS, SEECTL); |
| 7532 | sxfrctl1 &= ~STPWEN; |
| 7533 | /* |
| 7534 | * The termination/cable detection logic is split into three distinct |
| 7535 | * groups. Ultra2 and later controllers, 2940UW-Pro controllers, and |
| 7536 | * older 7850, 7860, 7870, 7880, and 7895 controllers. Each has its |
| 7537 | * own unique way of detecting their cables and writing the results |
| 7538 | * back to the card. |
| 7539 | */ |
| 7540 | if (p->features & AHC_ULTRA2) |
| 7541 | { |
| 7542 | /* |
| 7543 | * As long as user hasn't overridden term settings, always check the |
| 7544 | * cable detection logic |
| 7545 | */ |
| 7546 | if (aic7xxx_override_term == -1) |
| 7547 | { |
| 7548 | aic7xxx_ultra2_term_detect(p, &enableSE_low, &enableSE_high, |
| 7549 | &enableLVD_low, &enableLVD_high, |
| 7550 | &eprom_present); |
| 7551 | } |
| 7552 | |
| 7553 | /* |
| 7554 | * If the user is overriding settings, then they have been preserved |
| 7555 | * to here as fake adapter_control entries. Parse them and allow |
| 7556 | * them to override the detected settings (if we even did detection). |
| 7557 | */ |
| 7558 | if (!(p->adapter_control & CFSEAUTOTERM)) |
| 7559 | { |
| 7560 | enableSE_low = (p->adapter_control & CFSTERM); |
| 7561 | enableSE_high = (p->adapter_control & CFWSTERM); |
| 7562 | } |
| 7563 | if (!(p->adapter_control & CFAUTOTERM)) |
| 7564 | { |
| 7565 | enableLVD_low = enableLVD_high = (p->adapter_control & CFLVDSTERM); |
| 7566 | } |
| 7567 | |
| 7568 | /* |
| 7569 | * Now take those settings that we have and translate them into the |
| 7570 | * values that must be written into the registers. |
| 7571 | * |
| 7572 | * Flash Enable = BRDDAT7 |
| 7573 | * Secondary High Term Enable = BRDDAT6 |
| 7574 | * Secondary Low Term Enable = BRDDAT5 |
| 7575 | * LVD/Primary High Term Enable = BRDDAT4 |
| 7576 | * LVD/Primary Low Term Enable = STPWEN bit in SXFRCTL1 |
| 7577 | */ |
| 7578 | if (enableLVD_low != 0) |
| 7579 | { |
| 7580 | sxfrctl1 |= STPWEN; |
| 7581 | p->flags |= AHC_TERM_ENB_LVD; |
| 7582 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 7583 | printk(KERN_INFO "(scsi%d) LVD/Primary Low byte termination " |
| 7584 | "Enabled\n", p->host_no); |
| 7585 | } |
| 7586 | |
| 7587 | if (enableLVD_high != 0) |
| 7588 | { |
| 7589 | brddat |= BRDDAT4; |
| 7590 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 7591 | printk(KERN_INFO "(scsi%d) LVD/Primary High byte termination " |
| 7592 | "Enabled\n", p->host_no); |
| 7593 | } |
| 7594 | |
| 7595 | if (enableSE_low != 0) |
| 7596 | { |
| 7597 | brddat |= BRDDAT5; |
| 7598 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 7599 | printk(KERN_INFO "(scsi%d) Secondary Low byte termination " |
| 7600 | "Enabled\n", p->host_no); |
| 7601 | } |
| 7602 | |
| 7603 | if (enableSE_high != 0) |
| 7604 | { |
| 7605 | brddat |= BRDDAT6; |
| 7606 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 7607 | printk(KERN_INFO "(scsi%d) Secondary High byte termination " |
| 7608 | "Enabled\n", p->host_no); |
| 7609 | } |
| 7610 | } |
| 7611 | else if (p->features & AHC_NEW_AUTOTERM) |
| 7612 | { |
| 7613 | /* |
| 7614 | * The 50 pin connector termination is controlled by STPWEN in the |
| 7615 | * SXFRCTL1 register. Since the Adaptec docs typically say the |
| 7616 | * controller is not allowed to be in the middle of a cable and |
| 7617 | * this is the only connection on that stub of the bus, there is |
| 7618 | * no need to even check for narrow termination, it's simply |
| 7619 | * always on. |
| 7620 | */ |
| 7621 | sxfrctl1 |= STPWEN; |
| 7622 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 7623 | printk(KERN_INFO "(scsi%d) Narrow channel termination Enabled\n", |
| 7624 | p->host_no); |
| 7625 | |
| 7626 | if (p->adapter_control & CFAUTOTERM) |
| 7627 | { |
| 7628 | aic2940_uwpro_wide_cable_detect(p, &internal68_present, |
| 7629 | &external_present, |
| 7630 | &eprom_present); |
| 7631 | printk(KERN_INFO "(scsi%d) Cables present (Int-50 %s, Int-68 %s, " |
| 7632 | "Ext-68 %s)\n", p->host_no, |
| 7633 | "Don't Care", |
| 7634 | internal68_present ? "YES" : "NO", |
| 7635 | external_present ? "YES" : "NO"); |
| 7636 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 7637 | printk(KERN_INFO "(scsi%d) EEPROM %s present.\n", p->host_no, |
| 7638 | eprom_present ? "is" : "is not"); |
| 7639 | if (internal68_present && external_present) |
| 7640 | { |
| 7641 | brddat = 0; |
| 7642 | p->flags &= ~AHC_TERM_ENB_SE_HIGH; |
| 7643 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 7644 | printk(KERN_INFO "(scsi%d) Wide channel termination Disabled\n", |
| 7645 | p->host_no); |
| 7646 | } |
| 7647 | else |
| 7648 | { |
| 7649 | brddat = BRDDAT6; |
| 7650 | p->flags |= AHC_TERM_ENB_SE_HIGH; |
| 7651 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 7652 | printk(KERN_INFO "(scsi%d) Wide channel termination Enabled\n", |
| 7653 | p->host_no); |
| 7654 | } |
| 7655 | } |
| 7656 | else |
| 7657 | { |
| 7658 | /* |
| 7659 | * The termination of the Wide channel is done more like normal |
| 7660 | * though, and the setting of this termination is done by writing |
| 7661 | * either a 0 or 1 to BRDDAT6 of the BRDDAT register |
| 7662 | */ |
| 7663 | if (p->adapter_control & CFWSTERM) |
| 7664 | { |
| 7665 | brddat = BRDDAT6; |
| 7666 | p->flags |= AHC_TERM_ENB_SE_HIGH; |
| 7667 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 7668 | printk(KERN_INFO "(scsi%d) Wide channel termination Enabled\n", |
| 7669 | p->host_no); |
| 7670 | } |
| 7671 | else |
| 7672 | { |
| 7673 | brddat = 0; |
| 7674 | } |
| 7675 | } |
| 7676 | } |
| 7677 | else |
| 7678 | { |
| 7679 | if (p->adapter_control & CFAUTOTERM) |
| 7680 | { |
| 7681 | if (p->flags & AHC_MOTHERBOARD) |
| 7682 | { |
| 7683 | printk(KERN_INFO "(scsi%d) Warning - detected auto-termination\n", |
| 7684 | p->host_no); |
| 7685 | printk(KERN_INFO "(scsi%d) Please verify driver detected settings " |
| 7686 | "are correct.\n", p->host_no); |
| 7687 | printk(KERN_INFO "(scsi%d) If not, then please properly set the " |
| 7688 | "device termination\n", p->host_no); |
| 7689 | printk(KERN_INFO "(scsi%d) in the Adaptec SCSI BIOS by hitting " |
| 7690 | "CTRL-A when prompted\n", p->host_no); |
| 7691 | printk(KERN_INFO "(scsi%d) during machine bootup.\n", p->host_no); |
| 7692 | } |
| 7693 | /* Configure auto termination. */ |
| 7694 | |
| 7695 | if ( (p->chip & AHC_CHIPID_MASK) >= AHC_AIC7870 ) |
| 7696 | { |
| 7697 | aic787x_cable_detect(p, &internal50_present, &internal68_present, |
| 7698 | &external_present, &eprom_present); |
| 7699 | } |
| 7700 | else |
| 7701 | { |
| 7702 | aic785x_cable_detect(p, &internal50_present, &external_present, |
| 7703 | &eprom_present); |
| 7704 | } |
| 7705 | |
| 7706 | if (max_target <= 8) |
| 7707 | internal68_present = 0; |
| 7708 | |
| 7709 | if (max_target > 8) |
| 7710 | { |
| 7711 | printk(KERN_INFO "(scsi%d) Cables present (Int-50 %s, Int-68 %s, " |
| 7712 | "Ext-68 %s)\n", p->host_no, |
| 7713 | internal50_present ? "YES" : "NO", |
| 7714 | internal68_present ? "YES" : "NO", |
| 7715 | external_present ? "YES" : "NO"); |
| 7716 | } |
| 7717 | else |
| 7718 | { |
| 7719 | printk(KERN_INFO "(scsi%d) Cables present (Int-50 %s, Ext-50 %s)\n", |
| 7720 | p->host_no, |
| 7721 | internal50_present ? "YES" : "NO", |
| 7722 | external_present ? "YES" : "NO"); |
| 7723 | } |
| 7724 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 7725 | printk(KERN_INFO "(scsi%d) EEPROM %s present.\n", p->host_no, |
| 7726 | eprom_present ? "is" : "is not"); |
| 7727 | |
| 7728 | /* |
| 7729 | * Now set the termination based on what we found. BRDDAT6 |
| 7730 | * controls wide termination enable. |
| 7731 | * Flash Enable = BRDDAT7 |
| 7732 | * SE High Term Enable = BRDDAT6 |
| 7733 | */ |
| 7734 | if (internal50_present && internal68_present && external_present) |
| 7735 | { |
| 7736 | printk(KERN_INFO "(scsi%d) Illegal cable configuration!! Only two\n", |
| 7737 | p->host_no); |
| 7738 | printk(KERN_INFO "(scsi%d) connectors on the SCSI controller may be " |
| 7739 | "in use at a time!\n", p->host_no); |
| 7740 | /* |
| 7741 | * Force termination (low and high byte) on. This is safer than |
| 7742 | * leaving it completely off, especially since this message comes |
| 7743 | * most often from motherboard controllers that don't even have 3 |
| 7744 | * connectors, but instead are failing the cable detection. |
| 7745 | */ |
| 7746 | internal50_present = external_present = 0; |
| 7747 | enableSE_high = enableSE_low = 1; |
| 7748 | } |
| 7749 | |
| 7750 | if ((max_target > 8) && |
| 7751 | ((external_present == 0) || (internal68_present == 0)) ) |
| 7752 | { |
| 7753 | brddat |= BRDDAT6; |
| 7754 | p->flags |= AHC_TERM_ENB_SE_HIGH; |
| 7755 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 7756 | printk(KERN_INFO "(scsi%d) SE High byte termination Enabled\n", |
| 7757 | p->host_no); |
| 7758 | } |
| 7759 | |
| 7760 | if ( ((internal50_present ? 1 : 0) + |
| 7761 | (internal68_present ? 1 : 0) + |
| 7762 | (external_present ? 1 : 0)) <= 1 ) |
| 7763 | { |
| 7764 | sxfrctl1 |= STPWEN; |
| 7765 | p->flags |= AHC_TERM_ENB_SE_LOW; |
| 7766 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 7767 | printk(KERN_INFO "(scsi%d) SE Low byte termination Enabled\n", |
| 7768 | p->host_no); |
| 7769 | } |
| 7770 | } |
| 7771 | else /* p->adapter_control & CFAUTOTERM */ |
| 7772 | { |
| 7773 | if (p->adapter_control & CFSTERM) |
| 7774 | { |
| 7775 | sxfrctl1 |= STPWEN; |
| 7776 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 7777 | printk(KERN_INFO "(scsi%d) SE Low byte termination Enabled\n", |
| 7778 | p->host_no); |
| 7779 | } |
| 7780 | |
| 7781 | if (p->adapter_control & CFWSTERM) |
| 7782 | { |
| 7783 | brddat |= BRDDAT6; |
| 7784 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 7785 | printk(KERN_INFO "(scsi%d) SE High byte termination Enabled\n", |
| 7786 | p->host_no); |
| 7787 | } |
| 7788 | } |
| 7789 | } |
| 7790 | |
| 7791 | aic_outb(p, sxfrctl1, SXFRCTL1); |
| 7792 | write_brdctl(p, brddat); |
| 7793 | release_seeprom(p); |
| 7794 | } |
| 7795 | } |
| 7796 | |
| 7797 | /*+F************************************************************************* |
| 7798 | * Function: |
| 7799 | * detect_maxscb |
| 7800 | * |
| 7801 | * Description: |
| 7802 | * Detects the maximum number of SCBs for the controller and returns |
| 7803 | * the count and a mask in p (p->maxscbs, p->qcntmask). |
| 7804 | *-F*************************************************************************/ |
| 7805 | static void |
| 7806 | detect_maxscb(struct aic7xxx_host *p) |
| 7807 | { |
| 7808 | int i; |
| 7809 | |
| 7810 | /* |
| 7811 | * It's possible that we've already done this for multichannel |
| 7812 | * adapters. |
| 7813 | */ |
| 7814 | if (p->scb_data->maxhscbs == 0) |
| 7815 | { |
| 7816 | /* |
| 7817 | * We haven't initialized the SCB settings yet. Walk the SCBs to |
| 7818 | * determince how many there are. |
| 7819 | */ |
| 7820 | aic_outb(p, 0, FREE_SCBH); |
| 7821 | |
| 7822 | for (i = 0; i < AIC7XXX_MAXSCB; i++) |
| 7823 | { |
| 7824 | aic_outb(p, i, SCBPTR); |
| 7825 | aic_outb(p, i, SCB_CONTROL); |
| 7826 | if (aic_inb(p, SCB_CONTROL) != i) |
| 7827 | break; |
| 7828 | aic_outb(p, 0, SCBPTR); |
| 7829 | if (aic_inb(p, SCB_CONTROL) != 0) |
| 7830 | break; |
| 7831 | |
| 7832 | aic_outb(p, i, SCBPTR); |
| 7833 | aic_outb(p, 0, SCB_CONTROL); /* Clear the control byte. */ |
| 7834 | aic_outb(p, i + 1, SCB_NEXT); /* Set the next pointer. */ |
| 7835 | aic_outb(p, SCB_LIST_NULL, SCB_TAG); /* Make the tag invalid. */ |
| 7836 | aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS); /* no busy untagged */ |
| 7837 | aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS+1);/* targets active yet */ |
| 7838 | aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS+2); |
| 7839 | aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS+3); |
| 7840 | } |
| 7841 | |
| 7842 | /* Make sure the last SCB terminates the free list. */ |
| 7843 | aic_outb(p, i - 1, SCBPTR); |
| 7844 | aic_outb(p, SCB_LIST_NULL, SCB_NEXT); |
| 7845 | |
| 7846 | /* Ensure we clear the first (0) SCBs control byte. */ |
| 7847 | aic_outb(p, 0, SCBPTR); |
| 7848 | aic_outb(p, 0, SCB_CONTROL); |
| 7849 | |
| 7850 | p->scb_data->maxhscbs = i; |
| 7851 | /* |
| 7852 | * Use direct indexing instead for speed |
| 7853 | */ |
| 7854 | if ( i == AIC7XXX_MAXSCB ) |
| 7855 | p->flags &= ~AHC_PAGESCBS; |
| 7856 | } |
| 7857 | |
| 7858 | } |
| 7859 | |
| 7860 | /*+F************************************************************************* |
| 7861 | * Function: |
| 7862 | * aic7xxx_register |
| 7863 | * |
| 7864 | * Description: |
| 7865 | * Register a Adaptec aic7xxx chip SCSI controller with the kernel. |
| 7866 | *-F*************************************************************************/ |
| 7867 | static int |
Christoph Hellwig | d0be4a7d | 2005-10-31 18:31:40 +0100 | [diff] [blame] | 7868 | aic7xxx_register(struct scsi_host_template *template, struct aic7xxx_host *p, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7869 | int reset_delay) |
| 7870 | { |
| 7871 | int i, result; |
| 7872 | int max_targets; |
| 7873 | int found = 1; |
| 7874 | unsigned char term, scsi_conf; |
| 7875 | struct Scsi_Host *host; |
| 7876 | |
| 7877 | host = p->host; |
| 7878 | |
| 7879 | p->scb_data->maxscbs = AIC7XXX_MAXSCB; |
| 7880 | host->can_queue = AIC7XXX_MAXSCB; |
| 7881 | host->cmd_per_lun = 3; |
| 7882 | host->sg_tablesize = AIC7XXX_MAX_SG; |
| 7883 | host->this_id = p->scsi_id; |
| 7884 | host->io_port = p->base; |
| 7885 | host->n_io_port = 0xFF; |
| 7886 | host->base = p->mbase; |
| 7887 | host->irq = p->irq; |
| 7888 | if (p->features & AHC_WIDE) |
| 7889 | { |
| 7890 | host->max_id = 16; |
| 7891 | } |
| 7892 | if (p->features & AHC_TWIN) |
| 7893 | { |
| 7894 | host->max_channel = 1; |
| 7895 | } |
| 7896 | |
| 7897 | p->host = host; |
| 7898 | p->host_no = host->host_no; |
| 7899 | host->unique_id = p->instance; |
| 7900 | p->isr_count = 0; |
| 7901 | p->next = NULL; |
| 7902 | p->completeq.head = NULL; |
| 7903 | p->completeq.tail = NULL; |
| 7904 | scbq_init(&p->scb_data->free_scbs); |
| 7905 | scbq_init(&p->waiting_scbs); |
| 7906 | INIT_LIST_HEAD(&p->aic_devs); |
| 7907 | |
| 7908 | /* |
| 7909 | * We currently have no commands of any type |
| 7910 | */ |
| 7911 | p->qinfifonext = 0; |
| 7912 | p->qoutfifonext = 0; |
| 7913 | |
| 7914 | printk(KERN_INFO "(scsi%d) <%s> found at ", p->host_no, |
| 7915 | board_names[p->board_name_index]); |
| 7916 | switch(p->chip) |
| 7917 | { |
| 7918 | case (AHC_AIC7770|AHC_EISA): |
| 7919 | printk("EISA slot %d\n", p->pci_device_fn); |
| 7920 | break; |
| 7921 | case (AHC_AIC7770|AHC_VL): |
| 7922 | printk("VLB slot %d\n", p->pci_device_fn); |
| 7923 | break; |
| 7924 | default: |
| 7925 | printk("PCI %d/%d/%d\n", p->pci_bus, PCI_SLOT(p->pci_device_fn), |
| 7926 | PCI_FUNC(p->pci_device_fn)); |
| 7927 | break; |
| 7928 | } |
| 7929 | if (p->features & AHC_TWIN) |
| 7930 | { |
| 7931 | printk(KERN_INFO "(scsi%d) Twin Channel, A SCSI ID %d, B SCSI ID %d, ", |
| 7932 | p->host_no, p->scsi_id, p->scsi_id_b); |
| 7933 | } |
| 7934 | else |
| 7935 | { |
| 7936 | char *channel; |
| 7937 | |
| 7938 | channel = ""; |
| 7939 | |
| 7940 | if ((p->flags & AHC_MULTI_CHANNEL) != 0) |
| 7941 | { |
| 7942 | channel = " A"; |
| 7943 | |
| 7944 | if ( (p->flags & (AHC_CHNLB|AHC_CHNLC)) != 0 ) |
| 7945 | { |
| 7946 | channel = (p->flags & AHC_CHNLB) ? " B" : " C"; |
| 7947 | } |
| 7948 | } |
| 7949 | if (p->features & AHC_WIDE) |
| 7950 | { |
| 7951 | printk(KERN_INFO "(scsi%d) Wide ", p->host_no); |
| 7952 | } |
| 7953 | else |
| 7954 | { |
| 7955 | printk(KERN_INFO "(scsi%d) Narrow ", p->host_no); |
| 7956 | } |
| 7957 | printk("Channel%s, SCSI ID=%d, ", channel, p->scsi_id); |
| 7958 | } |
| 7959 | aic_outb(p, 0, SEQ_FLAGS); |
| 7960 | |
| 7961 | detect_maxscb(p); |
| 7962 | |
| 7963 | printk("%d/%d SCBs\n", p->scb_data->maxhscbs, p->scb_data->maxscbs); |
| 7964 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 7965 | { |
| 7966 | printk(KERN_INFO "(scsi%d) BIOS %sabled, IO Port 0x%lx, IRQ %d\n", |
| 7967 | p->host_no, (p->flags & AHC_BIOS_ENABLED) ? "en" : "dis", |
| 7968 | p->base, p->irq); |
| 7969 | printk(KERN_INFO "(scsi%d) IO Memory at 0x%lx, MMAP Memory at %p\n", |
| 7970 | p->host_no, p->mbase, p->maddr); |
| 7971 | } |
| 7972 | |
| 7973 | #ifdef CONFIG_PCI |
| 7974 | /* |
| 7975 | * Now that we know our instance number, we can set the flags we need to |
| 7976 | * force termination if need be. |
| 7977 | */ |
| 7978 | if (aic7xxx_stpwlev != -1) |
| 7979 | { |
| 7980 | /* |
| 7981 | * This option only applies to PCI controllers. |
| 7982 | */ |
| 7983 | if ( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI) |
| 7984 | { |
| 7985 | unsigned char devconfig; |
| 7986 | |
| 7987 | pci_read_config_byte(p->pdev, DEVCONFIG, &devconfig); |
| 7988 | if ( (aic7xxx_stpwlev >> p->instance) & 0x01 ) |
| 7989 | { |
| 7990 | devconfig |= STPWLEVEL; |
| 7991 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 7992 | printk("(scsi%d) Force setting STPWLEVEL bit\n", p->host_no); |
| 7993 | } |
| 7994 | else |
| 7995 | { |
| 7996 | devconfig &= ~STPWLEVEL; |
| 7997 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 7998 | printk("(scsi%d) Force clearing STPWLEVEL bit\n", p->host_no); |
| 7999 | } |
| 8000 | pci_write_config_byte(p->pdev, DEVCONFIG, devconfig); |
| 8001 | } |
| 8002 | } |
| 8003 | #endif |
| 8004 | |
| 8005 | /* |
| 8006 | * That took care of devconfig and stpwlev, now for the actual termination |
| 8007 | * settings. |
| 8008 | */ |
| 8009 | if (aic7xxx_override_term != -1) |
| 8010 | { |
| 8011 | /* |
| 8012 | * Again, this only applies to PCI controllers. We don't have problems |
| 8013 | * with the termination on 274x controllers to the best of my knowledge. |
| 8014 | */ |
| 8015 | if ( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI) |
| 8016 | { |
| 8017 | unsigned char term_override; |
| 8018 | |
| 8019 | term_override = ( (aic7xxx_override_term >> (p->instance * 4)) & 0x0f); |
| 8020 | p->adapter_control &= |
| 8021 | ~(CFSTERM|CFWSTERM|CFLVDSTERM|CFAUTOTERM|CFSEAUTOTERM); |
| 8022 | if ( (p->features & AHC_ULTRA2) && (term_override & 0x0c) ) |
| 8023 | { |
| 8024 | p->adapter_control |= CFLVDSTERM; |
| 8025 | } |
| 8026 | if (term_override & 0x02) |
| 8027 | { |
| 8028 | p->adapter_control |= CFWSTERM; |
| 8029 | } |
| 8030 | if (term_override & 0x01) |
| 8031 | { |
| 8032 | p->adapter_control |= CFSTERM; |
| 8033 | } |
| 8034 | } |
| 8035 | } |
| 8036 | |
| 8037 | if ( (p->flags & AHC_SEEPROM_FOUND) || (aic7xxx_override_term != -1) ) |
| 8038 | { |
| 8039 | if (p->features & AHC_SPIOCAP) |
| 8040 | { |
| 8041 | if ( aic_inb(p, SPIOCAP) & SSPIOCPS ) |
| 8042 | /* |
| 8043 | * Update the settings in sxfrctl1 to match the termination |
| 8044 | * settings. |
| 8045 | */ |
| 8046 | configure_termination(p); |
| 8047 | } |
| 8048 | else if ((p->chip & AHC_CHIPID_MASK) >= AHC_AIC7870) |
| 8049 | { |
| 8050 | configure_termination(p); |
| 8051 | } |
| 8052 | } |
| 8053 | |
| 8054 | /* |
| 8055 | * Set the SCSI Id, SXFRCTL0, SXFRCTL1, and SIMODE1, for both channels |
| 8056 | */ |
| 8057 | if (p->features & AHC_TWIN) |
| 8058 | { |
| 8059 | /* Select channel B */ |
| 8060 | aic_outb(p, aic_inb(p, SBLKCTL) | SELBUSB, SBLKCTL); |
| 8061 | |
| 8062 | if ((p->flags & AHC_SEEPROM_FOUND) || (aic7xxx_override_term != -1)) |
| 8063 | term = (aic_inb(p, SXFRCTL1) & STPWEN); |
| 8064 | else |
| 8065 | term = ((p->flags & AHC_TERM_ENB_B) ? STPWEN : 0); |
| 8066 | |
| 8067 | aic_outb(p, p->scsi_id_b, SCSIID); |
| 8068 | scsi_conf = aic_inb(p, SCSICONF + 1); |
| 8069 | aic_outb(p, DFON | SPIOEN, SXFRCTL0); |
| 8070 | aic_outb(p, (scsi_conf & ENSPCHK) | aic7xxx_seltime | term | |
| 8071 | ENSTIMER | ACTNEGEN, SXFRCTL1); |
| 8072 | aic_outb(p, 0, SIMODE0); |
| 8073 | aic_outb(p, ENSELTIMO | ENSCSIRST | ENSCSIPERR, SIMODE1); |
| 8074 | aic_outb(p, 0, SCSIRATE); |
| 8075 | |
| 8076 | /* Select channel A */ |
| 8077 | aic_outb(p, aic_inb(p, SBLKCTL) & ~SELBUSB, SBLKCTL); |
| 8078 | } |
| 8079 | |
| 8080 | if (p->features & AHC_ULTRA2) |
| 8081 | { |
| 8082 | aic_outb(p, p->scsi_id, SCSIID_ULTRA2); |
| 8083 | } |
| 8084 | else |
| 8085 | { |
| 8086 | aic_outb(p, p->scsi_id, SCSIID); |
| 8087 | } |
| 8088 | if ((p->flags & AHC_SEEPROM_FOUND) || (aic7xxx_override_term != -1)) |
| 8089 | term = (aic_inb(p, SXFRCTL1) & STPWEN); |
| 8090 | else |
| 8091 | term = ((p->flags & (AHC_TERM_ENB_A|AHC_TERM_ENB_LVD)) ? STPWEN : 0); |
| 8092 | scsi_conf = aic_inb(p, SCSICONF); |
| 8093 | aic_outb(p, DFON | SPIOEN, SXFRCTL0); |
| 8094 | aic_outb(p, (scsi_conf & ENSPCHK) | aic7xxx_seltime | term | |
| 8095 | ENSTIMER | ACTNEGEN, SXFRCTL1); |
| 8096 | aic_outb(p, 0, SIMODE0); |
| 8097 | /* |
| 8098 | * If we are a cardbus adapter then don't enable SCSI reset detection. |
| 8099 | * We shouldn't likely be sharing SCSI busses with someone else, and |
| 8100 | * if we don't have a cable currently plugged into the controller then |
| 8101 | * we won't have a power source for the SCSI termination, which means |
| 8102 | * we'll see infinite incoming bus resets. |
| 8103 | */ |
| 8104 | if(p->flags & AHC_NO_STPWEN) |
| 8105 | aic_outb(p, ENSELTIMO | ENSCSIPERR, SIMODE1); |
| 8106 | else |
| 8107 | aic_outb(p, ENSELTIMO | ENSCSIRST | ENSCSIPERR, SIMODE1); |
| 8108 | aic_outb(p, 0, SCSIRATE); |
| 8109 | if ( p->features & AHC_ULTRA2) |
| 8110 | aic_outb(p, 0, SCSIOFFSET); |
| 8111 | |
| 8112 | /* |
| 8113 | * Look at the information that board initialization or the board |
| 8114 | * BIOS has left us. In the lower four bits of each target's |
| 8115 | * scratch space any value other than 0 indicates that we should |
| 8116 | * initiate synchronous transfers. If it's zero, the user or the |
| 8117 | * BIOS has decided to disable synchronous negotiation to that |
| 8118 | * target so we don't activate the needsdtr flag. |
| 8119 | */ |
| 8120 | if ((p->features & (AHC_TWIN|AHC_WIDE)) == 0) |
| 8121 | { |
| 8122 | max_targets = 8; |
| 8123 | } |
| 8124 | else |
| 8125 | { |
| 8126 | max_targets = 16; |
| 8127 | } |
| 8128 | |
| 8129 | if (!(aic7xxx_no_reset)) |
| 8130 | { |
| 8131 | /* |
| 8132 | * If we reset the bus, then clear the transfer settings, else leave |
| 8133 | * them be. |
| 8134 | */ |
| 8135 | aic_outb(p, 0, ULTRA_ENB); |
| 8136 | aic_outb(p, 0, ULTRA_ENB + 1); |
| 8137 | p->ultraenb = 0; |
| 8138 | } |
| 8139 | |
| 8140 | /* |
| 8141 | * Allocate enough hardware scbs to handle the maximum number of |
| 8142 | * concurrent transactions we can have. We have to make sure that |
| 8143 | * the allocated memory is contiguous memory. The Linux kmalloc |
| 8144 | * routine should only allocate contiguous memory, but note that |
| 8145 | * this could be a problem if kmalloc() is changed. |
| 8146 | */ |
| 8147 | { |
| 8148 | size_t array_size; |
| 8149 | unsigned int hscb_physaddr; |
| 8150 | |
| 8151 | array_size = p->scb_data->maxscbs * sizeof(struct aic7xxx_hwscb); |
| 8152 | if (p->scb_data->hscbs == NULL) |
| 8153 | { |
| 8154 | /* pci_alloc_consistent enforces the alignment already and |
| 8155 | * clears the area as well. |
| 8156 | */ |
| 8157 | p->scb_data->hscbs = pci_alloc_consistent(p->pdev, array_size, |
| 8158 | &p->scb_data->hscbs_dma); |
| 8159 | /* We have to use pci_free_consistent, not kfree */ |
| 8160 | p->scb_data->hscb_kmalloc_ptr = NULL; |
| 8161 | p->scb_data->hscbs_dma_len = array_size; |
| 8162 | } |
| 8163 | if (p->scb_data->hscbs == NULL) |
| 8164 | { |
| 8165 | printk("(scsi%d) Unable to allocate hardware SCB array; " |
| 8166 | "failing detection.\n", p->host_no); |
| 8167 | aic_outb(p, 0, SIMODE1); |
| 8168 | p->irq = 0; |
| 8169 | return(0); |
| 8170 | } |
| 8171 | |
| 8172 | hscb_physaddr = p->scb_data->hscbs_dma; |
| 8173 | aic_outb(p, hscb_physaddr & 0xFF, HSCB_ADDR); |
| 8174 | aic_outb(p, (hscb_physaddr >> 8) & 0xFF, HSCB_ADDR + 1); |
| 8175 | aic_outb(p, (hscb_physaddr >> 16) & 0xFF, HSCB_ADDR + 2); |
| 8176 | aic_outb(p, (hscb_physaddr >> 24) & 0xFF, HSCB_ADDR + 3); |
| 8177 | |
| 8178 | /* Set up the fifo areas at the same time */ |
| 8179 | p->untagged_scbs = pci_alloc_consistent(p->pdev, 3*256, &p->fifo_dma); |
| 8180 | if (p->untagged_scbs == NULL) |
| 8181 | { |
| 8182 | printk("(scsi%d) Unable to allocate hardware FIFO arrays; " |
| 8183 | "failing detection.\n", p->host_no); |
| 8184 | p->irq = 0; |
| 8185 | return(0); |
| 8186 | } |
| 8187 | |
| 8188 | p->qoutfifo = p->untagged_scbs + 256; |
| 8189 | p->qinfifo = p->qoutfifo + 256; |
| 8190 | for (i = 0; i < 256; i++) |
| 8191 | { |
| 8192 | p->untagged_scbs[i] = SCB_LIST_NULL; |
| 8193 | p->qinfifo[i] = SCB_LIST_NULL; |
| 8194 | p->qoutfifo[i] = SCB_LIST_NULL; |
| 8195 | } |
| 8196 | |
| 8197 | hscb_physaddr = p->fifo_dma; |
| 8198 | aic_outb(p, hscb_physaddr & 0xFF, SCBID_ADDR); |
| 8199 | aic_outb(p, (hscb_physaddr >> 8) & 0xFF, SCBID_ADDR + 1); |
| 8200 | aic_outb(p, (hscb_physaddr >> 16) & 0xFF, SCBID_ADDR + 2); |
| 8201 | aic_outb(p, (hscb_physaddr >> 24) & 0xFF, SCBID_ADDR + 3); |
| 8202 | } |
| 8203 | |
| 8204 | /* The Q-FIFOs we just set up are all empty */ |
| 8205 | aic_outb(p, 0, QINPOS); |
| 8206 | aic_outb(p, 0, KERNEL_QINPOS); |
| 8207 | aic_outb(p, 0, QOUTPOS); |
| 8208 | |
| 8209 | if(p->features & AHC_QUEUE_REGS) |
| 8210 | { |
| 8211 | aic_outb(p, SCB_QSIZE_256, QOFF_CTLSTA); |
| 8212 | aic_outb(p, 0, SDSCB_QOFF); |
| 8213 | aic_outb(p, 0, SNSCB_QOFF); |
| 8214 | aic_outb(p, 0, HNSCB_QOFF); |
| 8215 | } |
| 8216 | |
| 8217 | /* |
| 8218 | * We don't have any waiting selections or disconnected SCBs. |
| 8219 | */ |
| 8220 | aic_outb(p, SCB_LIST_NULL, WAITING_SCBH); |
| 8221 | aic_outb(p, SCB_LIST_NULL, DISCONNECTED_SCBH); |
| 8222 | |
| 8223 | /* |
| 8224 | * Message out buffer starts empty |
| 8225 | */ |
| 8226 | aic_outb(p, MSG_NOOP, MSG_OUT); |
| 8227 | aic_outb(p, MSG_NOOP, LAST_MSG); |
| 8228 | |
| 8229 | /* |
| 8230 | * Set all the other asundry items that haven't been set yet. |
| 8231 | * This includes just dumping init values to a lot of registers simply |
| 8232 | * to make sure they've been touched and are ready for use parity wise |
| 8233 | * speaking. |
| 8234 | */ |
| 8235 | aic_outb(p, 0, TMODE_CMDADDR); |
| 8236 | aic_outb(p, 0, TMODE_CMDADDR + 1); |
| 8237 | aic_outb(p, 0, TMODE_CMDADDR + 2); |
| 8238 | aic_outb(p, 0, TMODE_CMDADDR + 3); |
| 8239 | aic_outb(p, 0, TMODE_CMDADDR_NEXT); |
| 8240 | |
| 8241 | /* |
| 8242 | * Link us into the list of valid hosts |
| 8243 | */ |
| 8244 | p->next = first_aic7xxx; |
| 8245 | first_aic7xxx = p; |
| 8246 | |
| 8247 | /* |
| 8248 | * Allocate the first set of scbs for this controller. This is to stream- |
| 8249 | * line code elsewhere in the driver. If we have to check for the existence |
| 8250 | * of scbs in certain code sections, it slows things down. However, as |
| 8251 | * soon as we register the IRQ for this card, we could get an interrupt that |
| 8252 | * includes possibly the SCSI_RSTI interrupt. If we catch that interrupt |
| 8253 | * then we are likely to segfault if we don't have at least one chunk of |
| 8254 | * SCBs allocated or add checks all through the reset code to make sure |
| 8255 | * that the SCBs have been allocated which is an invalid running condition |
| 8256 | * and therefore I think it's preferable to simply pre-allocate the first |
| 8257 | * chunk of SCBs. |
| 8258 | */ |
| 8259 | aic7xxx_allocate_scb(p); |
| 8260 | |
| 8261 | /* |
| 8262 | * Load the sequencer program, then re-enable the board - |
| 8263 | * resetting the AIC-7770 disables it, leaving the lights |
| 8264 | * on with nobody home. |
| 8265 | */ |
| 8266 | aic7xxx_loadseq(p); |
| 8267 | |
| 8268 | /* |
| 8269 | * Make sure the AUTOFLUSHDIS bit is *not* set in the SBLKCTL register |
| 8270 | */ |
| 8271 | aic_outb(p, aic_inb(p, SBLKCTL) & ~AUTOFLUSHDIS, SBLKCTL); |
| 8272 | |
| 8273 | if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 ) |
| 8274 | { |
| 8275 | aic_outb(p, ENABLE, BCTL); /* Enable the boards BUS drivers. */ |
| 8276 | } |
| 8277 | |
| 8278 | if ( !(aic7xxx_no_reset) ) |
| 8279 | { |
| 8280 | if (p->features & AHC_TWIN) |
| 8281 | { |
| 8282 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 8283 | printk(KERN_INFO "(scsi%d) Resetting channel B\n", p->host_no); |
| 8284 | aic_outb(p, aic_inb(p, SBLKCTL) | SELBUSB, SBLKCTL); |
| 8285 | aic7xxx_reset_current_bus(p); |
| 8286 | aic_outb(p, aic_inb(p, SBLKCTL) & ~SELBUSB, SBLKCTL); |
| 8287 | } |
| 8288 | /* Reset SCSI bus A. */ |
| 8289 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 8290 | { /* In case we are a 3940, 3985, or 7895, print the right channel */ |
| 8291 | char *channel = ""; |
| 8292 | if (p->flags & AHC_MULTI_CHANNEL) |
| 8293 | { |
| 8294 | channel = " A"; |
| 8295 | if (p->flags & (AHC_CHNLB|AHC_CHNLC)) |
| 8296 | channel = (p->flags & AHC_CHNLB) ? " B" : " C"; |
| 8297 | } |
| 8298 | printk(KERN_INFO "(scsi%d) Resetting channel%s\n", p->host_no, channel); |
| 8299 | } |
| 8300 | |
| 8301 | aic7xxx_reset_current_bus(p); |
| 8302 | |
| 8303 | } |
| 8304 | else |
| 8305 | { |
| 8306 | if (!reset_delay) |
| 8307 | { |
| 8308 | printk(KERN_INFO "(scsi%d) Not resetting SCSI bus. Note: Don't use " |
| 8309 | "the no_reset\n", p->host_no); |
| 8310 | printk(KERN_INFO "(scsi%d) option unless you have a verifiable need " |
| 8311 | "for it.\n", p->host_no); |
| 8312 | } |
| 8313 | } |
| 8314 | |
| 8315 | /* |
| 8316 | * Register IRQ with the kernel. Only allow sharing IRQs with |
| 8317 | * PCI devices. |
| 8318 | */ |
| 8319 | if (!(p->chip & AHC_PCI)) |
| 8320 | { |
| 8321 | result = (request_irq(p->irq, do_aic7xxx_isr, 0, "aic7xxx", p)); |
| 8322 | } |
| 8323 | else |
| 8324 | { |
Thomas Gleixner | 1d6f359 | 2006-07-01 19:29:42 -0700 | [diff] [blame] | 8325 | result = (request_irq(p->irq, do_aic7xxx_isr, IRQF_SHARED, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8326 | "aic7xxx", p)); |
| 8327 | if (result < 0) |
| 8328 | { |
Thomas Gleixner | 1d6f359 | 2006-07-01 19:29:42 -0700 | [diff] [blame] | 8329 | result = (request_irq(p->irq, do_aic7xxx_isr, IRQF_DISABLED | IRQF_SHARED, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8330 | "aic7xxx", p)); |
| 8331 | } |
| 8332 | } |
| 8333 | if (result < 0) |
| 8334 | { |
| 8335 | printk(KERN_WARNING "(scsi%d) Couldn't register IRQ %d, ignoring " |
| 8336 | "controller.\n", p->host_no, p->irq); |
| 8337 | aic_outb(p, 0, SIMODE1); |
| 8338 | p->irq = 0; |
| 8339 | return (0); |
| 8340 | } |
| 8341 | |
| 8342 | if(aic_inb(p, INTSTAT) & INT_PEND) |
| 8343 | printk(INFO_LEAD "spurious interrupt during configuration, cleared.\n", |
| 8344 | p->host_no, -1, -1 , -1); |
| 8345 | aic7xxx_clear_intstat(p); |
| 8346 | |
| 8347 | unpause_sequencer(p, /* unpause_always */ TRUE); |
| 8348 | |
| 8349 | return (found); |
| 8350 | } |
| 8351 | |
| 8352 | /*+F************************************************************************* |
| 8353 | * Function: |
| 8354 | * aic7xxx_chip_reset |
| 8355 | * |
| 8356 | * Description: |
| 8357 | * Perform a chip reset on the aic7xxx SCSI controller. The controller |
| 8358 | * is paused upon return. |
| 8359 | *-F*************************************************************************/ |
| 8360 | static int |
| 8361 | aic7xxx_chip_reset(struct aic7xxx_host *p) |
| 8362 | { |
| 8363 | unsigned char sblkctl; |
| 8364 | int wait; |
| 8365 | |
| 8366 | /* |
| 8367 | * For some 274x boards, we must clear the CHIPRST bit and pause |
| 8368 | * the sequencer. For some reason, this makes the driver work. |
| 8369 | */ |
| 8370 | aic_outb(p, PAUSE | CHIPRST, HCNTRL); |
| 8371 | |
| 8372 | /* |
| 8373 | * In the future, we may call this function as a last resort for |
| 8374 | * error handling. Let's be nice and not do any unnecessary delays. |
| 8375 | */ |
| 8376 | wait = 1000; /* 1 msec (1000 * 1 msec) */ |
| 8377 | while (--wait && !(aic_inb(p, HCNTRL) & CHIPRSTACK)) |
| 8378 | { |
| 8379 | udelay(1); /* 1 usec */ |
| 8380 | } |
| 8381 | |
| 8382 | pause_sequencer(p); |
| 8383 | |
| 8384 | sblkctl = aic_inb(p, SBLKCTL) & (SELBUSB|SELWIDE); |
| 8385 | if (p->chip & AHC_PCI) |
| 8386 | sblkctl &= ~SELBUSB; |
| 8387 | switch( sblkctl ) |
| 8388 | { |
| 8389 | case 0: /* normal narrow card */ |
| 8390 | break; |
| 8391 | case 2: /* Wide card */ |
| 8392 | p->features |= AHC_WIDE; |
| 8393 | break; |
| 8394 | case 8: /* Twin card */ |
| 8395 | p->features |= AHC_TWIN; |
| 8396 | p->flags |= AHC_MULTI_CHANNEL; |
| 8397 | break; |
| 8398 | default: /* hmmm...we don't know what this is */ |
| 8399 | printk(KERN_WARNING "aic7xxx: Unsupported adapter type %d, ignoring.\n", |
| 8400 | aic_inb(p, SBLKCTL) & 0x0a); |
| 8401 | return(-1); |
| 8402 | } |
| 8403 | return(0); |
| 8404 | } |
| 8405 | |
| 8406 | /*+F************************************************************************* |
| 8407 | * Function: |
| 8408 | * aic7xxx_alloc |
| 8409 | * |
| 8410 | * Description: |
| 8411 | * Allocate and initialize a host structure. Returns NULL upon error |
| 8412 | * and a pointer to a aic7xxx_host struct upon success. |
| 8413 | *-F*************************************************************************/ |
| 8414 | static struct aic7xxx_host * |
Christoph Hellwig | d0be4a7d | 2005-10-31 18:31:40 +0100 | [diff] [blame] | 8415 | aic7xxx_alloc(struct scsi_host_template *sht, struct aic7xxx_host *temp) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8416 | { |
| 8417 | struct aic7xxx_host *p = NULL; |
| 8418 | struct Scsi_Host *host; |
| 8419 | |
| 8420 | /* |
| 8421 | * Allocate a storage area by registering us with the mid-level |
| 8422 | * SCSI layer. |
| 8423 | */ |
| 8424 | host = scsi_register(sht, sizeof(struct aic7xxx_host)); |
| 8425 | |
| 8426 | if (host != NULL) |
| 8427 | { |
| 8428 | p = (struct aic7xxx_host *) host->hostdata; |
| 8429 | memset(p, 0, sizeof(struct aic7xxx_host)); |
| 8430 | *p = *temp; |
| 8431 | p->host = host; |
| 8432 | |
| 8433 | p->scb_data = kmalloc(sizeof(scb_data_type), GFP_ATOMIC); |
| 8434 | if (p->scb_data != NULL) |
| 8435 | { |
| 8436 | memset(p->scb_data, 0, sizeof(scb_data_type)); |
| 8437 | scbq_init (&p->scb_data->free_scbs); |
| 8438 | } |
| 8439 | else |
| 8440 | { |
| 8441 | /* |
| 8442 | * For some reason we don't have enough memory. Free the |
| 8443 | * allocated memory for the aic7xxx_host struct, and return NULL. |
| 8444 | */ |
| 8445 | release_region(p->base, MAXREG - MINREG); |
| 8446 | scsi_unregister(host); |
| 8447 | return(NULL); |
| 8448 | } |
| 8449 | p->host_no = host->host_no; |
| 8450 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8451 | return (p); |
| 8452 | } |
| 8453 | |
| 8454 | /*+F************************************************************************* |
| 8455 | * Function: |
| 8456 | * aic7xxx_free |
| 8457 | * |
| 8458 | * Description: |
| 8459 | * Frees and releases all resources associated with an instance of |
| 8460 | * the driver (struct aic7xxx_host *). |
| 8461 | *-F*************************************************************************/ |
| 8462 | static void |
| 8463 | aic7xxx_free(struct aic7xxx_host *p) |
| 8464 | { |
| 8465 | int i; |
| 8466 | |
| 8467 | /* |
| 8468 | * Free the allocated hardware SCB space. |
| 8469 | */ |
| 8470 | if (p->scb_data != NULL) |
| 8471 | { |
| 8472 | struct aic7xxx_scb_dma *scb_dma = NULL; |
| 8473 | if (p->scb_data->hscbs != NULL) |
| 8474 | { |
| 8475 | pci_free_consistent(p->pdev, p->scb_data->hscbs_dma_len, |
| 8476 | p->scb_data->hscbs, p->scb_data->hscbs_dma); |
| 8477 | p->scb_data->hscbs = p->scb_data->hscb_kmalloc_ptr = NULL; |
| 8478 | } |
| 8479 | /* |
| 8480 | * Free the driver SCBs. These were allocated on an as-need |
| 8481 | * basis. We allocated these in groups depending on how many |
| 8482 | * we could fit into a given amount of RAM. The tail SCB for |
| 8483 | * these allocations has a pointer to the alloced area. |
| 8484 | */ |
| 8485 | for (i = 0; i < p->scb_data->numscbs; i++) |
| 8486 | { |
| 8487 | if (p->scb_data->scb_array[i]->scb_dma != scb_dma) |
| 8488 | { |
| 8489 | scb_dma = p->scb_data->scb_array[i]->scb_dma; |
| 8490 | pci_free_consistent(p->pdev, scb_dma->dma_len, |
| 8491 | (void *)((unsigned long)scb_dma->dma_address |
| 8492 | - scb_dma->dma_offset), |
| 8493 | scb_dma->dma_address); |
| 8494 | } |
Jesper Juhl | c9475cb | 2005-11-07 01:01:26 -0800 | [diff] [blame] | 8495 | kfree(p->scb_data->scb_array[i]->kmalloc_ptr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8496 | p->scb_data->scb_array[i] = NULL; |
| 8497 | } |
| 8498 | |
| 8499 | /* |
| 8500 | * Free the SCB data area. |
| 8501 | */ |
| 8502 | kfree(p->scb_data); |
| 8503 | } |
| 8504 | |
| 8505 | pci_free_consistent(p->pdev, 3*256, (void *)p->untagged_scbs, p->fifo_dma); |
| 8506 | } |
| 8507 | |
| 8508 | /*+F************************************************************************* |
| 8509 | * Function: |
| 8510 | * aic7xxx_load_seeprom |
| 8511 | * |
| 8512 | * Description: |
| 8513 | * Load the seeprom and configure adapter and target settings. |
| 8514 | * Returns 1 if the load was successful and 0 otherwise. |
| 8515 | *-F*************************************************************************/ |
| 8516 | static void |
| 8517 | aic7xxx_load_seeprom(struct aic7xxx_host *p, unsigned char *sxfrctl1) |
| 8518 | { |
| 8519 | int have_seeprom = 0; |
| 8520 | int i, max_targets, mask; |
| 8521 | unsigned char scsirate, scsi_conf; |
| 8522 | unsigned short scarray[128]; |
| 8523 | struct seeprom_config *sc = (struct seeprom_config *) scarray; |
| 8524 | |
| 8525 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 8526 | { |
| 8527 | printk(KERN_INFO "aic7xxx: Loading serial EEPROM..."); |
| 8528 | } |
| 8529 | switch (p->chip) |
| 8530 | { |
| 8531 | case (AHC_AIC7770|AHC_EISA): /* None of these adapters have seeproms. */ |
| 8532 | if (aic_inb(p, SCSICONF) & TERM_ENB) |
| 8533 | p->flags |= AHC_TERM_ENB_A; |
| 8534 | if ( (p->features & AHC_TWIN) && (aic_inb(p, SCSICONF + 1) & TERM_ENB) ) |
| 8535 | p->flags |= AHC_TERM_ENB_B; |
| 8536 | break; |
| 8537 | |
| 8538 | case (AHC_AIC7770|AHC_VL): |
| 8539 | have_seeprom = read_284x_seeprom(p, (struct seeprom_config *) scarray); |
| 8540 | break; |
| 8541 | |
| 8542 | default: |
| 8543 | have_seeprom = read_seeprom(p, (p->flags & (AHC_CHNLB|AHC_CHNLC)), |
| 8544 | scarray, p->sc_size, p->sc_type); |
| 8545 | if (!have_seeprom) |
| 8546 | { |
| 8547 | if(p->sc_type == C46) |
| 8548 | have_seeprom = read_seeprom(p, (p->flags & (AHC_CHNLB|AHC_CHNLC)), |
| 8549 | scarray, p->sc_size, C56_66); |
| 8550 | else |
| 8551 | have_seeprom = read_seeprom(p, (p->flags & (AHC_CHNLB|AHC_CHNLC)), |
| 8552 | scarray, p->sc_size, C46); |
| 8553 | } |
| 8554 | if (!have_seeprom) |
| 8555 | { |
| 8556 | p->sc_size = 128; |
| 8557 | have_seeprom = read_seeprom(p, 4*(p->flags & (AHC_CHNLB|AHC_CHNLC)), |
| 8558 | scarray, p->sc_size, p->sc_type); |
| 8559 | if (!have_seeprom) |
| 8560 | { |
| 8561 | if(p->sc_type == C46) |
| 8562 | have_seeprom = read_seeprom(p, 4*(p->flags & (AHC_CHNLB|AHC_CHNLC)), |
| 8563 | scarray, p->sc_size, C56_66); |
| 8564 | else |
| 8565 | have_seeprom = read_seeprom(p, 4*(p->flags & (AHC_CHNLB|AHC_CHNLC)), |
| 8566 | scarray, p->sc_size, C46); |
| 8567 | } |
| 8568 | } |
| 8569 | break; |
| 8570 | } |
| 8571 | |
| 8572 | if (!have_seeprom) |
| 8573 | { |
| 8574 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 8575 | { |
| 8576 | printk("\naic7xxx: No SEEPROM available.\n"); |
| 8577 | } |
| 8578 | p->flags |= AHC_NEWEEPROM_FMT; |
| 8579 | if (aic_inb(p, SCSISEQ) == 0) |
| 8580 | { |
| 8581 | p->flags |= AHC_USEDEFAULTS; |
| 8582 | p->flags &= ~AHC_BIOS_ENABLED; |
| 8583 | p->scsi_id = p->scsi_id_b = 7; |
| 8584 | *sxfrctl1 |= STPWEN; |
| 8585 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 8586 | { |
| 8587 | printk("aic7xxx: Using default values.\n"); |
| 8588 | } |
| 8589 | } |
| 8590 | else if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 8591 | { |
| 8592 | printk("aic7xxx: Using leftover BIOS values.\n"); |
| 8593 | } |
| 8594 | if ( ((p->chip & ~AHC_CHIPID_MASK) == AHC_PCI) && (*sxfrctl1 & STPWEN) ) |
| 8595 | { |
| 8596 | p->flags |= AHC_TERM_ENB_SE_LOW | AHC_TERM_ENB_SE_HIGH; |
| 8597 | sc->adapter_control &= ~CFAUTOTERM; |
| 8598 | sc->adapter_control |= CFSTERM | CFWSTERM | CFLVDSTERM; |
| 8599 | } |
| 8600 | if (aic7xxx_extended) |
| 8601 | p->flags |= (AHC_EXTEND_TRANS_A | AHC_EXTEND_TRANS_B); |
| 8602 | else |
| 8603 | p->flags &= ~(AHC_EXTEND_TRANS_A | AHC_EXTEND_TRANS_B); |
| 8604 | } |
| 8605 | else |
| 8606 | { |
| 8607 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 8608 | { |
| 8609 | printk("done\n"); |
| 8610 | } |
| 8611 | |
| 8612 | /* |
| 8613 | * Note things in our flags |
| 8614 | */ |
| 8615 | p->flags |= AHC_SEEPROM_FOUND; |
| 8616 | |
| 8617 | /* |
| 8618 | * Update the settings in sxfrctl1 to match the termination settings. |
| 8619 | */ |
| 8620 | *sxfrctl1 = 0; |
| 8621 | |
| 8622 | /* |
| 8623 | * Get our SCSI ID from the SEEPROM setting... |
| 8624 | */ |
| 8625 | p->scsi_id = (sc->brtime_id & CFSCSIID); |
| 8626 | |
| 8627 | /* |
| 8628 | * First process the settings that are different between the VLB |
| 8629 | * and PCI adapter seeproms. |
| 8630 | */ |
| 8631 | if ((p->chip & AHC_CHIPID_MASK) == AHC_AIC7770) |
| 8632 | { |
| 8633 | /* VLB adapter seeproms */ |
| 8634 | if (sc->bios_control & CF284XEXTEND) |
| 8635 | p->flags |= AHC_EXTEND_TRANS_A; |
| 8636 | |
| 8637 | if (sc->adapter_control & CF284XSTERM) |
| 8638 | { |
| 8639 | *sxfrctl1 |= STPWEN; |
| 8640 | p->flags |= AHC_TERM_ENB_SE_LOW | AHC_TERM_ENB_SE_HIGH; |
| 8641 | } |
| 8642 | } |
| 8643 | else |
| 8644 | { |
| 8645 | /* PCI adapter seeproms */ |
| 8646 | if (sc->bios_control & CFEXTEND) |
| 8647 | p->flags |= AHC_EXTEND_TRANS_A; |
| 8648 | if (sc->bios_control & CFBIOSEN) |
| 8649 | p->flags |= AHC_BIOS_ENABLED; |
| 8650 | else |
| 8651 | p->flags &= ~AHC_BIOS_ENABLED; |
| 8652 | |
| 8653 | if (sc->adapter_control & CFSTERM) |
| 8654 | { |
| 8655 | *sxfrctl1 |= STPWEN; |
| 8656 | p->flags |= AHC_TERM_ENB_SE_LOW | AHC_TERM_ENB_SE_HIGH; |
| 8657 | } |
| 8658 | } |
| 8659 | memcpy(&p->sc, sc, sizeof(struct seeprom_config)); |
| 8660 | } |
| 8661 | |
| 8662 | p->discenable = 0; |
| 8663 | |
| 8664 | /* |
| 8665 | * Limit to 16 targets just in case. The 2842 for one is known to |
| 8666 | * blow the max_targets setting, future cards might also. |
| 8667 | */ |
| 8668 | max_targets = ((p->features & (AHC_TWIN | AHC_WIDE)) ? 16 : 8); |
| 8669 | |
| 8670 | if (have_seeprom) |
| 8671 | { |
| 8672 | for (i = 0; i < max_targets; i++) |
| 8673 | { |
| 8674 | if( ((p->features & AHC_ULTRA) && |
| 8675 | !(sc->adapter_control & CFULTRAEN) && |
| 8676 | (sc->device_flags[i] & CFSYNCHISULTRA)) || |
| 8677 | (sc->device_flags[i] & CFNEWULTRAFORMAT) ) |
| 8678 | { |
| 8679 | p->flags |= AHC_NEWEEPROM_FMT; |
| 8680 | break; |
| 8681 | } |
| 8682 | } |
| 8683 | } |
| 8684 | |
| 8685 | for (i = 0; i < max_targets; i++) |
| 8686 | { |
| 8687 | mask = (0x01 << i); |
| 8688 | if (!have_seeprom) |
| 8689 | { |
| 8690 | if (aic_inb(p, SCSISEQ) != 0) |
| 8691 | { |
| 8692 | /* |
| 8693 | * OK...the BIOS set things up and left behind the settings we need. |
| 8694 | * Just make our sc->device_flags[i] entry match what the card has |
| 8695 | * set for this device. |
| 8696 | */ |
| 8697 | p->discenable = |
| 8698 | ~(aic_inb(p, DISC_DSB) | (aic_inb(p, DISC_DSB + 1) << 8) ); |
| 8699 | p->ultraenb = |
| 8700 | (aic_inb(p, ULTRA_ENB) | (aic_inb(p, ULTRA_ENB + 1) << 8) ); |
| 8701 | sc->device_flags[i] = (p->discenable & mask) ? CFDISC : 0; |
| 8702 | if (aic_inb(p, TARG_SCSIRATE + i) & WIDEXFER) |
| 8703 | sc->device_flags[i] |= CFWIDEB; |
| 8704 | if (p->features & AHC_ULTRA2) |
| 8705 | { |
| 8706 | if (aic_inb(p, TARG_OFFSET + i)) |
| 8707 | { |
| 8708 | sc->device_flags[i] |= CFSYNCH; |
| 8709 | sc->device_flags[i] |= (aic_inb(p, TARG_SCSIRATE + i) & 0x07); |
| 8710 | if ( (aic_inb(p, TARG_SCSIRATE + i) & 0x18) == 0x18 ) |
| 8711 | sc->device_flags[i] |= CFSYNCHISULTRA; |
| 8712 | } |
| 8713 | } |
| 8714 | else |
| 8715 | { |
| 8716 | if (aic_inb(p, TARG_SCSIRATE + i) & ~WIDEXFER) |
| 8717 | { |
| 8718 | sc->device_flags[i] |= CFSYNCH; |
| 8719 | if (p->features & AHC_ULTRA) |
| 8720 | sc->device_flags[i] |= ((p->ultraenb & mask) ? |
| 8721 | CFSYNCHISULTRA : 0); |
| 8722 | } |
| 8723 | } |
| 8724 | } |
| 8725 | else |
| 8726 | { |
| 8727 | /* |
| 8728 | * Assume the BIOS has NOT been run on this card and nothing between |
| 8729 | * the card and the devices is configured yet. |
| 8730 | */ |
| 8731 | sc->device_flags[i] = CFDISC; |
| 8732 | if (p->features & AHC_WIDE) |
| 8733 | sc->device_flags[i] |= CFWIDEB; |
| 8734 | if (p->features & AHC_ULTRA3) |
| 8735 | sc->device_flags[i] |= 2; |
| 8736 | else if (p->features & AHC_ULTRA2) |
| 8737 | sc->device_flags[i] |= 3; |
| 8738 | else if (p->features & AHC_ULTRA) |
| 8739 | sc->device_flags[i] |= CFSYNCHISULTRA; |
| 8740 | sc->device_flags[i] |= CFSYNCH; |
| 8741 | aic_outb(p, 0, TARG_SCSIRATE + i); |
| 8742 | if (p->features & AHC_ULTRA2) |
| 8743 | aic_outb(p, 0, TARG_OFFSET + i); |
| 8744 | } |
| 8745 | } |
| 8746 | if (sc->device_flags[i] & CFDISC) |
| 8747 | { |
| 8748 | p->discenable |= mask; |
| 8749 | } |
| 8750 | if (p->flags & AHC_NEWEEPROM_FMT) |
| 8751 | { |
| 8752 | if ( !(p->features & AHC_ULTRA2) ) |
| 8753 | { |
| 8754 | /* |
| 8755 | * I know of two different Ultra BIOSes that do this differently. |
| 8756 | * One on the Gigabyte 6BXU mb that wants flags[i] & CFXFER to |
| 8757 | * be == to 0x03 and SYNCHISULTRA to be true to mean 40MByte/s |
| 8758 | * while on the IBM Netfinity 5000 they want the same thing |
| 8759 | * to be something else, while flags[i] & CFXFER == 0x03 and |
| 8760 | * SYNCHISULTRA false should be 40MByte/s. So, we set both to |
| 8761 | * 40MByte/s and the lower speeds be damned. People will have |
| 8762 | * to select around the conversely mapped lower speeds in order |
| 8763 | * to select lower speeds on these boards. |
| 8764 | */ |
| 8765 | if ( (sc->device_flags[i] & CFNEWULTRAFORMAT) && |
| 8766 | ((sc->device_flags[i] & CFXFER) == 0x03) ) |
| 8767 | { |
| 8768 | sc->device_flags[i] &= ~CFXFER; |
| 8769 | sc->device_flags[i] |= CFSYNCHISULTRA; |
| 8770 | } |
| 8771 | if (sc->device_flags[i] & CFSYNCHISULTRA) |
| 8772 | { |
| 8773 | p->ultraenb |= mask; |
| 8774 | } |
| 8775 | } |
| 8776 | else if ( !(sc->device_flags[i] & CFNEWULTRAFORMAT) && |
| 8777 | (p->features & AHC_ULTRA2) && |
| 8778 | (sc->device_flags[i] & CFSYNCHISULTRA) ) |
| 8779 | { |
| 8780 | p->ultraenb |= mask; |
| 8781 | } |
| 8782 | } |
| 8783 | else if (sc->adapter_control & CFULTRAEN) |
| 8784 | { |
| 8785 | p->ultraenb |= mask; |
| 8786 | } |
| 8787 | if ( (sc->device_flags[i] & CFSYNCH) == 0) |
| 8788 | { |
| 8789 | sc->device_flags[i] &= ~CFXFER; |
| 8790 | p->ultraenb &= ~mask; |
| 8791 | p->user[i].offset = 0; |
| 8792 | p->user[i].period = 0; |
| 8793 | p->user[i].options = 0; |
| 8794 | } |
| 8795 | else |
| 8796 | { |
| 8797 | if (p->features & AHC_ULTRA3) |
| 8798 | { |
| 8799 | p->user[i].offset = MAX_OFFSET_ULTRA2; |
| 8800 | if( (sc->device_flags[i] & CFXFER) < 0x03 ) |
| 8801 | { |
| 8802 | scsirate = (sc->device_flags[i] & CFXFER); |
| 8803 | p->user[i].options = MSG_EXT_PPR_OPTION_DT_CRC; |
| 8804 | } |
| 8805 | else |
| 8806 | { |
| 8807 | scsirate = (sc->device_flags[i] & CFXFER) | |
| 8808 | ((p->ultraenb & mask) ? 0x18 : 0x10); |
| 8809 | p->user[i].options = 0; |
| 8810 | } |
| 8811 | p->user[i].period = aic7xxx_find_period(p, scsirate, |
| 8812 | AHC_SYNCRATE_ULTRA3); |
| 8813 | } |
| 8814 | else if (p->features & AHC_ULTRA2) |
| 8815 | { |
| 8816 | p->user[i].offset = MAX_OFFSET_ULTRA2; |
| 8817 | scsirate = (sc->device_flags[i] & CFXFER) | |
| 8818 | ((p->ultraenb & mask) ? 0x18 : 0x10); |
| 8819 | p->user[i].options = 0; |
| 8820 | p->user[i].period = aic7xxx_find_period(p, scsirate, |
| 8821 | AHC_SYNCRATE_ULTRA2); |
| 8822 | } |
| 8823 | else |
| 8824 | { |
| 8825 | scsirate = (sc->device_flags[i] & CFXFER) << 4; |
| 8826 | p->user[i].options = 0; |
| 8827 | p->user[i].offset = MAX_OFFSET_8BIT; |
| 8828 | if (p->features & AHC_ULTRA) |
| 8829 | { |
| 8830 | short ultraenb; |
| 8831 | ultraenb = aic_inb(p, ULTRA_ENB) | |
| 8832 | (aic_inb(p, ULTRA_ENB + 1) << 8); |
| 8833 | p->user[i].period = aic7xxx_find_period(p, scsirate, |
| 8834 | (p->ultraenb & mask) ? |
| 8835 | AHC_SYNCRATE_ULTRA : |
| 8836 | AHC_SYNCRATE_FAST); |
| 8837 | } |
| 8838 | else |
| 8839 | p->user[i].period = aic7xxx_find_period(p, scsirate, |
| 8840 | AHC_SYNCRATE_FAST); |
| 8841 | } |
| 8842 | } |
| 8843 | if ( (sc->device_flags[i] & CFWIDEB) && (p->features & AHC_WIDE) ) |
| 8844 | { |
| 8845 | p->user[i].width = MSG_EXT_WDTR_BUS_16_BIT; |
| 8846 | } |
| 8847 | else |
| 8848 | { |
| 8849 | p->user[i].width = MSG_EXT_WDTR_BUS_8_BIT; |
| 8850 | } |
| 8851 | } |
| 8852 | aic_outb(p, ~(p->discenable & 0xFF), DISC_DSB); |
| 8853 | aic_outb(p, ~((p->discenable >> 8) & 0xFF), DISC_DSB + 1); |
| 8854 | |
| 8855 | /* |
| 8856 | * We set the p->ultraenb from the SEEPROM to begin with, but now we make |
| 8857 | * it match what is already down in the card. If we are doing a reset |
| 8858 | * on the card then this will get put back to a default state anyway. |
| 8859 | * This allows us to not have to pre-emptively negotiate when using the |
| 8860 | * no_reset option. |
| 8861 | */ |
| 8862 | if (p->features & AHC_ULTRA) |
| 8863 | p->ultraenb = aic_inb(p, ULTRA_ENB) | (aic_inb(p, ULTRA_ENB + 1) << 8); |
| 8864 | |
| 8865 | |
| 8866 | scsi_conf = (p->scsi_id & HSCSIID); |
| 8867 | |
| 8868 | if(have_seeprom) |
| 8869 | { |
| 8870 | p->adapter_control = sc->adapter_control; |
| 8871 | p->bios_control = sc->bios_control; |
| 8872 | |
| 8873 | switch (p->chip & AHC_CHIPID_MASK) |
| 8874 | { |
| 8875 | case AHC_AIC7895: |
| 8876 | case AHC_AIC7896: |
| 8877 | case AHC_AIC7899: |
| 8878 | if (p->adapter_control & CFBPRIMARY) |
| 8879 | p->flags |= AHC_CHANNEL_B_PRIMARY; |
| 8880 | default: |
| 8881 | break; |
| 8882 | } |
| 8883 | |
| 8884 | if (sc->adapter_control & CFSPARITY) |
| 8885 | scsi_conf |= ENSPCHK; |
| 8886 | } |
| 8887 | else |
| 8888 | { |
| 8889 | scsi_conf |= ENSPCHK | RESET_SCSI; |
| 8890 | } |
| 8891 | |
| 8892 | /* |
| 8893 | * Only set the SCSICONF and SCSICONF + 1 registers if we are a PCI card. |
| 8894 | * The 2842 and 2742 cards already have these registers set and we don't |
| 8895 | * want to muck with them since we don't set all the bits they do. |
| 8896 | */ |
| 8897 | if ( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI ) |
| 8898 | { |
| 8899 | /* Set the host ID */ |
| 8900 | aic_outb(p, scsi_conf, SCSICONF); |
| 8901 | /* In case we are a wide card */ |
| 8902 | aic_outb(p, p->scsi_id, SCSICONF + 1); |
| 8903 | } |
| 8904 | } |
| 8905 | |
| 8906 | /*+F************************************************************************* |
| 8907 | * Function: |
| 8908 | * aic7xxx_configure_bugs |
| 8909 | * |
| 8910 | * Description: |
| 8911 | * Take the card passed in and set the appropriate bug flags based upon |
| 8912 | * the card model. Also make any changes needed to device registers or |
| 8913 | * PCI registers while we are here. |
| 8914 | *-F*************************************************************************/ |
| 8915 | static void |
| 8916 | aic7xxx_configure_bugs(struct aic7xxx_host *p) |
| 8917 | { |
| 8918 | unsigned short tmp_word; |
| 8919 | |
| 8920 | switch(p->chip & AHC_CHIPID_MASK) |
| 8921 | { |
| 8922 | case AHC_AIC7860: |
| 8923 | p->bugs |= AHC_BUG_PCI_2_1_RETRY; |
| 8924 | /* fall through */ |
| 8925 | case AHC_AIC7850: |
| 8926 | case AHC_AIC7870: |
| 8927 | p->bugs |= AHC_BUG_TMODE_WIDEODD | AHC_BUG_CACHETHEN | AHC_BUG_PCI_MWI; |
| 8928 | break; |
| 8929 | case AHC_AIC7880: |
| 8930 | p->bugs |= AHC_BUG_TMODE_WIDEODD | AHC_BUG_PCI_2_1_RETRY | |
| 8931 | AHC_BUG_CACHETHEN | AHC_BUG_PCI_MWI; |
| 8932 | break; |
| 8933 | case AHC_AIC7890: |
| 8934 | p->bugs |= AHC_BUG_AUTOFLUSH | AHC_BUG_CACHETHEN; |
| 8935 | break; |
| 8936 | case AHC_AIC7892: |
| 8937 | p->bugs |= AHC_BUG_SCBCHAN_UPLOAD; |
| 8938 | break; |
| 8939 | case AHC_AIC7895: |
| 8940 | p->bugs |= AHC_BUG_TMODE_WIDEODD | AHC_BUG_PCI_2_1_RETRY | |
| 8941 | AHC_BUG_CACHETHEN | AHC_BUG_PCI_MWI; |
| 8942 | break; |
| 8943 | case AHC_AIC7896: |
| 8944 | p->bugs |= AHC_BUG_CACHETHEN_DIS; |
| 8945 | break; |
| 8946 | case AHC_AIC7899: |
| 8947 | p->bugs |= AHC_BUG_SCBCHAN_UPLOAD; |
| 8948 | break; |
| 8949 | default: |
| 8950 | /* Nothing to do */ |
| 8951 | break; |
| 8952 | } |
| 8953 | |
| 8954 | /* |
| 8955 | * Now handle the bugs that require PCI register or card register tweaks |
| 8956 | */ |
| 8957 | pci_read_config_word(p->pdev, PCI_COMMAND, &tmp_word); |
| 8958 | if(p->bugs & AHC_BUG_PCI_MWI) |
| 8959 | { |
| 8960 | tmp_word &= ~PCI_COMMAND_INVALIDATE; |
| 8961 | } |
| 8962 | else |
| 8963 | { |
| 8964 | tmp_word |= PCI_COMMAND_INVALIDATE; |
| 8965 | } |
| 8966 | pci_write_config_word(p->pdev, PCI_COMMAND, tmp_word); |
| 8967 | |
| 8968 | if(p->bugs & AHC_BUG_CACHETHEN) |
| 8969 | { |
| 8970 | aic_outb(p, aic_inb(p, DSCOMMAND0) & ~CACHETHEN, DSCOMMAND0); |
| 8971 | } |
| 8972 | else if (p->bugs & AHC_BUG_CACHETHEN_DIS) |
| 8973 | { |
| 8974 | aic_outb(p, aic_inb(p, DSCOMMAND0) | CACHETHEN, DSCOMMAND0); |
| 8975 | } |
| 8976 | |
| 8977 | return; |
| 8978 | } |
| 8979 | |
| 8980 | |
| 8981 | /*+F************************************************************************* |
| 8982 | * Function: |
| 8983 | * aic7xxx_detect |
| 8984 | * |
| 8985 | * Description: |
| 8986 | * Try to detect and register an Adaptec 7770 or 7870 SCSI controller. |
| 8987 | * |
| 8988 | * XXX - This should really be called aic7xxx_probe(). A sequence of |
| 8989 | * probe(), attach()/detach(), and init() makes more sense than |
| 8990 | * one do-it-all function. This may be useful when (and if) the |
| 8991 | * mid-level SCSI code is overhauled. |
| 8992 | *-F*************************************************************************/ |
| 8993 | static int |
Christoph Hellwig | d0be4a7d | 2005-10-31 18:31:40 +0100 | [diff] [blame] | 8994 | aic7xxx_detect(struct scsi_host_template *template) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8995 | { |
| 8996 | struct aic7xxx_host *temp_p = NULL; |
| 8997 | struct aic7xxx_host *current_p = NULL; |
| 8998 | struct aic7xxx_host *list_p = NULL; |
| 8999 | int found = 0; |
| 9000 | #if defined(__i386__) || defined(__alpha__) |
| 9001 | ahc_flag_type flags = 0; |
| 9002 | int type; |
| 9003 | #endif |
| 9004 | unsigned char sxfrctl1; |
| 9005 | #if defined(__i386__) || defined(__alpha__) |
| 9006 | unsigned char hcntrl, hostconf; |
| 9007 | unsigned int slot, base; |
| 9008 | #endif |
| 9009 | |
| 9010 | #ifdef MODULE |
| 9011 | /* |
| 9012 | * If we are called as a module, the aic7xxx pointer may not be null |
| 9013 | * and it would point to our bootup string, just like on the lilo |
| 9014 | * command line. IF not NULL, then process this config string with |
| 9015 | * aic7xxx_setup |
| 9016 | */ |
| 9017 | if(aic7xxx) |
| 9018 | aic7xxx_setup(aic7xxx); |
| 9019 | #endif |
| 9020 | |
| 9021 | template->proc_name = "aic7xxx"; |
| 9022 | template->sg_tablesize = AIC7XXX_MAX_SG; |
| 9023 | |
| 9024 | |
| 9025 | #ifdef CONFIG_PCI |
| 9026 | /* |
| 9027 | * PCI-bus probe. |
| 9028 | */ |
| 9029 | { |
| 9030 | static struct |
| 9031 | { |
| 9032 | unsigned short vendor_id; |
| 9033 | unsigned short device_id; |
| 9034 | ahc_chip chip; |
| 9035 | ahc_flag_type flags; |
| 9036 | ahc_feature features; |
| 9037 | int board_name_index; |
| 9038 | unsigned short seeprom_size; |
| 9039 | unsigned short seeprom_type; |
| 9040 | } const aic_pdevs[] = { |
| 9041 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7810, AHC_NONE, |
| 9042 | AHC_FNONE, AHC_FENONE, 1, |
| 9043 | 32, C46 }, |
| 9044 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7850, AHC_AIC7850, |
| 9045 | AHC_PAGESCBS, AHC_AIC7850_FE, 5, |
| 9046 | 32, C46 }, |
| 9047 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7855, AHC_AIC7850, |
| 9048 | AHC_PAGESCBS, AHC_AIC7850_FE, 6, |
| 9049 | 32, C46 }, |
| 9050 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7821, AHC_AIC7860, |
| 9051 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, |
| 9052 | AHC_AIC7860_FE, 7, |
| 9053 | 32, C46 }, |
| 9054 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_3860, AHC_AIC7860, |
| 9055 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, |
| 9056 | AHC_AIC7860_FE, 7, |
| 9057 | 32, C46 }, |
| 9058 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_38602, AHC_AIC7860, |
| 9059 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, |
| 9060 | AHC_AIC7860_FE, 7, |
| 9061 | 32, C46 }, |
| 9062 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_38602, AHC_AIC7860, |
| 9063 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, |
| 9064 | AHC_AIC7860_FE, 7, |
| 9065 | 32, C46 }, |
| 9066 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7860, AHC_AIC7860, |
| 9067 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MOTHERBOARD, |
| 9068 | AHC_AIC7860_FE, 7, |
| 9069 | 32, C46 }, |
| 9070 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7861, AHC_AIC7860, |
| 9071 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, |
| 9072 | AHC_AIC7860_FE, 8, |
| 9073 | 32, C46 }, |
| 9074 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7870, AHC_AIC7870, |
| 9075 | AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MOTHERBOARD, |
| 9076 | AHC_AIC7870_FE, 9, |
| 9077 | 32, C46 }, |
| 9078 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7871, AHC_AIC7870, |
| 9079 | AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7870_FE, 10, |
| 9080 | 32, C46 }, |
| 9081 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7872, AHC_AIC7870, |
| 9082 | AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, |
| 9083 | AHC_AIC7870_FE, 11, |
| 9084 | 32, C56_66 }, |
| 9085 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7873, AHC_AIC7870, |
| 9086 | AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, |
| 9087 | AHC_AIC7870_FE, 12, |
| 9088 | 32, C56_66 }, |
| 9089 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7874, AHC_AIC7870, |
| 9090 | AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7870_FE, 13, |
| 9091 | 32, C46 }, |
| 9092 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7880, AHC_AIC7880, |
| 9093 | AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MOTHERBOARD, |
| 9094 | AHC_AIC7880_FE, 14, |
| 9095 | 32, C46 }, |
| 9096 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7881, AHC_AIC7880, |
| 9097 | AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 15, |
| 9098 | 32, C46 }, |
| 9099 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7882, AHC_AIC7880, |
| 9100 | AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, |
| 9101 | AHC_AIC7880_FE, 16, |
| 9102 | 32, C56_66 }, |
| 9103 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7883, AHC_AIC7880, |
| 9104 | AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, |
| 9105 | AHC_AIC7880_FE, 17, |
| 9106 | 32, C56_66 }, |
| 9107 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7884, AHC_AIC7880, |
| 9108 | AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 18, |
| 9109 | 32, C46 }, |
| 9110 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7885, AHC_AIC7880, |
| 9111 | AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 18, |
| 9112 | 32, C46 }, |
| 9113 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7886, AHC_AIC7880, |
| 9114 | AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 18, |
| 9115 | 32, C46 }, |
| 9116 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7887, AHC_AIC7880, |
| 9117 | AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE | AHC_NEW_AUTOTERM, 19, |
| 9118 | 32, C46 }, |
| 9119 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7888, AHC_AIC7880, |
| 9120 | AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE, 18, |
| 9121 | 32, C46 }, |
| 9122 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7895, AHC_AIC7895, |
| 9123 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, |
| 9124 | AHC_AIC7895_FE, 20, |
| 9125 | 32, C56_66 }, |
| 9126 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7890, AHC_AIC7890, |
| 9127 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, |
| 9128 | AHC_AIC7890_FE, 21, |
| 9129 | 32, C46 }, |
| 9130 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7890B, AHC_AIC7890, |
| 9131 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, |
| 9132 | AHC_AIC7890_FE, 21, |
| 9133 | 32, C46 }, |
| 9134 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_2930U2, AHC_AIC7890, |
| 9135 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, |
| 9136 | AHC_AIC7890_FE, 22, |
| 9137 | 32, C46 }, |
| 9138 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_2940U2, AHC_AIC7890, |
| 9139 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, |
| 9140 | AHC_AIC7890_FE, 23, |
| 9141 | 32, C46 }, |
| 9142 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7896, AHC_AIC7896, |
| 9143 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, |
| 9144 | AHC_AIC7896_FE, 24, |
| 9145 | 32, C56_66 }, |
| 9146 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_3940U2, AHC_AIC7896, |
| 9147 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, |
| 9148 | AHC_AIC7896_FE, 25, |
| 9149 | 32, C56_66 }, |
| 9150 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_3950U2D, AHC_AIC7896, |
| 9151 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, |
| 9152 | AHC_AIC7896_FE, 26, |
| 9153 | 32, C56_66 }, |
| 9154 | {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_1480A, AHC_AIC7860, |
| 9155 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_NO_STPWEN, |
| 9156 | AHC_AIC7860_FE, 27, |
| 9157 | 32, C46 }, |
| 9158 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892A, AHC_AIC7892, |
| 9159 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, |
| 9160 | AHC_AIC7892_FE, 28, |
| 9161 | 32, C46 }, |
| 9162 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892B, AHC_AIC7892, |
| 9163 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, |
| 9164 | AHC_AIC7892_FE, 28, |
| 9165 | 32, C46 }, |
| 9166 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892D, AHC_AIC7892, |
| 9167 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, |
| 9168 | AHC_AIC7892_FE, 28, |
| 9169 | 32, C46 }, |
| 9170 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892P, AHC_AIC7892, |
| 9171 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED, |
| 9172 | AHC_AIC7892_FE, 28, |
| 9173 | 32, C46 }, |
| 9174 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899A, AHC_AIC7899, |
| 9175 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, |
| 9176 | AHC_AIC7899_FE, 29, |
| 9177 | 32, C56_66 }, |
| 9178 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899B, AHC_AIC7899, |
| 9179 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, |
| 9180 | AHC_AIC7899_FE, 29, |
| 9181 | 32, C56_66 }, |
| 9182 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899D, AHC_AIC7899, |
| 9183 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, |
| 9184 | AHC_AIC7899_FE, 29, |
| 9185 | 32, C56_66 }, |
| 9186 | {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899P, AHC_AIC7899, |
| 9187 | AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL, |
| 9188 | AHC_AIC7899_FE, 29, |
| 9189 | 32, C56_66 }, |
| 9190 | }; |
| 9191 | |
| 9192 | unsigned short command; |
| 9193 | unsigned int devconfig, i, oldverbose; |
| 9194 | struct pci_dev *pdev = NULL; |
| 9195 | |
| 9196 | for (i = 0; i < ARRAY_SIZE(aic_pdevs); i++) |
| 9197 | { |
| 9198 | pdev = NULL; |
| 9199 | while ((pdev = pci_find_device(aic_pdevs[i].vendor_id, |
| 9200 | aic_pdevs[i].device_id, |
| 9201 | pdev))) { |
| 9202 | if (pci_enable_device(pdev)) |
| 9203 | continue; |
| 9204 | if ( i == 0 ) /* We found one, but it's the 7810 RAID cont. */ |
| 9205 | { |
| 9206 | if (aic7xxx_verbose & (VERBOSE_PROBE|VERBOSE_PROBE2)) |
| 9207 | { |
| 9208 | printk(KERN_INFO "aic7xxx: The 7810 RAID controller is not " |
| 9209 | "supported by\n"); |
| 9210 | printk(KERN_INFO " this driver, we are ignoring it.\n"); |
| 9211 | } |
| 9212 | } |
| 9213 | else if ( (temp_p = kmalloc(sizeof(struct aic7xxx_host), |
| 9214 | GFP_ATOMIC)) != NULL ) |
| 9215 | { |
| 9216 | memset(temp_p, 0, sizeof(struct aic7xxx_host)); |
| 9217 | temp_p->chip = aic_pdevs[i].chip | AHC_PCI; |
| 9218 | temp_p->flags = aic_pdevs[i].flags; |
| 9219 | temp_p->features = aic_pdevs[i].features; |
| 9220 | temp_p->board_name_index = aic_pdevs[i].board_name_index; |
| 9221 | temp_p->sc_size = aic_pdevs[i].seeprom_size; |
| 9222 | temp_p->sc_type = aic_pdevs[i].seeprom_type; |
| 9223 | |
| 9224 | /* |
| 9225 | * Read sundry information from PCI BIOS. |
| 9226 | */ |
| 9227 | temp_p->irq = pdev->irq; |
| 9228 | temp_p->pdev = pdev; |
| 9229 | temp_p->pci_bus = pdev->bus->number; |
| 9230 | temp_p->pci_device_fn = pdev->devfn; |
| 9231 | temp_p->base = pci_resource_start(pdev, 0); |
| 9232 | temp_p->mbase = pci_resource_start(pdev, 1); |
| 9233 | current_p = list_p; |
| 9234 | while(current_p && temp_p) |
| 9235 | { |
| 9236 | if ( ((current_p->pci_bus == temp_p->pci_bus) && |
| 9237 | (current_p->pci_device_fn == temp_p->pci_device_fn)) || |
| 9238 | (temp_p->base && (current_p->base == temp_p->base)) || |
| 9239 | (temp_p->mbase && (current_p->mbase == temp_p->mbase)) ) |
| 9240 | { |
| 9241 | /* duplicate PCI entry, skip it */ |
| 9242 | kfree(temp_p); |
| 9243 | temp_p = NULL; |
| 9244 | continue; |
| 9245 | } |
| 9246 | current_p = current_p->next; |
| 9247 | } |
| 9248 | if(pci_request_regions(temp_p->pdev, "aic7xxx")) |
| 9249 | { |
| 9250 | printk("aic7xxx: <%s> at PCI %d/%d/%d\n", |
| 9251 | board_names[aic_pdevs[i].board_name_index], |
| 9252 | temp_p->pci_bus, |
| 9253 | PCI_SLOT(temp_p->pci_device_fn), |
| 9254 | PCI_FUNC(temp_p->pci_device_fn)); |
| 9255 | printk("aic7xxx: I/O ports already in use, ignoring.\n"); |
| 9256 | kfree(temp_p); |
| 9257 | continue; |
| 9258 | } |
| 9259 | |
| 9260 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 9261 | printk("aic7xxx: <%s> at PCI %d/%d\n", |
| 9262 | board_names[aic_pdevs[i].board_name_index], |
| 9263 | PCI_SLOT(pdev->devfn), |
| 9264 | PCI_FUNC(pdev->devfn)); |
| 9265 | pci_read_config_word(pdev, PCI_COMMAND, &command); |
| 9266 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 9267 | { |
| 9268 | printk("aic7xxx: Initial PCI_COMMAND value was 0x%x\n", |
| 9269 | (int)command); |
| 9270 | } |
| 9271 | #ifdef AIC7XXX_STRICT_PCI_SETUP |
| 9272 | command |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY | |
| 9273 | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO; |
| 9274 | #else |
| 9275 | command |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO; |
| 9276 | #endif |
| 9277 | command &= ~PCI_COMMAND_INVALIDATE; |
| 9278 | if (aic7xxx_pci_parity == 0) |
| 9279 | command &= ~(PCI_COMMAND_SERR | PCI_COMMAND_PARITY); |
| 9280 | pci_write_config_word(pdev, PCI_COMMAND, command); |
| 9281 | #ifdef AIC7XXX_STRICT_PCI_SETUP |
| 9282 | pci_read_config_dword(pdev, DEVCONFIG, &devconfig); |
| 9283 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 9284 | { |
| 9285 | printk("aic7xxx: Initial DEVCONFIG value was 0x%x\n", devconfig); |
| 9286 | } |
| 9287 | devconfig |= 0x80000040; |
| 9288 | pci_write_config_dword(pdev, DEVCONFIG, devconfig); |
| 9289 | #endif /* AIC7XXX_STRICT_PCI_SETUP */ |
| 9290 | |
| 9291 | temp_p->unpause = INTEN; |
| 9292 | temp_p->pause = temp_p->unpause | PAUSE; |
| 9293 | if ( ((temp_p->base == 0) && |
| 9294 | (temp_p->mbase == 0)) || |
| 9295 | (temp_p->irq == 0) ) |
| 9296 | { |
| 9297 | printk("aic7xxx: <%s> at PCI %d/%d/%d\n", |
| 9298 | board_names[aic_pdevs[i].board_name_index], |
| 9299 | temp_p->pci_bus, |
| 9300 | PCI_SLOT(temp_p->pci_device_fn), |
| 9301 | PCI_FUNC(temp_p->pci_device_fn)); |
| 9302 | printk("aic7xxx: Controller disabled by BIOS, ignoring.\n"); |
| 9303 | goto skip_pci_controller; |
| 9304 | } |
| 9305 | |
| 9306 | #ifdef MMAPIO |
| 9307 | if ( !(temp_p->base) || !(temp_p->flags & AHC_MULTI_CHANNEL) || |
| 9308 | ((temp_p->chip != (AHC_AIC7870 | AHC_PCI)) && |
| 9309 | (temp_p->chip != (AHC_AIC7880 | AHC_PCI))) ) |
| 9310 | { |
| 9311 | temp_p->maddr = ioremap_nocache(temp_p->mbase, 256); |
| 9312 | if(temp_p->maddr) |
| 9313 | { |
| 9314 | /* |
| 9315 | * We need to check the I/O with the MMAPed address. Some machines |
| 9316 | * simply fail to work with MMAPed I/O and certain controllers. |
| 9317 | */ |
| 9318 | if(aic_inb(temp_p, HCNTRL) == 0xff) |
| 9319 | { |
| 9320 | /* |
| 9321 | * OK.....we failed our test....go back to programmed I/O |
| 9322 | */ |
| 9323 | printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d/%d\n", |
| 9324 | board_names[aic_pdevs[i].board_name_index], |
| 9325 | temp_p->pci_bus, |
| 9326 | PCI_SLOT(temp_p->pci_device_fn), |
| 9327 | PCI_FUNC(temp_p->pci_device_fn)); |
| 9328 | printk(KERN_INFO "aic7xxx: MMAPed I/O failed, reverting to " |
| 9329 | "Programmed I/O.\n"); |
| 9330 | iounmap(temp_p->maddr); |
| 9331 | temp_p->maddr = NULL; |
| 9332 | if(temp_p->base == 0) |
| 9333 | { |
| 9334 | printk("aic7xxx: <%s> at PCI %d/%d/%d\n", |
| 9335 | board_names[aic_pdevs[i].board_name_index], |
| 9336 | temp_p->pci_bus, |
| 9337 | PCI_SLOT(temp_p->pci_device_fn), |
| 9338 | PCI_FUNC(temp_p->pci_device_fn)); |
| 9339 | printk("aic7xxx: Controller disabled by BIOS, ignoring.\n"); |
| 9340 | goto skip_pci_controller; |
| 9341 | } |
| 9342 | } |
| 9343 | } |
| 9344 | } |
| 9345 | #endif |
| 9346 | |
| 9347 | /* |
| 9348 | * We HAVE to make sure the first pause_sequencer() and all other |
| 9349 | * subsequent I/O that isn't PCI config space I/O takes place |
| 9350 | * after the MMAPed I/O region is configured and tested. The |
| 9351 | * problem is the PowerPC architecture that doesn't support |
| 9352 | * programmed I/O at all, so we have to have the MMAP I/O set up |
| 9353 | * for this pause to even work on those machines. |
| 9354 | */ |
| 9355 | pause_sequencer(temp_p); |
| 9356 | |
| 9357 | /* |
| 9358 | * Clear out any pending PCI error status messages. Also set |
| 9359 | * verbose to 0 so that we don't emit strange PCI error messages |
| 9360 | * while cleaning out the current status bits. |
| 9361 | */ |
| 9362 | oldverbose = aic7xxx_verbose; |
| 9363 | aic7xxx_verbose = 0; |
| 9364 | aic7xxx_pci_intr(temp_p); |
| 9365 | aic7xxx_verbose = oldverbose; |
| 9366 | |
| 9367 | temp_p->bios_address = 0; |
| 9368 | |
| 9369 | /* |
| 9370 | * Remember how the card was setup in case there is no seeprom. |
| 9371 | */ |
| 9372 | if (temp_p->features & AHC_ULTRA2) |
| 9373 | temp_p->scsi_id = aic_inb(temp_p, SCSIID_ULTRA2) & OID; |
| 9374 | else |
| 9375 | temp_p->scsi_id = aic_inb(temp_p, SCSIID) & OID; |
| 9376 | /* |
| 9377 | * Get current termination setting |
| 9378 | */ |
| 9379 | sxfrctl1 = aic_inb(temp_p, SXFRCTL1); |
| 9380 | |
| 9381 | if (aic7xxx_chip_reset(temp_p) == -1) |
| 9382 | { |
| 9383 | goto skip_pci_controller; |
| 9384 | } |
| 9385 | /* |
| 9386 | * Very quickly put the term setting back into the register since |
| 9387 | * the chip reset may cause odd things to happen. This is to keep |
| 9388 | * LVD busses with lots of drives from draining the power out of |
| 9389 | * the diffsense line before we get around to running the |
| 9390 | * configure_termination() function. Also restore the STPWLEVEL |
| 9391 | * bit of DEVCONFIG |
| 9392 | */ |
| 9393 | aic_outb(temp_p, sxfrctl1, SXFRCTL1); |
| 9394 | pci_write_config_dword(temp_p->pdev, DEVCONFIG, devconfig); |
| 9395 | sxfrctl1 &= STPWEN; |
| 9396 | |
| 9397 | /* |
| 9398 | * We need to set the CHNL? assignments before loading the SEEPROM |
| 9399 | * The 3940 and 3985 cards (original stuff, not any of the later |
| 9400 | * stuff) are 7870 and 7880 class chips. The Ultra2 stuff falls |
| 9401 | * under 7896 and 7897. The 7895 is in a class by itself :) |
| 9402 | */ |
| 9403 | switch (temp_p->chip & AHC_CHIPID_MASK) |
| 9404 | { |
| 9405 | case AHC_AIC7870: /* 3840 / 3985 */ |
| 9406 | case AHC_AIC7880: /* 3840 UW / 3985 UW */ |
| 9407 | if(temp_p->flags & AHC_MULTI_CHANNEL) |
| 9408 | { |
| 9409 | switch(PCI_SLOT(temp_p->pci_device_fn)) |
| 9410 | { |
| 9411 | case 5: |
| 9412 | temp_p->flags |= AHC_CHNLB; |
| 9413 | break; |
| 9414 | case 8: |
| 9415 | temp_p->flags |= AHC_CHNLB; |
| 9416 | break; |
| 9417 | case 12: |
| 9418 | temp_p->flags |= AHC_CHNLC; |
| 9419 | break; |
| 9420 | default: |
| 9421 | break; |
| 9422 | } |
| 9423 | } |
| 9424 | break; |
| 9425 | |
| 9426 | case AHC_AIC7895: /* 7895 */ |
| 9427 | case AHC_AIC7896: /* 7896/7 */ |
| 9428 | case AHC_AIC7899: /* 7899 */ |
| 9429 | if (PCI_FUNC(pdev->devfn) != 0) |
| 9430 | { |
| 9431 | temp_p->flags |= AHC_CHNLB; |
| 9432 | } |
| 9433 | /* |
| 9434 | * The 7895 is the only chipset that sets the SCBSIZE32 param |
| 9435 | * in the DEVCONFIG register. The Ultra2 chipsets use |
| 9436 | * the DSCOMMAND0 register instead. |
| 9437 | */ |
| 9438 | if ((temp_p->chip & AHC_CHIPID_MASK) == AHC_AIC7895) |
| 9439 | { |
| 9440 | pci_read_config_dword(pdev, DEVCONFIG, &devconfig); |
| 9441 | devconfig |= SCBSIZE32; |
| 9442 | pci_write_config_dword(pdev, DEVCONFIG, devconfig); |
| 9443 | } |
| 9444 | break; |
| 9445 | default: |
| 9446 | break; |
| 9447 | } |
| 9448 | |
| 9449 | /* |
| 9450 | * Loading of the SEEPROM needs to come after we've set the flags |
| 9451 | * to indicate possible CHNLB and CHNLC assigments. Otherwise, |
| 9452 | * on 394x and 398x cards we'll end up reading the wrong settings |
| 9453 | * for channels B and C |
| 9454 | */ |
| 9455 | switch (temp_p->chip & AHC_CHIPID_MASK) |
| 9456 | { |
| 9457 | case AHC_AIC7892: |
| 9458 | case AHC_AIC7899: |
| 9459 | aic_outb(temp_p, 0, SCAMCTL); |
| 9460 | /* |
| 9461 | * Switch to the alt mode of the chip... |
| 9462 | */ |
| 9463 | aic_outb(temp_p, aic_inb(temp_p, SFUNCT) | ALT_MODE, SFUNCT); |
| 9464 | /* |
| 9465 | * Set our options...the last two items set our CRC after x byte |
| 9466 | * count in target mode... |
| 9467 | */ |
| 9468 | aic_outb(temp_p, AUTO_MSGOUT_DE | DIS_MSGIN_DUALEDGE, OPTIONMODE); |
| 9469 | aic_outb(temp_p, 0x00, 0x0b); |
| 9470 | aic_outb(temp_p, 0x10, 0x0a); |
| 9471 | /* |
| 9472 | * switch back to normal mode... |
| 9473 | */ |
| 9474 | aic_outb(temp_p, aic_inb(temp_p, SFUNCT) & ~ALT_MODE, SFUNCT); |
| 9475 | aic_outb(temp_p, CRCVALCHKEN | CRCENDCHKEN | CRCREQCHKEN | |
| 9476 | TARGCRCENDEN | TARGCRCCNTEN, |
| 9477 | CRCCONTROL1); |
| 9478 | aic_outb(temp_p, ((aic_inb(temp_p, DSCOMMAND0) | USCBSIZE32 | |
| 9479 | MPARCKEN | CIOPARCKEN | CACHETHEN) & |
| 9480 | ~DPARCKEN), DSCOMMAND0); |
| 9481 | aic7xxx_load_seeprom(temp_p, &sxfrctl1); |
| 9482 | break; |
| 9483 | case AHC_AIC7890: |
| 9484 | case AHC_AIC7896: |
| 9485 | aic_outb(temp_p, 0, SCAMCTL); |
| 9486 | aic_outb(temp_p, (aic_inb(temp_p, DSCOMMAND0) | |
| 9487 | CACHETHEN | MPARCKEN | USCBSIZE32 | |
| 9488 | CIOPARCKEN) & ~DPARCKEN, DSCOMMAND0); |
| 9489 | aic7xxx_load_seeprom(temp_p, &sxfrctl1); |
| 9490 | break; |
| 9491 | case AHC_AIC7850: |
| 9492 | case AHC_AIC7860: |
| 9493 | /* |
| 9494 | * Set the DSCOMMAND0 register on these cards different from |
| 9495 | * on the 789x cards. Also, read the SEEPROM as well. |
| 9496 | */ |
| 9497 | aic_outb(temp_p, (aic_inb(temp_p, DSCOMMAND0) | |
| 9498 | CACHETHEN | MPARCKEN) & ~DPARCKEN, |
| 9499 | DSCOMMAND0); |
| 9500 | /* FALLTHROUGH */ |
| 9501 | default: |
| 9502 | aic7xxx_load_seeprom(temp_p, &sxfrctl1); |
| 9503 | break; |
| 9504 | case AHC_AIC7880: |
| 9505 | /* |
| 9506 | * Check the rev of the chipset before we change DSCOMMAND0 |
| 9507 | */ |
| 9508 | pci_read_config_dword(pdev, DEVCONFIG, &devconfig); |
| 9509 | if ((devconfig & 0xff) >= 1) |
| 9510 | { |
| 9511 | aic_outb(temp_p, (aic_inb(temp_p, DSCOMMAND0) | |
| 9512 | CACHETHEN | MPARCKEN) & ~DPARCKEN, |
| 9513 | DSCOMMAND0); |
| 9514 | } |
| 9515 | aic7xxx_load_seeprom(temp_p, &sxfrctl1); |
| 9516 | break; |
| 9517 | } |
| 9518 | |
| 9519 | |
| 9520 | /* |
| 9521 | * and then we need another switch based on the type in order to |
| 9522 | * make sure the channel B primary flag is set properly on 7895 |
| 9523 | * controllers....Arrrgggghhh!!! We also have to catch the fact |
| 9524 | * that when you disable the BIOS on the 7895 on the Intel DK440LX |
| 9525 | * motherboard, and possibly others, it only sets the BIOS disabled |
| 9526 | * bit on the A channel...I think I'm starting to lean towards |
| 9527 | * going postal.... |
| 9528 | */ |
| 9529 | switch(temp_p->chip & AHC_CHIPID_MASK) |
| 9530 | { |
| 9531 | case AHC_AIC7895: |
| 9532 | case AHC_AIC7896: |
| 9533 | case AHC_AIC7899: |
| 9534 | current_p = list_p; |
| 9535 | while(current_p != NULL) |
| 9536 | { |
| 9537 | if ( (current_p->pci_bus == temp_p->pci_bus) && |
| 9538 | (PCI_SLOT(current_p->pci_device_fn) == |
| 9539 | PCI_SLOT(temp_p->pci_device_fn)) ) |
| 9540 | { |
| 9541 | if ( PCI_FUNC(current_p->pci_device_fn) == 0 ) |
| 9542 | { |
| 9543 | temp_p->flags |= |
| 9544 | (current_p->flags & AHC_CHANNEL_B_PRIMARY); |
| 9545 | temp_p->flags &= ~(AHC_BIOS_ENABLED|AHC_USEDEFAULTS); |
| 9546 | temp_p->flags |= |
| 9547 | (current_p->flags & (AHC_BIOS_ENABLED|AHC_USEDEFAULTS)); |
| 9548 | } |
| 9549 | else |
| 9550 | { |
| 9551 | current_p->flags |= |
| 9552 | (temp_p->flags & AHC_CHANNEL_B_PRIMARY); |
| 9553 | current_p->flags &= ~(AHC_BIOS_ENABLED|AHC_USEDEFAULTS); |
| 9554 | current_p->flags |= |
| 9555 | (temp_p->flags & (AHC_BIOS_ENABLED|AHC_USEDEFAULTS)); |
| 9556 | } |
| 9557 | } |
| 9558 | current_p = current_p->next; |
| 9559 | } |
| 9560 | break; |
| 9561 | default: |
| 9562 | break; |
| 9563 | } |
| 9564 | |
| 9565 | /* |
| 9566 | * We only support external SCB RAM on the 7895/6/7 chipsets. |
| 9567 | * We could support it on the 7890/1 easy enough, but I don't |
| 9568 | * know of any 7890/1 based cards that have it. I do know |
| 9569 | * of 7895/6/7 cards that have it and they work properly. |
| 9570 | */ |
| 9571 | switch(temp_p->chip & AHC_CHIPID_MASK) |
| 9572 | { |
| 9573 | default: |
| 9574 | break; |
| 9575 | case AHC_AIC7895: |
| 9576 | case AHC_AIC7896: |
| 9577 | case AHC_AIC7899: |
| 9578 | pci_read_config_dword(pdev, DEVCONFIG, &devconfig); |
| 9579 | if (temp_p->features & AHC_ULTRA2) |
| 9580 | { |
| 9581 | if ( (aic_inb(temp_p, DSCOMMAND0) & RAMPSM_ULTRA2) && |
| 9582 | (aic7xxx_scbram) ) |
| 9583 | { |
| 9584 | aic_outb(temp_p, |
| 9585 | aic_inb(temp_p, DSCOMMAND0) & ~SCBRAMSEL_ULTRA2, |
| 9586 | DSCOMMAND0); |
| 9587 | temp_p->flags |= AHC_EXTERNAL_SRAM; |
| 9588 | devconfig |= EXTSCBPEN; |
| 9589 | } |
| 9590 | else if (aic_inb(temp_p, DSCOMMAND0) & RAMPSM_ULTRA2) |
| 9591 | { |
| 9592 | printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d/%d\n", |
| 9593 | board_names[aic_pdevs[i].board_name_index], |
| 9594 | temp_p->pci_bus, |
| 9595 | PCI_SLOT(temp_p->pci_device_fn), |
| 9596 | PCI_FUNC(temp_p->pci_device_fn)); |
| 9597 | printk("aic7xxx: external SCB RAM detected, " |
| 9598 | "but not enabled\n"); |
| 9599 | } |
| 9600 | } |
| 9601 | else |
| 9602 | { |
| 9603 | if ((devconfig & RAMPSM) && (aic7xxx_scbram)) |
| 9604 | { |
| 9605 | devconfig &= ~SCBRAMSEL; |
| 9606 | devconfig |= EXTSCBPEN; |
| 9607 | temp_p->flags |= AHC_EXTERNAL_SRAM; |
| 9608 | } |
| 9609 | else if (devconfig & RAMPSM) |
| 9610 | { |
| 9611 | printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d/%d\n", |
| 9612 | board_names[aic_pdevs[i].board_name_index], |
| 9613 | temp_p->pci_bus, |
| 9614 | PCI_SLOT(temp_p->pci_device_fn), |
| 9615 | PCI_FUNC(temp_p->pci_device_fn)); |
| 9616 | printk("aic7xxx: external SCB RAM detected, " |
| 9617 | "but not enabled\n"); |
| 9618 | } |
| 9619 | } |
| 9620 | pci_write_config_dword(pdev, DEVCONFIG, devconfig); |
| 9621 | if ( (temp_p->flags & AHC_EXTERNAL_SRAM) && |
| 9622 | (temp_p->flags & AHC_CHNLB) ) |
| 9623 | aic_outb(temp_p, 1, CCSCBBADDR); |
| 9624 | break; |
| 9625 | } |
| 9626 | |
| 9627 | /* |
| 9628 | * Take the LED out of diagnostic mode |
| 9629 | */ |
| 9630 | aic_outb(temp_p, |
| 9631 | (aic_inb(temp_p, SBLKCTL) & ~(DIAGLEDEN | DIAGLEDON)), |
| 9632 | SBLKCTL); |
| 9633 | |
| 9634 | /* |
| 9635 | * We don't know where this is set in the SEEPROM or by the |
| 9636 | * BIOS, so we default to 100%. On Ultra2 controllers, use 75% |
| 9637 | * instead. |
| 9638 | */ |
| 9639 | if (temp_p->features & AHC_ULTRA2) |
| 9640 | { |
| 9641 | aic_outb(temp_p, RD_DFTHRSH_MAX | WR_DFTHRSH_MAX, DFF_THRSH); |
| 9642 | } |
| 9643 | else |
| 9644 | { |
| 9645 | aic_outb(temp_p, DFTHRSH_100, DSPCISTATUS); |
| 9646 | } |
| 9647 | |
| 9648 | /* |
| 9649 | * Call our function to fixup any bugs that exist on this chipset. |
| 9650 | * This may muck with PCI settings and other device settings, so |
| 9651 | * make sure it's after all the other PCI and device register |
| 9652 | * tweaks so it can back out bad settings on specific broken cards. |
| 9653 | */ |
| 9654 | aic7xxx_configure_bugs(temp_p); |
| 9655 | |
| 9656 | if ( list_p == NULL ) |
| 9657 | { |
| 9658 | list_p = current_p = temp_p; |
| 9659 | } |
| 9660 | else |
| 9661 | { |
| 9662 | current_p = list_p; |
| 9663 | while(current_p->next != NULL) |
| 9664 | current_p = current_p->next; |
| 9665 | current_p->next = temp_p; |
| 9666 | } |
| 9667 | temp_p->next = NULL; |
| 9668 | found++; |
| 9669 | continue; |
| 9670 | skip_pci_controller: |
| 9671 | #ifdef CONFIG_PCI |
| 9672 | pci_release_regions(temp_p->pdev); |
| 9673 | #endif |
| 9674 | kfree(temp_p); |
| 9675 | } /* Found an Adaptec PCI device. */ |
| 9676 | else /* Well, we found one, but we couldn't get any memory */ |
| 9677 | { |
| 9678 | printk("aic7xxx: Found <%s>\n", |
| 9679 | board_names[aic_pdevs[i].board_name_index]); |
| 9680 | printk(KERN_INFO "aic7xxx: Unable to allocate device memory, " |
| 9681 | "skipping.\n"); |
| 9682 | } |
| 9683 | } /* while(pdev=....) */ |
| 9684 | } /* for PCI_DEVICES */ |
| 9685 | } |
| 9686 | #endif /* CONFIG_PCI */ |
| 9687 | |
| 9688 | #if defined(__i386__) || defined(__alpha__) |
| 9689 | /* |
| 9690 | * EISA/VL-bus card signature probe. |
| 9691 | */ |
| 9692 | slot = MINSLOT; |
| 9693 | while ( (slot <= MAXSLOT) && |
| 9694 | !(aic7xxx_no_probe) ) |
| 9695 | { |
| 9696 | base = SLOTBASE(slot) + MINREG; |
| 9697 | |
| 9698 | if (!request_region(base, MAXREG - MINREG, "aic7xxx")) |
| 9699 | { |
| 9700 | /* |
| 9701 | * Some other driver has staked a |
| 9702 | * claim to this i/o region already. |
| 9703 | */ |
| 9704 | slot++; |
| 9705 | continue; /* back to the beginning of the for loop */ |
| 9706 | } |
| 9707 | flags = 0; |
| 9708 | type = aic7xxx_probe(slot, base + AHC_HID0, &flags); |
| 9709 | if (type == -1) |
| 9710 | { |
| 9711 | release_region(base, MAXREG - MINREG); |
| 9712 | slot++; |
| 9713 | continue; |
| 9714 | } |
| 9715 | temp_p = kmalloc(sizeof(struct aic7xxx_host), GFP_ATOMIC); |
| 9716 | if (temp_p == NULL) |
| 9717 | { |
| 9718 | printk(KERN_WARNING "aic7xxx: Unable to allocate device space.\n"); |
| 9719 | release_region(base, MAXREG - MINREG); |
| 9720 | slot++; |
| 9721 | continue; /* back to the beginning of the while loop */ |
| 9722 | } |
| 9723 | |
| 9724 | /* |
| 9725 | * Pause the card preserving the IRQ type. Allow the operator |
| 9726 | * to override the IRQ trigger. |
| 9727 | */ |
| 9728 | if (aic7xxx_irq_trigger == 1) |
| 9729 | hcntrl = IRQMS; /* Level */ |
| 9730 | else if (aic7xxx_irq_trigger == 0) |
| 9731 | hcntrl = 0; /* Edge */ |
| 9732 | else |
| 9733 | hcntrl = inb(base + HCNTRL) & IRQMS; /* Default */ |
| 9734 | memset(temp_p, 0, sizeof(struct aic7xxx_host)); |
| 9735 | temp_p->unpause = hcntrl | INTEN; |
| 9736 | temp_p->pause = hcntrl | PAUSE | INTEN; |
| 9737 | temp_p->base = base; |
| 9738 | temp_p->mbase = 0; |
| 9739 | temp_p->maddr = NULL; |
| 9740 | temp_p->pci_bus = 0; |
| 9741 | temp_p->pci_device_fn = slot; |
| 9742 | aic_outb(temp_p, hcntrl | PAUSE, HCNTRL); |
| 9743 | while( (aic_inb(temp_p, HCNTRL) & PAUSE) == 0 ) ; |
| 9744 | if (aic7xxx_chip_reset(temp_p) == -1) |
| 9745 | temp_p->irq = 0; |
| 9746 | else |
| 9747 | temp_p->irq = aic_inb(temp_p, INTDEF) & 0x0F; |
| 9748 | temp_p->flags |= AHC_PAGESCBS; |
| 9749 | |
| 9750 | switch (temp_p->irq) |
| 9751 | { |
| 9752 | case 9: |
| 9753 | case 10: |
| 9754 | case 11: |
| 9755 | case 12: |
| 9756 | case 14: |
| 9757 | case 15: |
| 9758 | break; |
| 9759 | |
| 9760 | default: |
| 9761 | printk(KERN_WARNING "aic7xxx: Host adapter uses unsupported IRQ " |
| 9762 | "level %d, ignoring.\n", temp_p->irq); |
| 9763 | kfree(temp_p); |
| 9764 | release_region(base, MAXREG - MINREG); |
| 9765 | slot++; |
| 9766 | continue; /* back to the beginning of the while loop */ |
| 9767 | } |
| 9768 | |
| 9769 | /* |
| 9770 | * We are commited now, everything has been checked and this card |
| 9771 | * has been found, now we just set it up |
| 9772 | */ |
| 9773 | |
| 9774 | /* |
| 9775 | * Insert our new struct into the list at the end |
| 9776 | */ |
| 9777 | if (list_p == NULL) |
| 9778 | { |
| 9779 | list_p = current_p = temp_p; |
| 9780 | } |
| 9781 | else |
| 9782 | { |
| 9783 | current_p = list_p; |
| 9784 | while (current_p->next != NULL) |
| 9785 | current_p = current_p->next; |
| 9786 | current_p->next = temp_p; |
| 9787 | } |
| 9788 | |
| 9789 | switch (type) |
| 9790 | { |
| 9791 | case 0: |
| 9792 | temp_p->board_name_index = 2; |
| 9793 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 9794 | printk("aic7xxx: <%s> at EISA %d\n", |
| 9795 | board_names[2], slot); |
| 9796 | /* FALLTHROUGH */ |
| 9797 | case 1: |
| 9798 | { |
| 9799 | temp_p->chip = AHC_AIC7770 | AHC_EISA; |
| 9800 | temp_p->features |= AHC_AIC7770_FE; |
| 9801 | temp_p->bios_control = aic_inb(temp_p, HA_274_BIOSCTRL); |
| 9802 | |
| 9803 | /* |
| 9804 | * Get the primary channel information. Right now we don't |
| 9805 | * do anything with this, but someday we will be able to inform |
| 9806 | * the mid-level SCSI code which channel is primary. |
| 9807 | */ |
| 9808 | if (temp_p->board_name_index == 0) |
| 9809 | { |
| 9810 | temp_p->board_name_index = 3; |
| 9811 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 9812 | printk("aic7xxx: <%s> at EISA %d\n", |
| 9813 | board_names[3], slot); |
| 9814 | } |
| 9815 | if (temp_p->bios_control & CHANNEL_B_PRIMARY) |
| 9816 | { |
| 9817 | temp_p->flags |= AHC_CHANNEL_B_PRIMARY; |
| 9818 | } |
| 9819 | |
| 9820 | if ((temp_p->bios_control & BIOSMODE) == BIOSDISABLED) |
| 9821 | { |
| 9822 | temp_p->flags &= ~AHC_BIOS_ENABLED; |
| 9823 | } |
| 9824 | else |
| 9825 | { |
| 9826 | temp_p->flags &= ~AHC_USEDEFAULTS; |
| 9827 | temp_p->flags |= AHC_BIOS_ENABLED; |
| 9828 | if ( (temp_p->bios_control & 0x20) == 0 ) |
| 9829 | { |
| 9830 | temp_p->bios_address = 0xcc000; |
| 9831 | temp_p->bios_address += (0x4000 * (temp_p->bios_control & 0x07)); |
| 9832 | } |
| 9833 | else |
| 9834 | { |
| 9835 | temp_p->bios_address = 0xd0000; |
| 9836 | temp_p->bios_address += (0x8000 * (temp_p->bios_control & 0x06)); |
| 9837 | } |
| 9838 | } |
| 9839 | temp_p->adapter_control = aic_inb(temp_p, SCSICONF) << 8; |
| 9840 | temp_p->adapter_control |= aic_inb(temp_p, SCSICONF + 1); |
| 9841 | if (temp_p->features & AHC_WIDE) |
| 9842 | { |
| 9843 | temp_p->scsi_id = temp_p->adapter_control & HWSCSIID; |
| 9844 | temp_p->scsi_id_b = temp_p->scsi_id; |
| 9845 | } |
| 9846 | else |
| 9847 | { |
| 9848 | temp_p->scsi_id = (temp_p->adapter_control >> 8) & HSCSIID; |
| 9849 | temp_p->scsi_id_b = temp_p->adapter_control & HSCSIID; |
| 9850 | } |
| 9851 | aic7xxx_load_seeprom(temp_p, &sxfrctl1); |
| 9852 | break; |
| 9853 | } |
| 9854 | |
| 9855 | case 2: |
| 9856 | case 3: |
| 9857 | temp_p->chip = AHC_AIC7770 | AHC_VL; |
| 9858 | temp_p->features |= AHC_AIC7770_FE; |
| 9859 | if (type == 2) |
| 9860 | temp_p->flags |= AHC_BIOS_ENABLED; |
| 9861 | else |
| 9862 | temp_p->flags &= ~AHC_BIOS_ENABLED; |
| 9863 | if (aic_inb(temp_p, SCSICONF) & TERM_ENB) |
| 9864 | sxfrctl1 = STPWEN; |
| 9865 | aic7xxx_load_seeprom(temp_p, &sxfrctl1); |
| 9866 | temp_p->board_name_index = 4; |
| 9867 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 9868 | printk("aic7xxx: <%s> at VLB %d\n", |
| 9869 | board_names[2], slot); |
| 9870 | switch( aic_inb(temp_p, STATUS_2840) & BIOS_SEL ) |
| 9871 | { |
| 9872 | case 0x00: |
| 9873 | temp_p->bios_address = 0xe0000; |
| 9874 | break; |
| 9875 | case 0x20: |
| 9876 | temp_p->bios_address = 0xc8000; |
| 9877 | break; |
| 9878 | case 0x40: |
| 9879 | temp_p->bios_address = 0xd0000; |
| 9880 | break; |
| 9881 | case 0x60: |
| 9882 | temp_p->bios_address = 0xd8000; |
| 9883 | break; |
| 9884 | default: |
| 9885 | break; /* can't get here */ |
| 9886 | } |
| 9887 | break; |
| 9888 | |
| 9889 | default: /* Won't get here. */ |
| 9890 | break; |
| 9891 | } |
| 9892 | if (aic7xxx_verbose & VERBOSE_PROBE2) |
| 9893 | { |
| 9894 | printk(KERN_INFO "aic7xxx: BIOS %sabled, IO Port 0x%lx, IRQ %d (%s)\n", |
| 9895 | (temp_p->flags & AHC_USEDEFAULTS) ? "dis" : "en", temp_p->base, |
| 9896 | temp_p->irq, |
| 9897 | (temp_p->pause & IRQMS) ? "level sensitive" : "edge triggered"); |
| 9898 | printk(KERN_INFO "aic7xxx: Extended translation %sabled.\n", |
| 9899 | (temp_p->flags & AHC_EXTEND_TRANS_A) ? "en" : "dis"); |
| 9900 | } |
| 9901 | |
| 9902 | /* |
| 9903 | * All the 7770 based chipsets have this bug |
| 9904 | */ |
| 9905 | temp_p->bugs |= AHC_BUG_TMODE_WIDEODD; |
| 9906 | |
| 9907 | /* |
| 9908 | * Set the FIFO threshold and the bus off time. |
| 9909 | */ |
| 9910 | hostconf = aic_inb(temp_p, HOSTCONF); |
| 9911 | aic_outb(temp_p, hostconf & DFTHRSH, BUSSPD); |
| 9912 | aic_outb(temp_p, (hostconf << 2) & BOFF, BUSTIME); |
| 9913 | slot++; |
| 9914 | found++; |
| 9915 | } |
| 9916 | |
| 9917 | #endif /* defined(__i386__) || defined(__alpha__) */ |
| 9918 | |
| 9919 | /* |
| 9920 | * Now, we re-order the probed devices by BIOS address and BUS class. |
| 9921 | * In general, we follow this algorithm to make the adapters show up |
| 9922 | * in the same order under linux that the computer finds them. |
| 9923 | * 1: All VLB/EISA cards with BIOS_ENABLED first, according to BIOS |
| 9924 | * address, going from lowest to highest. |
| 9925 | * 2: All PCI controllers with BIOS_ENABLED next, according to BIOS |
| 9926 | * address, going from lowest to highest. |
| 9927 | * 3: Remaining VLB/EISA controllers going in slot order. |
| 9928 | * 4: Remaining PCI controllers, going in PCI device order (reversable) |
| 9929 | */ |
| 9930 | |
| 9931 | { |
| 9932 | struct aic7xxx_host *sort_list[4] = { NULL, NULL, NULL, NULL }; |
| 9933 | struct aic7xxx_host *vlb, *pci; |
| 9934 | struct aic7xxx_host *prev_p; |
| 9935 | struct aic7xxx_host *p; |
| 9936 | unsigned char left; |
| 9937 | |
| 9938 | prev_p = vlb = pci = NULL; |
| 9939 | |
| 9940 | temp_p = list_p; |
| 9941 | while (temp_p != NULL) |
| 9942 | { |
| 9943 | switch(temp_p->chip & ~AHC_CHIPID_MASK) |
| 9944 | { |
| 9945 | case AHC_EISA: |
| 9946 | case AHC_VL: |
| 9947 | { |
| 9948 | p = temp_p; |
| 9949 | if (p->flags & AHC_BIOS_ENABLED) |
| 9950 | vlb = sort_list[0]; |
| 9951 | else |
| 9952 | vlb = sort_list[2]; |
| 9953 | |
| 9954 | if (vlb == NULL) |
| 9955 | { |
| 9956 | vlb = temp_p; |
| 9957 | temp_p = temp_p->next; |
| 9958 | vlb->next = NULL; |
| 9959 | } |
| 9960 | else |
| 9961 | { |
| 9962 | current_p = vlb; |
| 9963 | prev_p = NULL; |
| 9964 | while ( (current_p != NULL) && |
| 9965 | (current_p->bios_address < temp_p->bios_address)) |
| 9966 | { |
| 9967 | prev_p = current_p; |
| 9968 | current_p = current_p->next; |
| 9969 | } |
| 9970 | if (prev_p != NULL) |
| 9971 | { |
| 9972 | prev_p->next = temp_p; |
| 9973 | temp_p = temp_p->next; |
| 9974 | prev_p->next->next = current_p; |
| 9975 | } |
| 9976 | else |
| 9977 | { |
| 9978 | vlb = temp_p; |
| 9979 | temp_p = temp_p->next; |
| 9980 | vlb->next = current_p; |
| 9981 | } |
| 9982 | } |
| 9983 | |
| 9984 | if (p->flags & AHC_BIOS_ENABLED) |
| 9985 | sort_list[0] = vlb; |
| 9986 | else |
| 9987 | sort_list[2] = vlb; |
| 9988 | |
| 9989 | break; |
| 9990 | } |
| 9991 | default: /* All PCI controllers fall through to default */ |
| 9992 | { |
| 9993 | |
| 9994 | p = temp_p; |
| 9995 | if (p->flags & AHC_BIOS_ENABLED) |
| 9996 | pci = sort_list[1]; |
| 9997 | else |
| 9998 | pci = sort_list[3]; |
| 9999 | |
| 10000 | if (pci == NULL) |
| 10001 | { |
| 10002 | pci = temp_p; |
| 10003 | temp_p = temp_p->next; |
| 10004 | pci->next = NULL; |
| 10005 | } |
| 10006 | else |
| 10007 | { |
| 10008 | current_p = pci; |
| 10009 | prev_p = NULL; |
| 10010 | if (!aic7xxx_reverse_scan) |
| 10011 | { |
| 10012 | while ( (current_p != NULL) && |
| 10013 | ( (PCI_SLOT(current_p->pci_device_fn) | |
| 10014 | (current_p->pci_bus << 8)) < |
| 10015 | (PCI_SLOT(temp_p->pci_device_fn) | |
| 10016 | (temp_p->pci_bus << 8)) ) ) |
| 10017 | { |
| 10018 | prev_p = current_p; |
| 10019 | current_p = current_p->next; |
| 10020 | } |
| 10021 | } |
| 10022 | else |
| 10023 | { |
| 10024 | while ( (current_p != NULL) && |
| 10025 | ( (PCI_SLOT(current_p->pci_device_fn) | |
| 10026 | (current_p->pci_bus << 8)) > |
| 10027 | (PCI_SLOT(temp_p->pci_device_fn) | |
| 10028 | (temp_p->pci_bus << 8)) ) ) |
| 10029 | { |
| 10030 | prev_p = current_p; |
| 10031 | current_p = current_p->next; |
| 10032 | } |
| 10033 | } |
| 10034 | /* |
| 10035 | * Are we dealing with a 7895/6/7/9 where we need to sort the |
| 10036 | * channels as well, if so, the bios_address values should |
| 10037 | * be the same |
| 10038 | */ |
| 10039 | if ( (current_p) && (temp_p->flags & AHC_MULTI_CHANNEL) && |
| 10040 | (temp_p->pci_bus == current_p->pci_bus) && |
| 10041 | (PCI_SLOT(temp_p->pci_device_fn) == |
| 10042 | PCI_SLOT(current_p->pci_device_fn)) ) |
| 10043 | { |
| 10044 | if (temp_p->flags & AHC_CHNLB) |
| 10045 | { |
| 10046 | if ( !(temp_p->flags & AHC_CHANNEL_B_PRIMARY) ) |
| 10047 | { |
| 10048 | prev_p = current_p; |
| 10049 | current_p = current_p->next; |
| 10050 | } |
| 10051 | } |
| 10052 | else |
| 10053 | { |
| 10054 | if (temp_p->flags & AHC_CHANNEL_B_PRIMARY) |
| 10055 | { |
| 10056 | prev_p = current_p; |
| 10057 | current_p = current_p->next; |
| 10058 | } |
| 10059 | } |
| 10060 | } |
| 10061 | if (prev_p != NULL) |
| 10062 | { |
| 10063 | prev_p->next = temp_p; |
| 10064 | temp_p = temp_p->next; |
| 10065 | prev_p->next->next = current_p; |
| 10066 | } |
| 10067 | else |
| 10068 | { |
| 10069 | pci = temp_p; |
| 10070 | temp_p = temp_p->next; |
| 10071 | pci->next = current_p; |
| 10072 | } |
| 10073 | } |
| 10074 | |
| 10075 | if (p->flags & AHC_BIOS_ENABLED) |
| 10076 | sort_list[1] = pci; |
| 10077 | else |
| 10078 | sort_list[3] = pci; |
| 10079 | |
| 10080 | break; |
| 10081 | } |
| 10082 | } /* End of switch(temp_p->type) */ |
| 10083 | } /* End of while (temp_p != NULL) */ |
| 10084 | /* |
| 10085 | * At this point, the cards have been broken into 4 sorted lists, now |
| 10086 | * we run through the lists in order and register each controller |
| 10087 | */ |
| 10088 | { |
| 10089 | int i; |
| 10090 | |
| 10091 | left = found; |
| 10092 | for (i=0; i<ARRAY_SIZE(sort_list); i++) |
| 10093 | { |
| 10094 | temp_p = sort_list[i]; |
| 10095 | while(temp_p != NULL) |
| 10096 | { |
| 10097 | template->name = board_names[temp_p->board_name_index]; |
| 10098 | p = aic7xxx_alloc(template, temp_p); |
| 10099 | if (p != NULL) |
| 10100 | { |
| 10101 | p->instance = found - left; |
| 10102 | if (aic7xxx_register(template, p, (--left)) == 0) |
| 10103 | { |
| 10104 | found--; |
| 10105 | aic7xxx_release(p->host); |
| 10106 | scsi_unregister(p->host); |
| 10107 | } |
| 10108 | else if (aic7xxx_dump_card) |
| 10109 | { |
| 10110 | pause_sequencer(p); |
| 10111 | aic7xxx_print_card(p); |
| 10112 | aic7xxx_print_scratch_ram(p); |
| 10113 | unpause_sequencer(p, TRUE); |
| 10114 | } |
| 10115 | } |
| 10116 | current_p = temp_p; |
| 10117 | temp_p = (struct aic7xxx_host *)temp_p->next; |
| 10118 | kfree(current_p); |
| 10119 | } |
| 10120 | } |
| 10121 | } |
| 10122 | } |
| 10123 | return (found); |
| 10124 | } |
| 10125 | |
| 10126 | /*+F************************************************************************* |
| 10127 | * Function: |
| 10128 | * aic7xxx_buildscb |
| 10129 | * |
| 10130 | * Description: |
| 10131 | * Build a SCB. |
| 10132 | *-F*************************************************************************/ |
| 10133 | static void |
| 10134 | aic7xxx_buildscb(struct aic7xxx_host *p, Scsi_Cmnd *cmd, |
| 10135 | struct aic7xxx_scb *scb) |
| 10136 | { |
| 10137 | unsigned short mask; |
| 10138 | struct aic7xxx_hwscb *hscb; |
| 10139 | struct aic_dev_data *aic_dev = cmd->device->hostdata; |
| 10140 | struct scsi_device *sdptr = cmd->device; |
| 10141 | unsigned char tindex = TARGET_INDEX(cmd); |
| 10142 | struct request *req = cmd->request; |
| 10143 | |
| 10144 | mask = (0x01 << tindex); |
| 10145 | hscb = scb->hscb; |
| 10146 | |
| 10147 | /* |
| 10148 | * Setup the control byte if we need negotiation and have not |
| 10149 | * already requested it. |
| 10150 | */ |
| 10151 | hscb->control = 0; |
| 10152 | scb->tag_action = 0; |
| 10153 | |
| 10154 | if (p->discenable & mask) |
| 10155 | { |
| 10156 | hscb->control |= DISCENB; |
| 10157 | /* We always force TEST_UNIT_READY to untagged */ |
| 10158 | if (cmd->cmnd[0] != TEST_UNIT_READY && sdptr->simple_tags) |
| 10159 | { |
| 10160 | if (req->flags & REQ_HARDBARRIER) |
| 10161 | { |
| 10162 | if(sdptr->ordered_tags) |
| 10163 | { |
| 10164 | hscb->control |= MSG_ORDERED_Q_TAG; |
| 10165 | scb->tag_action = MSG_ORDERED_Q_TAG; |
| 10166 | } |
| 10167 | } |
| 10168 | else |
| 10169 | { |
| 10170 | hscb->control |= MSG_SIMPLE_Q_TAG; |
| 10171 | scb->tag_action = MSG_SIMPLE_Q_TAG; |
| 10172 | } |
| 10173 | } |
| 10174 | } |
| 10175 | if ( !(aic_dev->dtr_pending) && |
| 10176 | (aic_dev->needppr || aic_dev->needwdtr || aic_dev->needsdtr) && |
| 10177 | (aic_dev->flags & DEVICE_DTR_SCANNED) ) |
| 10178 | { |
| 10179 | aic_dev->dtr_pending = 1; |
| 10180 | scb->tag_action = 0; |
| 10181 | hscb->control &= DISCENB; |
| 10182 | hscb->control |= MK_MESSAGE; |
| 10183 | if(aic_dev->needppr) |
| 10184 | { |
| 10185 | scb->flags |= SCB_MSGOUT_PPR; |
| 10186 | } |
| 10187 | else if(aic_dev->needwdtr) |
| 10188 | { |
| 10189 | scb->flags |= SCB_MSGOUT_WDTR; |
| 10190 | } |
| 10191 | else if(aic_dev->needsdtr) |
| 10192 | { |
| 10193 | scb->flags |= SCB_MSGOUT_SDTR; |
| 10194 | } |
| 10195 | scb->flags |= SCB_DTR_SCB; |
| 10196 | } |
| 10197 | hscb->target_channel_lun = ((cmd->device->id << 4) & 0xF0) | |
| 10198 | ((cmd->device->channel & 0x01) << 3) | (cmd->device->lun & 0x07); |
| 10199 | |
| 10200 | /* |
| 10201 | * The interpretation of request_buffer and request_bufflen |
| 10202 | * changes depending on whether or not use_sg is zero; a |
| 10203 | * non-zero use_sg indicates the number of elements in the |
| 10204 | * scatter-gather array. |
| 10205 | */ |
| 10206 | |
| 10207 | /* |
| 10208 | * XXX - this relies on the host data being stored in a |
| 10209 | * little-endian format. |
| 10210 | */ |
| 10211 | hscb->SCSI_cmd_length = cmd->cmd_len; |
| 10212 | memcpy(scb->cmnd, cmd->cmnd, cmd->cmd_len); |
| 10213 | hscb->SCSI_cmd_pointer = cpu_to_le32(SCB_DMA_ADDR(scb, scb->cmnd)); |
| 10214 | |
| 10215 | if (cmd->use_sg) |
| 10216 | { |
| 10217 | struct scatterlist *sg; /* Must be mid-level SCSI code scatterlist */ |
| 10218 | |
| 10219 | /* |
| 10220 | * We must build an SG list in adapter format, as the kernel's SG list |
| 10221 | * cannot be used directly because of data field size (__alpha__) |
| 10222 | * differences and the kernel SG list uses virtual addresses where |
| 10223 | * we need physical addresses. |
| 10224 | */ |
| 10225 | int i, use_sg; |
| 10226 | |
| 10227 | sg = (struct scatterlist *)cmd->request_buffer; |
| 10228 | scb->sg_length = 0; |
| be7db05 | 2005-04-17 15:26:13 -0500 | [diff] [blame] | 10229 | use_sg = pci_map_sg(p->pdev, sg, cmd->use_sg, cmd->sc_data_direction); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10230 | /* |
| 10231 | * Copy the segments into the SG array. NOTE!!! - We used to |
| 10232 | * have the first entry both in the data_pointer area and the first |
| 10233 | * SG element. That has changed somewhat. We still have the first |
| 10234 | * entry in both places, but now we download the address of |
| 10235 | * scb->sg_list[1] instead of 0 to the sg pointer in the hscb. |
| 10236 | */ |
| 10237 | for (i = 0; i < use_sg; i++) |
| 10238 | { |
| 10239 | unsigned int len = sg_dma_len(sg+i); |
| 10240 | scb->sg_list[i].address = cpu_to_le32(sg_dma_address(sg+i)); |
| 10241 | scb->sg_list[i].length = cpu_to_le32(len); |
| 10242 | scb->sg_length += len; |
| 10243 | } |
| 10244 | /* Copy the first SG into the data pointer area. */ |
| 10245 | hscb->data_pointer = scb->sg_list[0].address; |
| 10246 | hscb->data_count = scb->sg_list[0].length; |
| 10247 | scb->sg_count = i; |
| 10248 | hscb->SG_segment_count = i; |
| 10249 | hscb->SG_list_pointer = cpu_to_le32(SCB_DMA_ADDR(scb, &scb->sg_list[1])); |
| 10250 | } |
| 10251 | else |
| 10252 | { |
| 10253 | if (cmd->request_bufflen) |
| 10254 | { |
| 10255 | unsigned int address = pci_map_single(p->pdev, cmd->request_buffer, |
| 10256 | cmd->request_bufflen, |
| be7db05 | 2005-04-17 15:26:13 -0500 | [diff] [blame] | 10257 | cmd->sc_data_direction); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10258 | aic7xxx_mapping(cmd) = address; |
| 10259 | scb->sg_list[0].address = cpu_to_le32(address); |
| 10260 | scb->sg_list[0].length = cpu_to_le32(cmd->request_bufflen); |
| 10261 | scb->sg_count = 1; |
| 10262 | scb->sg_length = cmd->request_bufflen; |
| 10263 | hscb->SG_segment_count = 1; |
| 10264 | hscb->SG_list_pointer = cpu_to_le32(SCB_DMA_ADDR(scb, &scb->sg_list[0])); |
| 10265 | hscb->data_count = scb->sg_list[0].length; |
| 10266 | hscb->data_pointer = scb->sg_list[0].address; |
| 10267 | } |
| 10268 | else |
| 10269 | { |
| 10270 | scb->sg_count = 0; |
| 10271 | scb->sg_length = 0; |
| 10272 | hscb->SG_segment_count = 0; |
| 10273 | hscb->SG_list_pointer = 0; |
| 10274 | hscb->data_count = 0; |
| 10275 | hscb->data_pointer = 0; |
| 10276 | } |
| 10277 | } |
| 10278 | } |
| 10279 | |
| 10280 | /*+F************************************************************************* |
| 10281 | * Function: |
| 10282 | * aic7xxx_queue |
| 10283 | * |
| 10284 | * Description: |
| 10285 | * Queue a SCB to the controller. |
| 10286 | *-F*************************************************************************/ |
| 10287 | static int |
| 10288 | aic7xxx_queue(Scsi_Cmnd *cmd, void (*fn)(Scsi_Cmnd *)) |
| 10289 | { |
| 10290 | struct aic7xxx_host *p; |
| 10291 | struct aic7xxx_scb *scb; |
| 10292 | struct aic_dev_data *aic_dev; |
| 10293 | |
| 10294 | p = (struct aic7xxx_host *) cmd->device->host->hostdata; |
| 10295 | |
| 10296 | aic_dev = cmd->device->hostdata; |
| 10297 | #ifdef AIC7XXX_VERBOSE_DEBUGGING |
| 10298 | if (aic_dev->active_cmds > aic_dev->max_q_depth) |
| 10299 | { |
| 10300 | printk(WARN_LEAD "Commands queued exceeds queue " |
| 10301 | "depth, active=%d\n", |
| 10302 | p->host_no, CTL_OF_CMD(cmd), |
| 10303 | aic_dev->active_cmds); |
| 10304 | } |
| 10305 | #endif |
| 10306 | |
| 10307 | scb = scbq_remove_head(&p->scb_data->free_scbs); |
| 10308 | if (scb == NULL) |
| 10309 | { |
| 10310 | aic7xxx_allocate_scb(p); |
| 10311 | scb = scbq_remove_head(&p->scb_data->free_scbs); |
| 10312 | if(scb == NULL) |
| 10313 | { |
| 10314 | printk(WARN_LEAD "Couldn't get a free SCB.\n", p->host_no, |
| 10315 | CTL_OF_CMD(cmd)); |
| 10316 | return 1; |
| 10317 | } |
| 10318 | } |
| 10319 | scb->cmd = cmd; |
| 10320 | |
| 10321 | /* |
| 10322 | * Make sure the Scsi_Cmnd pointer is saved, the struct it points to |
| 10323 | * is set up properly, and the parity error flag is reset, then send |
| 10324 | * the SCB to the sequencer and watch the fun begin. |
| 10325 | */ |
| 10326 | aic7xxx_position(cmd) = scb->hscb->tag; |
| 10327 | cmd->scsi_done = fn; |
| 10328 | cmd->result = DID_OK; |
| 10329 | memset(cmd->sense_buffer, 0, sizeof(cmd->sense_buffer)); |
| 10330 | aic7xxx_error(cmd) = DID_OK; |
| 10331 | aic7xxx_status(cmd) = 0; |
| 10332 | cmd->host_scribble = NULL; |
| 10333 | |
| 10334 | /* |
| 10335 | * Construct the SCB beforehand, so the sequencer is |
| 10336 | * paused a minimal amount of time. |
| 10337 | */ |
| 10338 | aic7xxx_buildscb(p, cmd, scb); |
| 10339 | |
| 10340 | scb->flags |= SCB_ACTIVE | SCB_WAITINGQ; |
| 10341 | |
| 10342 | scbq_insert_tail(&p->waiting_scbs, scb); |
| 10343 | aic7xxx_run_waiting_queues(p); |
| 10344 | return (0); |
| 10345 | } |
| 10346 | |
| 10347 | /*+F************************************************************************* |
| 10348 | * Function: |
| 10349 | * aic7xxx_bus_device_reset |
| 10350 | * |
| 10351 | * Description: |
| 10352 | * Abort or reset the current SCSI command(s). If the scb has not |
| 10353 | * previously been aborted, then we attempt to send a BUS_DEVICE_RESET |
| 10354 | * message to the target. If the scb has previously been unsuccessfully |
| 10355 | * aborted, then we will reset the channel and have all devices renegotiate. |
| 10356 | * Returns an enumerated type that indicates the status of the operation. |
| 10357 | *-F*************************************************************************/ |
| 10358 | static int |
Jeff Garzik | 94d0e7b | 2005-05-28 07:55:48 -0400 | [diff] [blame] | 10359 | __aic7xxx_bus_device_reset(Scsi_Cmnd *cmd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10360 | { |
| 10361 | struct aic7xxx_host *p; |
| 10362 | struct aic7xxx_scb *scb; |
| 10363 | struct aic7xxx_hwscb *hscb; |
| 10364 | int channel; |
| 10365 | unsigned char saved_scbptr, lastphase; |
| 10366 | unsigned char hscb_index; |
| 10367 | int disconnected; |
| 10368 | struct aic_dev_data *aic_dev; |
| 10369 | |
| 10370 | if(cmd == NULL) |
| 10371 | { |
| 10372 | printk(KERN_ERR "aic7xxx_bus_device_reset: called with NULL cmd!\n"); |
| 10373 | return FAILED; |
| 10374 | } |
| 10375 | p = (struct aic7xxx_host *)cmd->device->host->hostdata; |
| 10376 | aic_dev = AIC_DEV(cmd); |
| 10377 | if(aic7xxx_position(cmd) < p->scb_data->numscbs) |
| 10378 | scb = (p->scb_data->scb_array[aic7xxx_position(cmd)]); |
| 10379 | else |
| 10380 | return FAILED; |
| 10381 | |
| 10382 | hscb = scb->hscb; |
| 10383 | |
| 10384 | aic7xxx_isr(p->irq, (void *)p, NULL); |
| 10385 | aic7xxx_done_cmds_complete(p); |
| 10386 | /* If the command was already complete or just completed, then we didn't |
| 10387 | * do a reset, return FAILED */ |
| 10388 | if(!(scb->flags & SCB_ACTIVE)) |
| 10389 | return FAILED; |
| 10390 | |
| 10391 | pause_sequencer(p); |
| 10392 | lastphase = aic_inb(p, LASTPHASE); |
| 10393 | if (aic7xxx_verbose & VERBOSE_RESET_PROCESS) |
| 10394 | { |
| 10395 | printk(INFO_LEAD "Bus Device reset, scb flags 0x%x, ", |
| 10396 | p->host_no, CTL_OF_SCB(scb), scb->flags); |
| 10397 | switch (lastphase) |
| 10398 | { |
| 10399 | case P_DATAOUT: |
| 10400 | printk("Data-Out phase\n"); |
| 10401 | break; |
| 10402 | case P_DATAIN: |
| 10403 | printk("Data-In phase\n"); |
| 10404 | break; |
| 10405 | case P_COMMAND: |
| 10406 | printk("Command phase\n"); |
| 10407 | break; |
| 10408 | case P_MESGOUT: |
| 10409 | printk("Message-Out phase\n"); |
| 10410 | break; |
| 10411 | case P_STATUS: |
| 10412 | printk("Status phase\n"); |
| 10413 | break; |
| 10414 | case P_MESGIN: |
| 10415 | printk("Message-In phase\n"); |
| 10416 | break; |
| 10417 | default: |
| 10418 | /* |
| 10419 | * We're not in a valid phase, so assume we're idle. |
| 10420 | */ |
| 10421 | printk("while idle, LASTPHASE = 0x%x\n", lastphase); |
| 10422 | break; |
| 10423 | } |
| 10424 | printk(INFO_LEAD "SCSISIGI 0x%x, SEQADDR 0x%x, SSTAT0 0x%x, SSTAT1 " |
| 10425 | "0x%x\n", p->host_no, CTL_OF_SCB(scb), |
| 10426 | aic_inb(p, SCSISIGI), |
| 10427 | aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8), |
| 10428 | aic_inb(p, SSTAT0), aic_inb(p, SSTAT1)); |
| 10429 | printk(INFO_LEAD "SG_CACHEPTR 0x%x, SSTAT2 0x%x, STCNT 0x%x\n", p->host_no, |
| 10430 | CTL_OF_SCB(scb), |
| 10431 | (p->features & AHC_ULTRA2) ? aic_inb(p, SG_CACHEPTR) : 0, |
| 10432 | aic_inb(p, SSTAT2), |
| 10433 | aic_inb(p, STCNT + 2) << 16 | aic_inb(p, STCNT + 1) << 8 | |
| 10434 | aic_inb(p, STCNT)); |
| 10435 | } |
| 10436 | |
| 10437 | channel = cmd->device->channel; |
| 10438 | |
| 10439 | /* |
| 10440 | * Send a Device Reset Message: |
| 10441 | * The target that is holding up the bus may not be the same as |
| 10442 | * the one that triggered this timeout (different commands have |
| 10443 | * different timeout lengths). Our strategy here is to queue an |
| 10444 | * abort message to the timed out target if it is disconnected. |
| 10445 | * Otherwise, if we have an active target we stuff the message buffer |
| 10446 | * with an abort message and assert ATN in the hopes that the target |
| 10447 | * will let go of the bus and go to the mesgout phase. If this |
| 10448 | * fails, we'll get another timeout a few seconds later which will |
| 10449 | * attempt a bus reset. |
| 10450 | */ |
| 10451 | saved_scbptr = aic_inb(p, SCBPTR); |
| 10452 | disconnected = FALSE; |
| 10453 | |
| 10454 | if (lastphase != P_BUSFREE) |
| 10455 | { |
| 10456 | if (aic_inb(p, SCB_TAG) >= p->scb_data->numscbs) |
| 10457 | { |
| 10458 | printk(WARN_LEAD "Invalid SCB ID %d is active, " |
| 10459 | "SCB flags = 0x%x.\n", p->host_no, |
| 10460 | CTL_OF_CMD(cmd), scb->hscb->tag, scb->flags); |
| 10461 | unpause_sequencer(p, FALSE); |
| 10462 | return FAILED; |
| 10463 | } |
| 10464 | if (scb->hscb->tag == aic_inb(p, SCB_TAG)) |
| 10465 | { |
| 10466 | if ( (lastphase == P_MESGOUT) || (lastphase == P_MESGIN) ) |
| 10467 | { |
| 10468 | printk(WARN_LEAD "Device reset, Message buffer " |
| 10469 | "in use\n", p->host_no, CTL_OF_SCB(scb)); |
| 10470 | unpause_sequencer(p, FALSE); |
| 10471 | return FAILED; |
| 10472 | } |
| 10473 | |
| 10474 | if (aic7xxx_verbose & VERBOSE_RESET_PROCESS) |
| 10475 | printk(INFO_LEAD "Device reset message in " |
| 10476 | "message buffer\n", p->host_no, CTL_OF_SCB(scb)); |
| 10477 | scb->flags |= SCB_RESET | SCB_DEVICE_RESET; |
| 10478 | aic7xxx_error(cmd) = DID_RESET; |
| 10479 | aic_dev->flags |= BUS_DEVICE_RESET_PENDING; |
| 10480 | /* Send the abort message to the active SCB. */ |
| 10481 | aic_outb(p, HOST_MSG, MSG_OUT); |
| 10482 | aic_outb(p, lastphase | ATNO, SCSISIGO); |
| 10483 | unpause_sequencer(p, FALSE); |
| 10484 | spin_unlock_irq(p->host->host_lock); |
| 10485 | ssleep(1); |
| 10486 | spin_lock_irq(p->host->host_lock); |
| 10487 | if(aic_dev->flags & BUS_DEVICE_RESET_PENDING) |
| 10488 | return FAILED; |
| 10489 | else |
| 10490 | return SUCCESS; |
| 10491 | } |
| 10492 | } /* if (last_phase != P_BUSFREE).....indicates we are idle and can work */ |
| 10493 | /* |
| 10494 | * Simply set the MK_MESSAGE flag and the SEQINT handler will do |
| 10495 | * the rest on a reconnect/connect. |
| 10496 | */ |
| 10497 | scb->hscb->control |= MK_MESSAGE; |
| 10498 | scb->flags |= SCB_RESET | SCB_DEVICE_RESET; |
| 10499 | aic_dev->flags |= BUS_DEVICE_RESET_PENDING; |
| 10500 | /* |
| 10501 | * Check to see if the command is on the qinfifo. If it is, then we will |
| 10502 | * not need to queue the command again since the card should start it soon |
| 10503 | */ |
| 10504 | if (aic7xxx_search_qinfifo(p, cmd->device->channel, cmd->device->id, cmd->device->lun, hscb->tag, |
| 10505 | 0, TRUE, NULL) == 0) |
| 10506 | { |
| 10507 | disconnected = TRUE; |
| 10508 | if ((hscb_index = aic7xxx_find_scb(p, scb)) != SCB_LIST_NULL) |
| 10509 | { |
| 10510 | unsigned char scb_control; |
| 10511 | |
| 10512 | aic_outb(p, hscb_index, SCBPTR); |
| 10513 | scb_control = aic_inb(p, SCB_CONTROL); |
| 10514 | /* |
| 10515 | * If the DISCONNECTED bit is not set in SCB_CONTROL, then we are |
| 10516 | * actually on the waiting list, not disconnected, and we don't |
| 10517 | * need to requeue the command. |
| 10518 | */ |
| 10519 | disconnected = (scb_control & DISCONNECTED); |
| 10520 | aic_outb(p, scb_control | MK_MESSAGE, SCB_CONTROL); |
| 10521 | } |
| 10522 | if (disconnected) |
| 10523 | { |
| 10524 | /* |
| 10525 | * Actually requeue this SCB in case we can select the |
| 10526 | * device before it reconnects. This can result in the command |
| 10527 | * being on the qinfifo twice, but we don't care because it will |
| 10528 | * all get cleaned up if/when the reset takes place. |
| 10529 | */ |
| 10530 | if (aic7xxx_verbose & VERBOSE_RESET_PROCESS) |
| 10531 | printk(INFO_LEAD "Queueing device reset command.\n", p->host_no, |
| 10532 | CTL_OF_SCB(scb)); |
| 10533 | p->qinfifo[p->qinfifonext++] = scb->hscb->tag; |
| 10534 | if (p->features & AHC_QUEUE_REGS) |
| 10535 | aic_outb(p, p->qinfifonext, HNSCB_QOFF); |
| 10536 | else |
| 10537 | aic_outb(p, p->qinfifonext, KERNEL_QINPOS); |
| 10538 | scb->flags |= SCB_QUEUED_ABORT; |
| 10539 | } |
| 10540 | } |
| 10541 | aic_outb(p, saved_scbptr, SCBPTR); |
| 10542 | unpause_sequencer(p, FALSE); |
| 10543 | spin_unlock_irq(p->host->host_lock); |
| 10544 | msleep(1000/4); |
| 10545 | spin_lock_irq(p->host->host_lock); |
| 10546 | if(aic_dev->flags & BUS_DEVICE_RESET_PENDING) |
| 10547 | return FAILED; |
| 10548 | else |
| 10549 | return SUCCESS; |
| 10550 | } |
| 10551 | |
Jeff Garzik | 94d0e7b | 2005-05-28 07:55:48 -0400 | [diff] [blame] | 10552 | static int |
| 10553 | aic7xxx_bus_device_reset(Scsi_Cmnd *cmd) |
| 10554 | { |
| 10555 | int rc; |
| 10556 | |
| 10557 | spin_lock_irq(cmd->device->host->host_lock); |
| 10558 | rc = __aic7xxx_bus_device_reset(cmd); |
| 10559 | spin_unlock_irq(cmd->device->host->host_lock); |
| 10560 | |
| 10561 | return rc; |
| 10562 | } |
| 10563 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10564 | |
| 10565 | /*+F************************************************************************* |
| 10566 | * Function: |
| 10567 | * aic7xxx_panic_abort |
| 10568 | * |
| 10569 | * Description: |
| 10570 | * Abort the current SCSI command(s). |
| 10571 | *-F*************************************************************************/ |
| 10572 | static void |
| 10573 | aic7xxx_panic_abort(struct aic7xxx_host *p, Scsi_Cmnd *cmd) |
| 10574 | { |
| 10575 | |
| 10576 | printk("aic7xxx driver version %s\n", AIC7XXX_C_VERSION); |
| 10577 | printk("Controller type:\n %s\n", board_names[p->board_name_index]); |
| 10578 | printk("p->flags=0x%lx, p->chip=0x%x, p->features=0x%x, " |
| 10579 | "sequencer %s paused\n", |
| 10580 | p->flags, p->chip, p->features, |
| 10581 | (aic_inb(p, HCNTRL) & PAUSE) ? "is" : "isn't" ); |
| 10582 | pause_sequencer(p); |
| 10583 | disable_irq(p->irq); |
| 10584 | aic7xxx_print_card(p); |
| 10585 | aic7xxx_print_scratch_ram(p); |
| 10586 | spin_unlock_irq(p->host->host_lock); |
| 10587 | for(;;) barrier(); |
| 10588 | } |
| 10589 | |
| 10590 | /*+F************************************************************************* |
| 10591 | * Function: |
| 10592 | * aic7xxx_abort |
| 10593 | * |
| 10594 | * Description: |
| 10595 | * Abort the current SCSI command(s). |
| 10596 | *-F*************************************************************************/ |
| 10597 | static int |
Jeff Garzik | 8fa728a | 2005-05-28 07:54:40 -0400 | [diff] [blame] | 10598 | __aic7xxx_abort(Scsi_Cmnd *cmd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10599 | { |
| 10600 | struct aic7xxx_scb *scb = NULL; |
| 10601 | struct aic7xxx_host *p; |
| 10602 | int found=0, disconnected; |
| 10603 | unsigned char saved_hscbptr, hscbptr, scb_control; |
| 10604 | struct aic_dev_data *aic_dev; |
| 10605 | |
| 10606 | if(cmd == NULL) |
| 10607 | { |
| 10608 | printk(KERN_ERR "aic7xxx_abort: called with NULL cmd!\n"); |
| 10609 | return FAILED; |
| 10610 | } |
| 10611 | p = (struct aic7xxx_host *)cmd->device->host->hostdata; |
| 10612 | aic_dev = AIC_DEV(cmd); |
| 10613 | if(aic7xxx_position(cmd) < p->scb_data->numscbs) |
| 10614 | scb = (p->scb_data->scb_array[aic7xxx_position(cmd)]); |
| 10615 | else |
| 10616 | return FAILED; |
| 10617 | |
| 10618 | aic7xxx_isr(p->irq, (void *)p, NULL); |
| 10619 | aic7xxx_done_cmds_complete(p); |
| 10620 | /* If the command was already complete or just completed, then we didn't |
| 10621 | * do a reset, return FAILED */ |
| 10622 | if(!(scb->flags & SCB_ACTIVE)) |
| 10623 | return FAILED; |
| 10624 | |
| 10625 | pause_sequencer(p); |
| 10626 | |
| 10627 | /* |
| 10628 | * I added a new config option to the driver: "panic_on_abort" that will |
| 10629 | * cause the driver to panic and the machine to stop on the first abort |
| 10630 | * or reset call into the driver. At that point, it prints out a lot of |
| 10631 | * useful information for me which I can then use to try and debug the |
| 10632 | * problem. Simply enable the boot time prompt in order to activate this |
| 10633 | * code. |
| 10634 | */ |
| 10635 | if (aic7xxx_panic_on_abort) |
| 10636 | aic7xxx_panic_abort(p, cmd); |
| 10637 | |
| 10638 | if (aic7xxx_verbose & VERBOSE_ABORT) |
| 10639 | { |
| 10640 | printk(INFO_LEAD "Aborting scb %d, flags 0x%x, SEQADDR 0x%x, LASTPHASE " |
| 10641 | "0x%x\n", |
| 10642 | p->host_no, CTL_OF_SCB(scb), scb->hscb->tag, scb->flags, |
| 10643 | aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8), |
| 10644 | aic_inb(p, LASTPHASE)); |
| 10645 | printk(INFO_LEAD "SG_CACHEPTR 0x%x, SG_COUNT %d, SCSISIGI 0x%x\n", |
| 10646 | p->host_no, CTL_OF_SCB(scb), (p->features & AHC_ULTRA2) ? |
| 10647 | aic_inb(p, SG_CACHEPTR) : 0, aic_inb(p, SG_COUNT), |
| 10648 | aic_inb(p, SCSISIGI)); |
| 10649 | printk(INFO_LEAD "SSTAT0 0x%x, SSTAT1 0x%x, SSTAT2 0x%x\n", |
| 10650 | p->host_no, CTL_OF_SCB(scb), aic_inb(p, SSTAT0), |
| 10651 | aic_inb(p, SSTAT1), aic_inb(p, SSTAT2)); |
| 10652 | } |
| 10653 | |
| 10654 | if (scb->flags & SCB_WAITINGQ) |
| 10655 | { |
| 10656 | if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS) |
| 10657 | printk(INFO_LEAD "SCB found on waiting list and " |
| 10658 | "aborted.\n", p->host_no, CTL_OF_SCB(scb)); |
| 10659 | scbq_remove(&p->waiting_scbs, scb); |
| 10660 | scbq_remove(&aic_dev->delayed_scbs, scb); |
| 10661 | aic_dev->active_cmds++; |
| 10662 | p->activescbs++; |
| 10663 | scb->flags &= ~(SCB_WAITINGQ | SCB_ACTIVE); |
| 10664 | scb->flags |= SCB_ABORT | SCB_QUEUED_FOR_DONE; |
| 10665 | goto success; |
| 10666 | } |
| 10667 | |
| 10668 | /* |
| 10669 | * We just checked the waiting_q, now for the QINFIFO |
| 10670 | */ |
| 10671 | if ( ((found = aic7xxx_search_qinfifo(p, cmd->device->id, cmd->device->channel, |
| 10672 | cmd->device->lun, scb->hscb->tag, SCB_ABORT | SCB_QUEUED_FOR_DONE, |
| 10673 | FALSE, NULL)) != 0) && |
| 10674 | (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)) |
| 10675 | { |
| 10676 | printk(INFO_LEAD "SCB found in QINFIFO and aborted.\n", p->host_no, |
| 10677 | CTL_OF_SCB(scb)); |
| 10678 | goto success; |
| 10679 | } |
| 10680 | |
| 10681 | /* |
| 10682 | * QINFIFO, waitingq, completeq done. Next, check WAITING_SCB list in card |
| 10683 | */ |
| 10684 | |
| 10685 | saved_hscbptr = aic_inb(p, SCBPTR); |
| 10686 | if ((hscbptr = aic7xxx_find_scb(p, scb)) != SCB_LIST_NULL) |
| 10687 | { |
| 10688 | aic_outb(p, hscbptr, SCBPTR); |
| 10689 | scb_control = aic_inb(p, SCB_CONTROL); |
| 10690 | disconnected = scb_control & DISCONNECTED; |
| 10691 | /* |
| 10692 | * If the DISCONNECTED bit is not set in SCB_CONTROL, then we are |
| 10693 | * either currently active or on the waiting list. |
| 10694 | */ |
| 10695 | if(!disconnected && aic_inb(p, LASTPHASE) == P_BUSFREE) { |
| 10696 | if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS) |
| 10697 | printk(INFO_LEAD "SCB found on hardware waiting" |
| 10698 | " list and aborted.\n", p->host_no, CTL_OF_SCB(scb)); |
| 10699 | /* If we are the only waiting command, stop the selection engine */ |
| 10700 | if (aic_inb(p, WAITING_SCBH) == hscbptr && aic_inb(p, SCB_NEXT) == |
| 10701 | SCB_LIST_NULL) |
| 10702 | { |
| 10703 | aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ); |
| 10704 | aic_outb(p, CLRSELTIMEO, CLRSINT1); |
| 10705 | aic_outb(p, SCB_LIST_NULL, WAITING_SCBH); |
| 10706 | } |
| 10707 | else |
| 10708 | { |
| 10709 | unsigned char prev, next; |
| 10710 | prev = SCB_LIST_NULL; |
| 10711 | next = aic_inb(p, WAITING_SCBH); |
| 10712 | while(next != SCB_LIST_NULL) |
| 10713 | { |
| 10714 | aic_outb(p, next, SCBPTR); |
| 10715 | if (next == hscbptr) |
| 10716 | { |
| 10717 | next = aic_inb(p, SCB_NEXT); |
| 10718 | if (prev != SCB_LIST_NULL) |
| 10719 | { |
| 10720 | aic_outb(p, prev, SCBPTR); |
| 10721 | aic_outb(p, next, SCB_NEXT); |
| 10722 | } |
| 10723 | else |
| 10724 | aic_outb(p, next, WAITING_SCBH); |
| 10725 | aic_outb(p, hscbptr, SCBPTR); |
| 10726 | next = SCB_LIST_NULL; |
| 10727 | } |
| 10728 | else |
| 10729 | { |
| 10730 | prev = next; |
| 10731 | next = aic_inb(p, SCB_NEXT); |
| 10732 | } |
| 10733 | } |
| 10734 | } |
| 10735 | aic_outb(p, SCB_LIST_NULL, SCB_TAG); |
| 10736 | aic_outb(p, 0, SCB_CONTROL); |
| 10737 | aic7xxx_add_curscb_to_free_list(p); |
| 10738 | scb->flags = SCB_ABORT | SCB_QUEUED_FOR_DONE; |
| 10739 | goto success; |
| 10740 | } |
| 10741 | else if (!disconnected) |
| 10742 | { |
| 10743 | /* |
| 10744 | * We are the currently active command |
| 10745 | */ |
| 10746 | if((aic_inb(p, LASTPHASE) == P_MESGIN) || |
| 10747 | (aic_inb(p, LASTPHASE) == P_MESGOUT)) |
| 10748 | { |
| 10749 | /* |
| 10750 | * Message buffer busy, unable to abort |
| 10751 | */ |
| 10752 | printk(INFO_LEAD "message buffer busy, unable to abort.\n", |
| 10753 | p->host_no, CTL_OF_SCB(scb)); |
| 10754 | unpause_sequencer(p, FALSE); |
| 10755 | return FAILED; |
| 10756 | } |
| 10757 | /* Fallthrough to below, set ATNO after we set SCB_CONTROL */ |
| 10758 | } |
| 10759 | aic_outb(p, scb_control | MK_MESSAGE, SCB_CONTROL); |
| 10760 | if(!disconnected) |
| 10761 | { |
| 10762 | aic_outb(p, HOST_MSG, MSG_OUT); |
| 10763 | aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO); |
| 10764 | } |
| 10765 | aic_outb(p, saved_hscbptr, SCBPTR); |
| 10766 | } |
| 10767 | else |
| 10768 | { |
| 10769 | /* |
| 10770 | * The scb isn't in the card at all and it is active and it isn't in |
| 10771 | * any of the queues, so it must be disconnected and paged out. Fall |
| 10772 | * through to the code below. |
| 10773 | */ |
| 10774 | disconnected = 1; |
| 10775 | } |
| 10776 | |
| 10777 | p->flags |= AHC_ABORT_PENDING; |
| 10778 | scb->flags |= SCB_QUEUED_ABORT | SCB_ABORT | SCB_RECOVERY_SCB; |
| 10779 | scb->hscb->control |= MK_MESSAGE; |
| 10780 | if(disconnected) |
| 10781 | { |
| 10782 | if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS) |
| 10783 | printk(INFO_LEAD "SCB disconnected. Queueing Abort" |
| 10784 | " SCB.\n", p->host_no, CTL_OF_SCB(scb)); |
| 10785 | p->qinfifo[p->qinfifonext++] = scb->hscb->tag; |
| 10786 | if (p->features & AHC_QUEUE_REGS) |
| 10787 | aic_outb(p, p->qinfifonext, HNSCB_QOFF); |
| 10788 | else |
| 10789 | aic_outb(p, p->qinfifonext, KERNEL_QINPOS); |
| 10790 | } |
| 10791 | unpause_sequencer(p, FALSE); |
| 10792 | spin_unlock_irq(p->host->host_lock); |
| 10793 | msleep(1000/4); |
| 10794 | spin_lock_irq(p->host->host_lock); |
| 10795 | if (p->flags & AHC_ABORT_PENDING) |
| 10796 | { |
| 10797 | if (aic7xxx_verbose & VERBOSE_ABORT_RETURN) |
| 10798 | printk(INFO_LEAD "Abort never delivered, returning FAILED\n", p->host_no, |
| 10799 | CTL_OF_CMD(cmd)); |
| 10800 | p->flags &= ~AHC_ABORT_PENDING; |
| 10801 | return FAILED; |
| 10802 | } |
| 10803 | if (aic7xxx_verbose & VERBOSE_ABORT_RETURN) |
| 10804 | printk(INFO_LEAD "Abort successful.\n", p->host_no, CTL_OF_CMD(cmd)); |
| 10805 | return SUCCESS; |
| 10806 | |
| 10807 | success: |
| 10808 | if (aic7xxx_verbose & VERBOSE_ABORT_RETURN) |
| 10809 | printk(INFO_LEAD "Abort successful.\n", p->host_no, CTL_OF_CMD(cmd)); |
| 10810 | aic7xxx_run_done_queue(p, TRUE); |
| 10811 | unpause_sequencer(p, FALSE); |
| 10812 | return SUCCESS; |
| 10813 | } |
| 10814 | |
Jeff Garzik | 8fa728a | 2005-05-28 07:54:40 -0400 | [diff] [blame] | 10815 | static int |
| 10816 | aic7xxx_abort(Scsi_Cmnd *cmd) |
| 10817 | { |
| 10818 | int rc; |
| 10819 | |
| 10820 | spin_lock_irq(cmd->device->host->host_lock); |
| 10821 | rc = __aic7xxx_abort(cmd); |
| 10822 | spin_unlock_irq(cmd->device->host->host_lock); |
| 10823 | |
| 10824 | return rc; |
| 10825 | } |
| 10826 | |
| 10827 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10828 | /*+F************************************************************************* |
| 10829 | * Function: |
| 10830 | * aic7xxx_reset |
| 10831 | * |
| 10832 | * Description: |
| 10833 | * Resetting the bus always succeeds - is has to, otherwise the |
| 10834 | * kernel will panic! Try a surgical technique - sending a BUS |
| 10835 | * DEVICE RESET message - on the offending target before pulling |
| 10836 | * the SCSI bus reset line. |
| 10837 | *-F*************************************************************************/ |
| 10838 | static int |
| 10839 | aic7xxx_reset(Scsi_Cmnd *cmd) |
| 10840 | { |
| 10841 | struct aic7xxx_scb *scb; |
| 10842 | struct aic7xxx_host *p; |
| 10843 | struct aic_dev_data *aic_dev; |
| 10844 | |
| 10845 | p = (struct aic7xxx_host *) cmd->device->host->hostdata; |
Jeff Garzik | df0ae24 | 2005-05-28 07:57:14 -0400 | [diff] [blame] | 10846 | spin_lock_irq(p->host->host_lock); |
| 10847 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10848 | aic_dev = AIC_DEV(cmd); |
| 10849 | if(aic7xxx_position(cmd) < p->scb_data->numscbs) |
| 10850 | { |
| 10851 | scb = (p->scb_data->scb_array[aic7xxx_position(cmd)]); |
| 10852 | if (scb->cmd != cmd) |
| 10853 | scb = NULL; |
| 10854 | } |
| 10855 | else |
| 10856 | { |
| 10857 | scb = NULL; |
| 10858 | } |
| 10859 | |
| 10860 | /* |
| 10861 | * I added a new config option to the driver: "panic_on_abort" that will |
| 10862 | * cause the driver to panic and the machine to stop on the first abort |
| 10863 | * or reset call into the driver. At that point, it prints out a lot of |
| 10864 | * useful information for me which I can then use to try and debug the |
| 10865 | * problem. Simply enable the boot time prompt in order to activate this |
| 10866 | * code. |
| 10867 | */ |
| 10868 | if (aic7xxx_panic_on_abort) |
| 10869 | aic7xxx_panic_abort(p, cmd); |
| 10870 | |
| 10871 | pause_sequencer(p); |
| 10872 | |
| 10873 | while((aic_inb(p, INTSTAT) & INT_PEND) && !(p->flags & AHC_IN_ISR)) |
| 10874 | { |
| 10875 | aic7xxx_isr(p->irq, p, (void *)NULL ); |
| 10876 | pause_sequencer(p); |
| 10877 | } |
| 10878 | aic7xxx_done_cmds_complete(p); |
| 10879 | |
| 10880 | if(scb && (scb->cmd == NULL)) |
| 10881 | { |
| 10882 | /* |
| 10883 | * We just completed the command when we ran the isr stuff, so we no |
| 10884 | * longer have it. |
| 10885 | */ |
| 10886 | unpause_sequencer(p, FALSE); |
Jeff Garzik | df0ae24 | 2005-05-28 07:57:14 -0400 | [diff] [blame] | 10887 | spin_unlock_irq(p->host->host_lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10888 | return SUCCESS; |
| 10889 | } |
| 10890 | |
| 10891 | /* |
| 10892 | * By this point, we want to already know what we are going to do and |
| 10893 | * only have the following code implement our course of action. |
| 10894 | */ |
| 10895 | aic7xxx_reset_channel(p, cmd->device->channel, TRUE); |
| 10896 | if (p->features & AHC_TWIN) |
| 10897 | { |
| 10898 | aic7xxx_reset_channel(p, cmd->device->channel ^ 0x01, TRUE); |
| 10899 | restart_sequencer(p); |
| 10900 | } |
| 10901 | aic_outb(p, aic_inb(p, SIMODE1) & ~(ENREQINIT|ENBUSFREE), SIMODE1); |
| 10902 | aic7xxx_clear_intstat(p); |
| 10903 | p->flags &= ~AHC_HANDLING_REQINITS; |
| 10904 | p->msg_type = MSG_TYPE_NONE; |
| 10905 | p->msg_index = 0; |
| 10906 | p->msg_len = 0; |
| 10907 | aic7xxx_run_done_queue(p, TRUE); |
| 10908 | unpause_sequencer(p, FALSE); |
| 10909 | spin_unlock_irq(p->host->host_lock); |
| 10910 | ssleep(2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10911 | return SUCCESS; |
| 10912 | } |
| 10913 | |
| 10914 | /*+F************************************************************************* |
| 10915 | * Function: |
| 10916 | * aic7xxx_biosparam |
| 10917 | * |
| 10918 | * Description: |
| 10919 | * Return the disk geometry for the given SCSI device. |
| 10920 | * |
| 10921 | * Note: |
| 10922 | * This function is broken for today's really large drives and needs |
| 10923 | * fixed. |
| 10924 | *-F*************************************************************************/ |
| 10925 | static int |
| 10926 | aic7xxx_biosparam(struct scsi_device *sdev, struct block_device *bdev, |
| 10927 | sector_t capacity, int geom[]) |
| 10928 | { |
| 10929 | sector_t heads, sectors, cylinders; |
| 10930 | int ret; |
| 10931 | struct aic7xxx_host *p; |
| 10932 | unsigned char *buf; |
| 10933 | |
| 10934 | p = (struct aic7xxx_host *) sdev->host->hostdata; |
| 10935 | buf = scsi_bios_ptable(bdev); |
| 10936 | |
| 10937 | if ( buf ) |
| 10938 | { |
| 10939 | ret = scsi_partsize(buf, capacity, &geom[2], &geom[0], &geom[1]); |
| 10940 | kfree(buf); |
| 10941 | if ( ret != -1 ) |
| 10942 | return(ret); |
| 10943 | } |
| 10944 | |
| 10945 | heads = 64; |
| 10946 | sectors = 32; |
| 10947 | cylinders = capacity >> 11; |
| 10948 | |
| 10949 | if ((p->flags & AHC_EXTEND_TRANS_A) && (cylinders > 1024)) |
| 10950 | { |
| 10951 | heads = 255; |
| 10952 | sectors = 63; |
| 10953 | cylinders = capacity >> 14; |
| 10954 | if(capacity > (65535 * heads * sectors)) |
| 10955 | cylinders = 65535; |
| 10956 | else |
| 10957 | cylinders = ((unsigned int)capacity) / (unsigned int)(heads * sectors); |
| 10958 | } |
| 10959 | |
| 10960 | geom[0] = (int)heads; |
| 10961 | geom[1] = (int)sectors; |
| 10962 | geom[2] = (int)cylinders; |
| 10963 | |
| 10964 | return (0); |
| 10965 | } |
| 10966 | |
| 10967 | /*+F************************************************************************* |
| 10968 | * Function: |
| 10969 | * aic7xxx_release |
| 10970 | * |
| 10971 | * Description: |
| 10972 | * Free the passed in Scsi_Host memory structures prior to unloading the |
| 10973 | * module. |
| 10974 | *-F*************************************************************************/ |
| 10975 | static int |
| 10976 | aic7xxx_release(struct Scsi_Host *host) |
| 10977 | { |
| 10978 | struct aic7xxx_host *p = (struct aic7xxx_host *) host->hostdata; |
| 10979 | struct aic7xxx_host *next, *prev; |
| 10980 | |
| 10981 | if(p->irq) |
| 10982 | free_irq(p->irq, p); |
| 10983 | #ifdef MMAPIO |
| 10984 | if(p->maddr) |
| 10985 | { |
| 10986 | iounmap(p->maddr); |
| 10987 | } |
| 10988 | #endif /* MMAPIO */ |
| 10989 | if(!p->pdev) |
| 10990 | release_region(p->base, MAXREG - MINREG); |
| 10991 | #ifdef CONFIG_PCI |
| 10992 | else |
| 10993 | pci_release_regions(p->pdev); |
| 10994 | #endif |
| 10995 | prev = NULL; |
| 10996 | next = first_aic7xxx; |
| 10997 | while(next != NULL) |
| 10998 | { |
| 10999 | if(next == p) |
| 11000 | { |
| 11001 | if(prev == NULL) |
| 11002 | first_aic7xxx = next->next; |
| 11003 | else |
| 11004 | prev->next = next->next; |
| 11005 | } |
| 11006 | else |
| 11007 | { |
| 11008 | prev = next; |
| 11009 | } |
| 11010 | next = next->next; |
| 11011 | } |
| 11012 | aic7xxx_free(p); |
| 11013 | return(0); |
| 11014 | } |
| 11015 | |
| 11016 | /*+F************************************************************************* |
| 11017 | * Function: |
| 11018 | * aic7xxx_print_card |
| 11019 | * |
| 11020 | * Description: |
| 11021 | * Print out all of the control registers on the card |
| 11022 | * |
| 11023 | * NOTE: This function is not yet safe for use on the VLB and EISA |
| 11024 | * controllers, so it isn't used on those controllers at all. |
| 11025 | *-F*************************************************************************/ |
| 11026 | static void |
| 11027 | aic7xxx_print_card(struct aic7xxx_host *p) |
| 11028 | { |
| 11029 | int i, j, k, chip; |
| 11030 | static struct register_ranges { |
| 11031 | int num_ranges; |
| 11032 | int range_val[32]; |
| 11033 | } cards_ds[] = { |
| 11034 | { 0, {0,} }, /* none */ |
| 11035 | {10, {0x00, 0x05, 0x08, 0x11, 0x18, 0x19, 0x1f, 0x1f, 0x60, 0x60, /*7771*/ |
| 11036 | 0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9b, 0x9f} }, |
| 11037 | { 9, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7850*/ |
| 11038 | 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} }, |
| 11039 | { 9, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7860*/ |
| 11040 | 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} }, |
| 11041 | {10, {0x00, 0x05, 0x08, 0x11, 0x18, 0x19, 0x1c, 0x1f, 0x60, 0x60, /*7870*/ |
| 11042 | 0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} }, |
| 11043 | {10, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1a, 0x1c, 0x1f, 0x60, 0x60, /*7880*/ |
| 11044 | 0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} }, |
| 11045 | {16, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7890*/ |
| 11046 | 0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9f, 0x9f, |
| 11047 | 0xe0, 0xf1, 0xf4, 0xf4, 0xf6, 0xf6, 0xf8, 0xf8, 0xfa, 0xfc, |
| 11048 | 0xfe, 0xff} }, |
| 11049 | {12, {0x00, 0x05, 0x08, 0x11, 0x18, 0x19, 0x1b, 0x1f, 0x60, 0x60, /*7895*/ |
| 11050 | 0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, |
| 11051 | 0x9f, 0x9f, 0xe0, 0xf1} }, |
| 11052 | {16, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7896*/ |
| 11053 | 0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9f, 0x9f, |
| 11054 | 0xe0, 0xf1, 0xf4, 0xf4, 0xf6, 0xf6, 0xf8, 0xf8, 0xfa, 0xfc, |
| 11055 | 0xfe, 0xff} }, |
| 11056 | {12, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7892*/ |
| 11057 | 0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9c, 0x9f, |
| 11058 | 0xe0, 0xf1, 0xf4, 0xfc} }, |
| 11059 | {12, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7899*/ |
| 11060 | 0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9c, 0x9f, |
| 11061 | 0xe0, 0xf1, 0xf4, 0xfc} }, |
| 11062 | }; |
| 11063 | chip = p->chip & AHC_CHIPID_MASK; |
| 11064 | printk("%s at ", |
| 11065 | board_names[p->board_name_index]); |
| 11066 | switch(p->chip & ~AHC_CHIPID_MASK) |
| 11067 | { |
| 11068 | case AHC_VL: |
| 11069 | printk("VLB Slot %d.\n", p->pci_device_fn); |
| 11070 | break; |
| 11071 | case AHC_EISA: |
| 11072 | printk("EISA Slot %d.\n", p->pci_device_fn); |
| 11073 | break; |
| 11074 | case AHC_PCI: |
| 11075 | default: |
| 11076 | printk("PCI %d/%d/%d.\n", p->pci_bus, PCI_SLOT(p->pci_device_fn), |
| 11077 | PCI_FUNC(p->pci_device_fn)); |
| 11078 | break; |
| 11079 | } |
| 11080 | |
| 11081 | /* |
| 11082 | * the registers on the card.... |
| 11083 | */ |
| 11084 | printk("Card Dump:\n"); |
| 11085 | k = 0; |
| 11086 | for(i=0; i<cards_ds[chip].num_ranges; i++) |
| 11087 | { |
| 11088 | for(j = cards_ds[chip].range_val[ i * 2 ]; |
| 11089 | j <= cards_ds[chip].range_val[ i * 2 + 1 ] ; |
| 11090 | j++) |
| 11091 | { |
| 11092 | printk("%02x:%02x ", j, aic_inb(p, j)); |
| 11093 | if(++k == 13) |
| 11094 | { |
| 11095 | printk("\n"); |
| 11096 | k=0; |
| 11097 | } |
| 11098 | } |
| 11099 | } |
| 11100 | if(k != 0) |
| 11101 | printk("\n"); |
| 11102 | |
| 11103 | /* |
| 11104 | * If this was an Ultra2 controller, then we just hosed the card in terms |
| 11105 | * of the QUEUE REGS. This function is only called at init time or by |
| 11106 | * the panic_abort function, so it's safe to assume a generic init time |
| 11107 | * setting here |
| 11108 | */ |
| 11109 | |
| 11110 | if(p->features & AHC_QUEUE_REGS) |
| 11111 | { |
| 11112 | aic_outb(p, 0, SDSCB_QOFF); |
| 11113 | aic_outb(p, 0, SNSCB_QOFF); |
| 11114 | aic_outb(p, 0, HNSCB_QOFF); |
| 11115 | } |
| 11116 | |
| 11117 | } |
| 11118 | |
| 11119 | /*+F************************************************************************* |
| 11120 | * Function: |
| 11121 | * aic7xxx_print_scratch_ram |
| 11122 | * |
| 11123 | * Description: |
| 11124 | * Print out the scratch RAM values on the card. |
| 11125 | *-F*************************************************************************/ |
| 11126 | static void |
| 11127 | aic7xxx_print_scratch_ram(struct aic7xxx_host *p) |
| 11128 | { |
| 11129 | int i, k; |
| 11130 | |
| 11131 | k = 0; |
| 11132 | printk("Scratch RAM:\n"); |
| 11133 | for(i = SRAM_BASE; i < SEQCTL; i++) |
| 11134 | { |
| 11135 | printk("%02x:%02x ", i, aic_inb(p, i)); |
| 11136 | if(++k == 13) |
| 11137 | { |
| 11138 | printk("\n"); |
| 11139 | k=0; |
| 11140 | } |
| 11141 | } |
| 11142 | if (p->features & AHC_MORE_SRAM) |
| 11143 | { |
| 11144 | for(i = TARG_OFFSET; i < 0x80; i++) |
| 11145 | { |
| 11146 | printk("%02x:%02x ", i, aic_inb(p, i)); |
| 11147 | if(++k == 13) |
| 11148 | { |
| 11149 | printk("\n"); |
| 11150 | k=0; |
| 11151 | } |
| 11152 | } |
| 11153 | } |
| 11154 | printk("\n"); |
| 11155 | } |
| 11156 | |
| 11157 | |
| 11158 | #include "aic7xxx_old/aic7xxx_proc.c" |
| 11159 | |
| 11160 | MODULE_LICENSE("Dual BSD/GPL"); |
| 11161 | MODULE_VERSION(AIC7XXX_H_VERSION); |
| 11162 | |
| 11163 | |
Christoph Hellwig | d0be4a7d | 2005-10-31 18:31:40 +0100 | [diff] [blame] | 11164 | static struct scsi_host_template driver_template = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11165 | .proc_info = aic7xxx_proc_info, |
| 11166 | .detect = aic7xxx_detect, |
| 11167 | .release = aic7xxx_release, |
| 11168 | .info = aic7xxx_info, |
| 11169 | .queuecommand = aic7xxx_queue, |
| 11170 | .slave_alloc = aic7xxx_slave_alloc, |
| 11171 | .slave_configure = aic7xxx_slave_configure, |
| 11172 | .slave_destroy = aic7xxx_slave_destroy, |
| 11173 | .bios_param = aic7xxx_biosparam, |
| 11174 | .eh_abort_handler = aic7xxx_abort, |
| 11175 | .eh_device_reset_handler = aic7xxx_bus_device_reset, |
| 11176 | .eh_host_reset_handler = aic7xxx_reset, |
| 11177 | .can_queue = 255, |
| 11178 | .this_id = -1, |
| 11179 | .max_sectors = 2048, |
| 11180 | .cmd_per_lun = 3, |
| 11181 | .use_clustering = ENABLE_CLUSTERING, |
| 11182 | }; |
| 11183 | |
| 11184 | #include "scsi_module.c" |
| 11185 | |
| 11186 | /* |
| 11187 | * Overrides for Emacs so that we almost follow Linus's tabbing style. |
| 11188 | * Emacs will notice this stuff at the end of the file and automatically |
| 11189 | * adjust the settings for this buffer only. This must remain at the end |
| 11190 | * of the file. |
| 11191 | * --------------------------------------------------------------------------- |
| 11192 | * Local variables: |
| 11193 | * c-indent-level: 2 |
| 11194 | * c-brace-imaginary-offset: 0 |
| 11195 | * c-brace-offset: -2 |
| 11196 | * c-argdecl-indent: 2 |
| 11197 | * c-label-offset: -2 |
| 11198 | * c-continued-statement-offset: 2 |
| 11199 | * c-continued-brace-offset: 0 |
| 11200 | * indent-tabs-mode: nil |
| 11201 | * tab-width: 8 |
| 11202 | * End: |
| 11203 | */ |