blob: 4005e9af5d61acae8ce40c05b2862fcfa20ae4c0 [file] [log] [blame]
Mark Browna2342ae2009-07-29 21:21:49 +01001/*
2 * wm_hubs.c -- WM8993/4 common code
3 *
4 * Copyright 2009 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pm.h>
19#include <linux/i2c.h>
20#include <linux/platform_device.h>
Mark Browna2342ae2009-07-29 21:21:49 +010021#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
Mark Browna2342ae2009-07-29 21:21:49 +010025#include <sound/initval.h>
26#include <sound/tlv.h>
27
28#include "wm8993.h"
29#include "wm_hubs.h"
30
31const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0);
32EXPORT_SYMBOL_GPL(wm_hubs_spkmix_tlv);
33
34static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0);
35static const DECLARE_TLV_DB_SCALE(inmix_sw_tlv, 0, 3000, 0);
36static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1);
37static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0);
38static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0);
39static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1);
40static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0);
41static const unsigned int spkboost_tlv[] = {
42 TLV_DB_RANGE_HEAD(7),
43 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
44 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
45};
46static const DECLARE_TLV_DB_SCALE(line_tlv, -600, 600, 0);
47
48static const char *speaker_ref_text[] = {
49 "SPKVDD/2",
50 "VMID",
51};
52
53static const struct soc_enum speaker_ref =
54 SOC_ENUM_SINGLE(WM8993_SPEAKER_MIXER, 8, 2, speaker_ref_text);
55
56static const char *speaker_mode_text[] = {
57 "Class D",
58 "Class AB",
59};
60
61static const struct soc_enum speaker_mode =
62 SOC_ENUM_SINGLE(WM8993_SPKMIXR_ATTENUATION, 8, 2, speaker_mode_text);
63
Mark Brown4dcc93d2010-03-29 17:18:41 +010064static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op)
Mark Browna2342ae2009-07-29 21:21:49 +010065{
66 unsigned int reg;
67 int count = 0;
Mark Brown4dcc93d2010-03-29 17:18:41 +010068 unsigned int val;
69
70 val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1;
71
72 /* Trigger the command */
73 snd_soc_write(codec, WM8993_DC_SERVO_0, val);
Mark Browna2342ae2009-07-29 21:21:49 +010074
75 dev_dbg(codec->dev, "Waiting for DC servo...\n");
Mark Brown3ed70742010-01-20 17:39:45 +000076
Mark Browna2342ae2009-07-29 21:21:49 +010077 do {
78 count++;
79 msleep(1);
Mark Brown4dcc93d2010-03-29 17:18:41 +010080 reg = snd_soc_read(codec, WM8993_DC_SERVO_0);
Mark Brown3ed70742010-01-20 17:39:45 +000081 dev_dbg(codec->dev, "DC servo: %x\n", reg);
Mark Brown4dcc93d2010-03-29 17:18:41 +010082 } while (reg & op && count < 400);
Mark Browna2342ae2009-07-29 21:21:49 +010083
Mark Brown4dcc93d2010-03-29 17:18:41 +010084 if (reg & op)
Mark Brown5a9f91c2011-02-17 12:05:46 -080085 dev_err(codec->dev, "Timed out waiting for DC Servo %x\n",
86 op);
Mark Browna2342ae2009-07-29 21:21:49 +010087}
88
89/*
Mark Brown3ed70742010-01-20 17:39:45 +000090 * Startup calibration of the DC servo
91 */
92static void calibrate_dc_servo(struct snd_soc_codec *codec)
93{
Mark Brownb2c812e2010-04-14 15:35:19 +090094 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
Mark Brown20a4e7f2011-01-21 12:47:33 +000095 s8 offset;
Mark Brown8437f702010-03-29 17:09:45 +010096 u16 reg, reg_l, reg_r, dcs_cfg;
Mark Brown3ed70742010-01-20 17:39:45 +000097
Mark Brownfec6dd82010-10-27 13:48:36 -070098 /* If we're using a digital only path and have a previously
99 * callibrated DC servo offset stored then use that. */
100 if (hubs->class_w && hubs->class_w_dcs) {
101 dev_dbg(codec->dev, "Using cached DC servo offset %x\n",
102 hubs->class_w_dcs);
103 snd_soc_write(codec, WM8993_DC_SERVO_3, hubs->class_w_dcs);
104 wait_for_dc_servo(codec,
105 WM8993_DCS_TRIG_DAC_WR_0 |
106 WM8993_DCS_TRIG_DAC_WR_1);
107 return;
108 }
109
Mark Brown11cef5f2010-11-26 17:23:44 +0000110 /* Devices not using a DCS code correction have startup mode */
111 if (hubs->dcs_codes) {
112 /* Set for 32 series updates */
113 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
114 WM8993_DCS_SERIES_NO_01_MASK,
115 32 << WM8993_DCS_SERIES_NO_01_SHIFT);
116 wait_for_dc_servo(codec,
117 WM8993_DCS_TRIG_SERIES_0 |
118 WM8993_DCS_TRIG_SERIES_1);
119 } else {
120 wait_for_dc_servo(codec,
121 WM8993_DCS_TRIG_STARTUP_0 |
122 WM8993_DCS_TRIG_STARTUP_1);
123 }
Mark Brown3ed70742010-01-20 17:39:45 +0000124
Mark Brownfec6dd82010-10-27 13:48:36 -0700125 /* Different chips in the family support different readback
126 * methods.
127 */
128 switch (hubs->dcs_readback_mode) {
129 case 0:
130 reg_l = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_1)
Joe Perchesef995e32010-11-15 09:09:17 -0800131 & WM8993_DCS_INTEG_CHAN_0_MASK;
Mark Brownfec6dd82010-10-27 13:48:36 -0700132 reg_r = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_2)
133 & WM8993_DCS_INTEG_CHAN_1_MASK;
134 break;
135 case 1:
136 reg = snd_soc_read(codec, WM8993_DC_SERVO_3);
137 reg_l = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK)
138 >> WM8993_DCS_DAC_WR_VAL_1_SHIFT;
139 reg_r = reg & WM8993_DCS_DAC_WR_VAL_0_MASK;
140 break;
141 default:
Mark Brown9e3be1e2010-11-02 09:58:49 -0400142 WARN(1, "Unknown DCS readback method\n");
Mark Brownfec6dd82010-10-27 13:48:36 -0700143 break;
144 }
145
146 dev_dbg(codec->dev, "DCS input: %x %x\n", reg_l, reg_r);
147
Mark Brown3ed70742010-01-20 17:39:45 +0000148 /* Apply correction to DC servo result */
149 if (hubs->dcs_codes) {
150 dev_dbg(codec->dev, "Applying %d code DC servo correction\n",
151 hubs->dcs_codes);
152
153 /* HPOUT1L */
Mark Brown20a4e7f2011-01-21 12:47:33 +0000154 offset = reg_l;
155 offset += hubs->dcs_codes;
156 dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
Mark Brown3ed70742010-01-20 17:39:45 +0000157
158 /* HPOUT1R */
Mark Brown20a4e7f2011-01-21 12:47:33 +0000159 offset = reg_r;
160 offset += hubs->dcs_codes;
161 dcs_cfg |= (u8)offset;
Mark Brown3ed70742010-01-20 17:39:45 +0000162
Mark Brown3254d282010-05-10 14:56:03 +0100163 dev_dbg(codec->dev, "DCS result: %x\n", dcs_cfg);
164
Mark Brown3ed70742010-01-20 17:39:45 +0000165 /* Do it */
166 snd_soc_write(codec, WM8993_DC_SERVO_3, dcs_cfg);
Mark Brown4dcc93d2010-03-29 17:18:41 +0100167 wait_for_dc_servo(codec,
168 WM8993_DCS_TRIG_DAC_WR_0 |
169 WM8993_DCS_TRIG_DAC_WR_1);
Mark Brownfec6dd82010-10-27 13:48:36 -0700170 } else {
171 dcs_cfg = reg_l << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
172 dcs_cfg |= reg_r;
Mark Brown3ed70742010-01-20 17:39:45 +0000173 }
Mark Brownfec6dd82010-10-27 13:48:36 -0700174
175 /* Save the callibrated offset if we're in class W mode and
176 * therefore don't have any analogue signal mixed in. */
177 if (hubs->class_w)
178 hubs->class_w_dcs = dcs_cfg;
Mark Brown3ed70742010-01-20 17:39:45 +0000179}
180
181/*
Mark Browna2342ae2009-07-29 21:21:49 +0100182 * Update the DC servo calibration on gain changes
183 */
184static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol,
Mark Brown3ed70742010-01-20 17:39:45 +0000185 struct snd_ctl_elem_value *ucontrol)
Mark Browna2342ae2009-07-29 21:21:49 +0100186{
187 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
Mark Brownb2c812e2010-04-14 15:35:19 +0900188 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
Mark Browna2342ae2009-07-29 21:21:49 +0100189 int ret;
190
191 ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
192
Mark Brownfec6dd82010-10-27 13:48:36 -0700193 /* Updating the analogue gains invalidates the DC servo cache */
194 hubs->class_w_dcs = 0;
195
Mark Brownae9d8602010-03-29 16:34:42 +0100196 /* If we're applying an offset correction then updating the
197 * callibration would be likely to introduce further offsets. */
198 if (hubs->dcs_codes)
199 return ret;
200
Mark Browna2342ae2009-07-29 21:21:49 +0100201 /* Only need to do this if the outputs are active */
202 if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1)
203 & (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA))
204 snd_soc_update_bits(codec,
205 WM8993_DC_SERVO_0,
206 WM8993_DCS_TRIG_SINGLE_0 |
207 WM8993_DCS_TRIG_SINGLE_1,
208 WM8993_DCS_TRIG_SINGLE_0 |
209 WM8993_DCS_TRIG_SINGLE_1);
210
211 return ret;
212}
213
214static const struct snd_kcontrol_new analogue_snd_controls[] = {
215SOC_SINGLE_TLV("IN1L Volume", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
216 inpga_tlv),
217SOC_SINGLE("IN1L Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
218SOC_SINGLE("IN1L ZC Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 0),
219
220SOC_SINGLE_TLV("IN1R Volume", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
221 inpga_tlv),
222SOC_SINGLE("IN1R Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
223SOC_SINGLE("IN1R ZC Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 0),
224
225
226SOC_SINGLE_TLV("IN2L Volume", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
227 inpga_tlv),
228SOC_SINGLE("IN2L Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
229SOC_SINGLE("IN2L ZC Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 0),
230
231SOC_SINGLE_TLV("IN2R Volume", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
232 inpga_tlv),
233SOC_SINGLE("IN2R Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
234SOC_SINGLE("IN2R ZC Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 0),
235
236SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8993_INPUT_MIXER3, 7, 1, 0,
237 inmix_sw_tlv),
238SOC_SINGLE_TLV("MIXINL IN1L Volume", WM8993_INPUT_MIXER3, 4, 1, 0,
239 inmix_sw_tlv),
240SOC_SINGLE_TLV("MIXINL Output Record Volume", WM8993_INPUT_MIXER3, 0, 7, 0,
241 inmix_tlv),
242SOC_SINGLE_TLV("MIXINL IN1LP Volume", WM8993_INPUT_MIXER5, 6, 7, 0, inmix_tlv),
243SOC_SINGLE_TLV("MIXINL Direct Voice Volume", WM8993_INPUT_MIXER5, 0, 6, 0,
244 inmix_tlv),
245
246SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8993_INPUT_MIXER4, 7, 1, 0,
247 inmix_sw_tlv),
248SOC_SINGLE_TLV("MIXINR IN1R Volume", WM8993_INPUT_MIXER4, 4, 1, 0,
249 inmix_sw_tlv),
250SOC_SINGLE_TLV("MIXINR Output Record Volume", WM8993_INPUT_MIXER4, 0, 7, 0,
251 inmix_tlv),
252SOC_SINGLE_TLV("MIXINR IN1RP Volume", WM8993_INPUT_MIXER6, 6, 7, 0, inmix_tlv),
253SOC_SINGLE_TLV("MIXINR Direct Voice Volume", WM8993_INPUT_MIXER6, 0, 6, 0,
254 inmix_tlv),
255
256SOC_SINGLE_TLV("Left Output Mixer IN2RN Volume", WM8993_OUTPUT_MIXER5, 6, 7, 1,
257 outmix_tlv),
258SOC_SINGLE_TLV("Left Output Mixer IN2LN Volume", WM8993_OUTPUT_MIXER3, 6, 7, 1,
259 outmix_tlv),
260SOC_SINGLE_TLV("Left Output Mixer IN2LP Volume", WM8993_OUTPUT_MIXER3, 9, 7, 1,
261 outmix_tlv),
262SOC_SINGLE_TLV("Left Output Mixer IN1L Volume", WM8993_OUTPUT_MIXER3, 0, 7, 1,
263 outmix_tlv),
264SOC_SINGLE_TLV("Left Output Mixer IN1R Volume", WM8993_OUTPUT_MIXER3, 3, 7, 1,
265 outmix_tlv),
266SOC_SINGLE_TLV("Left Output Mixer Right Input Volume",
267 WM8993_OUTPUT_MIXER5, 3, 7, 1, outmix_tlv),
268SOC_SINGLE_TLV("Left Output Mixer Left Input Volume",
269 WM8993_OUTPUT_MIXER5, 0, 7, 1, outmix_tlv),
270SOC_SINGLE_TLV("Left Output Mixer DAC Volume", WM8993_OUTPUT_MIXER5, 9, 7, 1,
271 outmix_tlv),
272
273SOC_SINGLE_TLV("Right Output Mixer IN2LN Volume",
274 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
275SOC_SINGLE_TLV("Right Output Mixer IN2RN Volume",
276 WM8993_OUTPUT_MIXER4, 6, 7, 1, outmix_tlv),
277SOC_SINGLE_TLV("Right Output Mixer IN1L Volume",
278 WM8993_OUTPUT_MIXER4, 3, 7, 1, outmix_tlv),
279SOC_SINGLE_TLV("Right Output Mixer IN1R Volume",
280 WM8993_OUTPUT_MIXER4, 0, 7, 1, outmix_tlv),
281SOC_SINGLE_TLV("Right Output Mixer IN2RP Volume",
282 WM8993_OUTPUT_MIXER4, 9, 7, 1, outmix_tlv),
283SOC_SINGLE_TLV("Right Output Mixer Left Input Volume",
284 WM8993_OUTPUT_MIXER6, 3, 7, 1, outmix_tlv),
285SOC_SINGLE_TLV("Right Output Mixer Right Input Volume",
286 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
287SOC_SINGLE_TLV("Right Output Mixer DAC Volume",
288 WM8993_OUTPUT_MIXER6, 9, 7, 1, outmix_tlv),
289
290SOC_DOUBLE_R_TLV("Output Volume", WM8993_LEFT_OPGA_VOLUME,
291 WM8993_RIGHT_OPGA_VOLUME, 0, 63, 0, outpga_tlv),
292SOC_DOUBLE_R("Output Switch", WM8993_LEFT_OPGA_VOLUME,
293 WM8993_RIGHT_OPGA_VOLUME, 6, 1, 0),
294SOC_DOUBLE_R("Output ZC Switch", WM8993_LEFT_OPGA_VOLUME,
295 WM8993_RIGHT_OPGA_VOLUME, 7, 1, 0),
296
297SOC_SINGLE("Earpiece Switch", WM8993_HPOUT2_VOLUME, 5, 1, 1),
298SOC_SINGLE_TLV("Earpiece Volume", WM8993_HPOUT2_VOLUME, 4, 1, 1, earpiece_tlv),
299
300SOC_SINGLE_TLV("SPKL Input Volume", WM8993_SPKMIXL_ATTENUATION,
301 5, 1, 1, wm_hubs_spkmix_tlv),
302SOC_SINGLE_TLV("SPKL IN1LP Volume", WM8993_SPKMIXL_ATTENUATION,
303 4, 1, 1, wm_hubs_spkmix_tlv),
304SOC_SINGLE_TLV("SPKL Output Volume", WM8993_SPKMIXL_ATTENUATION,
305 3, 1, 1, wm_hubs_spkmix_tlv),
306
307SOC_SINGLE_TLV("SPKR Input Volume", WM8993_SPKMIXR_ATTENUATION,
308 5, 1, 1, wm_hubs_spkmix_tlv),
309SOC_SINGLE_TLV("SPKR IN1RP Volume", WM8993_SPKMIXR_ATTENUATION,
310 4, 1, 1, wm_hubs_spkmix_tlv),
311SOC_SINGLE_TLV("SPKR Output Volume", WM8993_SPKMIXR_ATTENUATION,
312 3, 1, 1, wm_hubs_spkmix_tlv),
313
314SOC_DOUBLE_R_TLV("Speaker Mixer Volume",
315 WM8993_SPKMIXL_ATTENUATION, WM8993_SPKMIXR_ATTENUATION,
316 0, 3, 1, spkmixout_tlv),
317SOC_DOUBLE_R_TLV("Speaker Volume",
318 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
319 0, 63, 0, outpga_tlv),
320SOC_DOUBLE_R("Speaker Switch",
321 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
322 6, 1, 0),
323SOC_DOUBLE_R("Speaker ZC Switch",
324 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
325 7, 1, 0),
Uk Kimed8cc472010-12-05 17:26:07 +0900326SOC_DOUBLE_TLV("Speaker Boost Volume", WM8993_SPKOUT_BOOST, 3, 0, 7, 0,
Mark Browna2342ae2009-07-29 21:21:49 +0100327 spkboost_tlv),
328SOC_ENUM("Speaker Reference", speaker_ref),
329SOC_ENUM("Speaker Mode", speaker_mode),
330
331{
332 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "Headphone Volume",
333 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |
334 SNDRV_CTL_ELEM_ACCESS_READWRITE,
335 .tlv.p = outpga_tlv,
336 .info = snd_soc_info_volsw_2r,
337 .get = snd_soc_get_volsw_2r, .put = wm8993_put_dc_servo,
338 .private_value = (unsigned long)&(struct soc_mixer_control) {
339 .reg = WM8993_LEFT_OUTPUT_VOLUME,
340 .rreg = WM8993_RIGHT_OUTPUT_VOLUME,
341 .shift = 0, .max = 63
342 },
343},
344SOC_DOUBLE_R("Headphone Switch", WM8993_LEFT_OUTPUT_VOLUME,
345 WM8993_RIGHT_OUTPUT_VOLUME, 6, 1, 0),
346SOC_DOUBLE_R("Headphone ZC Switch", WM8993_LEFT_OUTPUT_VOLUME,
347 WM8993_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
348
349SOC_SINGLE("LINEOUT1N Switch", WM8993_LINE_OUTPUTS_VOLUME, 6, 1, 1),
350SOC_SINGLE("LINEOUT1P Switch", WM8993_LINE_OUTPUTS_VOLUME, 5, 1, 1),
351SOC_SINGLE_TLV("LINEOUT1 Volume", WM8993_LINE_OUTPUTS_VOLUME, 4, 1, 1,
352 line_tlv),
353
354SOC_SINGLE("LINEOUT2N Switch", WM8993_LINE_OUTPUTS_VOLUME, 2, 1, 1),
355SOC_SINGLE("LINEOUT2P Switch", WM8993_LINE_OUTPUTS_VOLUME, 1, 1, 1),
356SOC_SINGLE_TLV("LINEOUT2 Volume", WM8993_LINE_OUTPUTS_VOLUME, 0, 1, 1,
357 line_tlv),
358};
359
Mark Brown3ed70742010-01-20 17:39:45 +0000360static int hp_supply_event(struct snd_soc_dapm_widget *w,
361 struct snd_kcontrol *kcontrol, int event)
362{
363 struct snd_soc_codec *codec = w->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +0900364 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
Mark Brown3ed70742010-01-20 17:39:45 +0000365
366 switch (event) {
367 case SND_SOC_DAPM_PRE_PMU:
368 switch (hubs->hp_startup_mode) {
369 case 0:
370 break;
371 case 1:
372 /* Enable the headphone amp */
373 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
374 WM8993_HPOUT1L_ENA |
375 WM8993_HPOUT1R_ENA,
376 WM8993_HPOUT1L_ENA |
377 WM8993_HPOUT1R_ENA);
378
379 /* Enable the second stage */
380 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
381 WM8993_HPOUT1L_DLY |
382 WM8993_HPOUT1R_DLY,
383 WM8993_HPOUT1L_DLY |
384 WM8993_HPOUT1R_DLY);
385 break;
386 default:
387 dev_err(codec->dev, "Unknown HP startup mode %d\n",
388 hubs->hp_startup_mode);
389 break;
390 }
391
392 case SND_SOC_DAPM_PRE_PMD:
393 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
394 WM8993_CP_ENA, 0);
395 break;
396 }
397
398 return 0;
399}
400
Mark Browna2342ae2009-07-29 21:21:49 +0100401static int hp_event(struct snd_soc_dapm_widget *w,
402 struct snd_kcontrol *kcontrol, int event)
403{
404 struct snd_soc_codec *codec = w->codec;
405 unsigned int reg = snd_soc_read(codec, WM8993_ANALOGUE_HP_0);
406
407 switch (event) {
408 case SND_SOC_DAPM_POST_PMU:
409 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
410 WM8993_CP_ENA, WM8993_CP_ENA);
411
412 msleep(5);
413
414 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
415 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
416 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA);
417
418 reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY;
419 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
420
Mark Brown3ed70742010-01-20 17:39:45 +0000421 /* Smallest supported update interval */
422 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
423 WM8993_DCS_TIMER_PERIOD_01_MASK, 1);
424
425 calibrate_dc_servo(codec);
Mark Browna2342ae2009-07-29 21:21:49 +0100426
427 reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT |
428 WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT;
429 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
430 break;
431
432 case SND_SOC_DAPM_PRE_PMD:
Mark Brown3ed70742010-01-20 17:39:45 +0000433 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
Mark Brown6adb26b2010-05-10 16:13:11 +0100434 WM8993_HPOUT1L_OUTP |
435 WM8993_HPOUT1R_OUTP |
Mark Brown3ed70742010-01-20 17:39:45 +0000436 WM8993_HPOUT1L_RMV_SHORT |
437 WM8993_HPOUT1R_RMV_SHORT, 0);
Mark Browna2342ae2009-07-29 21:21:49 +0100438
Mark Brown3ed70742010-01-20 17:39:45 +0000439 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
Mark Brown6adb26b2010-05-10 16:13:11 +0100440 WM8993_HPOUT1L_DLY |
441 WM8993_HPOUT1R_DLY, 0);
Mark Browna2342ae2009-07-29 21:21:49 +0100442
Mark Brown395e4b72010-05-10 21:06:14 +0100443 snd_soc_write(codec, WM8993_DC_SERVO_0, 0);
444
Mark Browna2342ae2009-07-29 21:21:49 +0100445 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
446 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
447 0);
Mark Browna2342ae2009-07-29 21:21:49 +0100448 break;
449 }
450
451 return 0;
452}
453
454static int earpiece_event(struct snd_soc_dapm_widget *w,
455 struct snd_kcontrol *control, int event)
456{
457 struct snd_soc_codec *codec = w->codec;
458 u16 reg = snd_soc_read(codec, WM8993_ANTIPOP1) & ~WM8993_HPOUT2_IN_ENA;
459
460 switch (event) {
461 case SND_SOC_DAPM_PRE_PMU:
462 reg |= WM8993_HPOUT2_IN_ENA;
463 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
464 udelay(50);
465 break;
466
467 case SND_SOC_DAPM_POST_PMD:
468 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
469 break;
470
471 default:
472 BUG();
473 break;
474 }
475
476 return 0;
477}
478
479static const struct snd_kcontrol_new in1l_pga[] = {
480SOC_DAPM_SINGLE("IN1LP Switch", WM8993_INPUT_MIXER2, 5, 1, 0),
481SOC_DAPM_SINGLE("IN1LN Switch", WM8993_INPUT_MIXER2, 4, 1, 0),
482};
483
484static const struct snd_kcontrol_new in1r_pga[] = {
485SOC_DAPM_SINGLE("IN1RP Switch", WM8993_INPUT_MIXER2, 1, 1, 0),
486SOC_DAPM_SINGLE("IN1RN Switch", WM8993_INPUT_MIXER2, 0, 1, 0),
487};
488
489static const struct snd_kcontrol_new in2l_pga[] = {
490SOC_DAPM_SINGLE("IN2LP Switch", WM8993_INPUT_MIXER2, 7, 1, 0),
491SOC_DAPM_SINGLE("IN2LN Switch", WM8993_INPUT_MIXER2, 6, 1, 0),
492};
493
494static const struct snd_kcontrol_new in2r_pga[] = {
495SOC_DAPM_SINGLE("IN2RP Switch", WM8993_INPUT_MIXER2, 3, 1, 0),
496SOC_DAPM_SINGLE("IN2RN Switch", WM8993_INPUT_MIXER2, 2, 1, 0),
497};
498
499static const struct snd_kcontrol_new mixinl[] = {
500SOC_DAPM_SINGLE("IN2L Switch", WM8993_INPUT_MIXER3, 8, 1, 0),
501SOC_DAPM_SINGLE("IN1L Switch", WM8993_INPUT_MIXER3, 5, 1, 0),
502};
503
504static const struct snd_kcontrol_new mixinr[] = {
505SOC_DAPM_SINGLE("IN2R Switch", WM8993_INPUT_MIXER4, 8, 1, 0),
506SOC_DAPM_SINGLE("IN1R Switch", WM8993_INPUT_MIXER4, 5, 1, 0),
507};
508
509static const struct snd_kcontrol_new left_output_mixer[] = {
510SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER1, 7, 1, 0),
511SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER1, 6, 1, 0),
512SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER1, 5, 1, 0),
513SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER1, 4, 1, 0),
514SOC_DAPM_SINGLE("IN2LP Switch", WM8993_OUTPUT_MIXER1, 1, 1, 0),
515SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER1, 3, 1, 0),
516SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER1, 2, 1, 0),
517SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER1, 0, 1, 0),
518};
519
520static const struct snd_kcontrol_new right_output_mixer[] = {
521SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER2, 7, 1, 0),
522SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER2, 6, 1, 0),
523SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER2, 5, 1, 0),
524SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER2, 4, 1, 0),
525SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER2, 3, 1, 0),
526SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER2, 2, 1, 0),
527SOC_DAPM_SINGLE("IN2RP Switch", WM8993_OUTPUT_MIXER2, 1, 1, 0),
528SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER2, 0, 1, 0),
529};
530
531static const struct snd_kcontrol_new earpiece_mixer[] = {
532SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_HPOUT2_MIXER, 5, 1, 0),
533SOC_DAPM_SINGLE("Left Output Switch", WM8993_HPOUT2_MIXER, 4, 1, 0),
534SOC_DAPM_SINGLE("Right Output Switch", WM8993_HPOUT2_MIXER, 3, 1, 0),
535};
536
537static const struct snd_kcontrol_new left_speaker_boost[] = {
538SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 5, 1, 0),
539SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 4, 1, 0),
540SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 3, 1, 0),
541};
542
543static const struct snd_kcontrol_new right_speaker_boost[] = {
544SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 2, 1, 0),
545SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 1, 1, 0),
546SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 0, 1, 0),
547};
548
549static const struct snd_kcontrol_new line1_mix[] = {
550SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER1, 2, 1, 0),
551SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER1, 1, 1, 0),
552SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
553};
554
555static const struct snd_kcontrol_new line1n_mix[] = {
556SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 6, 1, 0),
557SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER1, 5, 1, 0),
558};
559
560static const struct snd_kcontrol_new line1p_mix[] = {
561SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
562};
563
564static const struct snd_kcontrol_new line2_mix[] = {
565SOC_DAPM_SINGLE("IN2R Switch", WM8993_LINE_MIXER2, 2, 1, 0),
566SOC_DAPM_SINGLE("IN2L Switch", WM8993_LINE_MIXER2, 1, 1, 0),
567SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
568};
569
570static const struct snd_kcontrol_new line2n_mix[] = {
571SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 6, 1, 0),
572SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 5, 1, 0),
573};
574
575static const struct snd_kcontrol_new line2p_mix[] = {
576SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
577};
578
579static const struct snd_soc_dapm_widget analogue_dapm_widgets[] = {
580SND_SOC_DAPM_INPUT("IN1LN"),
581SND_SOC_DAPM_INPUT("IN1LP"),
582SND_SOC_DAPM_INPUT("IN2LN"),
Joonyoung Shim34825942009-12-04 15:12:10 +0900583SND_SOC_DAPM_INPUT("IN2LP:VXRN"),
Mark Browna2342ae2009-07-29 21:21:49 +0100584SND_SOC_DAPM_INPUT("IN1RN"),
585SND_SOC_DAPM_INPUT("IN1RP"),
586SND_SOC_DAPM_INPUT("IN2RN"),
Joonyoung Shim34825942009-12-04 15:12:10 +0900587SND_SOC_DAPM_INPUT("IN2RP:VXRP"),
Mark Browna2342ae2009-07-29 21:21:49 +0100588
589SND_SOC_DAPM_MICBIAS("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0),
590SND_SOC_DAPM_MICBIAS("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0),
591
592SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0,
593 in1l_pga, ARRAY_SIZE(in1l_pga)),
594SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0,
595 in1r_pga, ARRAY_SIZE(in1r_pga)),
596
597SND_SOC_DAPM_MIXER("IN2L PGA", WM8993_POWER_MANAGEMENT_2, 7, 0,
598 in2l_pga, ARRAY_SIZE(in2l_pga)),
599SND_SOC_DAPM_MIXER("IN2R PGA", WM8993_POWER_MANAGEMENT_2, 5, 0,
600 in2r_pga, ARRAY_SIZE(in2r_pga)),
601
602/* Dummy widgets to represent differential paths */
603SND_SOC_DAPM_PGA("Direct Voice", SND_SOC_NOPM, 0, 0, NULL, 0),
604
605SND_SOC_DAPM_MIXER("MIXINL", WM8993_POWER_MANAGEMENT_2, 9, 0,
606 mixinl, ARRAY_SIZE(mixinl)),
607SND_SOC_DAPM_MIXER("MIXINR", WM8993_POWER_MANAGEMENT_2, 8, 0,
608 mixinr, ARRAY_SIZE(mixinr)),
609
Mark Browna2342ae2009-07-29 21:21:49 +0100610SND_SOC_DAPM_MIXER("Left Output Mixer", WM8993_POWER_MANAGEMENT_3, 5, 0,
611 left_output_mixer, ARRAY_SIZE(left_output_mixer)),
612SND_SOC_DAPM_MIXER("Right Output Mixer", WM8993_POWER_MANAGEMENT_3, 4, 0,
613 right_output_mixer, ARRAY_SIZE(right_output_mixer)),
614
615SND_SOC_DAPM_PGA("Left Output PGA", WM8993_POWER_MANAGEMENT_3, 7, 0, NULL, 0),
616SND_SOC_DAPM_PGA("Right Output PGA", WM8993_POWER_MANAGEMENT_3, 6, 0, NULL, 0),
617
Mark Brown3ed70742010-01-20 17:39:45 +0000618SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, hp_supply_event,
619 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
Mark Browna2342ae2009-07-29 21:21:49 +0100620SND_SOC_DAPM_PGA_E("Headphone PGA", SND_SOC_NOPM, 0, 0,
621 NULL, 0,
622 hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
623
624SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
625 earpiece_mixer, ARRAY_SIZE(earpiece_mixer)),
626SND_SOC_DAPM_PGA_E("Earpiece Driver", WM8993_POWER_MANAGEMENT_1, 11, 0,
627 NULL, 0, earpiece_event,
628 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
629
630SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0,
631 left_speaker_boost, ARRAY_SIZE(left_speaker_boost)),
632SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0,
633 right_speaker_boost, ARRAY_SIZE(right_speaker_boost)),
634
635SND_SOC_DAPM_PGA("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0,
636 NULL, 0),
637SND_SOC_DAPM_PGA("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0,
638 NULL, 0),
639
640SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0,
641 line1_mix, ARRAY_SIZE(line1_mix)),
642SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0,
643 line2_mix, ARRAY_SIZE(line2_mix)),
644
645SND_SOC_DAPM_MIXER("LINEOUT1N Mixer", SND_SOC_NOPM, 0, 0,
646 line1n_mix, ARRAY_SIZE(line1n_mix)),
647SND_SOC_DAPM_MIXER("LINEOUT1P Mixer", SND_SOC_NOPM, 0, 0,
648 line1p_mix, ARRAY_SIZE(line1p_mix)),
649SND_SOC_DAPM_MIXER("LINEOUT2N Mixer", SND_SOC_NOPM, 0, 0,
650 line2n_mix, ARRAY_SIZE(line2n_mix)),
651SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0,
652 line2p_mix, ARRAY_SIZE(line2p_mix)),
653
654SND_SOC_DAPM_PGA("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0,
655 NULL, 0),
656SND_SOC_DAPM_PGA("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0,
657 NULL, 0),
658SND_SOC_DAPM_PGA("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0,
659 NULL, 0),
660SND_SOC_DAPM_PGA("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0,
661 NULL, 0),
662
663SND_SOC_DAPM_OUTPUT("SPKOUTLP"),
664SND_SOC_DAPM_OUTPUT("SPKOUTLN"),
665SND_SOC_DAPM_OUTPUT("SPKOUTRP"),
666SND_SOC_DAPM_OUTPUT("SPKOUTRN"),
667SND_SOC_DAPM_OUTPUT("HPOUT1L"),
668SND_SOC_DAPM_OUTPUT("HPOUT1R"),
669SND_SOC_DAPM_OUTPUT("HPOUT2P"),
670SND_SOC_DAPM_OUTPUT("HPOUT2N"),
671SND_SOC_DAPM_OUTPUT("LINEOUT1P"),
672SND_SOC_DAPM_OUTPUT("LINEOUT1N"),
673SND_SOC_DAPM_OUTPUT("LINEOUT2P"),
674SND_SOC_DAPM_OUTPUT("LINEOUT2N"),
675};
676
677static const struct snd_soc_dapm_route analogue_routes[] = {
Mark Brown4baafdd2011-02-18 15:05:53 -0800678 { "MICBIAS1", NULL, "CLK_SYS" },
679 { "MICBIAS2", NULL, "CLK_SYS" },
680
Mark Browna2342ae2009-07-29 21:21:49 +0100681 { "IN1L PGA", "IN1LP Switch", "IN1LP" },
682 { "IN1L PGA", "IN1LN Switch", "IN1LN" },
683
684 { "IN1R PGA", "IN1RP Switch", "IN1RP" },
685 { "IN1R PGA", "IN1RN Switch", "IN1RN" },
686
Joonyoung Shim34825942009-12-04 15:12:10 +0900687 { "IN2L PGA", "IN2LP Switch", "IN2LP:VXRN" },
Mark Browna2342ae2009-07-29 21:21:49 +0100688 { "IN2L PGA", "IN2LN Switch", "IN2LN" },
689
Joonyoung Shim34825942009-12-04 15:12:10 +0900690 { "IN2R PGA", "IN2RP Switch", "IN2RP:VXRP" },
Mark Browna2342ae2009-07-29 21:21:49 +0100691 { "IN2R PGA", "IN2RN Switch", "IN2RN" },
692
Joonyoung Shim34825942009-12-04 15:12:10 +0900693 { "Direct Voice", NULL, "IN2LP:VXRN" },
694 { "Direct Voice", NULL, "IN2RP:VXRP" },
Mark Browna2342ae2009-07-29 21:21:49 +0100695
696 { "MIXINL", "IN1L Switch", "IN1L PGA" },
697 { "MIXINL", "IN2L Switch", "IN2L PGA" },
698 { "MIXINL", NULL, "Direct Voice" },
699 { "MIXINL", NULL, "IN1LP" },
700 { "MIXINL", NULL, "Left Output Mixer" },
701
702 { "MIXINR", "IN1R Switch", "IN1R PGA" },
703 { "MIXINR", "IN2R Switch", "IN2R PGA" },
704 { "MIXINR", NULL, "Direct Voice" },
705 { "MIXINR", NULL, "IN1RP" },
706 { "MIXINR", NULL, "Right Output Mixer" },
707
708 { "ADCL", NULL, "MIXINL" },
709 { "ADCR", NULL, "MIXINR" },
710
711 { "Left Output Mixer", "Left Input Switch", "MIXINL" },
712 { "Left Output Mixer", "Right Input Switch", "MIXINR" },
713 { "Left Output Mixer", "IN2RN Switch", "IN2RN" },
714 { "Left Output Mixer", "IN2LN Switch", "IN2LN" },
Joonyoung Shim34825942009-12-04 15:12:10 +0900715 { "Left Output Mixer", "IN2LP Switch", "IN2LP:VXRN" },
Mark Browna2342ae2009-07-29 21:21:49 +0100716 { "Left Output Mixer", "IN1L Switch", "IN1L PGA" },
717 { "Left Output Mixer", "IN1R Switch", "IN1R PGA" },
718
719 { "Right Output Mixer", "Left Input Switch", "MIXINL" },
720 { "Right Output Mixer", "Right Input Switch", "MIXINR" },
721 { "Right Output Mixer", "IN2LN Switch", "IN2LN" },
722 { "Right Output Mixer", "IN2RN Switch", "IN2RN" },
Joonyoung Shim34825942009-12-04 15:12:10 +0900723 { "Right Output Mixer", "IN2RP Switch", "IN2RP:VXRP" },
Mark Browna2342ae2009-07-29 21:21:49 +0100724 { "Right Output Mixer", "IN1L Switch", "IN1L PGA" },
725 { "Right Output Mixer", "IN1R Switch", "IN1R PGA" },
726
727 { "Left Output PGA", NULL, "Left Output Mixer" },
728 { "Left Output PGA", NULL, "TOCLK" },
729
730 { "Right Output PGA", NULL, "Right Output Mixer" },
731 { "Right Output PGA", NULL, "TOCLK" },
732
733 { "Earpiece Mixer", "Direct Voice Switch", "Direct Voice" },
734 { "Earpiece Mixer", "Left Output Switch", "Left Output PGA" },
735 { "Earpiece Mixer", "Right Output Switch", "Right Output PGA" },
736
737 { "Earpiece Driver", NULL, "Earpiece Mixer" },
738 { "HPOUT2N", NULL, "Earpiece Driver" },
739 { "HPOUT2P", NULL, "Earpiece Driver" },
740
741 { "SPKL", "Input Switch", "MIXINL" },
742 { "SPKL", "IN1LP Switch", "IN1LP" },
Mark Brown39cca162011-04-08 16:32:16 +0900743 { "SPKL", "Output Switch", "Left Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100744 { "SPKL", NULL, "TOCLK" },
745
746 { "SPKR", "Input Switch", "MIXINR" },
747 { "SPKR", "IN1RP Switch", "IN1RP" },
Mark Brown39cca162011-04-08 16:32:16 +0900748 { "SPKR", "Output Switch", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100749 { "SPKR", NULL, "TOCLK" },
750
751 { "SPKL Boost", "Direct Voice Switch", "Direct Voice" },
752 { "SPKL Boost", "SPKL Switch", "SPKL" },
753 { "SPKL Boost", "SPKR Switch", "SPKR" },
754
755 { "SPKR Boost", "Direct Voice Switch", "Direct Voice" },
756 { "SPKR Boost", "SPKR Switch", "SPKR" },
757 { "SPKR Boost", "SPKL Switch", "SPKL" },
758
759 { "SPKL Driver", NULL, "SPKL Boost" },
760 { "SPKL Driver", NULL, "CLK_SYS" },
761
762 { "SPKR Driver", NULL, "SPKR Boost" },
763 { "SPKR Driver", NULL, "CLK_SYS" },
764
765 { "SPKOUTLP", NULL, "SPKL Driver" },
766 { "SPKOUTLN", NULL, "SPKL Driver" },
767 { "SPKOUTRP", NULL, "SPKR Driver" },
768 { "SPKOUTRN", NULL, "SPKR Driver" },
769
Mark Brown39cca162011-04-08 16:32:16 +0900770 { "Left Headphone Mux", "Mixer", "Left Output PGA" },
771 { "Right Headphone Mux", "Mixer", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100772
773 { "Headphone PGA", NULL, "Left Headphone Mux" },
774 { "Headphone PGA", NULL, "Right Headphone Mux" },
775 { "Headphone PGA", NULL, "CLK_SYS" },
Mark Brown3ed70742010-01-20 17:39:45 +0000776 { "Headphone PGA", NULL, "Headphone Supply" },
Mark Browna2342ae2009-07-29 21:21:49 +0100777
778 { "HPOUT1L", NULL, "Headphone PGA" },
779 { "HPOUT1R", NULL, "Headphone PGA" },
780
781 { "LINEOUT1N", NULL, "LINEOUT1N Driver" },
782 { "LINEOUT1P", NULL, "LINEOUT1P Driver" },
783 { "LINEOUT2N", NULL, "LINEOUT2N Driver" },
784 { "LINEOUT2P", NULL, "LINEOUT2P Driver" },
785};
786
787static const struct snd_soc_dapm_route lineout1_diff_routes[] = {
788 { "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" },
789 { "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" },
790 { "LINEOUT1 Mixer", "Output Switch", "Left Output Mixer" },
791
792 { "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" },
793 { "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" },
794};
795
796static const struct snd_soc_dapm_route lineout1_se_routes[] = {
797 { "LINEOUT1N Mixer", "Left Output Switch", "Left Output Mixer" },
798 { "LINEOUT1N Mixer", "Right Output Switch", "Left Output Mixer" },
799
800 { "LINEOUT1P Mixer", "Left Output Switch", "Left Output Mixer" },
801
802 { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" },
803 { "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" },
804};
805
806static const struct snd_soc_dapm_route lineout2_diff_routes[] = {
807 { "LINEOUT2 Mixer", "IN2L Switch", "IN2L PGA" },
808 { "LINEOUT2 Mixer", "IN2R Switch", "IN2R PGA" },
809 { "LINEOUT2 Mixer", "Output Switch", "Right Output Mixer" },
810
811 { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" },
812 { "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" },
813};
814
815static const struct snd_soc_dapm_route lineout2_se_routes[] = {
816 { "LINEOUT2N Mixer", "Left Output Switch", "Left Output Mixer" },
817 { "LINEOUT2N Mixer", "Right Output Switch", "Left Output Mixer" },
818
819 { "LINEOUT2P Mixer", "Right Output Switch", "Right Output Mixer" },
820
821 { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" },
822 { "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" },
823};
824
825int wm_hubs_add_analogue_controls(struct snd_soc_codec *codec)
826{
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200827 struct snd_soc_dapm_context *dapm = &codec->dapm;
828
Mark Browna2342ae2009-07-29 21:21:49 +0100829 /* Latch volume update bits & default ZC on */
830 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_1_2_VOLUME,
831 WM8993_IN1_VU, WM8993_IN1_VU);
832 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_1_2_VOLUME,
833 WM8993_IN1_VU, WM8993_IN1_VU);
834 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_3_4_VOLUME,
835 WM8993_IN2_VU, WM8993_IN2_VU);
836 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME,
837 WM8993_IN2_VU, WM8993_IN2_VU);
838
839 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT,
840 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
841
842 snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME,
843 WM8993_HPOUT1L_ZC, WM8993_HPOUT1L_ZC);
844 snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME,
845 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC,
846 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC);
847
848 snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME,
849 WM8993_MIXOUTL_ZC, WM8993_MIXOUTL_ZC);
850 snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME,
851 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU,
852 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU);
853
854 snd_soc_add_controls(codec, analogue_snd_controls,
855 ARRAY_SIZE(analogue_snd_controls));
856
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200857 snd_soc_dapm_new_controls(dapm, analogue_dapm_widgets,
Mark Browna2342ae2009-07-29 21:21:49 +0100858 ARRAY_SIZE(analogue_dapm_widgets));
859 return 0;
860}
861EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_controls);
862
863int wm_hubs_add_analogue_routes(struct snd_soc_codec *codec,
864 int lineout1_diff, int lineout2_diff)
865{
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200866 struct snd_soc_dapm_context *dapm = &codec->dapm;
867
868 snd_soc_dapm_add_routes(dapm, analogue_routes,
Mark Browna2342ae2009-07-29 21:21:49 +0100869 ARRAY_SIZE(analogue_routes));
870
871 if (lineout1_diff)
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200872 snd_soc_dapm_add_routes(dapm,
Mark Browna2342ae2009-07-29 21:21:49 +0100873 lineout1_diff_routes,
874 ARRAY_SIZE(lineout1_diff_routes));
875 else
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200876 snd_soc_dapm_add_routes(dapm,
Mark Browna2342ae2009-07-29 21:21:49 +0100877 lineout1_se_routes,
878 ARRAY_SIZE(lineout1_se_routes));
879
880 if (lineout2_diff)
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200881 snd_soc_dapm_add_routes(dapm,
Mark Browna2342ae2009-07-29 21:21:49 +0100882 lineout2_diff_routes,
883 ARRAY_SIZE(lineout2_diff_routes));
884 else
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200885 snd_soc_dapm_add_routes(dapm,
Mark Browna2342ae2009-07-29 21:21:49 +0100886 lineout2_se_routes,
887 ARRAY_SIZE(lineout2_se_routes));
888
889 return 0;
890}
891EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_routes);
892
Mark Brownaa983d92009-09-30 14:16:11 +0100893int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec,
894 int lineout1_diff, int lineout2_diff,
895 int lineout1fb, int lineout2fb,
896 int jd_scthr, int jd_thr, int micbias1_lvl,
897 int micbias2_lvl)
898{
899 if (!lineout1_diff)
900 snd_soc_update_bits(codec, WM8993_LINE_MIXER1,
901 WM8993_LINEOUT1_MODE,
902 WM8993_LINEOUT1_MODE);
903 if (!lineout2_diff)
904 snd_soc_update_bits(codec, WM8993_LINE_MIXER2,
905 WM8993_LINEOUT2_MODE,
906 WM8993_LINEOUT2_MODE);
907
Mark Brown821dd912010-01-21 11:33:20 +0000908 /* If the line outputs are differential then we aren't presenting
909 * VMID as an output and can disable it.
910 */
911 if (lineout1_diff && lineout2_diff)
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200912 codec->dapm.idle_bias_off = 1;
Mark Brown821dd912010-01-21 11:33:20 +0000913
Mark Brownaa983d92009-09-30 14:16:11 +0100914 if (lineout1fb)
915 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
916 WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB);
917
918 if (lineout2fb)
919 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
920 WM8993_LINEOUT2_FB, WM8993_LINEOUT2_FB);
921
922 snd_soc_update_bits(codec, WM8993_MICBIAS,
923 WM8993_JD_SCTHR_MASK | WM8993_JD_THR_MASK |
924 WM8993_MICB1_LVL | WM8993_MICB2_LVL,
925 jd_scthr << WM8993_JD_SCTHR_SHIFT |
926 jd_thr << WM8993_JD_THR_SHIFT |
927 micbias1_lvl |
928 micbias2_lvl << WM8993_MICB2_LVL_SHIFT);
929
930 return 0;
931}
932EXPORT_SYMBOL_GPL(wm_hubs_handle_analogue_pdata);
933
Mark Browna2342ae2009-07-29 21:21:49 +0100934MODULE_DESCRIPTION("Shared support for Wolfson hubs products");
935MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
936MODULE_LICENSE("GPL");