Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * File: msi.c |
| 3 | * Purpose: PCI Message Signaled Interrupt (MSI) |
| 4 | * |
| 5 | * Copyright (C) 2003-2004 Intel |
| 6 | * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) |
| 7 | */ |
| 8 | |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 9 | #include <linux/err.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | #include <linux/mm.h> |
| 11 | #include <linux/irq.h> |
| 12 | #include <linux/interrupt.h> |
| 13 | #include <linux/init.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | #include <linux/ioport.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 15 | #include <linux/pci.h> |
| 16 | #include <linux/proc_fs.h> |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 17 | #include <linux/msi.h> |
Dan Williams | 4fdadeb | 2007-04-26 18:21:38 -0700 | [diff] [blame] | 18 | #include <linux/smp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | |
| 20 | #include <asm/errno.h> |
| 21 | #include <asm/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | |
| 23 | #include "pci.h" |
| 24 | #include "msi.h" |
| 25 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | static int pci_msi_enable = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 28 | static void msi_set_enable(struct pci_dev *dev, int enable) |
| 29 | { |
| 30 | int pos; |
| 31 | u16 control; |
| 32 | |
| 33 | pos = pci_find_capability(dev, PCI_CAP_ID_MSI); |
| 34 | if (pos) { |
| 35 | pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control); |
| 36 | control &= ~PCI_MSI_FLAGS_ENABLE; |
| 37 | if (enable) |
| 38 | control |= PCI_MSI_FLAGS_ENABLE; |
| 39 | pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control); |
| 40 | } |
| 41 | } |
| 42 | |
| 43 | static void msix_set_enable(struct pci_dev *dev, int enable) |
| 44 | { |
| 45 | int pos; |
| 46 | u16 control; |
| 47 | |
| 48 | pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 49 | if (pos) { |
| 50 | pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control); |
| 51 | control &= ~PCI_MSIX_FLAGS_ENABLE; |
| 52 | if (enable) |
| 53 | control |= PCI_MSIX_FLAGS_ENABLE; |
| 54 | pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); |
| 55 | } |
| 56 | } |
| 57 | |
Mitch Williams | 988cbb1 | 2007-03-30 11:54:08 -0700 | [diff] [blame] | 58 | static void msix_flush_writes(unsigned int irq) |
| 59 | { |
| 60 | struct msi_desc *entry; |
| 61 | |
| 62 | entry = get_irq_msi(irq); |
| 63 | BUG_ON(!entry || !entry->dev); |
| 64 | switch (entry->msi_attrib.type) { |
| 65 | case PCI_CAP_ID_MSI: |
| 66 | /* nothing to do */ |
| 67 | break; |
| 68 | case PCI_CAP_ID_MSIX: |
| 69 | { |
| 70 | int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + |
| 71 | PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET; |
| 72 | readl(entry->mask_base + offset); |
| 73 | break; |
| 74 | } |
| 75 | default: |
| 76 | BUG(); |
| 77 | break; |
| 78 | } |
| 79 | } |
| 80 | |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 81 | static void msi_set_mask_bit(unsigned int irq, int flag) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 82 | { |
| 83 | struct msi_desc *entry; |
| 84 | |
Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 85 | entry = get_irq_msi(irq); |
Eric W. Biederman | 277bc33 | 2006-10-04 02:16:57 -0700 | [diff] [blame] | 86 | BUG_ON(!entry || !entry->dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 87 | switch (entry->msi_attrib.type) { |
| 88 | case PCI_CAP_ID_MSI: |
Eric W. Biederman | 277bc33 | 2006-10-04 02:16:57 -0700 | [diff] [blame] | 89 | if (entry->msi_attrib.maskbit) { |
Satoru Takeuchi | c54c187 | 2007-01-18 13:50:05 +0900 | [diff] [blame] | 90 | int pos; |
| 91 | u32 mask_bits; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 92 | |
Eric W. Biederman | 277bc33 | 2006-10-04 02:16:57 -0700 | [diff] [blame] | 93 | pos = (long)entry->mask_base; |
| 94 | pci_read_config_dword(entry->dev, pos, &mask_bits); |
| 95 | mask_bits &= ~(1); |
| 96 | mask_bits |= flag; |
| 97 | pci_write_config_dword(entry->dev, pos, mask_bits); |
Eric W. Biederman | 58e0543 | 2007-03-05 00:30:11 -0800 | [diff] [blame] | 98 | } else { |
| 99 | msi_set_enable(entry->dev, !flag); |
Eric W. Biederman | 277bc33 | 2006-10-04 02:16:57 -0700 | [diff] [blame] | 100 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 101 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 102 | case PCI_CAP_ID_MSIX: |
| 103 | { |
| 104 | int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + |
| 105 | PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET; |
| 106 | writel(flag, entry->mask_base + offset); |
Eric W. Biederman | 348e3fd | 2007-04-03 01:41:49 -0600 | [diff] [blame] | 107 | readl(entry->mask_base + offset); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 108 | break; |
| 109 | } |
| 110 | default: |
Eric W. Biederman | 277bc33 | 2006-10-04 02:16:57 -0700 | [diff] [blame] | 111 | BUG(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 112 | break; |
| 113 | } |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 114 | entry->msi_attrib.masked = !!flag; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 115 | } |
| 116 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 117 | void read_msi_msg(unsigned int irq, struct msi_msg *msg) |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 118 | { |
Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 119 | struct msi_desc *entry = get_irq_msi(irq); |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 120 | switch(entry->msi_attrib.type) { |
| 121 | case PCI_CAP_ID_MSI: |
| 122 | { |
| 123 | struct pci_dev *dev = entry->dev; |
| 124 | int pos = entry->msi_attrib.pos; |
| 125 | u16 data; |
| 126 | |
| 127 | pci_read_config_dword(dev, msi_lower_address_reg(pos), |
| 128 | &msg->address_lo); |
| 129 | if (entry->msi_attrib.is_64) { |
| 130 | pci_read_config_dword(dev, msi_upper_address_reg(pos), |
| 131 | &msg->address_hi); |
| 132 | pci_read_config_word(dev, msi_data_reg(pos, 1), &data); |
| 133 | } else { |
| 134 | msg->address_hi = 0; |
Roland Dreier | cbf5d9e | 2007-10-03 11:15:11 -0700 | [diff] [blame] | 135 | pci_read_config_word(dev, msi_data_reg(pos, 0), &data); |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 136 | } |
| 137 | msg->data = data; |
| 138 | break; |
| 139 | } |
| 140 | case PCI_CAP_ID_MSIX: |
| 141 | { |
| 142 | void __iomem *base; |
| 143 | base = entry->mask_base + |
| 144 | entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; |
| 145 | |
| 146 | msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET); |
| 147 | msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET); |
| 148 | msg->data = readl(base + PCI_MSIX_ENTRY_DATA_OFFSET); |
| 149 | break; |
| 150 | } |
| 151 | default: |
| 152 | BUG(); |
| 153 | } |
| 154 | } |
| 155 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 156 | void write_msi_msg(unsigned int irq, struct msi_msg *msg) |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 157 | { |
Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 158 | struct msi_desc *entry = get_irq_msi(irq); |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 159 | switch (entry->msi_attrib.type) { |
| 160 | case PCI_CAP_ID_MSI: |
| 161 | { |
| 162 | struct pci_dev *dev = entry->dev; |
| 163 | int pos = entry->msi_attrib.pos; |
| 164 | |
| 165 | pci_write_config_dword(dev, msi_lower_address_reg(pos), |
| 166 | msg->address_lo); |
| 167 | if (entry->msi_attrib.is_64) { |
| 168 | pci_write_config_dword(dev, msi_upper_address_reg(pos), |
| 169 | msg->address_hi); |
| 170 | pci_write_config_word(dev, msi_data_reg(pos, 1), |
| 171 | msg->data); |
| 172 | } else { |
| 173 | pci_write_config_word(dev, msi_data_reg(pos, 0), |
| 174 | msg->data); |
| 175 | } |
| 176 | break; |
| 177 | } |
| 178 | case PCI_CAP_ID_MSIX: |
| 179 | { |
| 180 | void __iomem *base; |
| 181 | base = entry->mask_base + |
| 182 | entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; |
| 183 | |
| 184 | writel(msg->address_lo, |
| 185 | base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET); |
| 186 | writel(msg->address_hi, |
| 187 | base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET); |
| 188 | writel(msg->data, base + PCI_MSIX_ENTRY_DATA_OFFSET); |
| 189 | break; |
| 190 | } |
| 191 | default: |
| 192 | BUG(); |
| 193 | } |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 194 | entry->msg = *msg; |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 195 | } |
| 196 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 197 | void mask_msi_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 198 | { |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 199 | msi_set_mask_bit(irq, 1); |
Mitch Williams | 988cbb1 | 2007-03-30 11:54:08 -0700 | [diff] [blame] | 200 | msix_flush_writes(irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 201 | } |
| 202 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 203 | void unmask_msi_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | { |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 205 | msi_set_mask_bit(irq, 0); |
Mitch Williams | 988cbb1 | 2007-03-30 11:54:08 -0700 | [diff] [blame] | 206 | msix_flush_writes(irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 207 | } |
| 208 | |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 209 | static int msi_free_irqs(struct pci_dev* dev); |
Satoru Takeuchi | c54c187 | 2007-01-18 13:50:05 +0900 | [diff] [blame] | 210 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 211 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 212 | static struct msi_desc* alloc_msi_entry(void) |
| 213 | { |
| 214 | struct msi_desc *entry; |
| 215 | |
Michael Ellerman | 3e916c0 | 2007-03-22 21:51:36 +1100 | [diff] [blame] | 216 | entry = kzalloc(sizeof(struct msi_desc), GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 217 | if (!entry) |
| 218 | return NULL; |
| 219 | |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 220 | INIT_LIST_HEAD(&entry->list); |
| 221 | entry->irq = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 222 | entry->dev = NULL; |
| 223 | |
| 224 | return entry; |
| 225 | } |
| 226 | |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 227 | static void pci_intx_for_msi(struct pci_dev *dev, int enable) |
| 228 | { |
| 229 | if (!(dev->dev_flags & PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG)) |
| 230 | pci_intx(dev, enable); |
| 231 | } |
| 232 | |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 233 | #ifdef CONFIG_PM |
Michael Ellerman | 8fed4b6 | 2007-01-25 19:34:08 +1100 | [diff] [blame] | 234 | static void __pci_restore_msi_state(struct pci_dev *dev) |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 235 | { |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 236 | int pos; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 237 | u16 control; |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 238 | struct msi_desc *entry; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 239 | |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 240 | if (!dev->msi_enabled) |
| 241 | return; |
| 242 | |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 243 | entry = get_irq_msi(dev->irq); |
| 244 | pos = entry->msi_attrib.pos; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 245 | |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 246 | pci_intx_for_msi(dev, 0); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 247 | msi_set_enable(dev, 0); |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 248 | write_msi_msg(dev->irq, &entry->msg); |
| 249 | if (entry->msi_attrib.maskbit) |
| 250 | msi_set_mask_bit(dev->irq, entry->msi_attrib.masked); |
| 251 | |
| 252 | pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control); |
| 253 | control &= ~(PCI_MSI_FLAGS_QSIZE | PCI_MSI_FLAGS_ENABLE); |
| 254 | if (entry->msi_attrib.maskbit || !entry->msi_attrib.masked) |
| 255 | control |= PCI_MSI_FLAGS_ENABLE; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 256 | pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control); |
Michael Ellerman | 8fed4b6 | 2007-01-25 19:34:08 +1100 | [diff] [blame] | 257 | } |
| 258 | |
| 259 | static void __pci_restore_msix_state(struct pci_dev *dev) |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 260 | { |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 261 | int pos; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 262 | struct msi_desc *entry; |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 263 | u16 control; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 264 | |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 265 | if (!dev->msix_enabled) |
| 266 | return; |
| 267 | |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 268 | /* route the table */ |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 269 | pci_intx_for_msi(dev, 0); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 270 | msix_set_enable(dev, 0); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 271 | |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 272 | list_for_each_entry(entry, &dev->msi_list, list) { |
| 273 | write_msi_msg(entry->irq, &entry->msg); |
| 274 | msi_set_mask_bit(entry->irq, entry->msi_attrib.masked); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 275 | } |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 276 | |
Michael Ellerman | 314e77b | 2007-04-05 17:19:12 +1000 | [diff] [blame] | 277 | BUG_ON(list_empty(&dev->msi_list)); |
| 278 | entry = list_entry(dev->msi_list.next, struct msi_desc, list); |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 279 | pos = entry->msi_attrib.pos; |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 280 | pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control); |
| 281 | control &= ~PCI_MSIX_FLAGS_MASKALL; |
| 282 | control |= PCI_MSIX_FLAGS_ENABLE; |
| 283 | pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 284 | } |
Michael Ellerman | 8fed4b6 | 2007-01-25 19:34:08 +1100 | [diff] [blame] | 285 | |
| 286 | void pci_restore_msi_state(struct pci_dev *dev) |
| 287 | { |
| 288 | __pci_restore_msi_state(dev); |
| 289 | __pci_restore_msix_state(dev); |
| 290 | } |
Satoru Takeuchi | c54c187 | 2007-01-18 13:50:05 +0900 | [diff] [blame] | 291 | #endif /* CONFIG_PM */ |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 292 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 293 | /** |
| 294 | * msi_capability_init - configure device's MSI capability structure |
| 295 | * @dev: pointer to the pci_dev data structure of MSI device function |
| 296 | * |
Steven Cole | eaae4b3 | 2005-05-03 18:38:30 -0600 | [diff] [blame] | 297 | * Setup the MSI capability structure of device function with a single |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 298 | * MSI irq, regardless of device function is capable of handling |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 299 | * multiple messages. A return of zero indicates the successful setup |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 300 | * of an entry zero with the new MSI irq or non-zero for otherwise. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 301 | **/ |
| 302 | static int msi_capability_init(struct pci_dev *dev) |
| 303 | { |
| 304 | struct msi_desc *entry; |
Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 305 | int pos, ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 306 | u16 control; |
| 307 | |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 308 | msi_set_enable(dev, 0); /* Ensure msi is disabled as I set it up */ |
| 309 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | pos = pci_find_capability(dev, PCI_CAP_ID_MSI); |
| 311 | pci_read_config_word(dev, msi_control_reg(pos), &control); |
| 312 | /* MSI Entry Initialization */ |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 313 | entry = alloc_msi_entry(); |
| 314 | if (!entry) |
| 315 | return -ENOMEM; |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 316 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 317 | entry->msi_attrib.type = PCI_CAP_ID_MSI; |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 318 | entry->msi_attrib.is_64 = is_64bit_address(control); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 319 | entry->msi_attrib.entry_nr = 0; |
| 320 | entry->msi_attrib.maskbit = is_mask_bit_support(control); |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 321 | entry->msi_attrib.masked = 1; |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 322 | entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */ |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 323 | entry->msi_attrib.pos = pos; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 324 | if (is_mask_bit_support(control)) { |
| 325 | entry->mask_base = (void __iomem *)(long)msi_mask_bits_reg(pos, |
| 326 | is_64bit_address(control)); |
| 327 | } |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 328 | entry->dev = dev; |
| 329 | if (entry->msi_attrib.maskbit) { |
| 330 | unsigned int maskbits, temp; |
| 331 | /* All MSIs are unmasked by default, Mask them all */ |
| 332 | pci_read_config_dword(dev, |
| 333 | msi_mask_bits_reg(pos, is_64bit_address(control)), |
| 334 | &maskbits); |
| 335 | temp = (1 << multi_msi_capable(control)); |
| 336 | temp = ((temp - 1) & ~temp); |
| 337 | maskbits |= temp; |
| 338 | pci_write_config_dword(dev, |
| 339 | msi_mask_bits_reg(pos, is_64bit_address(control)), |
| 340 | maskbits); |
| 341 | } |
Eric W. Biederman | 0dd11f9 | 2007-06-01 00:46:32 -0700 | [diff] [blame] | 342 | list_add_tail(&entry->list, &dev->msi_list); |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 343 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 344 | /* Configure MSI capability structure */ |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 345 | ret = arch_setup_msi_irqs(dev, 1, PCI_CAP_ID_MSI); |
Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 346 | if (ret) { |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 347 | msi_free_irqs(dev); |
Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 348 | return ret; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 349 | } |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 350 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 351 | /* Set MSI enabled bits */ |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 352 | pci_intx_for_msi(dev, 0); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 353 | msi_set_enable(dev, 1); |
| 354 | dev->msi_enabled = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 355 | |
Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 356 | dev->irq = entry->irq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 357 | return 0; |
| 358 | } |
| 359 | |
| 360 | /** |
| 361 | * msix_capability_init - configure device's MSI-X capability |
| 362 | * @dev: pointer to the pci_dev data structure of MSI-X device function |
Randy Dunlap | 8f7020d | 2005-10-23 11:57:38 -0700 | [diff] [blame] | 363 | * @entries: pointer to an array of struct msix_entry entries |
| 364 | * @nvec: number of @entries |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 365 | * |
Steven Cole | eaae4b3 | 2005-05-03 18:38:30 -0600 | [diff] [blame] | 366 | * Setup the MSI-X capability structure of device function with a |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 367 | * single MSI-X irq. A return of zero indicates the successful setup of |
| 368 | * requested MSI-X entries with allocated irqs or non-zero for otherwise. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 369 | **/ |
| 370 | static int msix_capability_init(struct pci_dev *dev, |
| 371 | struct msix_entry *entries, int nvec) |
| 372 | { |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 373 | struct msi_desc *entry; |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 374 | int pos, i, j, nr_entries, ret; |
Grant Grundler | a0454b4 | 2006-02-16 23:58:29 -0800 | [diff] [blame] | 375 | unsigned long phys_addr; |
| 376 | u32 table_offset; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 377 | u16 control; |
| 378 | u8 bir; |
| 379 | void __iomem *base; |
| 380 | |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 381 | msix_set_enable(dev, 0);/* Ensure msix is disabled as I set it up */ |
| 382 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 383 | pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 384 | /* Request & Map MSI-X table region */ |
| 385 | pci_read_config_word(dev, msi_control_reg(pos), &control); |
| 386 | nr_entries = multi_msix_capable(control); |
Grant Grundler | a0454b4 | 2006-02-16 23:58:29 -0800 | [diff] [blame] | 387 | |
| 388 | pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 389 | bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK); |
Grant Grundler | a0454b4 | 2006-02-16 23:58:29 -0800 | [diff] [blame] | 390 | table_offset &= ~PCI_MSIX_FLAGS_BIRMASK; |
| 391 | phys_addr = pci_resource_start (dev, bir) + table_offset; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 392 | base = ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE); |
| 393 | if (base == NULL) |
| 394 | return -ENOMEM; |
| 395 | |
| 396 | /* MSI-X Table Initialization */ |
| 397 | for (i = 0; i < nvec; i++) { |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 398 | entry = alloc_msi_entry(); |
| 399 | if (!entry) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 400 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 401 | |
| 402 | j = entries[i].entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 403 | entry->msi_attrib.type = PCI_CAP_ID_MSIX; |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 404 | entry->msi_attrib.is_64 = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 405 | entry->msi_attrib.entry_nr = j; |
| 406 | entry->msi_attrib.maskbit = 1; |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 407 | entry->msi_attrib.masked = 1; |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 408 | entry->msi_attrib.default_irq = dev->irq; |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 409 | entry->msi_attrib.pos = pos; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 410 | entry->dev = dev; |
| 411 | entry->mask_base = base; |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 412 | |
Eric W. Biederman | 0dd11f9 | 2007-06-01 00:46:32 -0700 | [diff] [blame] | 413 | list_add_tail(&entry->list, &dev->msi_list); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 414 | } |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 415 | |
| 416 | ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX); |
| 417 | if (ret) { |
| 418 | int avail = 0; |
| 419 | list_for_each_entry(entry, &dev->msi_list, list) { |
| 420 | if (entry->irq != 0) { |
| 421 | avail++; |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 422 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 423 | } |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 424 | |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 425 | msi_free_irqs(dev); |
| 426 | |
Eric W. Biederman | 92db6d1 | 2006-10-04 02:16:35 -0700 | [diff] [blame] | 427 | /* If we had some success report the number of irqs |
| 428 | * we succeeded in setting up. |
| 429 | */ |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 430 | if (avail == 0) |
| 431 | avail = ret; |
Eric W. Biederman | 92db6d1 | 2006-10-04 02:16:35 -0700 | [diff] [blame] | 432 | return avail; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 433 | } |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 434 | |
| 435 | i = 0; |
| 436 | list_for_each_entry(entry, &dev->msi_list, list) { |
| 437 | entries[i].vector = entry->irq; |
| 438 | set_irq_msi(entry->irq, entry); |
| 439 | i++; |
| 440 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 441 | /* Set MSI-X enabled bits */ |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 442 | pci_intx_for_msi(dev, 0); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 443 | msix_set_enable(dev, 1); |
| 444 | dev->msix_enabled = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 445 | |
| 446 | return 0; |
| 447 | } |
| 448 | |
| 449 | /** |
Michael Ellerman | 17bbc12 | 2007-04-05 17:19:07 +1000 | [diff] [blame] | 450 | * pci_msi_check_device - check whether MSI may be enabled on a device |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 451 | * @dev: pointer to the pci_dev data structure of MSI device function |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 452 | * @nvec: how many MSIs have been requested ? |
Michael Ellerman | b1e2303 | 2007-03-22 21:51:39 +1100 | [diff] [blame] | 453 | * @type: are we checking for MSI or MSI-X ? |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 454 | * |
Brice Goglin | 0306ebf | 2006-10-05 10:24:31 +0200 | [diff] [blame] | 455 | * Look at global flags, the device itself, and its parent busses |
Michael Ellerman | 17bbc12 | 2007-04-05 17:19:07 +1000 | [diff] [blame] | 456 | * to determine if MSI/-X are supported for the device. If MSI/-X is |
| 457 | * supported return 0, else return an error code. |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 458 | **/ |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 459 | static int pci_msi_check_device(struct pci_dev* dev, int nvec, int type) |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 460 | { |
| 461 | struct pci_bus *bus; |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 462 | int ret; |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 463 | |
Brice Goglin | 0306ebf | 2006-10-05 10:24:31 +0200 | [diff] [blame] | 464 | /* MSI must be globally enabled and supported by the device */ |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 465 | if (!pci_msi_enable || !dev || dev->no_msi) |
| 466 | return -EINVAL; |
| 467 | |
Michael Ellerman | 314e77b | 2007-04-05 17:19:12 +1000 | [diff] [blame] | 468 | /* |
| 469 | * You can't ask to have 0 or less MSIs configured. |
| 470 | * a) it's stupid .. |
| 471 | * b) the list manipulation code assumes nvec >= 1. |
| 472 | */ |
| 473 | if (nvec < 1) |
| 474 | return -ERANGE; |
| 475 | |
Brice Goglin | 0306ebf | 2006-10-05 10:24:31 +0200 | [diff] [blame] | 476 | /* Any bridge which does NOT route MSI transactions from it's |
| 477 | * secondary bus to it's primary bus must set NO_MSI flag on |
| 478 | * the secondary pci_bus. |
| 479 | * We expect only arch-specific PCI host bus controller driver |
| 480 | * or quirks for specific PCI bridges to be setting NO_MSI. |
| 481 | */ |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 482 | for (bus = dev->bus; bus; bus = bus->parent) |
| 483 | if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI) |
| 484 | return -EINVAL; |
| 485 | |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 486 | ret = arch_msi_check_device(dev, nvec, type); |
| 487 | if (ret) |
| 488 | return ret; |
| 489 | |
Michael Ellerman | b1e2303 | 2007-03-22 21:51:39 +1100 | [diff] [blame] | 490 | if (!pci_find_capability(dev, type)) |
| 491 | return -EINVAL; |
| 492 | |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 493 | return 0; |
| 494 | } |
| 495 | |
| 496 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 497 | * pci_enable_msi - configure device's MSI capability structure |
| 498 | * @dev: pointer to the pci_dev data structure of MSI device function |
| 499 | * |
| 500 | * Setup the MSI capability structure of device function with |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 501 | * a single MSI irq upon its software driver call to request for |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 502 | * MSI mode enabled on its hardware device function. A return of zero |
| 503 | * indicates the successful setup of an entry zero with the new MSI |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 504 | * irq or non-zero for otherwise. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 505 | **/ |
| 506 | int pci_enable_msi(struct pci_dev* dev) |
| 507 | { |
Michael Ellerman | b1e2303 | 2007-03-22 21:51:39 +1100 | [diff] [blame] | 508 | int status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 509 | |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 510 | status = pci_msi_check_device(dev, 1, PCI_CAP_ID_MSI); |
| 511 | if (status) |
| 512 | return status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 513 | |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 514 | WARN_ON(!!dev->msi_enabled); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 515 | |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 516 | /* Check whether driver already requested for MSI-X irqs */ |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 517 | if (dev->msix_enabled) { |
| 518 | printk(KERN_INFO "PCI: %s: Can't enable MSI. " |
| 519 | "Device already has MSI-X enabled\n", |
| 520 | pci_name(dev)); |
| 521 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 522 | } |
| 523 | status = msi_capability_init(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 524 | return status; |
| 525 | } |
Michael Ellerman | 4cc086f | 2007-03-22 21:51:34 +1100 | [diff] [blame] | 526 | EXPORT_SYMBOL(pci_enable_msi); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 527 | |
| 528 | void pci_disable_msi(struct pci_dev* dev) |
| 529 | { |
| 530 | struct msi_desc *entry; |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 531 | int default_irq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 532 | |
Michael Ellerman | 128bc5f | 2007-03-22 21:51:39 +1100 | [diff] [blame] | 533 | if (!pci_msi_enable || !dev || !dev->msi_enabled) |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 534 | return; |
| 535 | |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 536 | msi_set_enable(dev, 0); |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 537 | pci_intx_for_msi(dev, 1); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 538 | dev->msi_enabled = 0; |
Eric W. Biederman | 7bd007e | 2006-10-04 02:16:31 -0700 | [diff] [blame] | 539 | |
Michael Ellerman | 314e77b | 2007-04-05 17:19:12 +1000 | [diff] [blame] | 540 | BUG_ON(list_empty(&dev->msi_list)); |
| 541 | entry = list_entry(dev->msi_list.next, struct msi_desc, list); |
| 542 | if (!entry->dev || entry->msi_attrib.type != PCI_CAP_ID_MSI) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 543 | return; |
| 544 | } |
Eric W. Biederman | 7bd007e | 2006-10-04 02:16:31 -0700 | [diff] [blame] | 545 | |
Michael Ellerman | e387b9e | 2007-03-22 21:51:27 +1100 | [diff] [blame] | 546 | default_irq = entry->msi_attrib.default_irq; |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 547 | msi_free_irqs(dev); |
Michael Ellerman | e387b9e | 2007-03-22 21:51:27 +1100 | [diff] [blame] | 548 | |
| 549 | /* Restore dev->irq to its default pin-assertion irq */ |
| 550 | dev->irq = default_irq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 551 | } |
Michael Ellerman | 4cc086f | 2007-03-22 21:51:34 +1100 | [diff] [blame] | 552 | EXPORT_SYMBOL(pci_disable_msi); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 553 | |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 554 | static int msi_free_irqs(struct pci_dev* dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 555 | { |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 556 | struct msi_desc *entry, *tmp; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 557 | |
David Miller | b3b7cc7 | 2007-05-11 13:26:44 -0700 | [diff] [blame] | 558 | list_for_each_entry(entry, &dev->msi_list, list) { |
| 559 | if (entry->irq) |
| 560 | BUG_ON(irq_has_action(entry->irq)); |
| 561 | } |
Michael Ellerman | 7ede9c1 | 2007-03-22 21:51:34 +1100 | [diff] [blame] | 562 | |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 563 | arch_teardown_msi_irqs(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 564 | |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 565 | list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) { |
| 566 | if (entry->msi_attrib.type == PCI_CAP_ID_MSIX) { |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 567 | writel(1, entry->mask_base + entry->msi_attrib.entry_nr |
| 568 | * PCI_MSIX_ENTRY_SIZE |
| 569 | + PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET); |
Eric W. Biederman | 78b7611 | 2007-06-01 00:46:33 -0700 | [diff] [blame] | 570 | |
| 571 | if (list_is_last(&entry->list, &dev->msi_list)) |
| 572 | iounmap(entry->mask_base); |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 573 | } |
| 574 | list_del(&entry->list); |
| 575 | kfree(entry); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 576 | } |
| 577 | |
| 578 | return 0; |
| 579 | } |
| 580 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 581 | /** |
| 582 | * pci_enable_msix - configure device's MSI-X capability structure |
| 583 | * @dev: pointer to the pci_dev data structure of MSI-X device function |
Greg Kroah-Hartman | 70549ad | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 584 | * @entries: pointer to an array of MSI-X entries |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 585 | * @nvec: number of MSI-X irqs requested for allocation by device driver |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 586 | * |
| 587 | * Setup the MSI-X capability structure of device function with the number |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 588 | * of requested irqs upon its software driver call to request for |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 589 | * MSI-X mode enabled on its hardware device function. A return of zero |
| 590 | * indicates the successful configuration of MSI-X capability structure |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 591 | * with new allocated MSI-X irqs. A return of < 0 indicates a failure. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 592 | * Or a return of > 0 indicates that driver request is exceeding the number |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 593 | * of irqs available. Driver should use the returned value to re-send |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 594 | * its request. |
| 595 | **/ |
| 596 | int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec) |
| 597 | { |
Eric W. Biederman | 92db6d1 | 2006-10-04 02:16:35 -0700 | [diff] [blame] | 598 | int status, pos, nr_entries; |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 599 | int i, j; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 600 | u16 control; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 601 | |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 602 | if (!entries) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 603 | return -EINVAL; |
| 604 | |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 605 | status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSIX); |
| 606 | if (status) |
| 607 | return status; |
| 608 | |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 609 | pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 610 | pci_read_config_word(dev, msi_control_reg(pos), &control); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 611 | nr_entries = multi_msix_capable(control); |
| 612 | if (nvec > nr_entries) |
| 613 | return -EINVAL; |
| 614 | |
| 615 | /* Check for any invalid entries */ |
| 616 | for (i = 0; i < nvec; i++) { |
| 617 | if (entries[i].entry >= nr_entries) |
| 618 | return -EINVAL; /* invalid entry */ |
| 619 | for (j = i + 1; j < nvec; j++) { |
| 620 | if (entries[i].entry == entries[j].entry) |
| 621 | return -EINVAL; /* duplicate entry */ |
| 622 | } |
| 623 | } |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 624 | WARN_ON(!!dev->msix_enabled); |
Eric W. Biederman | 7bd007e | 2006-10-04 02:16:31 -0700 | [diff] [blame] | 625 | |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 626 | /* Check whether driver already requested for MSI irq */ |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 627 | if (dev->msi_enabled) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 628 | printk(KERN_INFO "PCI: %s: Can't enable MSI-X. " |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 629 | "Device already has an MSI irq assigned\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 630 | pci_name(dev)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 631 | return -EINVAL; |
| 632 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 633 | status = msix_capability_init(dev, entries, nvec); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 634 | return status; |
| 635 | } |
Michael Ellerman | 4cc086f | 2007-03-22 21:51:34 +1100 | [diff] [blame] | 636 | EXPORT_SYMBOL(pci_enable_msix); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 637 | |
Michael Ellerman | fc4afc7 | 2007-03-22 21:51:33 +1100 | [diff] [blame] | 638 | static void msix_free_all_irqs(struct pci_dev *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 639 | { |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 640 | msi_free_irqs(dev); |
Michael Ellerman | fc4afc7 | 2007-03-22 21:51:33 +1100 | [diff] [blame] | 641 | } |
| 642 | |
| 643 | void pci_disable_msix(struct pci_dev* dev) |
| 644 | { |
Michael Ellerman | 128bc5f | 2007-03-22 21:51:39 +1100 | [diff] [blame] | 645 | if (!pci_msi_enable || !dev || !dev->msix_enabled) |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 646 | return; |
| 647 | |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 648 | msix_set_enable(dev, 0); |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 649 | pci_intx_for_msi(dev, 1); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 650 | dev->msix_enabled = 0; |
Eric W. Biederman | 7bd007e | 2006-10-04 02:16:31 -0700 | [diff] [blame] | 651 | |
Michael Ellerman | fc4afc7 | 2007-03-22 21:51:33 +1100 | [diff] [blame] | 652 | msix_free_all_irqs(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 653 | } |
Michael Ellerman | 4cc086f | 2007-03-22 21:51:34 +1100 | [diff] [blame] | 654 | EXPORT_SYMBOL(pci_disable_msix); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 655 | |
| 656 | /** |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 657 | * msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 658 | * @dev: pointer to the pci_dev data structure of MSI(X) device function |
| 659 | * |
Steven Cole | eaae4b3 | 2005-05-03 18:38:30 -0600 | [diff] [blame] | 660 | * Being called during hotplug remove, from which the device function |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 661 | * is hot-removed. All previous assigned MSI/MSI-X irqs, if |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 662 | * allocated for this device function, are reclaimed to unused state, |
| 663 | * which may be used later on. |
| 664 | **/ |
| 665 | void msi_remove_pci_irq_vectors(struct pci_dev* dev) |
| 666 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 667 | if (!pci_msi_enable || !dev) |
| 668 | return; |
| 669 | |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 670 | if (dev->msi_enabled) |
| 671 | msi_free_irqs(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 672 | |
Michael Ellerman | fc4afc7 | 2007-03-22 21:51:33 +1100 | [diff] [blame] | 673 | if (dev->msix_enabled) |
| 674 | msix_free_all_irqs(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 675 | } |
| 676 | |
Matthew Wilcox | 309e57d | 2006-03-05 22:33:34 -0700 | [diff] [blame] | 677 | void pci_no_msi(void) |
| 678 | { |
| 679 | pci_msi_enable = 0; |
| 680 | } |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 681 | |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 682 | void pci_msi_init_pci_dev(struct pci_dev *dev) |
| 683 | { |
| 684 | INIT_LIST_HEAD(&dev->msi_list); |
| 685 | } |
| 686 | |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 687 | |
| 688 | /* Arch hooks */ |
| 689 | |
| 690 | int __attribute__ ((weak)) |
| 691 | arch_msi_check_device(struct pci_dev* dev, int nvec, int type) |
| 692 | { |
| 693 | return 0; |
| 694 | } |
| 695 | |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 696 | int __attribute__ ((weak)) |
| 697 | arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *entry) |
| 698 | { |
| 699 | return 0; |
| 700 | } |
| 701 | |
| 702 | int __attribute__ ((weak)) |
| 703 | arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) |
| 704 | { |
| 705 | struct msi_desc *entry; |
| 706 | int ret; |
| 707 | |
| 708 | list_for_each_entry(entry, &dev->msi_list, list) { |
| 709 | ret = arch_setup_msi_irq(dev, entry); |
| 710 | if (ret) |
| 711 | return ret; |
| 712 | } |
| 713 | |
| 714 | return 0; |
| 715 | } |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 716 | |
| 717 | void __attribute__ ((weak)) arch_teardown_msi_irq(unsigned int irq) |
| 718 | { |
| 719 | return; |
| 720 | } |
| 721 | |
| 722 | void __attribute__ ((weak)) |
| 723 | arch_teardown_msi_irqs(struct pci_dev *dev) |
| 724 | { |
| 725 | struct msi_desc *entry; |
| 726 | |
| 727 | list_for_each_entry(entry, &dev->msi_list, list) { |
| 728 | if (entry->irq != 0) |
| 729 | arch_teardown_msi_irq(entry->irq); |
| 730 | } |
| 731 | } |