blob: f703d398a0cbf1dc35337e6f36f7a09488406091 [file] [log] [blame]
Stepan Moskovchenko39236d72011-11-30 17:42:23 -08001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/irq.h>
17#include <linux/i2c.h>
18#include <linux/i2c/sx150x.h>
19#include <linux/i2c/isl9519.h>
20#include <linux/gpio.h>
21#include <linux/msm_ssbi.h>
22#include <linux/regulator/gpio-regulator.h>
23#include <linux/mfd/pm8xxx/pm8921.h>
24#include <linux/mfd/pm8xxx/pm8xxx-adc.h>
25#include <linux/regulator/consumer.h>
26#include <linux/spi/spi.h>
27#include <linux/slimbus/slimbus.h>
28#include <linux/bootmem.h>
29#include <linux/msm_kgsl.h>
30#ifdef CONFIG_ANDROID_PMEM
31#include <linux/android_pmem.h>
32#endif
33#include <linux/cyttsp.h>
34#include <linux/dma-mapping.h>
35#include <linux/platform_data/qcom_crypto_device.h>
36#include <linux/platform_data/qcom_wcnss_device.h>
37#include <linux/leds.h>
38#include <linux/leds-pm8xxx.h>
39#include <linux/i2c/atmel_mxt_ts.h>
40#include <linux/msm_tsens.h>
41#include <linux/ks8851.h>
42#include <linux/i2c/isa1200.h>
43
44#include <asm/mach-types.h>
45#include <asm/mach/arch.h>
46#include <asm/setup.h>
47#include <asm/hardware/gic.h>
48#include <asm/mach/mmc.h>
49
50#include <mach/board.h>
51#include <mach/msm_iomap.h>
52#include <mach/msm_spi.h>
53#ifdef CONFIG_USB_MSM_OTG_72K
54#include <mach/msm_hsusb.h>
55#else
56#include <linux/usb/msm_hsusb.h>
57#endif
58#include <linux/usb/android.h>
59#include <mach/usbdiag.h>
60#include <mach/socinfo.h>
61#include <mach/rpm.h>
62#include <mach/gpio.h>
63#include <mach/gpiomux.h>
64#include <mach/msm_bus_board.h>
65#include <mach/msm_memtypes.h>
66#include <mach/dma.h>
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080067#include <mach/msm_xo.h>
68#include <mach/restart.h>
69
70#ifdef CONFIG_WCD9310_CODEC
71#include <linux/slimbus/slimbus.h>
72#include <linux/mfd/wcd9310/core.h>
73#include <linux/mfd/wcd9310/pdata.h>
74#endif
75
76#include <linux/ion.h>
77#include <mach/ion.h>
78#include <mach/mdm2.h>
79
80#include "timer.h"
81#include "devices.h"
82#include "devices-msm8x60.h"
83#include "spm.h"
84#include "board-msm8930.h"
85#include "pm.h"
86#include "cpuidle.h"
87#include "rpm_resources.h"
88#include "mpm.h"
89#include "acpuclock.h"
90#include "rpm_log.h"
91#include "smd_private.h"
92#include "pm-boot.h"
93#include "msm_watchdog.h"
94
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080095static struct platform_device msm_fm_platform_init = {
96 .name = "iris_fm",
97 .id = -1,
98};
99
100#define KS8851_RST_GPIO 89
101#define KS8851_IRQ_GPIO 90
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800102#define HAP_SHIFT_LVL_OE_GPIO 47
103
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800104#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
105
106struct sx150x_platform_data msm8930_sx150x_data[] = {
107 [SX150X_CAM] = {
108 .gpio_base = GPIO_CAM_EXPANDER_BASE,
109 .oscio_is_gpo = false,
110 .io_pullup_ena = 0x0,
111 .io_pulldn_ena = 0xc0,
112 .io_open_drain_ena = 0x0,
113 .irq_summary = -1,
114 },
115};
116
117#endif
118
119#define MSM_PMEM_ADSP_SIZE 0x3800000
120#define MSM_PMEM_AUDIO_SIZE 0x28B000
121#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
122#define MSM_PMEM_SIZE 0x4000000 /* 64 Mbytes */
123#else
124#define MSM_PMEM_SIZE 0x1C00000 /* 28 Mbytes */
125#endif
126
127
128#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
129#define MSM_PMEM_KERNEL_EBI1_SIZE 0xB0C000
130#define MSM_ION_EBI_SIZE (MSM_PMEM_SIZE + 0x600000)
131#define MSM_ION_ADSP_SIZE MSM_PMEM_ADSP_SIZE
132#define MSM_ION_HEAP_NUM 4
133#else
134#define MSM_PMEM_KERNEL_EBI1_SIZE 0x110C000
135#define MSM_ION_HEAP_NUM 2
136#endif
137
138#ifdef CONFIG_KERNEL_PMEM_EBI_REGION
139static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
140static int __init pmem_kernel_ebi1_size_setup(char *p)
141{
142 pmem_kernel_ebi1_size = memparse(p, NULL);
143 return 0;
144}
145early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
146#endif
147
148#ifdef CONFIG_ANDROID_PMEM
149static unsigned pmem_size = MSM_PMEM_SIZE;
150static int __init pmem_size_setup(char *p)
151{
152 pmem_size = memparse(p, NULL);
153 return 0;
154}
155early_param("pmem_size", pmem_size_setup);
156
157static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
158
159static int __init pmem_adsp_size_setup(char *p)
160{
161 pmem_adsp_size = memparse(p, NULL);
162 return 0;
163}
164early_param("pmem_adsp_size", pmem_adsp_size_setup);
165
166static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
167
168static int __init pmem_audio_size_setup(char *p)
169{
170 pmem_audio_size = memparse(p, NULL);
171 return 0;
172}
173early_param("pmem_audio_size", pmem_audio_size_setup);
174#endif
175
176#ifdef CONFIG_ANDROID_PMEM
177#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
178static struct android_pmem_platform_data android_pmem_pdata = {
179 .name = "pmem",
180 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
181 .cached = 1,
182 .memory_type = MEMTYPE_EBI1,
183};
184
185static struct platform_device android_pmem_device = {
186 .name = "android_pmem",
187 .id = 0,
188 .dev = {.platform_data = &android_pmem_pdata},
189};
190
191static struct android_pmem_platform_data android_pmem_adsp_pdata = {
192 .name = "pmem_adsp",
193 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
194 .cached = 0,
195 .memory_type = MEMTYPE_EBI1,
196};
197static struct platform_device android_pmem_adsp_device = {
198 .name = "android_pmem",
199 .id = 2,
200 .dev = { .platform_data = &android_pmem_adsp_pdata },
201};
202#endif
203
204static struct android_pmem_platform_data android_pmem_audio_pdata = {
205 .name = "pmem_audio",
206 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
207 .cached = 0,
208 .memory_type = MEMTYPE_EBI1,
209};
210
211static struct platform_device android_pmem_audio_device = {
212 .name = "android_pmem",
213 .id = 4,
214 .dev = { .platform_data = &android_pmem_audio_pdata },
215};
216#endif
217
218#define DSP_RAM_BASE_8960 0x8da00000
219#define DSP_RAM_SIZE_8960 0x1800000
220static int dspcrashd_pdata_8960 = 0xDEADDEAD;
221
222static struct resource resources_dspcrashd_8960[] = {
223 {
224 .name = "msm_dspcrashd",
225 .start = DSP_RAM_BASE_8960,
226 .end = DSP_RAM_BASE_8960 + DSP_RAM_SIZE_8960,
227 .flags = IORESOURCE_DMA,
228 },
229};
230
231static struct platform_device msm_device_dspcrashd_8960 = {
232 .name = "msm_dspcrashd",
233 .num_resources = ARRAY_SIZE(resources_dspcrashd_8960),
234 .resource = resources_dspcrashd_8960,
235 .dev = { .platform_data = &dspcrashd_pdata_8960 },
236};
237
238static struct memtype_reserve msm8930_reserve_table[] __initdata = {
239 [MEMTYPE_SMI] = {
240 },
241 [MEMTYPE_EBI0] = {
242 .flags = MEMTYPE_FLAGS_1M_ALIGN,
243 },
244 [MEMTYPE_EBI1] = {
245 .flags = MEMTYPE_FLAGS_1M_ALIGN,
246 },
247};
248
249static void __init size_pmem_devices(void)
250{
251#ifdef CONFIG_ANDROID_PMEM
252#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
253 android_pmem_adsp_pdata.size = pmem_adsp_size;
254 android_pmem_pdata.size = pmem_size;
255#endif
256 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
257#endif
258}
259
260static void __init reserve_memory_for(struct android_pmem_platform_data *p)
261{
262 msm8930_reserve_table[p->memory_type].size += p->size;
263}
264
265static void __init reserve_pmem_memory(void)
266{
267#ifdef CONFIG_ANDROID_PMEM
268#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
269 reserve_memory_for(&android_pmem_adsp_pdata);
270 reserve_memory_for(&android_pmem_pdata);
271#endif
272 reserve_memory_for(&android_pmem_audio_pdata);
273 msm8930_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
274#endif
275}
276
277static int msm8930_paddr_to_memtype(unsigned int paddr)
278{
279 return MEMTYPE_EBI1;
280}
281
282#ifdef CONFIG_ION_MSM
283static struct ion_platform_data ion_pdata = {
284 .nr = MSM_ION_HEAP_NUM,
285 .heaps = {
286 {
287 .id = ION_HEAP_SYSTEM_ID,
288 .type = ION_HEAP_TYPE_SYSTEM,
289 .name = ION_KMALLOC_HEAP_NAME,
290 },
291 {
292 .id = ION_HEAP_SYSTEM_CONTIG_ID,
293 .type = ION_HEAP_TYPE_SYSTEM_CONTIG,
294 .name = ION_VMALLOC_HEAP_NAME,
295 },
296#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
297 {
298 .id = ION_HEAP_EBI_ID,
299 .type = ION_HEAP_TYPE_CARVEOUT,
300 .name = ION_EBI1_HEAP_NAME,
301 .size = MSM_ION_EBI_SIZE,
302 .memory_type = ION_EBI_TYPE,
303 },
304 {
305 .id = ION_HEAP_ADSP_ID,
306 .type = ION_HEAP_TYPE_CARVEOUT,
307 .name = ION_ADSP_HEAP_NAME,
308 .size = MSM_ION_ADSP_SIZE,
309 .memory_type = ION_EBI_TYPE,
310 },
311#endif
312 }
313};
314
315static struct platform_device ion_dev = {
316 .name = "ion-msm",
317 .id = 1,
318 .dev = { .platform_data = &ion_pdata },
319};
320#endif
321
322static void reserve_ion_memory(void)
323{
324#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
325 msm8930_reserve_table[MEMTYPE_EBI1].size += MSM_ION_EBI_SIZE;
326 msm8930_reserve_table[MEMTYPE_EBI1].size += MSM_ION_ADSP_SIZE;
327#endif
328}
329static void __init msm8930_calculate_reserve_sizes(void)
330{
331 size_pmem_devices();
332 reserve_pmem_memory();
333 reserve_ion_memory();
334}
335
336static struct reserve_info msm8930_reserve_info __initdata = {
337 .memtype_reserve_table = msm8930_reserve_table,
338 .calculate_reserve_sizes = msm8930_calculate_reserve_sizes,
339 .paddr_to_memtype = msm8930_paddr_to_memtype,
340};
341
342static int msm8930_memory_bank_size(void)
343{
344 return 1<<29;
345}
346
347static void __init locate_unstable_memory(void)
348{
349 struct membank *mb = &meminfo.bank[meminfo.nr_banks - 1];
350 unsigned long bank_size;
351 unsigned long low, high;
352
353 bank_size = msm8930_memory_bank_size();
354 low = meminfo.bank[0].start;
355 high = mb->start + mb->size;
356
357 /* Check if 32 bit overflow occured */
358 if (high < mb->start)
359 high = ~0UL;
360
361 low &= ~(bank_size - 1);
362
363 if (high - low <= bank_size)
364 return;
365 msm8930_reserve_info.low_unstable_address = low + bank_size;
366 /* To avoid overflow of u32 compute max_unstable_size
367 * by first subtracting low from mb->start)
368 * */
369 msm8930_reserve_info.max_unstable_size = (mb->start - low) +
370 mb->size - bank_size;
371
372 msm8930_reserve_info.bank_size = bank_size;
373 pr_info("low unstable address %lx max size %lx bank size %lx\n",
374 msm8930_reserve_info.low_unstable_address,
375 msm8930_reserve_info.max_unstable_size,
376 msm8930_reserve_info.bank_size);
377}
378
379static void __init place_movable_zone(void)
380{
381 movable_reserved_start = msm8930_reserve_info.low_unstable_address;
382 movable_reserved_size = msm8930_reserve_info.max_unstable_size;
383 pr_info("movable zone start %lx size %lx\n",
384 movable_reserved_start, movable_reserved_size);
385}
386
387static void __init msm8930_early_memory(void)
388{
389 reserve_info = &msm8930_reserve_info;
390 locate_unstable_memory();
391 place_movable_zone();
392}
393
394static void __init msm8930_reserve(void)
395{
396 msm_reserve();
397}
398
399static int msm8930_change_memory_power(u64 start, u64 size,
400 int change_type)
401{
402 return soc_change_memory_power(start, size, change_type);
403}
404
405static void __init msm8930_allocate_memory_regions(void)
406{
407 msm8930_allocate_fb_region();
408}
409
410#ifdef CONFIG_WCD9310_CODEC
411
412#define TABLA_INTERRUPT_BASE (NR_MSM_IRQS + NR_GPIO_IRQS + NR_PM8921_IRQS)
413
414/* Micbias setting is based on 8660 CDP/MTP/FLUID requirement
415 * 4 micbiases are used to power various analog and digital
416 * microphones operating at 1800 mV. Technically, all micbiases
417 * can source from single cfilter since all microphones operate
418 * at the same voltage level. The arrangement below is to make
419 * sure all cfilters are exercised. LDO_H regulator ouput level
420 * does not need to be as high as 2.85V. It is choosen for
421 * microphone sensitivity purpose.
422 */
423static struct tabla_pdata tabla_platform_data = {
424 .slimbus_slave_device = {
425 .name = "tabla-slave",
426 .e_addr = {0, 0, 0x10, 0, 0x17, 2},
427 },
428 .irq = MSM_GPIO_TO_INT(62),
429 .irq_base = TABLA_INTERRUPT_BASE,
430 .num_irqs = NR_TABLA_IRQS,
431 .reset_gpio = PM8921_GPIO_PM_TO_SYS(34),
432 .micbias = {
433 .ldoh_v = TABLA_LDOH_2P85_V,
434 .cfilt1_mv = 1800,
435 .cfilt2_mv = 1800,
436 .cfilt3_mv = 1800,
437 .bias1_cfilt_sel = TABLA_CFILT1_SEL,
438 .bias2_cfilt_sel = TABLA_CFILT2_SEL,
439 .bias3_cfilt_sel = TABLA_CFILT3_SEL,
440 .bias4_cfilt_sel = TABLA_CFILT3_SEL,
441 }
442};
443
444static struct slim_device msm_slim_tabla = {
445 .name = "tabla-slim",
446 .e_addr = {0, 1, 0x10, 0, 0x17, 2},
447 .dev = {
448 .platform_data = &tabla_platform_data,
449 },
450};
451
452static struct tabla_pdata tabla20_platform_data = {
453 .slimbus_slave_device = {
454 .name = "tabla-slave",
455 .e_addr = {0, 0, 0x60, 0, 0x17, 2},
456 },
457 .irq = MSM_GPIO_TO_INT(62),
458 .irq_base = TABLA_INTERRUPT_BASE,
459 .num_irqs = NR_TABLA_IRQS,
460 .reset_gpio = PM8921_GPIO_PM_TO_SYS(34),
461 .micbias = {
462 .ldoh_v = TABLA_LDOH_2P85_V,
463 .cfilt1_mv = 1800,
464 .cfilt2_mv = 1800,
465 .cfilt3_mv = 1800,
466 .bias1_cfilt_sel = TABLA_CFILT1_SEL,
467 .bias2_cfilt_sel = TABLA_CFILT2_SEL,
468 .bias3_cfilt_sel = TABLA_CFILT3_SEL,
469 .bias4_cfilt_sel = TABLA_CFILT3_SEL,
470 }
471};
472
473static struct slim_device msm_slim_tabla20 = {
474 .name = "tabla2x-slim",
475 .e_addr = {0, 1, 0x60, 0, 0x17, 2},
476 .dev = {
477 .platform_data = &tabla20_platform_data,
478 },
479};
480#endif
481
482static struct slim_boardinfo msm_slim_devices[] = {
483#ifdef CONFIG_WCD9310_CODEC
484 {
485 .bus_num = 1,
486 .slim_slave = &msm_slim_tabla,
487 },
488 {
489 .bus_num = 1,
490 .slim_slave = &msm_slim_tabla20,
491 },
492#endif
493 /* add more slimbus slaves as needed */
494};
495
496#define MSM_WCNSS_PHYS 0x03000000
497#define MSM_WCNSS_SIZE 0x280000
498
499static struct resource resources_wcnss_wlan[] = {
500 {
501 .start = RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ,
502 .end = RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ,
503 .name = "wcnss_wlanrx_irq",
504 .flags = IORESOURCE_IRQ,
505 },
506 {
507 .start = RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ,
508 .end = RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ,
509 .name = "wcnss_wlantx_irq",
510 .flags = IORESOURCE_IRQ,
511 },
512 {
513 .start = MSM_WCNSS_PHYS,
514 .end = MSM_WCNSS_PHYS + MSM_WCNSS_SIZE - 1,
515 .name = "wcnss_mmio",
516 .flags = IORESOURCE_MEM,
517 },
518 {
519 .start = 84,
520 .end = 88,
521 .name = "wcnss_gpios_5wire",
522 .flags = IORESOURCE_IO,
523 },
524};
525
526static struct qcom_wcnss_opts qcom_wcnss_pdata = {
527 .has_48mhz_xo = 1,
528};
529
530static struct platform_device msm_device_wcnss_wlan = {
531 .name = "wcnss_wlan",
532 .id = 0,
533 .num_resources = ARRAY_SIZE(resources_wcnss_wlan),
534 .resource = resources_wcnss_wlan,
535 .dev = {.platform_data = &qcom_wcnss_pdata},
536};
537
538#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
539 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
540 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
541 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
542
543#define QCE_SIZE 0x10000
544#define QCE_0_BASE 0x18500000
545
546#define QCE_HW_KEY_SUPPORT 0
547#define QCE_SHA_HMAC_SUPPORT 1
548#define QCE_SHARE_CE_RESOURCE 1
549#define QCE_CE_SHARED 0
550
551static struct resource qcrypto_resources[] = {
552 [0] = {
553 .start = QCE_0_BASE,
554 .end = QCE_0_BASE + QCE_SIZE - 1,
555 .flags = IORESOURCE_MEM,
556 },
557 [1] = {
558 .name = "crypto_channels",
559 .start = DMOV_CE_IN_CHAN,
560 .end = DMOV_CE_OUT_CHAN,
561 .flags = IORESOURCE_DMA,
562 },
563 [2] = {
564 .name = "crypto_crci_in",
565 .start = DMOV_CE_IN_CRCI,
566 .end = DMOV_CE_IN_CRCI,
567 .flags = IORESOURCE_DMA,
568 },
569 [3] = {
570 .name = "crypto_crci_out",
571 .start = DMOV_CE_OUT_CRCI,
572 .end = DMOV_CE_OUT_CRCI,
573 .flags = IORESOURCE_DMA,
574 },
575};
576
577static struct resource qcedev_resources[] = {
578 [0] = {
579 .start = QCE_0_BASE,
580 .end = QCE_0_BASE + QCE_SIZE - 1,
581 .flags = IORESOURCE_MEM,
582 },
583 [1] = {
584 .name = "crypto_channels",
585 .start = DMOV_CE_IN_CHAN,
586 .end = DMOV_CE_OUT_CHAN,
587 .flags = IORESOURCE_DMA,
588 },
589 [2] = {
590 .name = "crypto_crci_in",
591 .start = DMOV_CE_IN_CRCI,
592 .end = DMOV_CE_IN_CRCI,
593 .flags = IORESOURCE_DMA,
594 },
595 [3] = {
596 .name = "crypto_crci_out",
597 .start = DMOV_CE_OUT_CRCI,
598 .end = DMOV_CE_OUT_CRCI,
599 .flags = IORESOURCE_DMA,
600 },
601};
602
603#endif
604
605#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
606 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
607
608static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
609 .ce_shared = QCE_CE_SHARED,
610 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
611 .hw_key_support = QCE_HW_KEY_SUPPORT,
612 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
613};
614
615static struct platform_device qcrypto_device = {
616 .name = "qcrypto",
617 .id = 0,
618 .num_resources = ARRAY_SIZE(qcrypto_resources),
619 .resource = qcrypto_resources,
620 .dev = {
621 .coherent_dma_mask = DMA_BIT_MASK(32),
622 .platform_data = &qcrypto_ce_hw_suppport,
623 },
624};
625#endif
626
627#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
628 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
629
630static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
631 .ce_shared = QCE_CE_SHARED,
632 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
633 .hw_key_support = QCE_HW_KEY_SUPPORT,
634 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
635};
636
637static struct platform_device qcedev_device = {
638 .name = "qce",
639 .id = 0,
640 .num_resources = ARRAY_SIZE(qcedev_resources),
641 .resource = qcedev_resources,
642 .dev = {
643 .coherent_dma_mask = DMA_BIT_MASK(32),
644 .platform_data = &qcedev_ce_hw_suppport,
645 },
646};
647#endif
648
649#define MDM2AP_ERRFATAL 70
650#define AP2MDM_ERRFATAL 95
651#define MDM2AP_STATUS 69
652#define AP2MDM_STATUS 94
653#define AP2MDM_PMIC_RESET_N 80
654#define AP2MDM_KPDPWR_N 81
655
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800656static struct resource mdm_resources[] = {
657 {
658 .start = MDM2AP_ERRFATAL,
659 .end = MDM2AP_ERRFATAL,
660 .name = "MDM2AP_ERRFATAL",
661 .flags = IORESOURCE_IO,
662 },
663 {
664 .start = AP2MDM_ERRFATAL,
665 .end = AP2MDM_ERRFATAL,
666 .name = "AP2MDM_ERRFATAL",
667 .flags = IORESOURCE_IO,
668 },
669 {
670 .start = MDM2AP_STATUS,
671 .end = MDM2AP_STATUS,
672 .name = "MDM2AP_STATUS",
673 .flags = IORESOURCE_IO,
674 },
675 {
676 .start = AP2MDM_STATUS,
677 .end = AP2MDM_STATUS,
678 .name = "AP2MDM_STATUS",
679 .flags = IORESOURCE_IO,
680 },
681 {
682 .start = AP2MDM_PMIC_RESET_N,
683 .end = AP2MDM_PMIC_RESET_N,
684 .name = "AP2MDM_PMIC_RESET_N",
685 .flags = IORESOURCE_IO,
686 },
687 {
688 .start = AP2MDM_KPDPWR_N,
689 .end = AP2MDM_KPDPWR_N,
690 .name = "AP2MDM_KPDPWR_N",
691 .flags = IORESOURCE_IO,
692 },
693};
694
695static struct mdm_platform_data mdm_platform_data = {
696 .mdm_version = "2.5",
697};
698
699static struct platform_device mdm_device = {
700 .name = "mdm2_modem",
701 .id = -1,
702 .num_resources = ARRAY_SIZE(mdm_resources),
703 .resource = mdm_resources,
704 .dev = {
705 .platform_data = &mdm_platform_data,
706 },
707};
708
709static struct platform_device *mdm_devices[] __initdata = {
710 &mdm_device,
711};
712
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800713#define MSM_SHARED_RAM_PHYS 0x80000000
714
715static void __init msm8930_map_io(void)
716{
717 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
718 msm_map_msm8930_io();
719
720 if (socinfo_init() < 0)
721 pr_err("socinfo_init() failed!\n");
722}
723
724static void __init msm8930_init_irq(void)
725{
726 unsigned int i;
727
728 msm_mpm_irq_extn_init();
729 gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
730 (void *)MSM_QGIC_CPU_BASE);
731
732 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
733 writel_relaxed(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
734
735 writel_relaxed(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
736 mb();
737
738 /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
739 * as they are configured as level, which does not play nice with
740 * handle_percpu_irq.
741 */
742 for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
743 if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
744 irq_set_handler(i, handle_percpu_irq);
745 }
746}
747
748static void __init msm8930_init_buses(void)
749{
750#ifdef CONFIG_MSM_BUS_SCALING
751 msm_bus_rpm_set_mt_mask();
752 msm_bus_8960_apps_fabric_pdata.rpm_enabled = 1;
753 msm_bus_8960_sys_fabric_pdata.rpm_enabled = 1;
754 msm_bus_8960_mm_fabric_pdata.rpm_enabled = 1;
755 msm_bus_apps_fabric.dev.platform_data =
756 &msm_bus_8960_apps_fabric_pdata;
757 msm_bus_sys_fabric.dev.platform_data = &msm_bus_8960_sys_fabric_pdata;
758 msm_bus_mm_fabric.dev.platform_data = &msm_bus_8960_mm_fabric_pdata;
759 msm_bus_sys_fpb.dev.platform_data = &msm_bus_8960_sys_fpb_pdata;
760 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_8960_cpss_fpb_pdata;
761#endif
762}
763
764static struct msm_spi_platform_data msm8960_qup_spi_gsbi1_pdata = {
765 .max_clock_speed = 15060000,
766};
767
768#ifdef CONFIG_USB_MSM_OTG_72K
769static struct msm_otg_platform_data msm_otg_pdata;
770#else
771#define USB_5V_EN 42
772static void msm_hsusb_vbus_power(bool on)
773{
774 int rc;
775 static bool vbus_is_on;
776 static struct regulator *mvs_otg_switch;
777
778 if (vbus_is_on == on)
779 return;
780
781 if (on) {
782 mvs_otg_switch = regulator_get(&msm8960_device_otg.dev,
783 "vbus_otg");
784 if (IS_ERR(mvs_otg_switch)) {
785 pr_err("Unable to get mvs_otg_switch\n");
786 return;
787 }
788
789 rc = gpio_request(PM8921_GPIO_PM_TO_SYS(USB_5V_EN),
790 "usb_5v_en");
791 if (rc < 0) {
792 pr_err("failed to request usb_5v_en gpio\n");
793 goto put_mvs_otg;
794 }
795
796 rc = gpio_direction_output(PM8921_GPIO_PM_TO_SYS(USB_5V_EN), 1);
797 if (rc) {
798 pr_err("%s: unable to set_direction for gpio [%d]\n",
799 __func__, PM8921_GPIO_PM_TO_SYS(USB_5V_EN));
800 goto free_usb_5v_en;
801 }
802
803 if (regulator_enable(mvs_otg_switch)) {
804 pr_err("unable to enable mvs_otg_switch\n");
805 goto err_ldo_gpio_set_dir;
806 }
807
808 vbus_is_on = true;
809 return;
810 }
811 regulator_disable(mvs_otg_switch);
812err_ldo_gpio_set_dir:
813 gpio_set_value(PM8921_GPIO_PM_TO_SYS(USB_5V_EN), 0);
814free_usb_5v_en:
815 gpio_free(PM8921_GPIO_PM_TO_SYS(USB_5V_EN));
816put_mvs_otg:
817 regulator_put(mvs_otg_switch);
818 vbus_is_on = false;
819}
820
821static struct msm_otg_platform_data msm_otg_pdata = {
822 .mode = USB_OTG,
823 .otg_control = OTG_PMIC_CONTROL,
824 .phy_type = SNPS_28NM_INTEGRATED_PHY,
825 .pclk_src_name = "dfab_usb_hs_clk",
826 .pmic_id_irq = PM8921_USB_ID_IN_IRQ(PM8921_IRQ_BASE),
827 .vbus_power = msm_hsusb_vbus_power,
828 .power_budget = 750,
829};
830#endif
831
832#ifdef CONFIG_USB_EHCI_MSM_HSIC
833#define HSIC_HUB_RESET_GPIO 91
834static struct msm_hsic_host_platform_data msm_hsic_pdata = {
835 .strobe = 150,
836 .data = 151,
837};
838#else
839static struct msm_hsic_host_platform_data msm_hsic_pdata;
840#endif
841
842#define PID_MAGIC_ID 0x71432909
843#define SERIAL_NUM_MAGIC_ID 0x61945374
844#define SERIAL_NUMBER_LENGTH 127
845#define DLOAD_USB_BASE_ADD 0x2A03F0C8
846
847struct magic_num_struct {
848 uint32_t pid;
849 uint32_t serial_num;
850};
851
852struct dload_struct {
853 uint32_t reserved1;
854 uint32_t reserved2;
855 uint32_t reserved3;
856 uint16_t reserved4;
857 uint16_t pid;
858 char serial_number[SERIAL_NUMBER_LENGTH];
859 uint16_t reserved5;
860 struct magic_num_struct magic_struct;
861};
862
863static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
864{
865 struct dload_struct __iomem *dload = 0;
866
867 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
868 if (!dload) {
869 pr_err("%s: cannot remap I/O memory region: %08x\n",
870 __func__, DLOAD_USB_BASE_ADD);
871 return -ENXIO;
872 }
873
874 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
875 __func__, dload, pid, snum);
876 /* update pid */
877 dload->magic_struct.pid = PID_MAGIC_ID;
878 dload->pid = pid;
879
880 /* update serial number */
881 dload->magic_struct.serial_num = 0;
882 if (!snum) {
883 memset(dload->serial_number, 0, SERIAL_NUMBER_LENGTH);
884 goto out;
885 }
886
887 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
888 strlcpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
889out:
890 iounmap(dload);
891 return 0;
892}
893
894static struct android_usb_platform_data android_usb_pdata = {
895 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
896};
897
898static struct platform_device android_usb_device = {
899 .name = "android_usb",
900 .id = -1,
901 .dev = {
902 .platform_data = &android_usb_pdata,
903 },
904};
905
906static uint8_t spm_wfi_cmd_sequence[] __initdata = {
907 0x03, 0x0f,
908};
909
910static uint8_t spm_power_collapse_without_rpm[] __initdata = {
911 0x00, 0x24, 0x54, 0x10,
912 0x09, 0x03, 0x01,
913 0x10, 0x54, 0x30, 0x0C,
914 0x24, 0x30, 0x0f,
915};
916
917static uint8_t spm_power_collapse_with_rpm[] __initdata = {
918 0x00, 0x24, 0x54, 0x10,
919 0x09, 0x07, 0x01, 0x0B,
920 0x10, 0x54, 0x30, 0x0C,
921 0x24, 0x30, 0x0f,
922};
923
924static struct msm_spm_seq_entry msm_spm_seq_list[] __initdata = {
925 [0] = {
926 .mode = MSM_SPM_MODE_CLOCK_GATING,
927 .notify_rpm = false,
928 .cmd = spm_wfi_cmd_sequence,
929 },
930 [1] = {
931 .mode = MSM_SPM_MODE_POWER_COLLAPSE,
932 .notify_rpm = false,
933 .cmd = spm_power_collapse_without_rpm,
934 },
935 [2] = {
936 .mode = MSM_SPM_MODE_POWER_COLLAPSE,
937 .notify_rpm = true,
938 .cmd = spm_power_collapse_with_rpm,
939 },
940};
941
942static struct msm_spm_platform_data msm_spm_data[] __initdata = {
943 [0] = {
944 .reg_base_addr = MSM_SAW0_BASE,
945 .reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
946 .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F,
947 .reg_init_values[MSM_SPM_REG_SAW2_VCTL] = 0x9C,
948#if defined(CONFIG_MSM_AVS_HW)
949 .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00,
950 .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
951#endif
952 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
953 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
954 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
955 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
956 .vctl_timeout_us = 50,
957 .num_modes = ARRAY_SIZE(msm_spm_seq_list),
958 .modes = msm_spm_seq_list,
959 },
960 [1] = {
961 .reg_base_addr = MSM_SAW1_BASE,
962 .reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
963 .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F,
964 .reg_init_values[MSM_SPM_REG_SAW2_VCTL] = 0x9C,
965#if defined(CONFIG_MSM_AVS_HW)
966 .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00,
967 .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
968#endif
969 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
970 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
971 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
972 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
973 .vctl_timeout_us = 50,
974 .num_modes = ARRAY_SIZE(msm_spm_seq_list),
975 .modes = msm_spm_seq_list,
976 },
977};
978
979static uint8_t l2_spm_wfi_cmd_sequence[] __initdata = {
980 0x00, 0x20, 0x03, 0x20,
981 0x00, 0x0f,
982};
983
984static uint8_t l2_spm_gdhs_cmd_sequence[] __initdata = {
985 0x00, 0x20, 0x34, 0x64,
986 0x48, 0x07, 0x48, 0x20,
987 0x50, 0x64, 0x04, 0x34,
988 0x50, 0x0f,
989};
990static uint8_t l2_spm_power_off_cmd_sequence[] __initdata = {
991 0x00, 0x10, 0x34, 0x64,
992 0x48, 0x07, 0x48, 0x10,
993 0x50, 0x64, 0x04, 0x34,
994 0x50, 0x0F,
995};
996
997static struct msm_spm_seq_entry msm_spm_l2_seq_list[] __initdata = {
998 [0] = {
999 .mode = MSM_SPM_L2_MODE_RETENTION,
1000 .notify_rpm = false,
1001 .cmd = l2_spm_wfi_cmd_sequence,
1002 },
1003 [1] = {
1004 .mode = MSM_SPM_L2_MODE_GDHS,
1005 .notify_rpm = true,
1006 .cmd = l2_spm_gdhs_cmd_sequence,
1007 },
1008 [2] = {
1009 .mode = MSM_SPM_L2_MODE_POWER_COLLAPSE,
1010 .notify_rpm = true,
1011 .cmd = l2_spm_power_off_cmd_sequence,
1012 },
1013};
1014
1015static struct msm_spm_platform_data msm_spm_l2_data[] __initdata = {
1016 [0] = {
1017 .reg_base_addr = MSM_SAW_L2_BASE,
1018 .reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
1019 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x00,
1020 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
1021 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x00A000AE,
1022 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x00A00020,
1023 .modes = msm_spm_l2_seq_list,
1024 .num_modes = ARRAY_SIZE(msm_spm_l2_seq_list),
1025 },
1026};
1027
1028#define PM_HAP_EN_GPIO PM8921_GPIO_PM_TO_SYS(33)
1029#define PM_HAP_LEN_GPIO PM8921_GPIO_PM_TO_SYS(20)
1030
1031static struct msm_xo_voter *xo_handle_d1;
1032
1033static int isa1200_power(int on)
1034{
1035 int rc = 0;
1036
1037 gpio_set_value(HAP_SHIFT_LVL_OE_GPIO, !!on);
1038
1039 rc = on ? msm_xo_mode_vote(xo_handle_d1, MSM_XO_MODE_ON) :
1040 msm_xo_mode_vote(xo_handle_d1, MSM_XO_MODE_OFF);
1041 if (rc < 0) {
1042 pr_err("%s: failed to %svote for TCXO D1 buffer%d\n",
1043 __func__, on ? "" : "de-", rc);
1044 goto err_xo_vote;
1045 }
1046
1047 return 0;
1048
1049err_xo_vote:
1050 gpio_set_value(HAP_SHIFT_LVL_OE_GPIO, !on);
1051 return rc;
1052}
1053
1054static int isa1200_dev_setup(bool enable)
1055{
1056 int rc = 0;
1057
1058 struct pm_gpio hap_gpio_config = {
1059 .direction = PM_GPIO_DIR_OUT,
1060 .pull = PM_GPIO_PULL_NO,
1061 .out_strength = PM_GPIO_STRENGTH_HIGH,
1062 .function = PM_GPIO_FUNC_NORMAL,
1063 .inv_int_pol = 0,
1064 .vin_sel = 2,
1065 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
1066 .output_value = 0,
1067 };
1068
1069 if (enable == true) {
1070 rc = pm8xxx_gpio_config(PM_HAP_EN_GPIO, &hap_gpio_config);
1071 if (rc) {
1072 pr_err("%s: pm8921 gpio %d config failed(%d)\n",
1073 __func__, PM_HAP_EN_GPIO, rc);
1074 return rc;
1075 }
1076
1077 rc = pm8xxx_gpio_config(PM_HAP_LEN_GPIO, &hap_gpio_config);
1078 if (rc) {
1079 pr_err("%s: pm8921 gpio %d config failed(%d)\n",
1080 __func__, PM_HAP_LEN_GPIO, rc);
1081 return rc;
1082 }
1083
1084 rc = gpio_request(HAP_SHIFT_LVL_OE_GPIO, "hap_shft_lvl_oe");
1085 if (rc) {
1086 pr_err("%s: unable to request gpio %d (%d)\n",
1087 __func__, HAP_SHIFT_LVL_OE_GPIO, rc);
1088 return rc;
1089 }
1090
1091 rc = gpio_direction_output(HAP_SHIFT_LVL_OE_GPIO, 0);
1092 if (rc) {
1093 pr_err("%s: Unable to set direction\n", __func__);
1094 goto free_gpio;
1095 }
1096
1097 xo_handle_d1 = msm_xo_get(MSM_XO_TCXO_D1, "isa1200");
1098 if (IS_ERR(xo_handle_d1)) {
1099 rc = PTR_ERR(xo_handle_d1);
1100 pr_err("%s: failed to get the handle for D1(%d)\n",
1101 __func__, rc);
1102 goto gpio_set_dir;
1103 }
1104 } else {
1105 gpio_free(HAP_SHIFT_LVL_OE_GPIO);
1106
1107 msm_xo_put(xo_handle_d1);
1108 }
1109
1110 return 0;
1111
1112gpio_set_dir:
1113 gpio_set_value(HAP_SHIFT_LVL_OE_GPIO, 0);
1114free_gpio:
1115 gpio_free(HAP_SHIFT_LVL_OE_GPIO);
1116 return rc;
1117}
1118
1119static struct isa1200_regulator isa1200_reg_data[] = {
1120 {
1121 .name = "vcc_i2c",
1122 .min_uV = ISA_I2C_VTG_MIN_UV,
1123 .max_uV = ISA_I2C_VTG_MAX_UV,
1124 .load_uA = ISA_I2C_CURR_UA,
1125 },
1126};
1127
1128static struct isa1200_platform_data isa1200_1_pdata = {
1129 .name = "vibrator",
1130 .dev_setup = isa1200_dev_setup,
1131 .power_on = isa1200_power,
1132 .hap_en_gpio = PM_HAP_EN_GPIO,
1133 .hap_len_gpio = PM_HAP_LEN_GPIO,
1134 .max_timeout = 15000,
1135 .mode_ctrl = PWM_GEN_MODE,
1136 .pwm_fd = {
1137 .pwm_div = 256,
1138 },
1139 .is_erm = false,
1140 .smart_en = true,
1141 .ext_clk_en = true,
1142 .chip_en = 1,
1143 .regulator_info = isa1200_reg_data,
1144 .num_regulators = ARRAY_SIZE(isa1200_reg_data),
1145};
1146
1147static struct i2c_board_info msm_isa1200_board_info[] __initdata = {
1148 {
1149 I2C_BOARD_INFO("isa1200_1", 0x90>>1),
1150 .platform_data = &isa1200_1_pdata,
1151 },
1152};
1153
1154#define CYTTSP_TS_GPIO_IRQ 11
1155#define CYTTSP_TS_SLEEP_GPIO 50
1156#define CYTTSP_TS_RESOUT_N_GPIO 52
1157
1158/*virtual key support */
1159static ssize_t tma340_vkeys_show(struct kobject *kobj,
1160 struct kobj_attribute *attr, char *buf)
1161{
1162 return snprintf(buf, 200,
1163 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":73:1120:97:97"
1164 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":230:1120:97:97"
1165 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":389:1120:97:97"
1166 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":544:1120:97:97"
1167 "\n");
1168}
1169
1170static struct kobj_attribute tma340_vkeys_attr = {
1171 .attr = {
1172 .mode = S_IRUGO,
1173 },
1174 .show = &tma340_vkeys_show,
1175};
1176
1177static struct attribute *tma340_properties_attrs[] = {
1178 &tma340_vkeys_attr.attr,
1179 NULL
1180};
1181
1182static struct attribute_group tma340_properties_attr_group = {
1183 .attrs = tma340_properties_attrs,
1184};
1185
1186
1187static int cyttsp_platform_init(struct i2c_client *client)
1188{
1189 int rc = 0;
1190 static struct kobject *tma340_properties_kobj;
1191
1192 tma340_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
1193 tma340_properties_kobj = kobject_create_and_add("board_properties",
1194 NULL);
1195 if (tma340_properties_kobj)
1196 rc = sysfs_create_group(tma340_properties_kobj,
1197 &tma340_properties_attr_group);
1198 if (!tma340_properties_kobj || rc)
1199 pr_err("%s: failed to create board_properties\n",
1200 __func__);
1201
1202 return 0;
1203}
1204
1205static struct cyttsp_regulator regulator_data[] = {
1206 {
1207 .name = "vdd",
1208 .min_uV = CY_TMA300_VTG_MIN_UV,
1209 .max_uV = CY_TMA300_VTG_MAX_UV,
1210 .hpm_load_uA = CY_TMA300_CURR_24HZ_UA,
1211 .lpm_load_uA = CY_TMA300_SLEEP_CURR_UA,
1212 },
1213 /* TODO: Remove after runtime PM is enabled in I2C driver */
1214 {
1215 .name = "vcc_i2c",
1216 .min_uV = CY_I2C_VTG_MIN_UV,
1217 .max_uV = CY_I2C_VTG_MAX_UV,
1218 .hpm_load_uA = CY_I2C_CURR_UA,
1219 .lpm_load_uA = CY_I2C_SLEEP_CURR_UA,
1220 },
1221};
1222
1223static struct cyttsp_platform_data cyttsp_pdata = {
1224 .panel_maxx = 634,
1225 .panel_maxy = 1166,
1226 .disp_maxx = 616,
1227 .disp_maxy = 1023,
1228 .disp_minx = 0,
1229 .disp_miny = 16,
1230 .flags = 0x01,
1231 .gen = CY_GEN3, /* or */
1232 .use_st = CY_USE_ST,
1233 .use_mt = CY_USE_MT,
1234 .use_hndshk = CY_SEND_HNDSHK,
1235 .use_trk_id = CY_USE_TRACKING_ID,
1236 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
1237 .use_gestures = CY_USE_GESTURES,
1238 .fw_fname = "cyttsp_8960_cdp.hex",
1239 /* activate up to 4 groups
1240 * and set active distance
1241 */
1242 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
1243 CY_GEST_GRP3 | CY_GEST_GRP4 |
1244 CY_ACT_DIST,
1245 /* change act_intrvl to customize the Active power state
1246 * scanning/processing refresh interval for Operating mode
1247 */
1248 .act_intrvl = CY_ACT_INTRVL_DFLT,
1249 /* change tch_tmout to customize the touch timeout for the
1250 * Active power state for Operating mode
1251 */
1252 .tch_tmout = CY_TCH_TMOUT_DFLT,
1253 /* change lp_intrvl to customize the Low Power power state
1254 * scanning/processing refresh interval for Operating mode
1255 */
1256 .lp_intrvl = CY_LP_INTRVL_DFLT,
1257 .sleep_gpio = CYTTSP_TS_SLEEP_GPIO,
1258 .resout_gpio = CYTTSP_TS_RESOUT_N_GPIO,
1259 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
1260 .regulator_info = regulator_data,
1261 .num_regulators = ARRAY_SIZE(regulator_data),
1262 .init = cyttsp_platform_init,
1263 .correct_fw_ver = 9,
1264};
1265
1266static struct i2c_board_info cyttsp_info[] __initdata = {
1267 {
1268 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
1269 .platform_data = &cyttsp_pdata,
1270#ifndef CY_USE_TIMER
1271 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
1272#endif /* CY_USE_TIMER */
1273 },
1274};
1275
1276/* configuration data */
1277static const u8 mxt_config_data[] = {
1278 /* T6 Object */
1279 0, 0, 0, 0, 0, 0,
1280 /* T38 Object */
1281 11, 2, 0, 11, 11, 11, 0, 0, 0, 0,
1282 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1283 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1284 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1285 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1286 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1287 0, 0, 0, 0,
1288 /* T7 Object */
1289 100, 16, 50,
1290 /* T8 Object */
1291 8, 0, 0, 0, 0, 0, 8, 14, 50, 215,
1292 /* T9 Object */
1293 131, 0, 0, 26, 42, 0, 32, 63, 3, 5,
1294 0, 2, 1, 113, 10, 10, 8, 10, 255, 2,
1295 85, 5, 0, 0, 20, 20, 75, 25, 202, 29,
1296 10, 10, 45, 46,
1297 /* T15 Object */
1298 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1299 0,
1300 /* T22 Object */
1301 5, 0, 0, 0, 0, 0, 0, 0, 30, 0,
1302 0, 0, 5, 8, 10, 13, 0,
1303 /* T24 Object */
1304 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1305 0, 0, 0, 0, 0, 0, 0, 0, 0,
1306 /* T25 Object */
1307 3, 0, 188, 52, 52, 33, 0, 0, 0, 0,
1308 0, 0, 0, 0,
1309 /* T27 Object */
1310 0, 0, 0, 0, 0, 0, 0,
1311 /* T28 Object */
1312 0, 0, 0, 8, 12, 60,
1313 /* T40 Object */
1314 0, 0, 0, 0, 0,
1315 /* T41 Object */
1316 0, 0, 0, 0, 0, 0,
1317 /* T43 Object */
1318 0, 0, 0, 0, 0, 0,
1319};
1320
1321#define MXT_TS_GPIO_IRQ 11
1322#define MXT_TS_LDO_EN_GPIO 50
1323#define MXT_TS_RESET_GPIO 52
1324
1325static struct mxt_platform_data mxt_platform_data = {
1326 .config = mxt_config_data,
1327 .config_length = ARRAY_SIZE(mxt_config_data),
1328 .x_size = 1365,
1329 .y_size = 767,
1330 .irqflags = IRQF_TRIGGER_FALLING,
1331 .i2c_pull_up = true,
1332};
1333
1334static struct i2c_board_info mxt_device_info[] __initdata = {
1335 {
1336 I2C_BOARD_INFO("atmel_mxt_ts", 0x5b),
1337 .platform_data = &mxt_platform_data,
1338 .irq = MSM_GPIO_TO_INT(MXT_TS_GPIO_IRQ),
1339 },
1340};
1341
1342static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
1343{
1344}
1345
1346static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi4_pdata = {
1347 .clk_freq = 100000,
1348 .src_clk_rate = 24000000,
1349 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1350};
1351
1352static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi3_pdata = {
1353 .clk_freq = 100000,
1354 .src_clk_rate = 24000000,
1355 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1356};
1357
1358static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi10_pdata = {
1359 .clk_freq = 100000,
1360 .src_clk_rate = 24000000,
1361 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1362};
1363
1364static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi12_pdata = {
1365 .clk_freq = 100000,
1366 .src_clk_rate = 24000000,
1367 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1368};
1369
1370static struct msm_rpm_platform_data msm_rpm_data = {
1371 .reg_base_addrs = {
1372 [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE,
1373 [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400,
1374 [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600,
1375 [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00,
1376 },
1377
1378 .irq_ack = RPM_APCC_CPU0_GP_HIGH_IRQ,
1379 .irq_err = RPM_APCC_CPU0_GP_LOW_IRQ,
1380 .irq_vmpm = RPM_APCC_CPU0_GP_MEDIUM_IRQ,
1381 .msm_apps_ipc_rpm_reg = MSM_APCS_GCC_BASE + 0x008,
1382 .msm_apps_ipc_rpm_val = 4,
1383};
1384
1385static struct ks8851_pdata spi_eth_pdata = {
1386 .irq_gpio = KS8851_IRQ_GPIO,
1387 .rst_gpio = KS8851_RST_GPIO,
1388};
1389
1390static struct spi_board_info spi_board_info[] __initdata = {
1391 {
1392 .modalias = "ks8851",
1393 .irq = MSM_GPIO_TO_INT(KS8851_IRQ_GPIO),
1394 .max_speed_hz = 19200000,
1395 .bus_num = 0,
1396 .chip_select = 0,
1397 .mode = SPI_MODE_0,
1398 .platform_data = &spi_eth_pdata
1399 },
1400 {
1401 .modalias = "dsi_novatek_3d_panel_spi",
1402 .max_speed_hz = 10800000,
1403 .bus_num = 0,
1404 .chip_select = 1,
1405 .mode = SPI_MODE_0,
1406 },
1407};
1408
1409static struct platform_device msm_device_saw_core0 = {
1410 .name = "saw-regulator",
1411 .id = 0,
1412 .dev = {
1413 .platform_data = &msm_saw_regulator_pdata_s5,
1414 },
1415};
1416
1417static struct platform_device msm_device_saw_core1 = {
1418 .name = "saw-regulator",
1419 .id = 1,
1420 .dev = {
1421 .platform_data = &msm_saw_regulator_pdata_s6,
1422 },
1423};
1424
1425static struct tsens_platform_data msm_tsens_pdata = {
1426 .slope = 910,
1427 .tsens_factor = 1000,
1428 .hw_type = MSM_8960,
1429 .tsens_num_sensor = 5,
1430};
1431
1432static struct platform_device msm_tsens_device = {
1433 .name = "tsens8960-tm",
1434 .id = -1,
1435 .dev = {
1436 .platform_data = &msm_tsens_pdata,
1437 },
1438};
1439
1440#ifdef CONFIG_MSM_FAKE_BATTERY
1441static struct platform_device fish_battery_device = {
1442 .name = "fish_battery",
1443};
1444#endif
1445
1446static struct platform_device msm8960_device_ext_5v_vreg __devinitdata = {
1447 .name = GPIO_REGULATOR_DEV_NAME,
1448 .id = PM8921_MPP_PM_TO_SYS(7),
1449 .dev = {
1450 .platform_data = &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
1451 },
1452};
1453
1454static struct platform_device msm8960_device_ext_l2_vreg __devinitdata = {
1455 .name = GPIO_REGULATOR_DEV_NAME,
1456 .id = 91,
1457 .dev = {
1458 .platform_data = &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_L2],
1459 },
1460};
1461
1462static struct platform_device msm8960_device_rpm_regulator __devinitdata = {
1463 .name = "rpm-regulator",
1464 .id = -1,
1465 .dev = {
1466 .platform_data = &msm_rpm_regulator_pdata,
1467 },
1468};
1469
1470static struct msm_rpm_log_platform_data msm_rpm_log_pdata = {
1471 .phys_addr_base = 0x0010C000,
1472 .reg_offsets = {
1473 [MSM_RPM_LOG_PAGE_INDICES] = 0x00000080,
1474 [MSM_RPM_LOG_PAGE_BUFFER] = 0x000000A0,
1475 },
1476 .phys_size = SZ_8K,
1477 .log_len = 4096, /* log's buffer length in bytes */
1478 .log_len_mask = (4096 >> 2) - 1, /* length mask in units of u32 */
1479};
1480
1481static struct platform_device msm_rpm_log_device = {
1482 .name = "msm_rpm_log",
1483 .id = -1,
1484 .dev = {
1485 .platform_data = &msm_rpm_log_pdata,
1486 },
1487};
1488
1489static struct platform_device *common_devices[] __initdata = {
1490 &msm8960_device_dmov,
1491 &msm_device_smd,
1492 &msm8960_device_uart_gsbi5,
1493 &msm_device_uart_dm6,
1494 &msm_device_saw_core0,
1495 &msm_device_saw_core1,
1496 &msm8960_device_ext_5v_vreg,
1497 &msm8960_device_ext_l2_vreg,
1498 &msm8960_device_ssbi_pm8921,
1499 &msm8960_device_qup_spi_gsbi1,
1500 &msm8960_device_qup_i2c_gsbi3,
1501 &msm8960_device_qup_i2c_gsbi4,
1502 &msm8960_device_qup_i2c_gsbi10,
Stepan Moskovchenko39236d72011-11-30 17:42:23 -08001503 &msm8960_device_qup_i2c_gsbi12,
Stepan Moskovchenko39236d72011-11-30 17:42:23 -08001504 &msm_slim_ctrl,
1505 &msm_device_wcnss_wlan,
1506#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
1507 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
1508 &qcrypto_device,
1509#endif
1510
1511#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
1512 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
1513 &qcedev_device,
1514#endif
1515#ifdef CONFIG_MSM_ROTATOR
1516 &msm_rotator_device,
1517#endif
1518 &msm_device_sps,
1519#ifdef CONFIG_MSM_FAKE_BATTERY
1520 &fish_battery_device,
1521#endif
1522#ifdef CONFIG_ANDROID_PMEM
1523#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
1524 &android_pmem_device,
1525 &android_pmem_adsp_device,
1526#endif
1527 &android_pmem_audio_device,
1528#endif
1529 &msm_device_vidc,
1530 &msm_device_bam_dmux,
1531 &msm_fm_platform_init,
1532
1533#ifdef CONFIG_HW_RANDOM_MSM
1534 &msm_device_rng,
1535#endif
1536 &msm_rpm_device,
1537#ifdef CONFIG_ION_MSM
1538 &ion_dev,
1539#endif
1540 &msm_rpm_log_device,
1541 &msm_rpm_stat_device,
1542 &msm_device_tz_log,
1543
1544#ifdef CONFIG_MSM_QDSS
1545 &msm_etb_device,
1546 &msm_tpiu_device,
1547 &msm_funnel_device,
1548 &msm_debug_device,
1549 &msm_ptm_device,
1550#endif
1551 &msm_device_dspcrashd_8960,
1552 &msm8960_device_watchdog,
1553};
1554
1555static struct platform_device *cdp_devices[] __initdata = {
1556 &msm8960_device_otg,
1557 &msm8960_device_gadget_peripheral,
1558 &msm_device_hsusb_host,
1559 &android_usb_device,
1560 &msm_pcm,
1561 &msm_pcm_routing,
1562 &msm_cpudai0,
1563 &msm_cpudai1,
1564 &msm_cpudai_hdmi_rx,
1565 &msm_cpudai_bt_rx,
1566 &msm_cpudai_bt_tx,
1567 &msm_cpudai_fm_rx,
1568 &msm_cpudai_fm_tx,
1569 &msm_cpudai_auxpcm_rx,
1570 &msm_cpudai_auxpcm_tx,
1571 &msm_cpu_fe,
1572 &msm_stub_codec,
1573 &msm_kgsl_3d0,
1574#ifdef CONFIG_MSM_KGSL_2D
1575 &msm_kgsl_2d0,
1576 &msm_kgsl_2d1,
1577#endif
1578#ifdef CONFIG_MSM_GEMINI
1579 &msm8960_gemini_device,
1580#endif
1581 &msm_voice,
1582 &msm_voip,
1583 &msm_lpa_pcm,
1584 &msm_cpudai_afe_01_rx,
1585 &msm_cpudai_afe_01_tx,
1586 &msm_cpudai_afe_02_rx,
1587 &msm_cpudai_afe_02_tx,
1588 &msm_pcm_afe,
1589 &msm_pcm_hostless,
1590 &msm_bus_apps_fabric,
1591 &msm_bus_sys_fabric,
1592 &msm_bus_mm_fabric,
1593 &msm_bus_sys_fpb,
1594 &msm_bus_cpss_fpb,
1595 &msm_tsens_device,
1596};
1597
1598static void __init msm8930_i2c_init(void)
1599{
1600 msm8960_device_qup_i2c_gsbi4.dev.platform_data =
1601 &msm8960_i2c_qup_gsbi4_pdata;
1602
1603 msm8960_device_qup_i2c_gsbi3.dev.platform_data =
1604 &msm8960_i2c_qup_gsbi3_pdata;
1605
1606 msm8960_device_qup_i2c_gsbi10.dev.platform_data =
1607 &msm8960_i2c_qup_gsbi10_pdata;
1608
1609 msm8960_device_qup_i2c_gsbi12.dev.platform_data =
1610 &msm8960_i2c_qup_gsbi12_pdata;
1611}
1612
1613static void __init msm8930_gfx_init(void)
1614{
1615 uint32_t soc_platform_version = socinfo_get_version();
1616 if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1) {
1617 struct kgsl_device_platform_data *kgsl_3d0_pdata =
1618 msm_kgsl_3d0.dev.platform_data;
1619 kgsl_3d0_pdata->pwrlevel[0].gpu_freq = 320000000;
1620 kgsl_3d0_pdata->pwrlevel[1].gpu_freq = 266667000;
1621 }
1622}
1623
1624static struct msm_cpuidle_state msm_cstates[] __initdata = {
1625 {0, 0, "C0", "WFI",
1626 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
1627
1628 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
1629 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
1630
1631 {0, 2, "C2", "POWER_COLLAPSE",
1632 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
1633
1634 {1, 0, "C0", "WFI",
1635 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
1636
1637 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
1638 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
1639};
1640
1641static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
1642 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
1643 .idle_supported = 1,
1644 .suspend_supported = 1,
1645 .idle_enabled = 0,
1646 .suspend_enabled = 0,
1647 },
1648
1649 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
1650 .idle_supported = 1,
1651 .suspend_supported = 1,
1652 .idle_enabled = 0,
1653 .suspend_enabled = 0,
1654 },
1655
1656 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
1657 .idle_supported = 1,
1658 .suspend_supported = 1,
1659 .idle_enabled = 1,
1660 .suspend_enabled = 1,
1661 },
1662
1663 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
1664 .idle_supported = 0,
1665 .suspend_supported = 1,
1666 .idle_enabled = 0,
1667 .suspend_enabled = 0,
1668 },
1669
1670 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
1671 .idle_supported = 1,
1672 .suspend_supported = 1,
1673 .idle_enabled = 0,
1674 .suspend_enabled = 0,
1675 },
1676
1677 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
1678 .idle_supported = 1,
1679 .suspend_supported = 0,
1680 .idle_enabled = 1,
1681 .suspend_enabled = 0,
1682 },
1683};
1684
1685static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
1686 {
1687 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
1688 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
1689 true,
1690 100, 8000, 100000, 1,
1691 },
1692
1693 {
1694 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
1695 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
1696 true,
1697 2000, 6000, 60100000, 3000,
1698 },
1699
1700 {
1701 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
1702 MSM_RPMRS_LIMITS(ON, GDHS, MAX, ACTIVE),
1703 false,
1704 4200, 5000, 60350000, 3500,
1705 },
1706
1707 {
1708 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
1709 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
1710 false,
1711 6300, 4500, 65350000, 4800,
1712 },
1713 {
1714 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
1715 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, ACTIVE, RET_HIGH),
1716 false,
1717 7000, 3500, 66600000, 5150,
1718 },
1719
1720 {
1721 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
1722 MSM_RPMRS_LIMITS(OFF, GDHS, MAX, ACTIVE),
1723 false,
1724 11700, 2500, 67850000, 5500,
1725 },
1726
1727 {
1728 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
1729 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
1730 false,
1731 13800, 2000, 71850000, 6800,
1732 },
1733
1734 {
1735 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
1736 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
1737 false,
1738 29700, 500, 75850000, 8800,
1739 },
1740
1741 {
1742 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
1743 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
1744 false,
1745 29700, 0, 76350000, 9800,
1746 },
1747};
1748
1749#ifdef CONFIG_I2C
1750#define I2C_SURF 1
1751#define I2C_FFA (1 << 1)
1752#define I2C_RUMI (1 << 2)
1753#define I2C_SIM (1 << 3)
1754#define I2C_FLUID (1 << 4)
1755#define I2C_LIQUID (1 << 5)
1756
1757struct i2c_registry {
1758 u8 machs;
1759 int bus;
1760 struct i2c_board_info *info;
1761 int len;
1762};
1763
1764#ifdef CONFIG_MSM_CAMERA
1765static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
1766#ifdef CONFIG_IMX074
1767 {
1768 I2C_BOARD_INFO("imx074", 0x1A),
1769 },
1770#endif
1771#ifdef CONFIG_OV2720
1772 {
1773 I2C_BOARD_INFO("ov2720", 0x6C),
1774 },
1775#endif
1776#ifdef CONFIG_MSM_CAMERA_FLASH_SC628A
1777 {
1778 I2C_BOARD_INFO("sc628a", 0x6E),
1779 },
1780#endif
1781};
1782#endif
1783
Stepan Moskovchenko39236d72011-11-30 17:42:23 -08001784static void __init msm8930_init_hsic(void)
1785{
1786#ifdef CONFIG_USB_EHCI_MSM_HSIC
1787 uint32_t version = socinfo_get_version();
1788
1789 pr_info("%s: version:%d mtp:%d\n", __func__,
1790 SOCINFO_VERSION_MAJOR(version),
1791 machine_is_msm8930_mtp());
1792
1793 if ((SOCINFO_VERSION_MAJOR(version) == 1) ||
1794 machine_is_msm8930_mtp() ||
1795 machine_is_msm8930_fluid())
1796 return;
1797
Stepan Moskovchenko39236d72011-11-30 17:42:23 -08001798 platform_device_register(&msm_device_hsic_host);
1799#endif
1800}
1801
Stepan Moskovchenko39236d72011-11-30 17:42:23 -08001802#ifdef CONFIG_ISL9519_CHARGER
1803static struct isl_platform_data isl_data __initdata = {
1804 .valid_n_gpio = 0, /* Not required when notify-by-pmic */
1805 .chg_detection_config = NULL, /* Not required when notify-by-pmic */
1806 .max_system_voltage = 4200,
1807 .min_system_voltage = 3200,
1808 .chgcurrent = 1000, /* 1900, */
1809 .term_current = 400, /* Need fine tuning */
1810 .input_current = 2048,
1811};
1812
1813static struct i2c_board_info isl_charger_i2c_info[] __initdata = {
1814 {
1815 I2C_BOARD_INFO("isl9519q", 0x9),
1816 .irq = 0, /* Not required when notify-by-pmic */
1817 .platform_data = &isl_data,
1818 },
1819};
1820#endif /* CONFIG_ISL9519_CHARGER */
1821
1822static struct i2c_registry msm8960_i2c_devices[] __initdata = {
1823#ifdef CONFIG_MSM_CAMERA
1824 {
1825 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_LIQUID | I2C_RUMI,
1826 MSM_8930_GSBI4_QUP_I2C_BUS_ID,
1827 msm_camera_boardinfo,
1828 ARRAY_SIZE(msm_camera_boardinfo),
1829 },
1830#endif
1831#ifdef CONFIG_ISL9519_CHARGER
1832 {
1833 I2C_LIQUID,
1834 MSM_8930_GSBI10_QUP_I2C_BUS_ID,
1835 isl_charger_i2c_info,
1836 ARRAY_SIZE(isl_charger_i2c_info),
1837 },
1838#endif /* CONFIG_ISL9519_CHARGER */
1839 {
1840 I2C_SURF | I2C_FFA | I2C_FLUID,
1841 MSM_8930_GSBI3_QUP_I2C_BUS_ID,
1842 cyttsp_info,
1843 ARRAY_SIZE(cyttsp_info),
1844 },
1845 {
1846 I2C_LIQUID,
1847 MSM_8930_GSBI3_QUP_I2C_BUS_ID,
1848 mxt_device_info,
1849 ARRAY_SIZE(mxt_device_info),
1850 },
1851 {
1852 I2C_LIQUID,
1853 MSM_8930_GSBI10_QUP_I2C_BUS_ID,
1854 msm_isa1200_board_info,
1855 ARRAY_SIZE(msm_isa1200_board_info),
1856 },
1857};
1858#endif /* CONFIG_I2C */
1859
1860static void __init register_i2c_devices(void)
1861{
1862#ifdef CONFIG_I2C
1863 u8 mach_mask = 0;
1864 int i;
1865
1866 /* Build the matching 'supported_machs' bitmask */
Stepan Moskovchenko8768eff2011-12-01 18:55:07 -08001867 if (machine_is_msm8930_cdp() || machine_is_msm8627_cdp())
Stepan Moskovchenko39236d72011-11-30 17:42:23 -08001868 mach_mask = I2C_SURF;
1869 else if (machine_is_msm8930_fluid())
1870 mach_mask = I2C_FLUID;
Stepan Moskovchenko8768eff2011-12-01 18:55:07 -08001871 else if (machine_is_msm8930_mtp() || machine_is_msm8627_mtp())
Stepan Moskovchenko39236d72011-11-30 17:42:23 -08001872 mach_mask = I2C_FFA;
1873 else
1874 pr_err("unmatched machine ID in register_i2c_devices\n");
1875
1876 /* Run the array and install devices as appropriate */
1877 for (i = 0; i < ARRAY_SIZE(msm8960_i2c_devices); ++i) {
1878 if (msm8960_i2c_devices[i].machs & mach_mask)
1879 i2c_register_board_info(msm8960_i2c_devices[i].bus,
1880 msm8960_i2c_devices[i].info,
1881 msm8960_i2c_devices[i].len);
1882 }
1883#endif
1884}
1885
1886static void __init msm8930_cdp_init(void)
1887{
1888 if (meminfo_init(SYS_MEMORY, SZ_256M) < 0)
1889 pr_err("meminfo_init() failed!\n");
1890
1891 BUG_ON(msm_rpm_init(&msm_rpm_data));
1892 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
1893 ARRAY_SIZE(msm_rpmrs_levels)));
1894
1895 regulator_suppress_info_printing();
1896 if (msm_xo_init())
1897 pr_err("Failed to initialize XO votes\n");
1898 platform_device_register(&msm8960_device_rpm_regulator);
1899 msm_clock_init(&msm8960_clock_init_data);
1900 msm8960_device_otg.dev.platform_data = &msm_otg_pdata;
1901 msm_device_hsic_host.dev.platform_data = &msm_hsic_pdata;
Stepan Moskovchenko3b09bf52011-12-06 20:40:53 -08001902 msm8930_init_gpiomux();
Stepan Moskovchenko39236d72011-11-30 17:42:23 -08001903 msm8960_device_qup_spi_gsbi1.dev.platform_data =
1904 &msm8960_qup_spi_gsbi1_pdata;
1905 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
1906
1907 msm8930_init_pmic();
1908 msm8930_i2c_init();
1909 msm8930_gfx_init();
1910 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
1911 msm_spm_l2_init(msm_spm_l2_data);
1912 msm8930_init_buses();
1913 platform_add_devices(msm_footswitch_devices,
1914 msm_num_footswitch_devices);
1915 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
1916 msm8930_pm8921_gpio_mpp_init();
1917 platform_add_devices(cdp_devices, ARRAY_SIZE(cdp_devices));
1918 msm8930_init_hsic();
1919 msm8930_init_cam();
1920 msm8930_init_mmc();
1921 acpuclk_init(&acpuclk_8960_soc_data);
1922 register_i2c_devices();
1923 msm8930_init_fb();
1924 slim_register_board_info(msm_slim_devices,
1925 ARRAY_SIZE(msm_slim_devices));
Stepan Moskovchenko39236d72011-11-30 17:42:23 -08001926 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
1927 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
1928 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
1929 msm_pm_data);
1930 change_memory_power = &msm8930_change_memory_power;
1931 BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_TZ, NULL));
1932
1933 if (PLATFORM_IS_CHARM25())
1934 platform_add_devices(mdm_devices, ARRAY_SIZE(mdm_devices));
1935}
1936
1937MACHINE_START(MSM8930_CDP, "QCT MSM8930 CDP")
1938 .map_io = msm8930_map_io,
1939 .reserve = msm8930_reserve,
1940 .init_irq = msm8930_init_irq,
1941 .timer = &msm_timer,
1942 .init_machine = msm8930_cdp_init,
1943 .init_early = msm8930_allocate_memory_regions,
1944 .init_very_early = msm8930_early_memory,
1945MACHINE_END
1946
1947MACHINE_START(MSM8930_MTP, "QCT MSM8930 MTP")
1948 .map_io = msm8930_map_io,
1949 .reserve = msm8930_reserve,
1950 .init_irq = msm8930_init_irq,
1951 .timer = &msm_timer,
1952 .init_machine = msm8930_cdp_init,
1953 .init_early = msm8930_allocate_memory_regions,
1954 .init_very_early = msm8930_early_memory,
1955MACHINE_END
1956
1957MACHINE_START(MSM8930_FLUID, "QCT MSM8930 FLUID")
1958 .map_io = msm8930_map_io,
1959 .reserve = msm8930_reserve,
1960 .init_irq = msm8930_init_irq,
1961 .timer = &msm_timer,
1962 .init_machine = msm8930_cdp_init,
1963 .init_early = msm8930_allocate_memory_regions,
1964 .init_very_early = msm8930_early_memory,
1965MACHINE_END
Stepan Moskovchenko8768eff2011-12-01 18:55:07 -08001966
1967MACHINE_START(MSM8627_CDP, "QCT MSM8627 CDP")
1968 .map_io = msm8930_map_io,
1969 .reserve = msm8930_reserve,
1970 .init_irq = msm8930_init_irq,
1971 .timer = &msm_timer,
1972 .init_machine = msm8930_cdp_init,
1973 .init_early = msm8930_allocate_memory_regions,
1974 .init_very_early = msm8930_early_memory,
1975MACHINE_END
1976
1977MACHINE_START(MSM8627_MTP, "QCT MSM8627 MTP")
1978 .map_io = msm8930_map_io,
1979 .reserve = msm8930_reserve,
1980 .init_irq = msm8930_init_irq,
1981 .timer = &msm_timer,
1982 .init_machine = msm8930_cdp_init,
1983 .init_early = msm8930_allocate_memory_regions,
1984 .init_very_early = msm8930_early_memory,
1985MACHINE_END