Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1 | /* |
| 2 | * cx18 header containing common defines. |
| 3 | * |
| 4 | * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA |
| 19 | * 02111-1307 USA |
| 20 | */ |
| 21 | |
| 22 | #ifndef CX23418_H |
| 23 | #define CX23418_H |
| 24 | |
| 25 | #include <media/cx2341x.h> |
| 26 | |
| 27 | #define MGR_CMD_MASK 0x40000000 |
| 28 | /* The MSB of the command code indicates that this is the completion of a |
| 29 | command */ |
| 30 | #define MGR_CMD_MASK_ACK (MGR_CMD_MASK | 0x80000000) |
| 31 | |
| 32 | /* Description: This command creates a new instance of a certain task |
| 33 | IN[0] - Task ID. This is one of the XPU_CMD_MASK_YYY where XPU is |
| 34 | the processor on which the task YYY will be created |
| 35 | OUT[0] - Task handle. This handle is passed along with commands to |
| 36 | dispatch to the right instance of the task |
| 37 | ReturnCode - One of the ERR_SYS_... */ |
| 38 | #define CX18_CREATE_TASK (MGR_CMD_MASK | 0x0001) |
| 39 | |
| 40 | /* Description: This command destroys an instance of a task |
| 41 | IN[0] - Task handle. Hanlde of the task to destroy |
| 42 | ReturnCode - One of the ERR_SYS_... */ |
| 43 | #define CX18_DESTROY_TASK (MGR_CMD_MASK | 0x0002) |
| 44 | |
| 45 | /* All commands for CPU have the following mask set */ |
| 46 | #define CPU_CMD_MASK 0x20000000 |
| 47 | #define CPU_CMD_MASK_ACK (CPU_CMD_MASK | 0x80000000) |
| 48 | #define CPU_CMD_MASK_CAPTURE (CPU_CMD_MASK | 0x00020000) |
| 49 | #define CPU_CMD_MASK_TS (CPU_CMD_MASK | 0x00040000) |
| 50 | |
| 51 | #define EPU_CMD_MASK 0x02000000 |
| 52 | #define EPU_CMD_MASK_DEBUG (EPU_CMD_MASK | 0x000000) |
| 53 | #define EPU_CMD_MASK_DE (EPU_CMD_MASK | 0x040000) |
| 54 | |
Hans Verkuil | 81cb727d | 2008-06-28 12:49:20 -0300 | [diff] [blame] | 55 | #define APU_CMD_MASK 0x10000000 |
| 56 | #define APU_CMD_MASK_ACK (APU_CMD_MASK | 0x80000000) |
| 57 | |
| 58 | #define CX18_APU_RESETAI (APU_CMD_MASK | 0x05) |
| 59 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 60 | /* Description: This command indicates that a Memory Descriptor List has been |
| 61 | filled with the requested channel type |
| 62 | IN[0] - Task handle. Handle of the task |
| 63 | IN[1] - Offset of the MDL_ACK from the beginning of the local DDR. |
| 64 | IN[2] - Number of CNXT_MDL_ACK structures in the array pointed to by IN[1] |
| 65 | ReturnCode - One of the ERR_DE_... */ |
| 66 | #define CX18_EPU_DMA_DONE (EPU_CMD_MASK_DE | 0x0001) |
| 67 | |
| 68 | /* Something interesting happened |
| 69 | IN[0] - A value to log |
| 70 | IN[1] - An offset of a string in the MiniMe memory; |
| 71 | 0/zero/NULL means "I have nothing to say" */ |
| 72 | #define CX18_EPU_DEBUG (EPU_CMD_MASK_DEBUG | 0x0003) |
| 73 | |
| 74 | /* Description: This command starts streaming with the set channel type |
| 75 | IN[0] - Task handle. Handle of the task to start |
| 76 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 77 | #define CX18_CPU_CAPTURE_START (CPU_CMD_MASK_CAPTURE | 0x0002) |
| 78 | |
| 79 | /* Description: This command stops streaming with the set channel type |
| 80 | IN[0] - Task handle. Handle of the task to stop |
| 81 | IN[1] - 0 = stop at end of GOP, 1 = stop at end of frame (MPEG only) |
| 82 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 83 | #define CX18_CPU_CAPTURE_STOP (CPU_CMD_MASK_CAPTURE | 0x0003) |
| 84 | |
| 85 | /* Description: This command pauses streaming with the set channel type |
| 86 | IN[0] - Task handle. Handle of the task to pause |
| 87 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 88 | #define CX18_CPU_CAPTURE_PAUSE (CPU_CMD_MASK_CAPTURE | 0x0007) |
| 89 | |
| 90 | /* Description: This command resumes streaming with the set channel type |
| 91 | IN[0] - Task handle. Handle of the task to resume |
| 92 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 93 | #define CX18_CPU_CAPTURE_RESUME (CPU_CMD_MASK_CAPTURE | 0x0008) |
| 94 | |
| 95 | #define CAPTURE_CHANNEL_TYPE_NONE 0 |
| 96 | #define CAPTURE_CHANNEL_TYPE_MPEG 1 |
| 97 | #define CAPTURE_CHANNEL_TYPE_INDEX 2 |
| 98 | #define CAPTURE_CHANNEL_TYPE_YUV 3 |
| 99 | #define CAPTURE_CHANNEL_TYPE_PCM 4 |
| 100 | #define CAPTURE_CHANNEL_TYPE_VBI 5 |
| 101 | #define CAPTURE_CHANNEL_TYPE_SLICED_VBI 6 |
| 102 | #define CAPTURE_CHANNEL_TYPE_TS 7 |
| 103 | #define CAPTURE_CHANNEL_TYPE_MAX 15 |
| 104 | |
| 105 | /* Description: This command sets the channel type. This can only be done |
| 106 | when stopped. |
| 107 | IN[0] - Task handle. Handle of the task to start |
| 108 | IN[1] - Channel Type. See Below. |
| 109 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 110 | #define CX18_CPU_SET_CHANNEL_TYPE (CPU_CMD_MASK_CAPTURE + 1) |
| 111 | |
| 112 | /* Description: Set stream output type |
| 113 | IN[0] - task handle. Handle of the task to start |
| 114 | IN[1] - type |
| 115 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 116 | #define CX18_CPU_SET_STREAM_OUTPUT_TYPE (CPU_CMD_MASK_CAPTURE | 0x0012) |
| 117 | |
| 118 | /* Description: Set video input resolution and frame rate |
| 119 | IN[0] - task handle |
| 120 | IN[1] - reserved |
| 121 | IN[2] - reserved |
| 122 | IN[3] - reserved |
| 123 | IN[4] - reserved |
| 124 | IN[5] - frame rate, 0 - 29.97f/s, 1 - 25f/s |
| 125 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 126 | #define CX18_CPU_SET_VIDEO_IN (CPU_CMD_MASK_CAPTURE | 0x0004) |
| 127 | |
| 128 | /* Description: Set video frame rate |
| 129 | IN[0] - task handle. Handle of the task to start |
| 130 | IN[1] - video bit rate mode |
| 131 | IN[2] - video average rate |
| 132 | IN[3] - video peak rate |
| 133 | IN[4] - system mux rate |
| 134 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 135 | #define CX18_CPU_SET_VIDEO_RATE (CPU_CMD_MASK_CAPTURE | 0x0005) |
| 136 | |
| 137 | /* Description: Set video output resolution |
| 138 | IN[0] - task handle |
| 139 | IN[1] - horizontal size |
| 140 | IN[2] - vertical size |
| 141 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 142 | #define CX18_CPU_SET_VIDEO_RESOLUTION (CPU_CMD_MASK_CAPTURE | 0x0006) |
| 143 | |
| 144 | /* Description: This command set filter parameters |
| 145 | IN[0] - Task handle. Handle of the task |
| 146 | IN[1] - type, 0 - temporal, 1 - spatial, 2 - median |
| 147 | IN[2] - mode, temporal/spatial: 0 - disable, 1 - static, 2 - dynamic |
| 148 | median: 0 = disable, 1 = horizontal, 2 = vertical, |
| 149 | 3 = horizontal/vertical, 4 = diagonal |
| 150 | IN[3] - strength, temporal 0 - 31, spatial 0 - 15 |
| 151 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 152 | #define CX18_CPU_SET_FILTER_PARAM (CPU_CMD_MASK_CAPTURE | 0x0009) |
| 153 | |
| 154 | /* Description: This command set spatial filter type |
| 155 | IN[0] - Task handle. |
| 156 | IN[1] - luma type: 0 = disable, 1 = 1D horizontal only, 2 = 1D vertical only, |
| 157 | 3 = 2D H/V separable, 4 = 2D symmetric non-separable |
| 158 | IN[2] - chroma type: 0 - diable, 1 = 1D horizontal |
| 159 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 160 | #define CX18_CPU_SET_SPATIAL_FILTER_TYPE (CPU_CMD_MASK_CAPTURE | 0x000C) |
| 161 | |
| 162 | /* Description: This command set coring levels for median filter |
| 163 | IN[0] - Task handle. |
| 164 | IN[1] - luma_high |
| 165 | IN[2] - luma_low |
| 166 | IN[3] - chroma_high |
| 167 | IN[4] - chroma_low |
| 168 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 169 | #define CX18_CPU_SET_MEDIAN_CORING (CPU_CMD_MASK_CAPTURE | 0x000E) |
| 170 | |
| 171 | /* Description: This command set the picture type mask for index file |
| 172 | IN[0] - 0 = disable index file output |
| 173 | 1 = output I picture |
| 174 | 2 = P picture |
| 175 | 4 = B picture |
| 176 | other = illegal */ |
| 177 | #define CX18_CPU_SET_INDEXTABLE (CPU_CMD_MASK_CAPTURE | 0x0010) |
| 178 | |
| 179 | /* Description: Set audio parameters |
| 180 | IN[0] - task handle. Handle of the task to start |
| 181 | IN[1] - audio parameter |
| 182 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 183 | #define CX18_CPU_SET_AUDIO_PARAMETERS (CPU_CMD_MASK_CAPTURE | 0x0011) |
| 184 | |
| 185 | /* Description: Set video mute |
| 186 | IN[0] - task handle. Handle of the task to start |
| 187 | IN[1] - bit31-24: muteYvalue |
| 188 | bit23-16: muteUvalue |
| 189 | bit15-8: muteVvalue |
| 190 | bit0: 1:mute, 0: unmute |
| 191 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 192 | #define CX18_CPU_SET_VIDEO_MUTE (CPU_CMD_MASK_CAPTURE | 0x0013) |
| 193 | |
| 194 | /* Description: Set audio mute |
| 195 | IN[0] - task handle. Handle of the task to start |
| 196 | IN[1] - mute/unmute |
| 197 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 198 | #define CX18_CPU_SET_AUDIO_MUTE (CPU_CMD_MASK_CAPTURE | 0x0014) |
| 199 | |
| 200 | /* Description: Set stream output type |
| 201 | IN[0] - task handle. Handle of the task to start |
| 202 | IN[1] - subType |
| 203 | SET_INITIAL_SCR 1 |
| 204 | SET_QUALITY_MODE 2 |
| 205 | SET_VIM_PROTECT_MODE 3 |
| 206 | SET_PTS_CORRECTION 4 |
| 207 | SET_USB_FLUSH_MODE 5 |
| 208 | SET_MERAQPAR_ENABLE 6 |
| 209 | SET_NAV_PACK_INSERTION 7 |
| 210 | SET_SCENE_CHANGE_ENABLE 8 |
| 211 | IN[2] - parameter 1 |
| 212 | IN[3] - parameter 2 |
| 213 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 214 | #define CX18_CPU_SET_MISC_PARAMETERS (CPU_CMD_MASK_CAPTURE | 0x0015) |
| 215 | |
| 216 | /* Description: Set raw VBI parameters |
| 217 | IN[0] - Task handle |
| 218 | IN[1] - No. of input lines per field: |
| 219 | bit[15:0]: field 1, |
| 220 | bit[31:16]: field 2 |
| 221 | IN[2] - No. of input bytes per line |
| 222 | IN[3] - No. of output frames per transfer |
| 223 | IN[4] - start code |
| 224 | IN[5] - stop code |
| 225 | ReturnCode */ |
| 226 | #define CX18_CPU_SET_RAW_VBI_PARAM (CPU_CMD_MASK_CAPTURE | 0x0016) |
| 227 | |
| 228 | /* Description: Set capture line No. |
| 229 | IN[0] - task handle. Handle of the task to start |
| 230 | IN[1] - height1 |
| 231 | IN[2] - height2 |
| 232 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 233 | #define CX18_CPU_SET_CAPTURE_LINE_NO (CPU_CMD_MASK_CAPTURE | 0x0017) |
| 234 | |
| 235 | /* Description: Set copyright |
| 236 | IN[0] - task handle. Handle of the task to start |
| 237 | IN[1] - copyright |
| 238 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 239 | #define CX18_CPU_SET_COPYRIGHT (CPU_CMD_MASK_CAPTURE | 0x0018) |
| 240 | |
| 241 | /* Description: Set audio PID |
| 242 | IN[0] - task handle. Handle of the task to start |
| 243 | IN[1] - PID |
| 244 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 245 | #define CX18_CPU_SET_AUDIO_PID (CPU_CMD_MASK_CAPTURE | 0x0019) |
| 246 | |
| 247 | /* Description: Set video PID |
| 248 | IN[0] - task handle. Handle of the task to start |
| 249 | IN[1] - PID |
| 250 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 251 | #define CX18_CPU_SET_VIDEO_PID (CPU_CMD_MASK_CAPTURE | 0x001A) |
| 252 | |
| 253 | /* Description: Set Vertical Crop Line |
| 254 | IN[0] - task handle. Handle of the task to start |
| 255 | IN[1] - Line |
| 256 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 257 | #define CX18_CPU_SET_VER_CROP_LINE (CPU_CMD_MASK_CAPTURE | 0x001B) |
| 258 | |
| 259 | /* Description: Set COP structure |
| 260 | IN[0] - task handle. Handle of the task to start |
| 261 | IN[1] - M |
| 262 | IN[2] - N |
| 263 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 264 | #define CX18_CPU_SET_GOP_STRUCTURE (CPU_CMD_MASK_CAPTURE | 0x001C) |
| 265 | |
| 266 | /* Description: Set Scene Change Detection |
| 267 | IN[0] - task handle. Handle of the task to start |
| 268 | IN[1] - scene change |
| 269 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 270 | #define CX18_CPU_SET_SCENE_CHANGE_DETECTION (CPU_CMD_MASK_CAPTURE | 0x001D) |
| 271 | |
| 272 | /* Description: Set Aspect Ratio |
| 273 | IN[0] - task handle. Handle of the task to start |
| 274 | IN[1] - AspectRatio |
| 275 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 276 | #define CX18_CPU_SET_ASPECT_RATIO (CPU_CMD_MASK_CAPTURE | 0x001E) |
| 277 | |
| 278 | /* Description: Set Skip Input Frame |
| 279 | IN[0] - task handle. Handle of the task to start |
| 280 | IN[1] - skip input frames |
| 281 | ReturnCode - One of the ERR_CAPTURE_... */ |
| 282 | #define CX18_CPU_SET_SKIP_INPUT_FRAME (CPU_CMD_MASK_CAPTURE | 0x001F) |
| 283 | |
| 284 | /* Description: Set sliced VBI parameters - |
| 285 | Note This API will only apply to MPEG and Sliced VBI Channels |
| 286 | IN[0] - Task handle |
| 287 | IN[1] - output type, 0 - CC, 1 - Moji, 2 - Teletext |
| 288 | IN[2] - start / stop line |
| 289 | bit[15:0] start line number |
| 290 | bit[31:16] stop line number |
| 291 | IN[3] - number of output frames per interrupt |
| 292 | IN[4] - VBI insertion mode |
| 293 | bit 0: output user data, 1 - enable |
| 294 | bit 1: output private stream, 1 - enable |
| 295 | bit 2: mux option, 0 - in GOP, 1 - in picture |
| 296 | bit[7:0] private stream ID |
| 297 | IN[5] - insertion period while mux option is in picture |
| 298 | ReturnCode - VBI data offset */ |
| 299 | #define CX18_CPU_SET_SLICED_VBI_PARAM (CPU_CMD_MASK_CAPTURE | 0x0020) |
| 300 | |
| 301 | /* Description: Set the user data place holder |
| 302 | IN[0] - type of data (0 for user) |
| 303 | IN[1] - Stuffing period |
| 304 | IN[2] - ID data size in word (less than 10) |
| 305 | IN[3] - Pointer to ID buffer */ |
| 306 | #define CX18_CPU_SET_USERDATA_PLACE_HOLDER (CPU_CMD_MASK_CAPTURE | 0x0021) |
| 307 | |
| 308 | |
| 309 | /* Description: |
| 310 | In[0] Task Handle |
| 311 | return parameter: |
| 312 | Out[0] Reserved |
| 313 | Out[1] Video PTS bit[32:2] of last output video frame. |
| 314 | Out[2] Video PTS bit[ 1:0] of last output video frame. |
| 315 | Out[3] Hardware Video PTS counter bit[31:0], |
| 316 | these bits get incremented on every 90kHz clock tick. |
| 317 | Out[4] Hardware Video PTS counter bit32, |
| 318 | these bits get incremented on every 90kHz clock tick. |
| 319 | ReturnCode */ |
| 320 | #define CX18_CPU_GET_ENC_PTS (CPU_CMD_MASK_CAPTURE | 0x0022) |
| 321 | |
| 322 | /* Below is the list of commands related to the data exchange */ |
| 323 | #define CPU_CMD_MASK_DE (CPU_CMD_MASK | 0x040000) |
| 324 | |
| 325 | /* Description: This command provides the physical base address of the local |
| 326 | DDR as viewed by EPU |
| 327 | IN[0] - Physical offset where EPU has the local DDR mapped |
| 328 | ReturnCode - One of the ERR_DE_... */ |
| 329 | #define CPU_CMD_DE_SetBase (CPU_CMD_MASK_DE | 0x0001) |
| 330 | |
| 331 | /* Description: This command provides the offsets in the device memory where |
| 332 | the 2 cx18_mdl_ack blocks reside |
| 333 | IN[0] - Task handle. Handle of the task to start |
| 334 | IN[1] - Offset of the first cx18_mdl_ack from the beginning of the |
| 335 | local DDR. |
| 336 | IN[2] - Offset of the second cx18_mdl_ack from the beginning of the |
| 337 | local DDR. |
| 338 | ReturnCode - One of the ERR_DE_... */ |
| 339 | #define CX18_CPU_DE_SET_MDL_ACK (CPU_CMD_MASK_DE | 0x0002) |
| 340 | |
| 341 | /* Description: This command provides the offset to a Memory Descriptor List |
| 342 | IN[0] - Task handle. Handle of the task to start |
| 343 | IN[1] - Offset of the MDL from the beginning of the local DDR. |
| 344 | IN[2] - Number of cx18_mdl structures in the array pointed to by IN[1] |
| 345 | IN[3] - Buffer ID |
| 346 | IN[4] - Total buffer length |
| 347 | ReturnCode - One of the ERR_DE_... */ |
| 348 | #define CX18_CPU_DE_SET_MDL (CPU_CMD_MASK_DE | 0x0005) |
| 349 | |
| 350 | /* Description: This command requests return of all current Memory |
| 351 | Descriptor Lists to the driver |
| 352 | IN[0] - Task handle. Handle of the task to start |
| 353 | ReturnCode - One of the ERR_DE_... */ |
Andy Walls | 3b5df8e | 2008-08-23 18:36:50 -0300 | [diff] [blame^] | 354 | #define CX18_CPU_DE_RELEASE_MDL (CPU_CMD_MASK_DE | 0x0006) |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 355 | |
| 356 | /* Description: This command signals the cpu that the dat buffer has been |
| 357 | consumed and ready for re-use. |
| 358 | IN[0] - Task handle. Handle of the task |
| 359 | IN[1] - Offset of the data block from the beginning of the local DDR. |
| 360 | IN[2] - Number of bytes in the data block |
| 361 | ReturnCode - One of the ERR_DE_... */ |
| 362 | /* #define CX18_CPU_DE_RELEASE_BUFFER (CPU_CMD_MASK_DE | 0x0007) */ |
| 363 | |
| 364 | /* No Error / Success */ |
| 365 | #define CNXT_OK 0x000000 |
| 366 | |
| 367 | /* Received unknown command */ |
| 368 | #define CXERR_UNK_CMD 0x000001 |
| 369 | |
| 370 | /* First parameter in the command is invalid */ |
| 371 | #define CXERR_INVALID_PARAM1 0x000002 |
| 372 | |
| 373 | /* Second parameter in the command is invalid */ |
| 374 | #define CXERR_INVALID_PARAM2 0x000003 |
| 375 | |
| 376 | /* Device interface is not open/found */ |
| 377 | #define CXERR_DEV_NOT_FOUND 0x000004 |
| 378 | |
| 379 | /* Requested function is not implemented/available */ |
| 380 | #define CXERR_NOTSUPPORTED 0x000005 |
| 381 | |
| 382 | /* Invalid pointer is provided */ |
| 383 | #define CXERR_BADPTR 0x000006 |
| 384 | |
| 385 | /* Unable to allocate memory */ |
| 386 | #define CXERR_NOMEM 0x000007 |
| 387 | |
| 388 | /* Object/Link not found */ |
| 389 | #define CXERR_LINK 0x000008 |
| 390 | |
| 391 | /* Device busy, command cannot be executed */ |
| 392 | #define CXERR_BUSY 0x000009 |
| 393 | |
| 394 | /* File/device/handle is not open. */ |
| 395 | #define CXERR_NOT_OPEN 0x00000A |
| 396 | |
| 397 | /* Value is out of range */ |
| 398 | #define CXERR_OUTOFRANGE 0x00000B |
| 399 | |
| 400 | /* Buffer overflow */ |
| 401 | #define CXERR_OVERFLOW 0x00000C |
| 402 | |
| 403 | /* Version mismatch */ |
| 404 | #define CXERR_BADVER 0x00000D |
| 405 | |
| 406 | /* Operation timed out */ |
| 407 | #define CXERR_TIMEOUT 0x00000E |
| 408 | |
| 409 | /* Operation aborted */ |
| 410 | #define CXERR_ABORT 0x00000F |
| 411 | |
| 412 | /* Specified I2C device not found for read/write */ |
| 413 | #define CXERR_I2CDEV_NOTFOUND 0x000010 |
| 414 | |
| 415 | /* Error in I2C data xfer (but I2C device is present) */ |
| 416 | #define CXERR_I2CDEV_XFERERR 0x000011 |
| 417 | |
| 418 | /* Chanel changing component not ready */ |
| 419 | #define CXERR_CHANNELNOTREADY 0x000012 |
| 420 | |
| 421 | /* PPU (Presensation/Decoder) mail box is corrupted */ |
| 422 | #define CXERR_PPU_MB_CORRUPT 0x000013 |
| 423 | |
| 424 | /* CPU (Capture/Encoder) mail box is corrupted */ |
| 425 | #define CXERR_CPU_MB_CORRUPT 0x000014 |
| 426 | |
| 427 | /* APU (Audio) mail box is corrupted */ |
| 428 | #define CXERR_APU_MB_CORRUPT 0x000015 |
| 429 | |
| 430 | /* Unable to open file for reading */ |
| 431 | #define CXERR_FILE_OPEN_READ 0x000016 |
| 432 | |
| 433 | /* Unable to open file for writing */ |
| 434 | #define CXERR_FILE_OPEN_WRITE 0x000017 |
| 435 | |
| 436 | /* Unable to find the I2C section specified */ |
| 437 | #define CXERR_I2C_BADSECTION 0x000018 |
| 438 | |
| 439 | /* Error in I2C data xfer (but I2C device is present) */ |
| 440 | #define CXERR_I2CDEV_DATALOW 0x000019 |
| 441 | |
| 442 | /* Error in I2C data xfer (but I2C device is present) */ |
| 443 | #define CXERR_I2CDEV_CLOCKLOW 0x00001A |
| 444 | |
| 445 | /* No Interrupt received from HW (for I2C access) */ |
| 446 | #define CXERR_NO_HW_I2C_INTR 0x00001B |
| 447 | |
| 448 | /* RPU is not ready to accept commands! */ |
| 449 | #define CXERR_RPU_NOT_READY 0x00001C |
| 450 | |
| 451 | /* RPU is not ready to accept commands! */ |
| 452 | #define CXERR_RPU_NO_ACK 0x00001D |
| 453 | |
| 454 | /* The are no buffers ready. Try again soon! */ |
| 455 | #define CXERR_NODATA_AGAIN 0x00001E |
| 456 | |
| 457 | /* The stream is stopping. Function not alllowed now! */ |
| 458 | #define CXERR_STOPPING_STATUS 0x00001F |
| 459 | |
| 460 | /* Trying to access hardware when the power is turned OFF */ |
| 461 | #define CXERR_DEVPOWER_OFF 0x000020 |
| 462 | |
| 463 | #endif /* CX23418_H */ |