blob: 17f9469201590f1617fcd6661ed14b6bde24afc8 [file] [log] [blame]
Bryan Wu1394f032007-05-06 14:50:22 -07001#
2# For a description of the syntax of this configuration file,
3# see Documentation/kbuild/kconfig-language.txt.
4#
5
6mainmenu "uClinux/Blackfin (w/o MMU) Kernel Configuration"
7
8config MMU
9 bool
10 default n
11
12config FPU
13 bool
14 default n
15
16config RWSEM_GENERIC_SPINLOCK
17 bool
18 default y
19
20config RWSEM_XCHGADD_ALGORITHM
21 bool
22 default n
23
24config BLACKFIN
25 bool
26 default y
27
Aubrey Lie3defff2007-05-21 18:09:11 +080028config ZONE_DMA
29 bool
30 default y
31
Bryan Wu1394f032007-05-06 14:50:22 -070032config BFIN
33 bool
34 default y
35
36config SEMAPHORE_SLEEPERS
37 bool
38 default y
39
40config GENERIC_FIND_NEXT_BIT
41 bool
42 default y
43
44config GENERIC_HWEIGHT
45 bool
46 default y
47
48config GENERIC_HARDIRQS
49 bool
50 default y
51
52config GENERIC_IRQ_PROBE
53 bool
54 default y
55
56config GENERIC_TIME
57 bool
58 default n
59
Michael Hennerichb2d15832007-07-24 15:46:36 +080060config GENERIC_GPIO
Bryan Wu1394f032007-05-06 14:50:22 -070061 bool
62 default y
63
64config FORCE_MAX_ZONEORDER
65 int
66 default "14"
67
68config GENERIC_CALIBRATE_DELAY
69 bool
70 default y
71
72config IRQCHIP_DEMUX_GPIO
73 bool
Michael Hennerich34e0fc82007-07-12 16:17:18 +080074 depends on (BF53x || BF561 || BF54x)
Bryan Wu1394f032007-05-06 14:50:22 -070075 default y
76
77source "init/Kconfig"
78source "kernel/Kconfig.preempt"
79
80menu "Blackfin Processor Options"
81
82comment "Processor and Board Settings"
83
84choice
85 prompt "CPU"
86 default BF533
87
88config BF531
89 bool "BF531"
90 help
91 BF531 Processor Support.
92
93config BF532
94 bool "BF532"
95 help
96 BF532 Processor Support.
97
98config BF533
99 bool "BF533"
100 help
101 BF533 Processor Support.
102
103config BF534
104 bool "BF534"
105 help
106 BF534 Processor Support.
107
108config BF536
109 bool "BF536"
110 help
111 BF536 Processor Support.
112
113config BF537
114 bool "BF537"
115 help
116 BF537 Processor Support.
117
Roy Huang24a07a12007-07-12 22:41:45 +0800118config BF542
119 bool "BF542"
120 help
121 BF542 Processor Support.
122
123config BF544
124 bool "BF544"
125 help
126 BF544 Processor Support.
127
128config BF548
129 bool "BF548"
130 help
131 BF548 Processor Support.
132
133config BF549
134 bool "BF549"
135 help
136 BF549 Processor Support.
137
Bryan Wu1394f032007-05-06 14:50:22 -0700138config BF561
139 bool "BF561"
140 help
141 Not Supported Yet - Work in progress - BF561 Processor Support.
142
143endchoice
144
145choice
146 prompt "Silicon Rev"
147 default BF_REV_0_2 if BF537
148 default BF_REV_0_3 if BF533
Roy Huang24a07a12007-07-12 22:41:45 +0800149 default BF_REV_0_0 if BF549
150
151config BF_REV_0_0
152 bool "0.0"
153 depends on (BF549)
Bryan Wu1394f032007-05-06 14:50:22 -0700154
155config BF_REV_0_2
156 bool "0.2"
157 depends on (BF537 || BF536 || BF534)
158
159config BF_REV_0_3
160 bool "0.3"
161 depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
162
163config BF_REV_0_4
164 bool "0.4"
165 depends on (BF561 || BF533 || BF532 || BF531)
166
167config BF_REV_0_5
168 bool "0.5"
169 depends on (BF561 || BF533 || BF532 || BF531)
170
Jie Zhangde3025f2007-06-25 18:04:12 +0800171config BF_REV_ANY
172 bool "any"
173
174config BF_REV_NONE
175 bool "none"
176
Bryan Wu1394f032007-05-06 14:50:22 -0700177endchoice
178
Roy Huang24a07a12007-07-12 22:41:45 +0800179config BF53x
180 bool
181 depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
182 default y
183
184config BF54x
185 bool
186 depends on (BF542 || BF544 || BF548 || BF549)
187 default y
188
Bryan Wu1394f032007-05-06 14:50:22 -0700189config BFIN_DUAL_CORE
190 bool
191 depends on (BF561)
192 default y
193
194config BFIN_SINGLE_CORE
195 bool
196 depends on !BFIN_DUAL_CORE
197 default y
198
199choice
200 prompt "System type"
201 default BFIN533_STAMP
202 help
203 Do NOT change the board here. Please use the top level
204 configuration to ensure that all the other settings are
205 correct.
206
207config BFIN533_EZKIT
208 bool "BF533-EZKIT"
209 depends on (BF533 || BF532 || BF531)
210 help
211 BF533-EZKIT-LITE board Support.
212
213config BFIN533_STAMP
214 bool "BF533-STAMP"
215 depends on (BF533 || BF532 || BF531)
216 help
217 BF533-STAMP board Support.
218
219config BFIN537_STAMP
220 bool "BF537-STAMP"
221 depends on (BF537 || BF536 || BF534)
222 help
223 BF537-STAMP board Support.
224
225config BFIN533_BLUETECHNIX_CM
226 bool "Bluetechnix CM-BF533"
227 depends on (BF533)
228 help
229 CM-BF533 support for EVAL- and DEV-Board.
230
231config BFIN537_BLUETECHNIX_CM
232 bool "Bluetechnix CM-BF537"
233 depends on (BF537)
234 help
235 CM-BF537 support for EVAL- and DEV-Board.
236
Roy Huang24a07a12007-07-12 22:41:45 +0800237config BFIN548_EZKIT
238 bool "BF548-EZKIT"
239 depends on (BF548 || BF549)
240 help
241 BFIN548-EZKIT board Support.
242
Bryan Wu1394f032007-05-06 14:50:22 -0700243config BFIN561_BLUETECHNIX_CM
Mike Frysinger0a290592007-05-21 18:09:21 +0800244 bool "Bluetechnix CM-BF561"
Bryan Wu1394f032007-05-06 14:50:22 -0700245 depends on (BF561)
246 help
247 CM-BF561 support for EVAL- and DEV-Board.
248
249config BFIN561_EZKIT
250 bool "BF561-EZKIT"
251 depends on (BF561)
252 help
253 BF561-EZKIT-LITE board Support.
254
Mike Frysinger0a290592007-05-21 18:09:21 +0800255config BFIN561_TEPLA
256 bool "BF561-TEPLA"
257 depends on (BF561)
258 help
259 BF561-TEPLA board Support.
260
Bryan Wu1394f032007-05-06 14:50:22 -0700261config PNAV10
262 bool "PNAV 1.0 board"
263 depends on (BF537)
264 help
265 PNAV 1.0 board Support.
266
267config GENERIC_BOARD
268 bool "Custom"
269 depends on (BF537 || BF536 \
270 || BF534 || BF561 || BF535 || BF533 || BF532 || BF531)
271 help
272 GENERIC or Custom board Support.
273
274endchoice
275
276config MEM_GENERIC_BOARD
277 bool
278 depends on GENERIC_BOARD
279 default y
280
281config MEM_MT48LC64M4A2FB_7E
282 bool
283 depends on (BFIN533_STAMP)
284 default y
285
286config MEM_MT48LC16M16A2TG_75
287 bool
288 depends on (BFIN533_EZKIT || BFIN561_EZKIT \
289 || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM)
290 default y
291
292config MEM_MT48LC32M8A2_75
293 bool
294 depends on (BFIN537_STAMP || PNAV10)
295 default y
296
297config MEM_MT48LC8M32B2B5_7
298 bool
299 depends on (BFIN561_BLUETECHNIX_CM)
300 default y
301
302config BFIN_SHARED_FLASH_ENET
303 bool
304 depends on (BFIN533_STAMP)
305 default y
306
307source "arch/blackfin/mach-bf533/Kconfig"
308source "arch/blackfin/mach-bf561/Kconfig"
309source "arch/blackfin/mach-bf537/Kconfig"
Roy Huang24a07a12007-07-12 22:41:45 +0800310source "arch/blackfin/mach-bf548/Kconfig"
Bryan Wu1394f032007-05-06 14:50:22 -0700311
312menu "Board customizations"
313
314config CMDLINE_BOOL
315 bool "Default bootloader kernel arguments"
316
317config CMDLINE
318 string "Initial kernel command string"
319 depends on CMDLINE_BOOL
320 default "console=ttyBF0,57600"
321 help
322 If you don't have a boot loader capable of passing a command line string
323 to the kernel, you may specify one here. As a minimum, you should specify
324 the memory size and the root device (e.g., mem=8M, root=/dev/nfs).
325
Robin Getzf16295e2007-08-03 18:07:17 +0800326comment "Clock/PLL Setup"
Bryan Wu1394f032007-05-06 14:50:22 -0700327
328config CLKIN_HZ
329 int "Crystal Frequency in Hz"
330 default "11059200" if BFIN533_STAMP
331 default "27000000" if BFIN533_EZKIT
332 default "25000000" if BFIN537_STAMP
333 default "30000000" if BFIN561_EZKIT
334 default "24576000" if PNAV10
335 help
336 The frequency of CLKIN crystal oscillator on the board in Hz.
337
Robin Getzf16295e2007-08-03 18:07:17 +0800338config BFIN_KERNEL_CLOCK
339 bool "Re-program Clocks while Kernel boots?"
340 default n
341 help
342 This option decides if kernel clocks are re-programed from the
343 bootloader settings. If the clocks are not set, the SDRAM settings
344 are also not changed, and the Bootloader does 100% of the hardware
345 configuration.
346
347config PLL_BYPASS
348 bool "Bypass PLL"
349 depends on BFIN_KERNEL_CLOCK
350 default n
351
352config CLKIN_HALF
353 bool "Half Clock In"
354 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
355 default n
356 help
357 If this is set the clock will be divided by 2, before it goes to the PLL.
358
359config VCO_MULT
360 int "VCO Multiplier"
361 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
362 range 1 64
363 default "22" if BFIN533_EZKIT
364 default "45" if BFIN533_STAMP
365 default "20" if BFIN537_STAMP
366 default "22" if BFIN533_BLUETECHNIX_CM
367 default "20" if BFIN537_BLUETECHNIX_CM
368 default "20" if BFIN561_BLUETECHNIX_CM
369 default "20" if BFIN561_EZKIT
370 help
371 This controls the frequency of the on-chip PLL. This can be between 1 and 64.
372 PLL Frequency = (Crystal Frequency) * (this setting)
373
374choice
375 prompt "Core Clock Divider"
376 depends on BFIN_KERNEL_CLOCK
377 default CCLK_DIV_1
378 help
379 This sets the frequency of the core. It can be 1, 2, 4 or 8
380 Core Frequency = (PLL frequency) / (this setting)
381
382config CCLK_DIV_1
383 bool "1"
384
385config CCLK_DIV_2
386 bool "2"
387
388config CCLK_DIV_4
389 bool "4"
390
391config CCLK_DIV_8
392 bool "8"
393endchoice
394
395config SCLK_DIV
396 int "System Clock Divider"
397 depends on BFIN_KERNEL_CLOCK
398 range 1 15
399 default 5 if BFIN533_EZKIT
400 default 5 if BFIN533_STAMP
401 default 4 if BFIN537_STAMP
402 default 5 if BFIN533_BLUETECHNIX_CM
403 default 4 if BFIN537_BLUETECHNIX_CM
404 default 4 if BFIN561_BLUETECHNIX_CM
405 default 5 if BFIN561_EZKIT
406 help
407 This sets the frequency of the system clock (including SDRAM or DDR).
408 This can be between 1 and 15
409 System Clock = (PLL frequency) / (this setting)
410
411#
412# Max & Min Speeds for various Chips
413#
414config MAX_VCO_HZ
415 int
416 default 600000000 if BF522
417 default 600000000 if BF525
418 default 600000000 if BF527
419 default 400000000 if BF531
420 default 400000000 if BF532
421 default 750000000 if BF533
422 default 500000000 if BF534
423 default 400000000 if BF536
424 default 600000000 if BF537
425 default 533000000 if BF538
426 default 533000000 if BF539
427 default 600000000 if BF542
428 default 533000000 if BF544
429 default 533000000 if BF549
430 default 600000000 if BF561
431
432config MIN_VCO_HZ
433 int
434 default 50000000
435
436config MAX_SCLK_HZ
437 int
438 default 133000000
439
440config MIN_SCLK_HZ
441 int
442 default 27000000
443
444comment "Kernel Timer/Scheduler"
445
446source kernel/Kconfig.hz
447
448comment "Memory Setup"
449
Bryan Wu1394f032007-05-06 14:50:22 -0700450config MEM_SIZE
451 int "SDRAM Memory Size in MBytes"
452 default 32 if BFIN533_EZKIT
453 default 64 if BFIN537_STAMP
454 default 64 if BFIN561_EZKIT
455 default 128 if BFIN533_STAMP
456 default 64 if PNAV10
457
458config MEM_ADD_WIDTH
459 int "SDRAM Memory Address Width"
460 default 9 if BFIN533_EZKIT
461 default 9 if BFIN561_EZKIT
462 default 10 if BFIN537_STAMP
463 default 11 if BFIN533_STAMP
464 default 10 if PNAV10
465
466config ENET_FLASH_PIN
467 int "PF port/pin used for flash and ethernet sharing"
468 depends on (BFIN533_STAMP)
469 default 0
470 help
471 PF port/pin used for flash and ethernet sharing to allow other PF
472 pins to be used on other platforms without having to touch common
473 code.
474 For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc.
475
476config BOOT_LOAD
477 hex "Kernel load address for booting"
478 default "0x1000"
479 help
480 This option allows you to set the load address of the kernel.
481 This can be useful if you are on a board which has a small amount
482 of memory or you wish to reserve some memory at the beginning of
483 the address space.
484
485 Note that you generally want to keep this value at or above 4k
486 (0x1000) as this will allow the kernel to capture NULL pointer
487 references.
488
489comment "LED Status Indicators"
490 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
491
492config BFIN_ALIVE_LED
493 bool "Enable Board Alive"
494 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
495 default n
496 help
497 Blink the LEDs you select when the kernel is running. Helps detect
498 a hung kernel.
499
500config BFIN_ALIVE_LED_NUM
501 int "LED"
502 depends on BFIN_ALIVE_LED
503 range 1 3 if BFIN533_STAMP
504 default "3" if BFIN533_STAMP
505 help
506 Select the LED (marked on the board) for you to blink.
507
508config BFIN_IDLE_LED
509 bool "Enable System Load/Idle LED"
510 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
511 default n
512 help
513 Blinks the LED you select when to determine kernel load.
514
515config BFIN_IDLE_LED_NUM
516 int "LED"
517 depends on BFIN_IDLE_LED
518 range 1 3 if BFIN533_STAMP
519 default "2" if BFIN533_STAMP
520 help
521 Select the LED (marked on the board) for you to blink.
522
523#
524# Sorry - but you need to put the hex address here -
525#
526
527# Flag Data register
528config BFIN_ALIVE_LED_PORT
529 hex
530 default 0xFFC00700 if (BFIN533_STAMP)
531
532# Peripheral Flag Direction Register
533config BFIN_ALIVE_LED_DPORT
534 hex
535 default 0xFFC00730 if (BFIN533_STAMP)
536
537config BFIN_ALIVE_LED_PIN
538 hex
539 default 0x04 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 1)
540 default 0x08 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 2)
541 default 0x10 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 3)
542
543config BFIN_IDLE_LED_PORT
544 hex
545 default 0xFFC00700 if (BFIN533_STAMP)
546
547# Peripheral Flag Direction Register
548config BFIN_IDLE_LED_DPORT
549 hex
550 default 0xFFC00730 if (BFIN533_STAMP)
551
552config BFIN_IDLE_LED_PIN
553 hex
554 default 0x04 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 1)
555 default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2)
556 default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3)
557
Bryan Wu1394f032007-05-06 14:50:22 -0700558endmenu
559
560
561menu "Blackfin Kernel Optimizations"
562
Bryan Wu1394f032007-05-06 14:50:22 -0700563comment "Memory Optimizations"
564
565config I_ENTRY_L1
566 bool "Locate interrupt entry code in L1 Memory"
567 default y
568 help
569 If enabled interrupt entry code (STORE/RESTORE CONTEXT) is linked
570 into L1 instruction memory.(less latency)
571
572config EXCPT_IRQ_SYSC_L1
573 bool "Locate entire ASM lowlevel excepetion / interrupt - Syscall and CPLB handler code in L1 Memory"
574 default y
575 help
576 If enabled entire ASM lowlevel exception and interrupt entry code (STORE/RESTORE CONTEXT) is linked
577 into L1 instruction memory.(less latency)
578
579config DO_IRQ_L1
580 bool "Locate frequently called do_irq dispatcher function in L1 Memory"
581 default y
582 help
583 If enabled frequently called do_irq dispatcher function is linked
584 into L1 instruction memory.(less latency)
585
586config CORE_TIMER_IRQ_L1
587 bool "Locate frequently called timer_interrupt() function in L1 Memory"
588 default y
589 help
590 If enabled frequently called timer_interrupt() function is linked
591 into L1 instruction memory.(less latency)
592
593config IDLE_L1
594 bool "Locate frequently idle function in L1 Memory"
595 default y
596 help
597 If enabled frequently called idle function is linked
598 into L1 instruction memory.(less latency)
599
600config SCHEDULE_L1
601 bool "Locate kernel schedule function in L1 Memory"
602 default y
603 help
604 If enabled frequently called kernel schedule is linked
605 into L1 instruction memory.(less latency)
606
607config ARITHMETIC_OPS_L1
608 bool "Locate kernel owned arithmetic functions in L1 Memory"
609 default y
610 help
611 If enabled arithmetic functions are linked
612 into L1 instruction memory.(less latency)
613
614config ACCESS_OK_L1
615 bool "Locate access_ok function in L1 Memory"
616 default y
617 help
618 If enabled access_ok function is linked
619 into L1 instruction memory.(less latency)
620
621config MEMSET_L1
622 bool "Locate memset function in L1 Memory"
623 default y
624 help
625 If enabled memset function is linked
626 into L1 instruction memory.(less latency)
627
628config MEMCPY_L1
629 bool "Locate memcpy function in L1 Memory"
630 default y
631 help
632 If enabled memcpy function is linked
633 into L1 instruction memory.(less latency)
634
635config SYS_BFIN_SPINLOCK_L1
636 bool "Locate sys_bfin_spinlock function in L1 Memory"
637 default y
638 help
639 If enabled sys_bfin_spinlock function is linked
640 into L1 instruction memory.(less latency)
641
642config IP_CHECKSUM_L1
643 bool "Locate IP Checksum function in L1 Memory"
644 default n
645 help
646 If enabled IP Checksum function is linked
647 into L1 instruction memory.(less latency)
648
649config CACHELINE_ALIGNED_L1
650 bool "Locate cacheline_aligned data to L1 Data Memory"
Michael Hennerich157cc5a2007-07-12 16:20:21 +0800651 default y if !BF54x
652 default n if BF54x
Bryan Wu1394f032007-05-06 14:50:22 -0700653 depends on !BF531
654 help
655 If enabled cacheline_anligned data is linked
656 into L1 data memory.(less latency)
657
658config SYSCALL_TAB_L1
659 bool "Locate Syscall Table L1 Data Memory"
660 default n
661 depends on !BF531
662 help
663 If enabled the Syscall LUT is linked
664 into L1 data memory.(less latency)
665
666config CPLB_SWITCH_TAB_L1
667 bool "Locate CPLB Switch Tables L1 Data Memory"
668 default n
669 depends on !BF531
670 help
671 If enabled the CPLB Switch Tables are linked
672 into L1 data memory.(less latency)
673
674endmenu
675
676
677choice
678 prompt "Kernel executes from"
679 help
680 Choose the memory type that the kernel will be running in.
681
682config RAMKERNEL
683 bool "RAM"
684 help
685 The kernel will be resident in RAM when running.
686
687config ROMKERNEL
688 bool "ROM"
689 help
690 The kernel will be resident in FLASH/ROM when running.
691
692endchoice
693
694source "mm/Kconfig"
695
Bryan Wudb0fa202007-07-12 14:55:05 +0800696config LARGE_ALLOCS
697 bool "Allow allocating large blocks (> 1MB) of memory"
698 help
699 Allow the slab memory allocator to keep chains for very large
700 memory sizes - upto 32MB. You may need this if your system has
701 a lot of RAM, and you need to able to allocate very large
702 contiguous chunks. If unsure, say N.
703
Bryan Wu1394f032007-05-06 14:50:22 -0700704config BFIN_DMA_5XX
705 bool "Enable DMA Support"
Roy Huang24a07a12007-07-12 22:41:45 +0800706 depends on (BF533 || BF532 || BF531 || BF537 || BF536 || BF534 || BF561 || BF54x)
Bryan Wu1394f032007-05-06 14:50:22 -0700707 default y
708 help
709 DMA driver for BF5xx.
710
711choice
712 prompt "Uncached SDRAM region"
713 default DMA_UNCACHED_1M
714 depends BFIN_DMA_5XX
715config DMA_UNCACHED_2M
716 bool "Enable 2M DMA region"
717config DMA_UNCACHED_1M
718 bool "Enable 1M DMA region"
719config DMA_UNCACHED_NONE
720 bool "Disable DMA region"
721endchoice
722
723
724comment "Cache Support"
Robin Getz3bebca22007-10-10 23:55:26 +0800725config BFIN_ICACHE
Bryan Wu1394f032007-05-06 14:50:22 -0700726 bool "Enable ICACHE"
Robin Getz3bebca22007-10-10 23:55:26 +0800727config BFIN_DCACHE
Bryan Wu1394f032007-05-06 14:50:22 -0700728 bool "Enable DCACHE"
Robin Getz3bebca22007-10-10 23:55:26 +0800729config BFIN_DCACHE_BANKA
Bryan Wu1394f032007-05-06 14:50:22 -0700730 bool "Enable only 16k BankA DCACHE - BankB is SRAM"
Robin Getz3bebca22007-10-10 23:55:26 +0800731 depends on BFIN_DCACHE && !BF531
Bryan Wu1394f032007-05-06 14:50:22 -0700732 default n
Robin Getz3bebca22007-10-10 23:55:26 +0800733config BFIN_ICACHE_LOCK
734 bool "Enable Instruction Cache Locking"
Bryan Wu1394f032007-05-06 14:50:22 -0700735
736choice
737 prompt "Policy"
Robin Getz3bebca22007-10-10 23:55:26 +0800738 depends on BFIN_DCACHE
739 default BFIN_WB
740config BFIN_WB
Bryan Wu1394f032007-05-06 14:50:22 -0700741 bool "Write back"
742 help
743 Write Back Policy:
744 Cached data will be written back to SDRAM only when needed.
745 This can give a nice increase in performance, but beware of
746 broken drivers that do not properly invalidate/flush their
747 cache.
748
749 Write Through Policy:
750 Cached data will always be written back to SDRAM when the
751 cache is updated. This is a completely safe setting, but
752 performance is worse than Write Back.
753
754 If you are unsure of the options and you want to be safe,
755 then go with Write Through.
756
Robin Getz3bebca22007-10-10 23:55:26 +0800757config BFIN_WT
Bryan Wu1394f032007-05-06 14:50:22 -0700758 bool "Write through"
759 help
760 Write Back Policy:
761 Cached data will be written back to SDRAM only when needed.
762 This can give a nice increase in performance, but beware of
763 broken drivers that do not properly invalidate/flush their
764 cache.
765
766 Write Through Policy:
767 Cached data will always be written back to SDRAM when the
768 cache is updated. This is a completely safe setting, but
769 performance is worse than Write Back.
770
771 If you are unsure of the options and you want to be safe,
772 then go with Write Through.
773
774endchoice
775
776config L1_MAX_PIECE
777 int "Set the max L1 SRAM pieces"
778 default 16
779 help
780 Set the max memory pieces for the L1 SRAM allocation algorithm.
781 Min value is 16. Max value is 1024.
782
Bryan Wu1394f032007-05-06 14:50:22 -0700783comment "Asynchonous Memory Configuration"
784
785menu "EBIU_AMBCTL Global Control"
786config C_AMCKEN
787 bool "Enable CLKOUT"
788 default y
789
790config C_CDPRIO
791 bool "DMA has priority over core for ext. accesses"
Michael Hennerich9be343c2007-07-12 11:58:44 +0800792 depends on !BF54x
Bryan Wu1394f032007-05-06 14:50:22 -0700793 default n
794
795config C_B0PEN
796 depends on BF561
797 bool "Bank 0 16 bit packing enable"
798 default y
799
800config C_B1PEN
801 depends on BF561
802 bool "Bank 1 16 bit packing enable"
803 default y
804
805config C_B2PEN
806 depends on BF561
807 bool "Bank 2 16 bit packing enable"
808 default y
809
810config C_B3PEN
811 depends on BF561
812 bool "Bank 3 16 bit packing enable"
813 default n
814
815choice
816 prompt"Enable Asynchonous Memory Banks"
817 default C_AMBEN_ALL
818
819config C_AMBEN
820 bool "Disable All Banks"
821
822config C_AMBEN_B0
823 bool "Enable Bank 0"
824
825config C_AMBEN_B0_B1
826 bool "Enable Bank 0 & 1"
827
828config C_AMBEN_B0_B1_B2
829 bool "Enable Bank 0 & 1 & 2"
830
831config C_AMBEN_ALL
832 bool "Enable All Banks"
833endchoice
834endmenu
835
836menu "EBIU_AMBCTL Control"
837config BANK_0
838 hex "Bank 0"
839 default 0x7BB0
840
841config BANK_1
842 hex "Bank 1"
843 default 0x7BB0
844
845config BANK_2
846 hex "Bank 2"
847 default 0x7BB0
848
849config BANK_3
850 hex "Bank 3"
851 default 0x99B3
852endmenu
853
854endmenu
855
856#############################################################################
857menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
858
859config PCI
860 bool "PCI support"
861 help
862 Support for PCI bus.
863
864source "drivers/pci/Kconfig"
865
866config HOTPLUG
867 bool "Support for hot-pluggable device"
868 help
869 Say Y here if you want to plug devices into your computer while
870 the system is running, and be able to use them quickly. In many
871 cases, the devices can likewise be unplugged at any time too.
872
873 One well known example of this is PCMCIA- or PC-cards, credit-card
874 size devices such as network cards, modems or hard drives which are
875 plugged into slots found on all modern laptop computers. Another
876 example, used on modern desktops as well as laptops, is USB.
877
878 Enable HOTPLUG and KMOD, and build a modular kernel. Get agent
879 software (at <http://linux-hotplug.sourceforge.net/>) and install it.
880 Then your kernel will automatically call out to a user mode "policy
881 agent" (/sbin/hotplug) to load modules and set up software needed
882 to use devices as you hotplug them.
883
884source "drivers/pcmcia/Kconfig"
885
886source "drivers/pci/hotplug/Kconfig"
887
888endmenu
889
890menu "Executable file formats"
891
892source "fs/Kconfig.binfmt"
893
894endmenu
895
896menu "Power management options"
897source "kernel/power/Kconfig"
898
899choice
900 prompt "Select PM Wakeup Event Source"
901 default PM_WAKEUP_GPIO_BY_SIC_IWR
902 depends on PM
903 help
904 If you have a GPIO already configured as input with the corresponding PORTx_MASK
905 bit set - "Specify Wakeup Event by SIC_IWR value"
906
907config PM_WAKEUP_GPIO_BY_SIC_IWR
908 bool "Specify Wakeup Event by SIC_IWR value"
909config PM_WAKEUP_BY_GPIO
910 bool "Cause Wakeup Event by GPIO"
911config PM_WAKEUP_GPIO_API
912 bool "Configure Wakeup Event by PM GPIO API"
913
914endchoice
915
916config PM_WAKEUP_SIC_IWR
917 hex "Wakeup Events (SIC_IWR)"
918 depends on PM_WAKEUP_GPIO_BY_SIC_IWR
919 default 0x80000000 if (BF537 || BF536 || BF534)
920 default 0x100000 if (BF533 || BF532 || BF531)
921
922config PM_WAKEUP_GPIO_NUMBER
923 int "Wakeup GPIO number"
924 range 0 47
925 depends on PM_WAKEUP_BY_GPIO
926 default 2 if BFIN537_STAMP
927
928choice
929 prompt "GPIO Polarity"
930 depends on PM_WAKEUP_BY_GPIO
931 default PM_WAKEUP_GPIO_POLAR_H
932config PM_WAKEUP_GPIO_POLAR_H
933 bool "Active High"
934config PM_WAKEUP_GPIO_POLAR_L
935 bool "Active Low"
936config PM_WAKEUP_GPIO_POLAR_EDGE_F
937 bool "Falling EDGE"
938config PM_WAKEUP_GPIO_POLAR_EDGE_R
939 bool "Rising EDGE"
940config PM_WAKEUP_GPIO_POLAR_EDGE_B
941 bool "Both EDGE"
942endchoice
943
944endmenu
945
Roy Huang24a07a12007-07-12 22:41:45 +0800946if (BF537 || BF533 || BF54x)
Bryan Wu1394f032007-05-06 14:50:22 -0700947
948menu "CPU Frequency scaling"
949
950source "drivers/cpufreq/Kconfig"
951
952config CPU_FREQ
953 bool
954 default n
955 help
956 If you want to enable this option, you should select the
957 DPMC driver from Character Devices.
958endmenu
959
960endif
961
962source "net/Kconfig"
963
964source "drivers/Kconfig"
965
966source "fs/Kconfig"
967
968source "arch/blackfin/oprofile/Kconfig"
969
970menu "Kernel hacking"
971
972source "lib/Kconfig.debug"
973
974config DEBUG_HWERR
975 bool "Hardware error interrupt debugging"
976 depends on DEBUG_KERNEL
977 help
978 When enabled, the hardware error interrupt is never disabled, and
979 will happen immediately when an error condition occurs. This comes
980 at a slight cost in code size, but is necessary if you are getting
981 hardware error interrupts and need to know where they are coming
982 from.
983
984config DEBUG_ICACHE_CHECK
985 bool "Check Instruction cache coherancy"
986 depends on DEBUG_KERNEL
987 depends on DEBUG_HWERR
988 help
989 Say Y here if you are getting wierd unexplained errors. This will
990 ensure that icache is what SDRAM says it should be, by doing a
991 byte wise comparision between SDRAM and instruction cache. This
992 also relocates the irq_panic() function to L1 memory, (which is
993 un-cached).
994
995config DEBUG_KERNEL_START
996 bool "Debug Kernel Startup"
997 depends on DEBUG_KERNEL
998 help
999 Say Y here to put in an mini-execption handler before the kernel
1000 replaces the bootloader exception handler. This will stop kernels
1001 from dieing at startup with no visible error messages.
1002
1003config DEBUG_SERIAL_EARLY_INIT
1004 bool "Initialize serial driver early"
1005 default n
1006 depends on SERIAL_BFIN
1007 help
1008 Say Y here if you want to get kernel output early when kernel
1009 crashes before the normal console initialization. If this option
1010 is enable, console output will always go to the ttyBF0, no matter
1011 what kernel boot paramters you set.
1012
1013config DEBUG_HUNT_FOR_ZERO
1014 bool "Catch NULL pointer reads/writes"
1015 default y
1016 help
1017 Say Y here to catch reads/writes to anywhere in the memory range
1018 from 0x0000 - 0x0FFF (the first 4k) of memory. This is useful in
1019 catching common programming errors such as NULL pointer dereferences.
1020
1021 Misbehaving applications will be killed (generate a SEGV) while the
1022 kernel will trigger a panic.
1023
1024 Enabling this option will take up an extra entry in CPLB table.
1025 Otherwise, there is no extra overhead.
1026
Robin Getz518039b2007-07-25 11:03:28 +08001027config DEBUG_BFIN_HWTRACE_ON
1028 bool "Turn on Blackfin's Hardware Trace"
1029 default y
1030 help
1031 All Blackfins include a Trace Unit which stores a history of the last
1032 16 changes in program flow taken by the program sequencer. The history
1033 allows the user to recreate the program sequencer’s recent path. This
1034 can be handy when an application dies - we print out the execution
1035 path of how it got to the offending instruction.
1036
1037 By turning this off, you may save a tiny amount of power.
1038
1039choice
1040 prompt "Omit loop Tracing"
1041 default DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1042 depends on DEBUG_BFIN_HWTRACE_ON
1043 help
1044 The trace buffer can be configured to omit recording of changes in
1045 program flow that match either the last entry or one of the last
1046 two entries. Omitting one of these entries from the record prevents
1047 the trace buffer from overflowing because of any sort of loop (for, do
1048 while, etc) in the program.
1049
1050 Because zero-overhead Hardware loops are not recorded in the trace buffer,
1051 this feature can be used to prevent trace overflow from loops that
1052 are nested four deep.
1053
1054config DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1055 bool "Trace all Loops"
1056 help
1057 The trace buffer records all changes of flow
1058
1059config DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
1060 bool "Compress single-level loops"
1061 help
1062 The trace buffer does not record single loops - helpful if trace
1063 is spinning on a while or do loop.
1064
1065config DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
1066 bool "Compress two-level loops"
1067 help
1068 The trace buffer does not record loops two levels deep. Helpful if
1069 the trace is spinning in a nested loop
1070
1071endchoice
1072
1073config DEBUG_BFIN_HWTRACE_COMPRESSION
1074 int
1075 depends on DEBUG_BFIN_HWTRACE_ON
1076 default 0 if DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1077 default 1 if DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
1078 default 2 if DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
1079
1080
1081config DEBUG_BFIN_HWTRACE_EXPAND
1082 bool "Expand Trace Buffer greater than 16 entries"
1083 depends on DEBUG_BFIN_HWTRACE_ON
1084 default n
1085 help
1086 By selecting this option, every time the 16 hardware entries in
1087 the Blackfin's HW Trace buffer are full, the kernel will move them
1088 into a software buffer, for dumping when there is an issue. This
1089 has a great impact on performance, (an interrupt every 16 change of
1090 flows) and should normally be turned off, except in those nasty
1091 debugging sessions
1092
1093config DEBUG_BFIN_HWTRACE_EXPAND_LEN
1094 int "Size of Trace buffer (in power of 2k)"
1095 range 0 4
1096 depends on DEBUG_BFIN_HWTRACE_EXPAND
1097 default 1
1098 help
1099 This sets the size of the software buffer that the trace information
1100 is kept in.
1101 0 for (2^0) 1k, or 256 entries,
1102 1 for (2^1) 2k, or 512 entries,
1103 2 for (2^2) 4k, or 1024 entries,
1104 3 for (2^3) 8k, or 2048 entries,
1105 4 for (2^4) 16k, or 4096 entries
1106
Bryan Wu1394f032007-05-06 14:50:22 -07001107config DEBUG_BFIN_NO_KERN_HWTRACE
1108 bool "Trace user apps (turn off hwtrace in kernel)"
Robin Getz518039b2007-07-25 11:03:28 +08001109 depends on DEBUG_BFIN_HWTRACE_ON
Bryan Wu1394f032007-05-06 14:50:22 -07001110 default n
1111 help
1112 Some pieces of the kernel contain a lot of flow changes which can
1113 quickly fill up the hardware trace buffer. When debugging crashes,
1114 the hardware trace may indicate that the problem lies in kernel
1115 space when in reality an application is buggy.
1116
1117 Say Y here to disable hardware tracing in some known "jumpy" pieces
1118 of code so that the trace buffer will extend further back.
1119
1120config DUAL_CORE_TEST_MODULE
1121 tristate "Dual Core Test Module"
1122 depends on (BF561)
1123 default n
1124 help
1125 Say Y here to build-in dual core test module for dual core test.
1126
1127config CPLB_INFO
1128 bool "Display the CPLB information"
1129 help
1130 Display the CPLB information.
1131
1132config ACCESS_CHECK
1133 bool "Check the user pointer address"
1134 default y
1135 help
1136 Usually the pointer transfer from user space is checked to see if its
1137 address is in the kernel space.
1138
1139 Say N here to disable that check to improve the performance.
1140
1141endmenu
1142
1143source "security/Kconfig"
1144
1145source "crypto/Kconfig"
1146
1147source "lib/Kconfig"